PDP11, VAX: const cleanup
This commit is contained in:
parent
e768629009
commit
26ef9b566a
17 changed files with 36 additions and 36 deletions
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@ -97,7 +97,7 @@ t_stat vt_show_hspace(FILE *st, UNIT *uptr, int32 val, void *desc);
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t_stat vt_set_vspace(UNIT *uptr, int32 val, char *cptr, void *desc);
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t_stat vt_set_vspace(UNIT *uptr, int32 val, char *cptr, void *desc);
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t_stat vt_show_vspace(FILE *st, UNIT *uptr, int32 val, void *desc);
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t_stat vt_show_vspace(FILE *st, UNIT *uptr, int32 val, void *desc);
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t_stat vt_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, char *cptr);
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t_stat vt_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, char *cptr);
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char *vt_description (DEVICE *dptr);
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const char *vt_description (DEVICE *dptr);
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/* VT11/VS60 data structures
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/* VT11/VS60 data structures
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@ -404,7 +404,7 @@ vt_fetch(uint32 addr, vt11word *wp)
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return 1; /* used to set "time_out" flag */
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return 1; /* used to set "time_out" flag */
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}
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}
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char *vt_description (DEVICE *dptr)
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const char *vt_description (DEVICE *dptr)
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{
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{
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return (VS60) ? "VS60 Display processor"
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return (VS60) ? "VS60 Display processor"
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: "VT11 Display processor";
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: "VT11 Display processor";
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@ -40,7 +40,7 @@ extern jmp_buf save_env;
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int32 eval_int (void);
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int32 eval_int (void);
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t_stat qba_reset (DEVICE *dptr);
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t_stat qba_reset (DEVICE *dptr);
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char *qba_description (DEVICE *dptr);
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const char *qba_description (DEVICE *dptr);
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/* Qbus adapter data structures
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/* Qbus adapter data structures
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@ -338,7 +338,7 @@ for (i = 0; i < IPL_HLVL; i++)
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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char *qba_description (DEVICE *dptr)
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const char *qba_description (DEVICE *dptr)
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{
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{
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return "Qbus adapter";
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return "Qbus adapter";
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}
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}
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@ -43,7 +43,7 @@ int32 mctl_count = 0;
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t_stat mctl_rd (int32 *data, int32 PA, int32 access);
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t_stat mctl_rd (int32 *data, int32 PA, int32 access);
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t_stat mctl_wr (int32 data, int32 PA, int32 access);
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t_stat mctl_wr (int32 data, int32 PA, int32 access);
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t_stat mctl_reset (DEVICE *dptr);
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t_stat mctl_reset (DEVICE *dptr);
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char *mctl_description (DEVICE *dptr);
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const char *mctl_description (DEVICE *dptr);
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/* MCTL data structures
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/* MCTL data structures
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@ -107,7 +107,7 @@ mctl_count = (int32)(MEMSIZE >> 18); /* memory controllers en
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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char *mctl_description (DEVICE *dptr)
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const char *mctl_description (DEVICE *dptr)
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{
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{
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return "memory controller";
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return "memory controller";
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}
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}
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@ -69,7 +69,7 @@ static struct boot_dev boot_tab[] = {
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};
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};
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t_stat sysd_reset (DEVICE *dptr);
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t_stat sysd_reset (DEVICE *dptr);
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char *sysd_description (DEVICE *dptr);
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const char *sysd_description (DEVICE *dptr);
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t_stat vax610_boot (int32 flag, char *ptr);
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t_stat vax610_boot (int32 flag, char *ptr);
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t_stat vax610_boot_parse (int32 flag, char *ptr);
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t_stat vax610_boot_parse (int32 flag, char *ptr);
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t_stat cpu_boot (int32 unitno, DEVICE *dptr);
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t_stat cpu_boot (int32 unitno, DEVICE *dptr);
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@ -524,7 +524,7 @@ sim_vm_cmd = vax610_cmd;
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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char *sysd_description (DEVICE *dptr)
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const char *sysd_description (DEVICE *dptr)
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{
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{
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return "system devices";
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return "system devices";
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}
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}
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@ -74,7 +74,7 @@ uint32 mcsr2 = 0;
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t_stat mctl_reset (DEVICE *dptr);
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t_stat mctl_reset (DEVICE *dptr);
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t_stat mctl_rdreg (int32 *val, int32 pa, int32 mode);
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t_stat mctl_rdreg (int32 *val, int32 pa, int32 mode);
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t_stat mctl_wrreg (int32 val, int32 pa, int32 mode);
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t_stat mctl_wrreg (int32 val, int32 pa, int32 mode);
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char *mctl_description (DEVICE *dptr);
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const char *mctl_description (DEVICE *dptr);
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/* MCTLx data structures
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/* MCTLx data structures
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@ -192,7 +192,7 @@ mcsr2 = MEM_BOARD_MASK(MEMSIZE, MEM_SIZE_64K) | MCSR2_CS; /* Use 64k chips *
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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char *mctl_description (DEVICE *dptr)
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const char *mctl_description (DEVICE *dptr)
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{
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{
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return "memory controller";
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return "memory controller";
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}
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}
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@ -215,7 +215,7 @@ t_stat rb_rd32 (int32 *data, int32 PA, int32 access);
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t_stat rb_wr32 (int32 data, int32 PA, int32 access);
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t_stat rb_wr32 (int32 data, int32 PA, int32 access);
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t_stat rb_svc (UNIT *uptr);
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t_stat rb_svc (UNIT *uptr);
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t_stat rb_reset (DEVICE *dptr);
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t_stat rb_reset (DEVICE *dptr);
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char *rb_description (DEVICE *dptr);
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const char *rb_description (DEVICE *dptr);
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void rb_set_done (int32 error);
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void rb_set_done (int32 error);
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t_stat rb_attach (UNIT *uptr, char *cptr);
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t_stat rb_attach (UNIT *uptr, char *cptr);
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t_stat rb_set_size (UNIT *uptr, int32 val, char *cptr, void *desc);
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t_stat rb_set_size (UNIT *uptr, int32 val, char *cptr, void *desc);
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@ -639,7 +639,7 @@ if (rbxb == NULL)
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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char *rb_description (DEVICE *dptr)
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const char *rb_description (DEVICE *dptr)
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{
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{
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return "RB730 disk controller";
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return "RB730 disk controller";
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}
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}
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@ -81,7 +81,7 @@ extern jmp_buf save_env;
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extern int32 p1;
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extern int32 p1;
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t_stat sysb_reset (DEVICE *dptr);
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t_stat sysb_reset (DEVICE *dptr);
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char *sysb_description (DEVICE *dptr);
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const char *sysb_description (DEVICE *dptr);
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t_stat vax730_boot (int32 flag, char *ptr);
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t_stat vax730_boot (int32 flag, char *ptr);
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t_stat vax730_boot_parse (int32 flag, char *ptr);
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t_stat vax730_boot_parse (int32 flag, char *ptr);
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t_stat cpu_boot (int32 unitno, DEVICE *dptr);
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t_stat cpu_boot (int32 unitno, DEVICE *dptr);
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@ -580,7 +580,7 @@ sim_vm_cmd = vax730_cmd;
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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char *sysb_description (DEVICE *dptr)
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const char *sysb_description (DEVICE *dptr)
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{
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{
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return "system bus controller";
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return "system bus controller";
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}
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}
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@ -97,7 +97,7 @@ extern UNIT cpu_unit;
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extern int32 p1;
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extern int32 p1;
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t_stat uba_reset (DEVICE *dptr);
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t_stat uba_reset (DEVICE *dptr);
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char *uba_description (DEVICE *dptr);
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const char *uba_description (DEVICE *dptr);
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t_stat uba_ex (t_value *vptr, t_addr exta, UNIT *uptr, int32 sw);
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t_stat uba_ex (t_value *vptr, t_addr exta, UNIT *uptr, int32 sw);
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t_stat uba_dep (t_value val, t_addr exta, UNIT *uptr, int32 sw);
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t_stat uba_dep (t_value val, t_addr exta, UNIT *uptr, int32 sw);
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t_stat uba_rdreg (int32 *val, int32 pa, int32 mode);
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t_stat uba_rdreg (int32 *val, int32 pa, int32 mode);
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@ -665,7 +665,7 @@ fprintf (of, "Invalid argument\n");
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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char *uba_description (DEVICE *dptr)
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const char *uba_description (DEVICE *dptr)
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{
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{
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return "Unibus adapter";
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return "Unibus adapter";
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}
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}
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@ -101,7 +101,7 @@ extern jmp_buf save_env;
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extern int32 p1;
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extern int32 p1;
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t_stat cmi_reset (DEVICE *dptr);
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t_stat cmi_reset (DEVICE *dptr);
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char *cmi_description (DEVICE *dptr);
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const char *cmi_description (DEVICE *dptr);
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void cmi_set_tmo (void);
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void cmi_set_tmo (void);
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t_stat vax750_boot (int32 flag, char *ptr);
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t_stat vax750_boot (int32 flag, char *ptr);
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t_stat vax750_boot_parse (int32 flag, char *ptr);
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t_stat vax750_boot_parse (int32 flag, char *ptr);
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@ -666,7 +666,7 @@ cmi_cadr = 0;
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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char *cmi_description (DEVICE *dptr)
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const char *cmi_description (DEVICE *dptr)
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{
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{
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return "CPU/Memory interconnect";
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return "CPU/Memory interconnect";
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}
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}
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@ -89,7 +89,7 @@ uint32 mcsr1 = 0;
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uint32 mcsr2 = 0;
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uint32 mcsr2 = 0;
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t_stat mctl_reset (DEVICE *dptr);
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t_stat mctl_reset (DEVICE *dptr);
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char *mctl_description (DEVICE *dptr);
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const char *mctl_description (DEVICE *dptr);
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t_stat mctl_rdreg (int32 *val, int32 pa, int32 mode);
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t_stat mctl_rdreg (int32 *val, int32 pa, int32 mode);
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t_stat mctl_wrreg (int32 val, int32 pa, int32 mode);
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t_stat mctl_wrreg (int32 val, int32 pa, int32 mode);
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@ -227,7 +227,7 @@ mcsr2 = MCSR2_INIT | (boards & board_mask) | ((large_slot_size == MEM_SIZE_256K)
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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char *mctl_description (DEVICE *dptr)
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const char *mctl_description (DEVICE *dptr)
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{
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{
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return "Memory controller";
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return "Memory controller";
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}
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}
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@ -222,10 +222,10 @@ t_stat clk_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cpt
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t_stat clk_attach (UNIT *uptr, char *cptr);
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t_stat clk_attach (UNIT *uptr, char *cptr);
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t_stat clk_detach (UNIT *uptr);
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t_stat clk_detach (UNIT *uptr);
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t_stat tmr_reset (DEVICE *dptr);
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t_stat tmr_reset (DEVICE *dptr);
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char *tmr_description (DEVICE *dptr);
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const char *tmr_description (DEVICE *dptr);
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t_stat td_svc (UNIT *uptr);
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t_stat td_svc (UNIT *uptr);
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t_stat td_reset (DEVICE *dptr);
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t_stat td_reset (DEVICE *dptr);
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char *td_description (DEVICE *dptr);
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const char *td_description (DEVICE *dptr);
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int32 icr_rd (t_bool interp);
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int32 icr_rd (t_bool interp);
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void tmr_incr (uint32 inc);
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void tmr_incr (uint32 inc);
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void tmr_sched (void);
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void tmr_sched (void);
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@ -998,7 +998,7 @@ todr_resync (); /* resync TODR */
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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char *tmr_description (DEVICE *dptr)
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const char *tmr_description (DEVICE *dptr)
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{
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{
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return "interval timer";
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return "interval timer";
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}
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}
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@ -1279,7 +1279,7 @@ sim_cancel (&td_unit);
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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char *td_description (DEVICE *dptr)
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const char *td_description (DEVICE *dptr)
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{
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{
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return "Console TU58 cartridge";
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return "Console TU58 cartridge";
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}
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}
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extern int32 mem_err;
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extern int32 mem_err;
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t_stat uba_reset (DEVICE *dptr);
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t_stat uba_reset (DEVICE *dptr);
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char *uba_description (DEVICE *dptr);
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const char *uba_description (DEVICE *dptr);
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t_stat uba_ex (t_value *vptr, t_addr exta, UNIT *uptr, int32 sw);
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t_stat uba_ex (t_value *vptr, t_addr exta, UNIT *uptr, int32 sw);
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t_stat uba_dep (t_value val, t_addr exta, UNIT *uptr, int32 sw);
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t_stat uba_dep (t_value val, t_addr exta, UNIT *uptr, int32 sw);
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t_stat uba_rdreg (int32 *val, int32 pa, int32 mode);
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t_stat uba_rdreg (int32 *val, int32 pa, int32 mode);
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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char *uba_description (DEVICE *dptr)
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const char *uba_description (DEVICE *dptr)
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{
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{
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return "Unibus adapter";
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return "Unibus adapter";
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}
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}
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extern UNIT cpu_unit;
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extern UNIT cpu_unit;
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t_stat mctl_reset (DEVICE *dptr);
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t_stat mctl_reset (DEVICE *dptr);
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char *mctl_description (DEVICE *dptr);
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const char *mctl_description (DEVICE *dptr);
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t_stat mctl_rdreg (int32 *val, int32 pa, int32 mode);
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t_stat mctl_rdreg (int32 *val, int32 pa, int32 mode);
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t_stat mctl_wrreg (int32 val, int32 pa, int32 mode);
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t_stat mctl_wrreg (int32 val, int32 pa, int32 mode);
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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char *mctl_description (DEVICE *dptr)
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const char *mctl_description (DEVICE *dptr)
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{
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{
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static char buf[64];
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static char buf[64];
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extern int32 p1;
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extern int32 p1;
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t_stat sbi_reset (DEVICE *dptr);
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t_stat sbi_reset (DEVICE *dptr);
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char *sbi_description (DEVICE *dptr);
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const char *sbi_description (DEVICE *dptr);
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void sbi_set_tmo (int32 pa);
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void sbi_set_tmo (int32 pa);
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void uba_eval_int (void);
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void uba_eval_int (void);
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t_stat vax780_boot (int32 flag, char *ptr);
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t_stat vax780_boot (int32 flag, char *ptr);
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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char *sbi_description (DEVICE *dptr)
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const char *sbi_description (DEVICE *dptr)
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{
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{
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return "Synchronous Backplane Interconnect";
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return "Synchronous Backplane Interconnect";
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}
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}
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void uba_eval_int (void);
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void uba_eval_int (void);
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t_stat abus_reset (DEVICE *dptr);
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t_stat abus_reset (DEVICE *dptr);
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char *abus_description (DEVICE *dptr);
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const char *abus_description (DEVICE *dptr);
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t_stat vax860_boot (int32 flag, char *ptr);
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t_stat vax860_boot (int32 flag, char *ptr);
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t_stat vax860_boot_parse (int32 flag, char *ptr);
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t_stat vax860_boot_parse (int32 flag, char *ptr);
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t_stat cpu_boot (int32 unitno, DEVICE *dptr);
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t_stat cpu_boot (int32 unitno, DEVICE *dptr);
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@ -799,7 +799,7 @@ init_pamm ();
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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char *abus_description (DEVICE *dptr)
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const char *abus_description (DEVICE *dptr)
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{
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{
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return "bus controller";
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return "bus controller";
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}
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}
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@ -92,7 +92,7 @@ extern int32 fault_PC; /* fault PC */
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extern UNIT cpu_unit;
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extern UNIT cpu_unit;
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t_stat sbia_reset (DEVICE *dptr);
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t_stat sbia_reset (DEVICE *dptr);
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char *sbia_description (DEVICE *dptr);
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const char *sbia_description (DEVICE *dptr);
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void sbi_set_tmo (int32 pa);
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void sbi_set_tmo (int32 pa);
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||||||
t_stat (*nexusR[NEXUS_NUM])(int32 *dat, int32 ad, int32 md);
|
t_stat (*nexusR[NEXUS_NUM])(int32 *dat, int32 ad, int32 md);
|
||||||
t_stat (*nexusW[NEXUS_NUM])(int32 dat, int32 ad, int32 md);
|
t_stat (*nexusW[NEXUS_NUM])(int32 dat, int32 ad, int32 md);
|
||||||
|
@ -302,7 +302,7 @@ sbi_csr = SBICSR_SCOEN | SBICSR_SCIEN;
|
||||||
return SCPE_OK;
|
return SCPE_OK;
|
||||||
}
|
}
|
||||||
|
|
||||||
char *sbia_description (DEVICE *dptr)
|
const char *sbia_description (DEVICE *dptr)
|
||||||
{
|
{
|
||||||
return "SBI adapter";
|
return "SBI adapter";
|
||||||
}
|
}
|
||||||
|
|
|
@ -93,7 +93,7 @@ static const int32 cvtacc[16] = { 0, 0,
|
||||||
t_stat tlb_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw);
|
t_stat tlb_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw);
|
||||||
t_stat tlb_dep (t_value val, t_addr addr, UNIT *uptr, int32 sw);
|
t_stat tlb_dep (t_value val, t_addr addr, UNIT *uptr, int32 sw);
|
||||||
t_stat tlb_reset (DEVICE *dptr);
|
t_stat tlb_reset (DEVICE *dptr);
|
||||||
char *tlb_description (DEVICE *dptr);
|
const char *tlb_description (DEVICE *dptr);
|
||||||
|
|
||||||
TLBENT fill (uint32 va, int32 lnt, int32 acc, int32 *stat);
|
TLBENT fill (uint32 va, int32 lnt, int32 acc, int32 *stat);
|
||||||
extern int32 ReadIO (uint32 pa, int32 lnt);
|
extern int32 ReadIO (uint32 pa, int32 lnt);
|
||||||
|
@ -316,7 +316,7 @@ for (i = 0; i < VA_TBSIZE; i++)
|
||||||
return SCPE_OK;
|
return SCPE_OK;
|
||||||
}
|
}
|
||||||
|
|
||||||
char *tlb_description (DEVICE *dptr)
|
const char *tlb_description (DEVICE *dptr)
|
||||||
{
|
{
|
||||||
return "translation buffer";
|
return "translation buffer";
|
||||||
}
|
}
|
||||||
|
|
Loading…
Add table
Reference in a new issue