PDP11, VAX: const cleanup

This commit is contained in:
Mark Pizzolato 2015-02-21 12:48:35 -08:00
parent e768629009
commit 26ef9b566a
17 changed files with 36 additions and 36 deletions

View file

@ -97,7 +97,7 @@ t_stat vt_show_hspace(FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat vt_set_vspace(UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat vt_show_vspace(FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat vt_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, char *cptr);
char *vt_description (DEVICE *dptr);
const char *vt_description (DEVICE *dptr);
/* VT11/VS60 data structures
@ -404,7 +404,7 @@ vt_fetch(uint32 addr, vt11word *wp)
return 1; /* used to set "time_out" flag */
}
char *vt_description (DEVICE *dptr)
const char *vt_description (DEVICE *dptr)
{
return (VS60) ? "VS60 Display processor"
: "VT11 Display processor";

View file

@ -40,7 +40,7 @@ extern jmp_buf save_env;
int32 eval_int (void);
t_stat qba_reset (DEVICE *dptr);
char *qba_description (DEVICE *dptr);
const char *qba_description (DEVICE *dptr);
/* Qbus adapter data structures
@ -338,7 +338,7 @@ for (i = 0; i < IPL_HLVL; i++)
return SCPE_OK;
}
char *qba_description (DEVICE *dptr)
const char *qba_description (DEVICE *dptr)
{
return "Qbus adapter";
}

View file

@ -43,7 +43,7 @@ int32 mctl_count = 0;
t_stat mctl_rd (int32 *data, int32 PA, int32 access);
t_stat mctl_wr (int32 data, int32 PA, int32 access);
t_stat mctl_reset (DEVICE *dptr);
char *mctl_description (DEVICE *dptr);
const char *mctl_description (DEVICE *dptr);
/* MCTL data structures
@ -107,7 +107,7 @@ mctl_count = (int32)(MEMSIZE >> 18); /* memory controllers en
return SCPE_OK;
}
char *mctl_description (DEVICE *dptr)
const char *mctl_description (DEVICE *dptr)
{
return "memory controller";
}

View file

@ -69,7 +69,7 @@ static struct boot_dev boot_tab[] = {
};
t_stat sysd_reset (DEVICE *dptr);
char *sysd_description (DEVICE *dptr);
const char *sysd_description (DEVICE *dptr);
t_stat vax610_boot (int32 flag, char *ptr);
t_stat vax610_boot_parse (int32 flag, char *ptr);
t_stat cpu_boot (int32 unitno, DEVICE *dptr);
@ -524,7 +524,7 @@ sim_vm_cmd = vax610_cmd;
return SCPE_OK;
}
char *sysd_description (DEVICE *dptr)
const char *sysd_description (DEVICE *dptr)
{
return "system devices";
}

View file

@ -74,7 +74,7 @@ uint32 mcsr2 = 0;
t_stat mctl_reset (DEVICE *dptr);
t_stat mctl_rdreg (int32 *val, int32 pa, int32 mode);
t_stat mctl_wrreg (int32 val, int32 pa, int32 mode);
char *mctl_description (DEVICE *dptr);
const char *mctl_description (DEVICE *dptr);
/* MCTLx data structures
@ -192,7 +192,7 @@ mcsr2 = MEM_BOARD_MASK(MEMSIZE, MEM_SIZE_64K) | MCSR2_CS; /* Use 64k chips *
return SCPE_OK;
}
char *mctl_description (DEVICE *dptr)
const char *mctl_description (DEVICE *dptr)
{
return "memory controller";
}

View file

@ -215,7 +215,7 @@ t_stat rb_rd32 (int32 *data, int32 PA, int32 access);
t_stat rb_wr32 (int32 data, int32 PA, int32 access);
t_stat rb_svc (UNIT *uptr);
t_stat rb_reset (DEVICE *dptr);
char *rb_description (DEVICE *dptr);
const char *rb_description (DEVICE *dptr);
void rb_set_done (int32 error);
t_stat rb_attach (UNIT *uptr, char *cptr);
t_stat rb_set_size (UNIT *uptr, int32 val, char *cptr, void *desc);
@ -639,7 +639,7 @@ if (rbxb == NULL)
return SCPE_OK;
}
char *rb_description (DEVICE *dptr)
const char *rb_description (DEVICE *dptr)
{
return "RB730 disk controller";
}

View file

@ -81,7 +81,7 @@ extern jmp_buf save_env;
extern int32 p1;
t_stat sysb_reset (DEVICE *dptr);
char *sysb_description (DEVICE *dptr);
const char *sysb_description (DEVICE *dptr);
t_stat vax730_boot (int32 flag, char *ptr);
t_stat vax730_boot_parse (int32 flag, char *ptr);
t_stat cpu_boot (int32 unitno, DEVICE *dptr);
@ -580,7 +580,7 @@ sim_vm_cmd = vax730_cmd;
return SCPE_OK;
}
char *sysb_description (DEVICE *dptr)
const char *sysb_description (DEVICE *dptr)
{
return "system bus controller";
}

View file

@ -97,7 +97,7 @@ extern UNIT cpu_unit;
extern int32 p1;
t_stat uba_reset (DEVICE *dptr);
char *uba_description (DEVICE *dptr);
const char *uba_description (DEVICE *dptr);
t_stat uba_ex (t_value *vptr, t_addr exta, UNIT *uptr, int32 sw);
t_stat uba_dep (t_value val, t_addr exta, UNIT *uptr, int32 sw);
t_stat uba_rdreg (int32 *val, int32 pa, int32 mode);
@ -665,7 +665,7 @@ fprintf (of, "Invalid argument\n");
return SCPE_OK;
}
char *uba_description (DEVICE *dptr)
const char *uba_description (DEVICE *dptr)
{
return "Unibus adapter";
}

View file

@ -101,7 +101,7 @@ extern jmp_buf save_env;
extern int32 p1;
t_stat cmi_reset (DEVICE *dptr);
char *cmi_description (DEVICE *dptr);
const char *cmi_description (DEVICE *dptr);
void cmi_set_tmo (void);
t_stat vax750_boot (int32 flag, char *ptr);
t_stat vax750_boot_parse (int32 flag, char *ptr);
@ -666,7 +666,7 @@ cmi_cadr = 0;
return SCPE_OK;
}
char *cmi_description (DEVICE *dptr)
const char *cmi_description (DEVICE *dptr)
{
return "CPU/Memory interconnect";
}

View file

@ -89,7 +89,7 @@ uint32 mcsr1 = 0;
uint32 mcsr2 = 0;
t_stat mctl_reset (DEVICE *dptr);
char *mctl_description (DEVICE *dptr);
const char *mctl_description (DEVICE *dptr);
t_stat mctl_rdreg (int32 *val, int32 pa, int32 mode);
t_stat mctl_wrreg (int32 val, int32 pa, int32 mode);
@ -227,7 +227,7 @@ mcsr2 = MCSR2_INIT | (boards & board_mask) | ((large_slot_size == MEM_SIZE_256K)
return SCPE_OK;
}
char *mctl_description (DEVICE *dptr)
const char *mctl_description (DEVICE *dptr)
{
return "Memory controller";
}

View file

@ -222,10 +222,10 @@ t_stat clk_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cpt
t_stat clk_attach (UNIT *uptr, char *cptr);
t_stat clk_detach (UNIT *uptr);
t_stat tmr_reset (DEVICE *dptr);
char *tmr_description (DEVICE *dptr);
const char *tmr_description (DEVICE *dptr);
t_stat td_svc (UNIT *uptr);
t_stat td_reset (DEVICE *dptr);
char *td_description (DEVICE *dptr);
const char *td_description (DEVICE *dptr);
int32 icr_rd (t_bool interp);
void tmr_incr (uint32 inc);
void tmr_sched (void);
@ -998,7 +998,7 @@ todr_resync (); /* resync TODR */
return SCPE_OK;
}
char *tmr_description (DEVICE *dptr)
const char *tmr_description (DEVICE *dptr)
{
return "interval timer";
}
@ -1279,7 +1279,7 @@ sim_cancel (&td_unit);
return SCPE_OK;
}
char *td_description (DEVICE *dptr)
const char *td_description (DEVICE *dptr)
{
return "Console TU58 cartridge";
}

View file

@ -95,7 +95,7 @@ extern int32 fault_PC; /* fault PC */
extern int32 mem_err;
t_stat uba_reset (DEVICE *dptr);
char *uba_description (DEVICE *dptr);
const char *uba_description (DEVICE *dptr);
t_stat uba_ex (t_value *vptr, t_addr exta, UNIT *uptr, int32 sw);
t_stat uba_dep (t_value val, t_addr exta, UNIT *uptr, int32 sw);
t_stat uba_rdreg (int32 *val, int32 pa, int32 mode);
@ -634,7 +634,7 @@ uba_csr3 = 0;
return SCPE_OK;
}
char *uba_description (DEVICE *dptr)
const char *uba_description (DEVICE *dptr)
{
return "Unibus adapter";
}

View file

@ -91,7 +91,7 @@ uint32 rom_lw[MCTL_NUM][ROMSIZE >> 2];
extern UNIT cpu_unit;
t_stat mctl_reset (DEVICE *dptr);
char *mctl_description (DEVICE *dptr);
const char *mctl_description (DEVICE *dptr);
t_stat mctl_rdreg (int32 *val, int32 pa, int32 mode);
t_stat mctl_wrreg (int32 val, int32 pa, int32 mode);
@ -283,7 +283,7 @@ for (i = 0; i < MCTL_NUM; i++) {
return SCPE_OK;
}
char *mctl_description (DEVICE *dptr)
const char *mctl_description (DEVICE *dptr)
{
static char buf[64];

View file

@ -139,7 +139,7 @@ extern jmp_buf save_env;
extern int32 p1;
t_stat sbi_reset (DEVICE *dptr);
char *sbi_description (DEVICE *dptr);
const char *sbi_description (DEVICE *dptr);
void sbi_set_tmo (int32 pa);
void uba_eval_int (void);
t_stat vax780_boot (int32 flag, char *ptr);
@ -739,7 +739,7 @@ sim_vm_cmd = vax780_cmd;
return SCPE_OK;
}
char *sbi_description (DEVICE *dptr)
const char *sbi_description (DEVICE *dptr)
{
return "Synchronous Backplane Interconnect";
}

View file

@ -124,7 +124,7 @@ extern UNIT cpu_unit;
void uba_eval_int (void);
t_stat abus_reset (DEVICE *dptr);
char *abus_description (DEVICE *dptr);
const char *abus_description (DEVICE *dptr);
t_stat vax860_boot (int32 flag, char *ptr);
t_stat vax860_boot_parse (int32 flag, char *ptr);
t_stat cpu_boot (int32 unitno, DEVICE *dptr);
@ -799,7 +799,7 @@ init_pamm ();
return SCPE_OK;
}
char *abus_description (DEVICE *dptr)
const char *abus_description (DEVICE *dptr)
{
return "bus controller";
}

View file

@ -92,7 +92,7 @@ extern int32 fault_PC; /* fault PC */
extern UNIT cpu_unit;
t_stat sbia_reset (DEVICE *dptr);
char *sbia_description (DEVICE *dptr);
const char *sbia_description (DEVICE *dptr);
void sbi_set_tmo (int32 pa);
t_stat (*nexusR[NEXUS_NUM])(int32 *dat, int32 ad, int32 md);
t_stat (*nexusW[NEXUS_NUM])(int32 dat, int32 ad, int32 md);
@ -302,7 +302,7 @@ sbi_csr = SBICSR_SCOEN | SBICSR_SCIEN;
return SCPE_OK;
}
char *sbia_description (DEVICE *dptr)
const char *sbia_description (DEVICE *dptr)
{
return "SBI adapter";
}

View file

@ -93,7 +93,7 @@ static const int32 cvtacc[16] = { 0, 0,
t_stat tlb_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw);
t_stat tlb_dep (t_value val, t_addr addr, UNIT *uptr, int32 sw);
t_stat tlb_reset (DEVICE *dptr);
char *tlb_description (DEVICE *dptr);
const char *tlb_description (DEVICE *dptr);
TLBENT fill (uint32 va, int32 lnt, int32 acc, int32 *stat);
extern int32 ReadIO (uint32 pa, int32 lnt);
@ -316,7 +316,7 @@ for (i = 0; i < VA_TBSIZE; i++)
return SCPE_OK;
}
char *tlb_description (DEVICE *dptr)
const char *tlb_description (DEVICE *dptr)
{
return "translation buffer";
}