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Fix UTF-8 encoding for five files

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Peter Schorn 2023-03-30 14:00:11 +02:00 • committed by Paul Koning
parent 869dc0fe4a
commit 27bd6b81aa
5 changed files with 534 additions and 534 deletions
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2
HP2100/hp2100_cpu5.c
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@ -1676,7 +1676,7 @@ if (xidex) { /* is EMA declared? */
} }
} /* not EMA reference */ } /* not EMA reference */
ndim = ReadW(dtbl++); ndim = ReadW(dtbl++);
if (ndim<0) goto em15; /* negative ´dimensions */ if (ndim<0) goto em15; /* negative dimensions */
sum = 0; /* accu for index calc */ sum = 0; /* accu for index calc */
while (ndim > 0) { while (ndim > 0) {
MR = ReadW (atbl++); /* fetch address of A(N) */ MR = ReadW (atbl++); /* fetch address of A(N) */

2
I650/i650_cpu.c
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@ -22,7 +22,7 @@
cpu IBM 650 central processor cpu IBM 650 central processor
From Wikipedia: The IBM 650 Magnetic Drum Data-Processing Machine is one of From Wikipedia: The IBM 650 Magnetic Drum Data-Processing Machine is one of
IBM's early computers, and the world’s first mass-produced computer. It was IBM's early computers, and the world’s first mass-produced computer. It was
announced in 1953 and in 1956 enhanced as the IBM 650 RAMAC with the announced in 1953 and in 1956 enhanced as the IBM 650 RAMAC with the
addition of up to four disk storage units. Almost 2,000 systems were addition of up to four disk storage units. Almost 2,000 systems were
produced, the last in 1962. produced, the last in 1962.

2
Ibm1130/ibm1130_sca.c
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@ -680,7 +680,7 @@ static t_stat sca_svc (UNIT *uptr)
if (sca_dsw & SCA_DSW_READY) { /* if connected */ if (sca_dsw & SCA_DSW_READY) { /* if connected */
/* if rcvd data buffer is empty, and if in one of the receive states, checÄk for arrival of received data */ /* if rcvd data buffer is empty, and if in one of the receive states, check for arrival of received data */
if (in_receive_state() && sca_rcvptr >= sca_nrcvd) if (in_receive_state() && sca_rcvptr >= sca_nrcvd)
sca_check_indata(); sca_check_indata();

2
PDP10/pdp10_tim.c
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@ -335,7 +335,7 @@ int32 old_tick_in_usecs = tick_in_usecs;
* time base. This allows a maximum interval of 223 ms, which is almost 140 * time base. This allows a maximum interval of 223 ms, which is almost 140
* minutes. At the end of each interval, the :microcode sets Interval Done * minutes. At the end of each interval, the :microcode sets Interval Done
* (RDAPR bit 30), requesting an interrupt on the level assigned to the system * (RDAPR bit 30), requesting an interrupt on the level assigned to the system
* flags (§4.8). In a separate workspace register, the microcode starts with * flags (§4.8). In a separate workspace register, the microcode starts with
* the given period, decrements it by 4096 (2**12) every time the millisecond * the given period, decrements it by 4096 (2**12) every time the millisecond
* counter overflows, and sets the flag when the contents of this "time to go" * counter overflows, and sets the flag when the contents of this "time to go"
* register reach zero or less. Hence the countdown is by milliseconds, and * register reach zero or less. Hence the countdown is by milliseconds, and

2
SIMH-V4-status.md
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@ -99,7 +99,7 @@
#### CDC 1700 simulator from John Forecast #### CDC 1700 simulator from John Forecast
#### Hans-Åke Lund has implemented an SCELBI (SCientic-ELectronics-BIology) simulator. #### Hans-Åke Lund has implemented an SCELBI (SCientic-ELectronics-BIology) simulator.
#### IBM 650 simulator from Roberto Sancho Villa #### IBM 650 simulator from Roberto Sancho Villa