Compiler suggested cleanups
This commit is contained in:
parent
9bd8305943
commit
28f645aeab
9 changed files with 44 additions and 28 deletions
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@ -477,10 +477,11 @@ int32 dsk11(const int32 port, const int32 io, const int32 data) {
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sim_debug(OUT_MSG, &dsk_dev, "DSK%i: " ADDRESS_FORMAT " OUT 0x09: %x\n", current_disk, PCX, data);
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sim_debug(OUT_MSG, &dsk_dev, "DSK%i: " ADDRESS_FORMAT " OUT 0x09: %x\n", current_disk, PCX, data);
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if (data & 0x01) { /* step head in */
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if (data & 0x01) { /* step head in */
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if (current_track[current_disk] == (tracks[current_disk] - 1))
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if (current_track[current_disk] == (tracks[current_disk] - 1)) {
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sim_debug(TRACK_STUCK_MSG, &dsk_dev,
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sim_debug(TRACK_STUCK_MSG, &dsk_dev,
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"DSK%i: " ADDRESS_FORMAT " Unnecessary step in.\n",
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"DSK%i: " ADDRESS_FORMAT " Unnecessary step in.\n",
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current_disk, PCX);
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current_disk, PCX);
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}
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current_track[current_disk]++;
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current_track[current_disk]++;
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if (current_track[current_disk] > (tracks[current_disk] - 1))
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if (current_track[current_disk] > (tracks[current_disk] - 1))
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current_track[current_disk] = (tracks[current_disk] - 1);
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current_track[current_disk] = (tracks[current_disk] - 1);
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@ -491,10 +492,11 @@ int32 dsk11(const int32 port, const int32 io, const int32 data) {
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}
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}
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if (data & 0x02) { /* step head out */
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if (data & 0x02) { /* step head out */
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if (current_track[current_disk] == 0)
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if (current_track[current_disk] == 0) {
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sim_debug(TRACK_STUCK_MSG, &dsk_dev,
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sim_debug(TRACK_STUCK_MSG, &dsk_dev,
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"DSK%i: " ADDRESS_FORMAT " Unnecessary step out.\n",
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"DSK%i: " ADDRESS_FORMAT " Unnecessary step out.\n",
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current_disk, PCX);
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current_disk, PCX);
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}
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current_track[current_disk]--;
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current_track[current_disk]--;
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if (current_track[current_disk] < 0) {
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if (current_track[current_disk] < 0) {
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current_track[current_disk] = 0;
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current_track[current_disk] = 0;
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@ -572,14 +572,16 @@ static int32 checkParameters(void) {
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selectedTrack = 0;
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selectedTrack = 0;
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}
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}
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selectedDMA &= ADDRMASK;
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selectedDMA &= ADDRMASK;
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if (hdskLastCommand == HDSK_READ)
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if (hdskLastCommand == HDSK_READ) {
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sim_debug(READ_MSG, &hdsk_dev, "HDSK%d " ADDRESS_FORMAT
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sim_debug(READ_MSG, &hdsk_dev, "HDSK%d " ADDRESS_FORMAT
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" Read Track=%04d Sector=%02d Len=%04d DMA=%04x\n",
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" Read Track=%04d Sector=%02d Len=%04d DMA=%04x\n",
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selectedDisk, PCX, selectedTrack, selectedSector, uptr -> HDSK_SECTOR_SIZE, selectedDMA);
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selectedDisk, PCX, selectedTrack, selectedSector, uptr -> HDSK_SECTOR_SIZE, selectedDMA);
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if (hdskLastCommand == HDSK_WRITE)
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}
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if (hdskLastCommand == HDSK_WRITE) {
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sim_debug(WRITE_MSG, &hdsk_dev, "HDSK%d " ADDRESS_FORMAT
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sim_debug(WRITE_MSG, &hdsk_dev, "HDSK%d " ADDRESS_FORMAT
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" Write Track=%04d Sector=%02d Len=%04d DMA=%04x\n",
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" Write Track=%04d Sector=%02d Len=%04d DMA=%04x\n",
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selectedDisk, PCX, selectedTrack, selectedSector, uptr -> HDSK_SECTOR_SIZE, selectedDMA);
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selectedDisk, PCX, selectedTrack, selectedSector, uptr -> HDSK_SECTOR_SIZE, selectedDMA);
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}
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return TRUE;
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return TRUE;
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}
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}
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@ -702,12 +702,14 @@ static int32 sio0sCore(const int32 port, const int32 io, const int32 data) {
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int32 sio0s(const int32 port, const int32 io, const int32 data) {
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int32 sio0s(const int32 port, const int32 io, const int32 data) {
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const int32 result = sio0sCore(port, io, data);
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const int32 result = sio0sCore(port, io, data);
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if (io == 0)
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if (io == 0) {
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sim_debug(IN_MSG, &sio_dev, "\tSIO_S: " ADDRESS_FORMAT
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sim_debug(IN_MSG, &sio_dev, "\tSIO_S: " ADDRESS_FORMAT
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" IN(0x%03x) = 0x%02x\n", PCX, port, result);
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" IN(0x%03x) = 0x%02x\n", PCX, port, result);
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else if (io)
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}
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else if (io) {
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sim_debug(OUT_MSG, &sio_dev, "\tSIO_S: " ADDRESS_FORMAT
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sim_debug(OUT_MSG, &sio_dev, "\tSIO_S: " ADDRESS_FORMAT
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" OUT(0x%03x) = 0x%02x\n", PCX, port, data);
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" OUT(0x%03x) = 0x%02x\n", PCX, port, data);
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}
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return result;
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return result;
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}
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}
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@ -750,12 +752,14 @@ static char* printable(char* result, int32 data, const int32 isIn) {
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int32 sio0d(const int32 port, const int32 io, const int32 data) {
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int32 sio0d(const int32 port, const int32 io, const int32 data) {
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char buffer[8];
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char buffer[8];
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const int32 result = sio0dCore(port, io, data);
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const int32 result = sio0dCore(port, io, data);
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if (io == 0)
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if (io == 0) {
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sim_debug(IN_MSG, &sio_dev, "\tSIO_D: " ADDRESS_FORMAT
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sim_debug(IN_MSG, &sio_dev, "\tSIO_D: " ADDRESS_FORMAT
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" IN(0x%03x) = 0x%02x%s\n", PCX, port, result, printable(buffer, result, TRUE));
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" IN(0x%03x) = 0x%02x%s\n", PCX, port, result, printable(buffer, result, TRUE));
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else if (io)
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}
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else if (io) {
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sim_debug(OUT_MSG, &sio_dev, "\tSIO_D: " ADDRESS_FORMAT
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sim_debug(OUT_MSG, &sio_dev, "\tSIO_D: " ADDRESS_FORMAT
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" OUT(0x%03x) = 0x%02x%s\n", PCX, port, data, printable(buffer, data, FALSE));
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" OUT(0x%03x) = 0x%02x%s\n", PCX, port, data, printable(buffer, data, FALSE));
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}
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return result;
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return result;
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}
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}
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@ -1264,10 +1268,11 @@ static void attachCPM(UNIT *uptr) {
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/* 'C' option makes sure that file is properly truncated if it had existed before */
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/* 'C' option makes sure that file is properly truncated if it had existed before */
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sim_quiet = sim_switches & SWMASK ('Q'); /* -q means quiet */
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sim_quiet = sim_switches & SWMASK ('Q'); /* -q means quiet */
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lastCPMStatus = attach_unit(uptr, cpmCommandLine);
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lastCPMStatus = attach_unit(uptr, cpmCommandLine);
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if (lastCPMStatus != SCPE_OK)
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if (lastCPMStatus != SCPE_OK) {
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sim_debug(VERBOSE_MSG, &simh_device, "SIMH: " ADDRESS_FORMAT
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sim_debug(VERBOSE_MSG, &simh_device, "SIMH: " ADDRESS_FORMAT
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" Cannot open '%s' (%s).\n", PCX, cpmCommandLine,
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" Cannot open '%s' (%s).\n", PCX, cpmCommandLine,
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sim_error_text(lastCPMStatus));
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sim_error_text(lastCPMStatus));
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}
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}
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}
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/* setClockZSDOSAdr points to 6 byte block in M: YY MM DD HH MM SS in BCD notation */
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/* setClockZSDOSAdr points to 6 byte block in M: YY MM DD HH MM SS in BCD notation */
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@ -243,11 +243,12 @@
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#define STK_CHECK(x,y) if (((x) & 0377) < (y)) \
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#define STK_CHECK(x,y) if (((x) & 0377) < (y)) \
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int_req = int_req | INT_STK
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int_req = int_req | INT_STK
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#define IND_STEP(x) M[x] & A_IND; /* return next level indicator */ \
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#define IND_STEP(x) M[x] & A_IND; /* return next level indicator */ \
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if ( ((x) <= AUTO_TOP) && ((x) >= AUTO_INC) ) \
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if ( ((x) <= AUTO_TOP) && ((x) >= AUTO_INC) ) { \
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if ( (x) < AUTO_DEC ) \
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if ( (x) < AUTO_DEC ) \
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M[x] = (M[x] + 1) & DMASK; \
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M[x] = (M[x] + 1) & DMASK; \
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else \
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else \
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M[x] = (M[x] - 1) & DMASK; \
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M[x] = (M[x] - 1) & DMASK; \
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} \
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x = M[x] & AMASK
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x = M[x] & AMASK
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#define INCREMENT_PC PC = (PC + 1) & AMASK /* increment PC */
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#define INCREMENT_PC PC = (PC + 1) & AMASK /* increment PC */
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@ -2311,7 +2311,9 @@ t_stat dmc_wr(int32 data, int32 PA, int32 access)
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if (access == WRITE)
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if (access == WRITE)
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{
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{
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if (PA & 1)
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if (PA & 1)
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{
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sim_debug(DBG_WRN, controller->device, "dmc_wr(), Unexpected non-16-bit write access to SEL%d\n", reg);
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sim_debug(DBG_WRN, controller->device, "dmc_wr(), Unexpected non-16-bit write access to SEL%d\n", reg);
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}
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dmc_setreg(controller, PA, data, 1);
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dmc_setreg(controller, PA, data, 1);
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}
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}
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else
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else
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@ -1076,7 +1076,8 @@ switch (j) { /* case on class */
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for (cptr = get_glyph (cptr, gbuf, 0); gbuf[0] != 0;
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for (cptr = get_glyph (cptr, gbuf, 0); gbuf[0] != 0;
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cptr = get_glyph (cptr, gbuf, 0)) {
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cptr = get_glyph (cptr, gbuf, 0)) {
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for (i = 0; (opcode[i] != NULL) &&
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for (i = 0; (opcode[i] != NULL) &&
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(strcmp (opcode[i], gbuf) != 0) ; i++) ;
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(strcmp (opcode[i], gbuf) != 0) ; i++)
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;
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if ((((opc_val[i] >> I_V_CL) & I_M_CL) != j) ||
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if ((((opc_val[i] >> I_V_CL) & I_M_CL) != j) ||
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(opcode[i] == NULL))
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(opcode[i] == NULL))
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return SCPE_ARG;
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return SCPE_ARG;
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@ -2645,11 +2645,12 @@ t_stat xq_svc(UNIT* uptr)
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}
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}
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/* resubmit service timer */
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/* resubmit service timer */
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if ((xq->var->must_poll) || (xq->var->poll && (xq->var->mode != XQ_T_DELQA_PLUS)))
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if ((xq->var->must_poll) || (xq->var->poll && (xq->var->mode != XQ_T_DELQA_PLUS))) {
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if (sim_idle_enab)
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if (sim_idle_enab)
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sim_clock_coschedule(uptr, tmxr_poll);
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sim_clock_coschedule(uptr, tmxr_poll);
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else
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else
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sim_activate(uptr, (tmr_poll*clk_tps)/xq->var->poll);
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sim_activate(uptr, (tmr_poll*clk_tps)/xq->var->poll);
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}
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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@ -1739,7 +1739,7 @@ fprintf (st, "console halt (BREAK typed on the console terminal). If BDR<7> is
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fprintf (st, "onsole firmware responds to all these conditions by entering its interactive\n");
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fprintf (st, "onsole firmware responds to all these conditions by entering its interactive\n");
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fprintf (st, "command mode. If BDR<7> is clear, the console firmware boots the operating\n");
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fprintf (st, "command mode. If BDR<7> is clear, the console firmware boots the operating\n");
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fprintf (st, "system in response to these conditions. This bit can be set and cleared by\n");
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fprintf (st, "system in response to these conditions. This bit can be set and cleared by\n");
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fprintf (st, "the command “SET CPU AUTOBOOT” (clearing the flag) and “SET CPU NOAUTOBOOT”\n");
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fprintf (st, "the command \"SET CPU AUTOBOOT\" (clearing the flag) and \"SET CPU NOAUTOBOOT\"\n");
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fprintf (st, "setting the flag. The default value is set.\n");
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fprintf (st, "setting the flag. The default value is set.\n");
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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@ -88,20 +88,20 @@
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/* Macros to handle the flags in the CCR */
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/* Macros to handle the flags in the CCR */
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#define CCR_ALWAYS_ON (0xC0) /* for 6800 */
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#define CCR_ALWAYS_ON (0xC0) /* for 6800 */
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#define CCR_MSK (HF|IF|NF|ZF|VF|CF)
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#define CCR_MSK (HF|IF|NF|ZF|VF|CF)
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#define TOGGLE_FLAG(FLAG) (CCR ^= FLAG)
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#define TOGGLE_FLAG(FLAG) ((CCR) ^= FLAG)
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#define SET_FLAG(FLAG) (CCR |= FLAG)
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#define SET_FLAG(FLAG) ((CCR) |= FLAG)
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#define CLR_FLAG(FLAG) (CCR &= ~FLAG)
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#define CLR_FLAG(FLAG) ((CCR) &= ~FLAG)
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#define GET_FLAG(FLAG) (CCR & FLAG)
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#define GET_FLAG(FLAG) ((CCR) & FLAG)
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#define COND_SET_FLAG(COND,FLAG) \
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#define COND_SET_FLAG(COND,FLAG) \
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if (COND) SET_FLAG(FLAG); else CLR_FLAG(FLAG)
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if (COND) SET_FLAG(FLAG); else CLR_FLAG(FLAG)
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#define COND_SET_FLAG_N(VAR) \
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#define COND_SET_FLAG_N(VAR) \
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if (VAR & 0x80) SET_FLAG(NF); else CLR_FLAG(NF)
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if ((VAR) & 0x80) SET_FLAG(NF); else CLR_FLAG(NF)
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#define COND_SET_FLAG_Z(VAR) \
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#define COND_SET_FLAG_Z(VAR) \
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if (VAR == 0) SET_FLAG(ZF); else CLR_FLAG(ZF)
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if ((VAR) == 0) SET_FLAG(ZF); else CLR_FLAG(ZF)
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#define COND_SET_FLAG_H(VAR) \
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#define COND_SET_FLAG_H(VAR) \
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if (VAR & 0x10) SET_FLAG(HF); else CLR_FLAG(HF)
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if ((VAR) & 0x10) SET_FLAG(HF); else CLR_FLAG(HF)
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#define COND_SET_FLAG_C(VAR) \
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#define COND_SET_FLAG_C(VAR) \
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if (VAR & 0x100) SET_FLAG(CF); else CLR_FLAG(CF)
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if ((VAR) & 0x100) SET_FLAG(CF); else CLR_FLAG(CF)
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#define COND_SET_FLAG_V(COND) \
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#define COND_SET_FLAG_V(COND) \
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if (COND) SET_FLAG(VF); else CLR_FLAG(VF)
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if (COND) SET_FLAG(VF); else CLR_FLAG(VF)
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@ -1885,18 +1885,20 @@ int32 get_flag(int32 flg)
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void condevalVa(int32 op1, int32 op2)
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void condevalVa(int32 op1, int32 op2)
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{
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{
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if (get_flag(CF))
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if (get_flag(CF)) {
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COND_SET_FLAG_V(((op1 & 0x80) && (op2 & 0x80)) || (
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COND_SET_FLAG_V(((op1 & 0x80) && (op2 & 0x80)) || (
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((op1 & 0x80) == 0) && ((op2 & 0x80) == 0)));
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((op1 & 0x80) == 0) && ((op2 & 0x80) == 0)));
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}
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}
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}
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/* test and set V for subtraction */
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/* test and set V for subtraction */
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void condevalVs(int32 op1, int32 op2)
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void condevalVs(int32 op1, int32 op2)
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{
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{
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if (get_flag(CF))
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if (get_flag(CF)) {
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COND_SET_FLAG_V(((op1 & 0x80) && ((op2 & 0x80) == 0)) ||
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COND_SET_FLAG_V(((op1 & 0x80) && ((op2 & 0x80) == 0)) ||
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(((op1 & 0x80) == 0) && (op2 & 0x80)));
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(((op1 & 0x80) == 0) && (op2 & 0x80)));
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}
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}
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}
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/* calls from the simulator */
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/* calls from the simulator */
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