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sigma: Fix dangling else in IO read/write direct

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Ken Rector 2022-07-12 13:53:32 -07:00 • committed by Mark Pizzolato
parent 6dc50c564b
commit 2a69f1bdfa
2 changed files with 10 additions and 5 deletions
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1
sigma/sigma_bugs.txt
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@ -119,6 +119,7 @@
113. MT: device address must include unit identifier everywhere, for interrupt generation. 113. MT: device address must include unit identifier everywhere, for interrupt generation.
114: RAD: device address must include unit identifier everywhere, for interrupt generation. 114: RAD: device address must include unit identifier everywhere, for interrupt generation.
115. MT: error handling not consistent. 115. MT: error handling not consistent.
116: IO: dangling else in write direct mode 1 code causes incorrect behavior.
Diagnostic Notes Diagnostic Notes

14
sigma/sigma_io.c
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@ -1,6 +1,6 @@
/* sigma_io.c: XDS Sigma IO simulator /* sigma_io.c: XDS Sigma IO simulator
Copyright (c) 2007-2017, Robert M Supnik Copyright (c) 2007-2022, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"), copy of this software and associated documentation files (the "Software"),
@ -23,6 +23,8 @@
used in advertising or otherwise to promote the sale, use or other dealings used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik. in this Software without prior written authorization from Robert M Supnik.
07-Jul-2022 RMS Fixed dangling else in read/write direct (Ken Rector)
05-Mar-2020 RMS Fixed s5x0_ireg size declaration (Mark Pizzolato)
09-Mar-2017 RMS Fixed unspecified return value in HIO (COVERITY) 09-Mar-2017 RMS Fixed unspecified return value in HIO (COVERITY)
*/ */
@ -38,7 +40,7 @@ uint32 ei_bmax = EIGRP_DFLT; /* ext int grps */
uint32 s9_snap = 0; uint32 s9_snap = 0;
uint32 s9_marg = 0; uint32 s9_marg = 0;
uint32 chan_num = CHAN_DFLT; /* num chan */ uint32 chan_num = CHAN_DFLT; /* num chan */
uint32 s5x0_ireg[] = { 0 }; uint32 s5x0_ireg[32] = { 0 };
uint16 int_arm[INTG_MAX]; /* int grps: arm */ uint16 int_arm[INTG_MAX]; /* int grps: arm */
uint16 int_enb[INTG_MAX]; /* enable */ uint16 int_enb[INTG_MAX]; /* enable */
uint16 int_req[INTG_MAX]; /* request */ uint16 int_req[INTG_MAX]; /* request */
@ -1108,13 +1110,15 @@ uint32 i, beg, end, mask, sc;
uint32 grp = DIO_GET1GRP (ad); uint32 grp = DIO_GET1GRP (ad);
uint32 fnc = DIO_GET1FNC (ad); uint32 fnc = DIO_GET1FNC (ad);
if (grp == 1) /* group 1? */
return 0; /* not there */
if (grp == 0) { /* overrides? */ if (grp == 0) { /* overrides? */
beg = INTG_OVR; beg = INTG_OVR;
end = INTG_IO; end = INTG_IO;
} }
else if (grp == 1) /* group 1? */ else { /* all others */
return 0; /* not there */ beg = end = grp + 1;
else beg = end = grp + 1; }
if (op == OP_RD) { /* read direct? */ if (op == OP_RD) { /* read direct? */
if (!QCPU_S89_5X0) /* S89, 5X0 only */ if (!QCPU_S89_5X0) /* S89, 5X0 only */