diff --git a/PDP18B/pdp18b_dt.c b/PDP18B/pdp18b_dt.c
index a031eaa5..27f6d264 100644
--- a/PDP18B/pdp18b_dt.c
+++ b/PDP18B/pdp18b_dt.c
@@ -27,6 +27,7 @@
                 (PDP-9) TC02/TU55 DECtape
                 (PDP-15) TC15/TU56 DECtape
 
+   03-May-21    RMS     Fixed bug if read overwrites WC memory location
    15-Mar-17    RMS     Fixed dt_seterr to clear successor states
    09-Mar-17    RMS     Fixed dt_seterr to handle nx unit select (COVERITY)
    10-Mar-16    RMS     Added 3-cycle databreak set/show entries
@@ -961,10 +962,10 @@ switch (fnc) {                                          /* at speed, check fnc *
         sim_activate (uptr, DTU_LPERB (uptr) * dt_ltime);/* sched next block */
         M[DT_WC] = (M[DT_WC] + 1) & DMASK;              /* inc WC */
         ma = M[DT_CA] & AMASK;                          /* get mem addr */
-        if (MEM_ADDR_OK (ma))                           /* store block # */
-            M[ma] = blk;
         if (((dtsa & DTA_MODE) == 0) || (M[DT_WC] == 0))
                 dtsb = dtsb | DTB_DTF;                  /* set DTF */
+        if (MEM_ADDR_OK (ma))                           /* store block # */
+            M[ma] = blk;
         if (DEBUG_PRI (dt_dev, LOG_MS))
             fprintf (sim_deb, ">>DT%d: found block %d\n", unum, blk);
         break;
@@ -1001,6 +1002,8 @@ switch (fnc) {                                          /* at speed, check fnc *
         case 0:                                         /* normal read */
             M[DT_WC] = (M[DT_WC] + 1) & DMASK;          /* incr WC, CA */
             M[DT_CA] = (M[DT_CA] + 1) & DMASK;
+            if (M[DT_WC] == 0)                          /* wc ovf? */
+                dt_substate = DTO_WCO;
             ma = M[DT_CA] & AMASK;                      /* mem addr */
             ba = (blk * DTU_BSIZE (uptr)) + wrd;        /* buffer ptr */
             dtdb = fbuf[ba];                            /* get tape word */
@@ -1008,17 +1011,15 @@ switch (fnc) {                                          /* at speed, check fnc *
                 dtdb = dt_comobv (dtdb);
             if (MEM_ADDR_OK (ma))                       /* mem addr legal? */
                 M[ma] = dtdb;
-            if (M[DT_WC] == 0)                          /* wc ovf? */
-                dt_substate = DTO_WCO;
             /* fall through */
         case DTO_WCO:                                   /* wc ovf, not sob */
             if (wrd != (dir? 0: DTU_BSIZE (uptr) - 1))  /* not last? */
                 sim_activate (uptr, DT_WSIZE * dt_ltime);
             else {
-                dt_substate = dt_substate | DTO_SOB;
                 sim_activate (uptr, ((2 * DT_HTLIN) + DT_WSIZE) * dt_ltime);
-                if (((dtsa & DTA_MODE) == 0) || (M[DT_WC] == 0))
+                if (((dtsa & DTA_MODE) == 0) || (dt_substate == DTO_WCO))
                     dtsb = dtsb | DTB_DTF;              /* set DTF */
+                dt_substate = dt_substate | DTO_SOB;
                 }
             break;                      
 
@@ -1107,6 +1108,8 @@ switch (fnc) {                                          /* at speed, check fnc *
             relpos = DT_LIN2OF (uptr->pos, uptr);       /* cur pos in blk */
             M[DT_WC] = (M[DT_WC] + 1) & DMASK;          /* incr WC, CA */
             M[DT_CA] = (M[DT_CA] + 1) & DMASK;
+            if (M[DT_WC] == 0)
+                dt_substate = DTO_WCO;
             ma = M[DT_CA] & AMASK;                      /* mem addr */
             if ((relpos >= DT_HTLIN) &&                 /* in data zone? */
                 (relpos < (DTU_LPERB (uptr) - DT_HTLIN))) {
@@ -1120,9 +1123,7 @@ switch (fnc) {                                          /* at speed, check fnc *
             sim_activate (uptr, DT_WSIZE * dt_ltime);
             if (MEM_ADDR_OK (ma))                       /* mem addr legal? */
                 M[ma] = dtdb;
-            if (M[DT_WC] == 0)
-                dt_substate = DTO_WCO;
-            if (((dtsa & DTA_MODE) == 0) || (M[DT_WC] == 0))
+            if (((dtsa & DTA_MODE) == 0) || (dt_substate == DTO_WCO))
                 dtsb = dtsb | DTB_DTF;                  /* set DTF */
             break;
 
diff --git a/PDP18B/pdp18b_rf.c b/PDP18B/pdp18b_rf.c
index 33ece3d7..0ddca202 100644
--- a/PDP18B/pdp18b_rf.c
+++ b/PDP18B/pdp18b_rf.c
@@ -1,6 +1,6 @@
 /* pdp18b_rf.c: fixed head disk simulator
 
-   Copyright (c) 1993-2016, Robert M Supnik
+   Copyright (c) 1993-2021, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -26,6 +26,7 @@
    rf           (PDP-9) RF09/RF09
                 (PDP-15) RF15/RS09
 
+   21-Apr-21    RMS     Fixed bug if read overwrites WC memory location
    10-Mar-16    RMS     Added 3-cycle databreak set/show entries
    07-Mar-16    RMS     Revised for dynamically allocated memory
    13-Sep-15    RMS     Added APIVEC register
@@ -270,6 +271,7 @@ return dat;
 t_stat rf_svc (UNIT *uptr)
 {
 int32 f, pa, d, t;
+int32 wc = 0;
 int32 *fbuf = (int32 *) uptr->filebuf;
 
 if ((uptr->flags & UNIT_BUF) == 0) {                    /* not buf? abort */
@@ -283,8 +285,8 @@ do {
         rf_updsta (RFS_NED);                            /* nx disk error */
         break;
         }
-    M[RF_WC] = (M[RF_WC] + 1) & DMASK;                  /* incr word count */
-        pa = M[RF_CA] = (M[RF_CA] + 1) & AMASK;         /* incr mem addr */
+    wc = M[RF_WC] = (M[RF_WC] + 1) & DMASK;             /* incr word count */
+    pa = M[RF_CA] = (M[RF_CA] + 1) & AMASK;             /* incr mem addr */
     if ((f == FN_READ) && MEM_ADDR_OK (pa))             /* read? */
         M[pa] = fbuf[rf_da];
     if ((f == FN_WCHK) && (M[pa] != fbuf[rf_da])) {     /* write check? */
@@ -305,9 +307,9 @@ do {
             }
         }
     rf_da = rf_da + 1;                                  /* incr disk addr */
-    } while ((M[RF_WC] != 0) && (rf_burst != 0));       /* brk if wc, no brst */
+    } while ((wc != 0) && (rf_burst != 0));             /* brk if wc, no brst */
 
-if ((M[RF_WC] != 0) && ((rf_sta & RFS_ERR) == 0))       /* more to do? */
+if ((wc != 0) && ((rf_sta & RFS_ERR) == 0))             /* more to do? */
     sim_activate (&rf_unit, rf_time);                   /* sched next */
 else rf_updsta (RFS_DON);
 return SCPE_OK;
diff --git a/PDP8/pdp8_df.c b/PDP8/pdp8_df.c
index 52e644b9..efaeafb8 100644
--- a/PDP8/pdp8_df.c
+++ b/PDP8/pdp8_df.c
@@ -1,6 +1,6 @@
 /* pdp8_df.c: DF32 fixed head disk simulator
 
-   Copyright (c) 1993-2013, Robert M Supnik
+   Copyright (c) 1993-2021, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -25,6 +25,7 @@
 
    df           DF32 fixed head disk
 
+   21-Apr-21    RMS     Fixed bug if read overwrites WC memory location
    17-Sep-13    RMS     Changed to use central set_bootpc routine
    03-Sep-13    RMS     Added explicit void * cast
    15-May-06    RMS     Fixed bug in autosize attach (Dave Gesswein)
@@ -254,6 +255,7 @@ t_stat df_svc (UNIT *uptr)
 int32 pa, t, mex;
 uint32 da;
 int16 *fbuf = (int16 *) uptr->filebuf;
+uint16 wc = 0;
 
 UPDATE_PCELL;                                           /* update photocell */
 if ((uptr->flags & UNIT_BUF) == 0) {                    /* not buf? abort */
@@ -269,11 +271,12 @@ do {
         df_sta = df_sta | DFS_NXD;
         break;
         }
-    M[DF_WC] = (M[DF_WC] + 1) & 07777;                  /* incr word count */
+    wc = M[DF_WC] = (M[DF_WC] + 1) & 07777;             /* incr word count */
     M[DF_MA] = (M[DF_MA] + 1) & 07777;                  /* incr mem addr */
     pa = mex | M[DF_MA];                                /* add extension */
     if (uptr->FUNC == DF_READ) {                        /* read? */
-        if (MEM_ADDR_OK (pa)) M[pa] = fbuf[da];         /* if !nxm, read wd */
+        if (MEM_ADDR_OK (pa))                           /* if !nxm, read wd */
+            M[pa] = fbuf[da];
         }
     else {                                              /* write */
         t = (da >> 14) & 07;                            /* check wr lock */
@@ -285,9 +288,9 @@ do {
             }
         }
     da = (da + 1) & 0377777;                            /* incr disk addr */
-    } while ((M[DF_WC] != 0) && (df_burst != 0));       /* brk if wc, no brst */
+    } while ((wc != 0) && (df_burst != 0));             /* brk if wc, no brst */
 
-if ((M[DF_WC] != 0) && ((df_sta & DFS_ERR) == 0))       /* more to do? */
+if ((wc != 0) && ((df_sta & DFS_ERR) == 0))             /* more to do? */
     sim_activate (&df_unit, df_time);                   /* sched next */
 else {
     if (uptr->FUNC != DF_READ)
diff --git a/PDP8/pdp8_dt.c b/PDP8/pdp8_dt.c
index 46c12410..6e8aa533 100644
--- a/PDP8/pdp8_dt.c
+++ b/PDP8/pdp8_dt.c
@@ -25,6 +25,7 @@
 
    dt           TC08/TU56 DECtape
 
+   03-May-21    RMS     Fixed bug if read overwrites WC memory location
    01-Jul-20    RMS     Fixed comments in bootstrap (Bernhard Baehr)
    15-Mar-17    RMS     Fixed dt_seterr to clear successor states
    17-Sep-13    RMS     Changed to use central set_bootpc routine
@@ -766,10 +767,10 @@ switch (fnc) {                                          /* at speed, check fnc *
         sim_activate (uptr, DTU_LPERB (uptr) * dt_ltime);/* sched next block */
         M[DT_WC] = (M[DT_WC] + 1) & 07777;              /* incr word cnt */
         ma = DTB_GETMEX (dtsb) | M[DT_CA];              /* get mem addr */
-        if (MEM_ADDR_OK (ma))                           /* store block # */
-            M[ma] = blk & 07777;
         if (((dtsa & DTA_MODE) == 0) || (M[DT_WC] == 0))
             dtsb = dtsb | DTB_DTF;                      /* set DTF */
+        if (MEM_ADDR_OK (ma))                           /* store block # */
+            M[ma] = blk & 07777;
         break;
 
     case DTS_OFR:                                       /* off reel */
@@ -809,6 +810,8 @@ switch (fnc) {                                          /* at speed, check fnc *
         case 0:                                         /* normal read */
             M[DT_WC] = (M[DT_WC] + 1) & 07777;          /* incr WC, CA */
             M[DT_CA] = (M[DT_CA] + 1) & 07777;
+            if (M[DT_WC] == 0)                          /* wc ovf? */
+                dt_substate = DTO_WCO;
             ma = DTB_GETMEX (dtsb) | M[DT_CA];          /* get mem addr */
             ba = (blk * DTU_BSIZE (uptr)) + wrd;        /* buffer ptr */
             dat = fbuf[ba];                             /* get tape word */
@@ -816,8 +819,6 @@ switch (fnc) {                                          /* at speed, check fnc *
                 dat = dt_comobv (dat);
             if (MEM_ADDR_OK (ma))                       /* mem addr legal? */
                 M[ma] = dat;
-            if (M[DT_WC] == 0)                          /* wc ovf? */
-                dt_substate = DTO_WCO;
             /* fall through */
         case DTO_WCO:                                   /* wc ovf, not sob */
             if (wrd != (dir? 0: DTU_BSIZE (uptr) - 1))  /* not last? */
@@ -825,7 +826,7 @@ switch (fnc) {                                          /* at speed, check fnc *
             else {
                 dt_substate = dt_substate | DTO_SOB;
                 sim_activate (uptr, ((2 * DT_HTLIN) + DT_WSIZE) * dt_ltime);
-                if (((dtsa & DTA_MODE) == 0) || (M[DT_WC] == 0))
+                if (((dtsa & DTA_MODE) == 0) || (dt_substate == DTO_WCO))
                     dtsb = dtsb | DTB_DTF;              /* set DTF */
                 }
             break;                      
@@ -917,6 +918,8 @@ switch (fnc) {                                          /* at speed, check fnc *
             relpos = DT_LIN2OF (uptr->pos, uptr);       /* cur pos in blk */
             M[DT_WC] = (M[DT_WC] + 1) & 07777;          /* incr WC, CA */
             M[DT_CA] = (M[DT_CA] + 1) & 07777;
+            if (M[DT_WC] == 0)
+                dt_substate = DTO_WCO;
             ma = DTB_GETMEX (dtsb) | M[DT_CA];          /* get mem addr */
             if ((relpos >= DT_HTLIN) &&                 /* in data zone? */
                 (relpos < (DTU_LPERB (uptr) - DT_HTLIN))) {
@@ -930,9 +933,7 @@ switch (fnc) {                                          /* at speed, check fnc *
             sim_activate (uptr, DT_WSIZE * dt_ltime);
             if (MEM_ADDR_OK (ma))                       /* mem addr legal? */
                 M[ma] = dat;
-            if (M[DT_WC] == 0)
-                dt_substate = DTO_WCO;
-            if (((dtsa & DTA_MODE) == 0) || (M[DT_WC] == 0))
+            if (((dtsa & DTA_MODE) == 0) || (dt_substate == DTO_WCO))
                 dtsb = dtsb | DTB_DTF;                  /* set DTF */
             break;
 
diff --git a/PDP8/pdp8_rf.c b/PDP8/pdp8_rf.c
index e5a13b87..ca347faa 100644
--- a/PDP8/pdp8_rf.c
+++ b/PDP8/pdp8_rf.c
@@ -1,6 +1,6 @@
 /* pdp8_rf.c: RF08 fixed head disk simulator
 
-   Copyright (c) 1993-2013, Robert M Supnik
+   Copyright (c) 1993-2021, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -25,6 +25,7 @@
 
    rf           RF08 fixed head disk
 
+   21-Apr-21    RMS     Fixed bug if read overwrites WC memory location
    17-Sep-13    RMS     Changed to use central set_bootpc routine
    03-Sep-13    RMS     Added explicit void * cast
    15-May-06    RMS     Fixed bug in autosize attach (Dave Gesswein)
@@ -308,6 +309,7 @@ t_stat rf_svc (UNIT *uptr)
 {
 int32 pa, t, mex;
 int16 *fbuf = (int16 *) uptr->filebuf;
+uint16 wc = 0;
 
 UPDATE_PCELL;                                           /* update photocell */
 if ((uptr->flags & UNIT_BUF) == 0) {                    /* not buf? abort */
@@ -323,7 +325,7 @@ do {
         rf_sta = rf_sta | RFS_NXD;
         break;
         }
-    M[RF_WC] = (M[RF_WC] + 1) & 07777;                  /* incr word count */
+    wc = M[RF_WC] = (M[RF_WC] + 1) & 07777;             /* incr word count */
     M[RF_MA] = (M[RF_MA] + 1) & 07777;                  /* incr mem addr */
     pa = mex | M[RF_MA];                                /* add extension */
     if (uptr->FUNC == RF_READ) {                        /* read? */
@@ -341,9 +343,9 @@ do {
             }
         }
     rf_da = (rf_da + 1) & 03777777;                     /* incr disk addr */
-    } while ((M[RF_WC] != 0) && (rf_burst != 0));       /* brk if wc, no brst */
+    } while ((wc != 0) && (rf_burst != 0));             /* brk if wc, no brst */
 
-if ((M[RF_WC] != 0) && ((rf_sta & RFS_ERR) == 0))       /* more to do? */
+if ((wc != 0) && ((rf_sta & RFS_ERR) == 0))             /* more to do? */
     sim_activate (&rf_unit, rf_time);                   /* sched next */
 else {
     rf_done = 1;                                        /* done */