From 2d5226a1cd375c69c9d37d2e7a842a75c880e0f6 Mon Sep 17 00:00:00 2001 From: Ian Robert Stewart Date: Thu, 3 Jun 2021 07:44:07 -0700 Subject: [PATCH] alpha: Correct opcode mnemonics MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Four corrections to typos in mnemonics in const char *opcode[] in alpha_sys.c: _L should be _C for opcodes 2E and 2F. Alpha simulator V4.0-0 Current git commit id: 3c1c92d sim> ; Opcode 2E sim> ev -m 0xB8000000 0: STL_L R0,0(R0) 4: 00000000B8000000 sim> sim> ; Opcode 2F sim> ev -m 0xBC000000 0: STQ_L R0,0(R0) 4: 00000000BC000000 sim> According to, Alpha Architecture Handbook V4, October 1998, Table C2: There are no instructions with the mnemonics STL_L or STQ_L, but there are STL_C and STQ_C. The nmemonics are correct in https://github.com/simh/simh/blob/master/alpha/alpha_cpu.c case OP_STL_C: /* STL_C / case OP_STQ_C: / STQ_C */ but in https://github.com/simh/simh/blob/master/alpha/alpha_sys.c In const char *opcode[] = { the line: "STL", "STQ", "STL_L", "STQ_L", has been corrected to be: "STL", "STQ", "STL_C", "STQ_C", ===== BF should be FB in mnemonic for Opcode 36. Alpha simulator V4.0-0 Current git commit id: 3c1c92d sim> ; Opcode 36 sim> ev -m 0xD8000000 0: BFGE R0,4 4: 00000000D8000000 sim> According to, Alpha Architecture Handbook V4, October 1998, Table C2: FBGE Bra 36 Floating branch if ≥ zero This is correct in https://github.com/simh/simh/blob/master/alpha/alpha_cpu.c case OP_FBGT: /* FBGT */ but in https://github.com/simh/simh/blob/master/alpha/alpha_sys.c In const char *opcode[] = { the line "BSR", "FBNE", "BFGE", "FBGT", has been corrected to be... "BSR", "FBNE", "FBGE", "FBGT", ===== MULLQ/V should MULQ/V as the mnemonic for Opcode 13.60 sim> ; Opcode 13.60 sim> ev -m 0x4C000C00 0: MULLQ/V R0,R0,R0 4: 000000004C000C00 sim> According to, Alpha Architecture Handbook V4, October 1998, Table C2: MULQ/V Opr 13.60 Multiply quadword This is correct in https://github.com/simh/simh/blob/master/alpha/alpha_cpu.c case 0x60: /* MULQ/V */ but in https://github.com/simh/simh/blob/master/alpha/alpha_sys.c In const char *opcode[] = { the line "MULL/V", "MULLQ/V", has been corrected to be: "MULL/V", "MULQ/V", --- alpha/alpha_sys.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/alpha/alpha_sys.c b/alpha/alpha_sys.c index 7eb7e5aa..186ef38b 100644 --- a/alpha/alpha_sys.c +++ b/alpha/alpha_sys.c @@ -204,7 +204,7 @@ const char *opcode[] = { "MSKLH", "INSLH", "EXTLH", "MSKQH", "INSQH", "EXTQH", "MULL", "MULQ", "UMULH", - "MULL/V", "MULLQ/V", + "MULL/V", "MULQ/V", "ITOFS", "ITOFF", "ITOFT", "SQRTF/C", "SQRTF", "SQRTF/UC", "SQRTF/U", "SQRTF/SC", "SQRTF/S", "SQRTF/SUC", "SQRTF/SU", @@ -309,9 +309,9 @@ const char *opcode[] = { "LDF", "LDG", "LDS", "LDT", "STS", "STG", "STS", "STT", "LDL", "LDQ", "LDL_L", "LDQ_L", - "STL", "STQ", "STL_L", "STQ_L", + "STL", "STQ", "STL_C", "STQ_C", "BR", "FBEQ", "FBLT", "FBLE", - "BSR", "FBNE", "BFGE", "FBGT", + "BSR", "FBNE", "FBGE", "FBGT", "BLBC", "BEQ", "BLT", "BLE", "BLBS", "BNE", "BGE", "BGT", NULL @@ -467,10 +467,10 @@ const uint32 opval[] = { 0x6000E000, C_RV, 0x6000F000, C_RV, 0x68000000, C_JP, 0x68004000, C_JP, 0x68008000, C_JP, 0x6800C000, C_JP, 0x73E00000, C_IBC, 0x73E00020, C_IBC, - 0x73E00600, C_IBC, 0x70000620, C_IO, 0x73E00640, C_IBC, 0x73E00660, C_IBC, + 0x73E00600, C_IBC, 0x70000620, C_IO, 0x73E00640, C_IBC, 0x73E00660, C_IBC, 0x73E00680, C_IBC, 0x73E006A0, C_IBC, 0x73E006C0, C_IBC, 0x73E006E0, C_IBC, - 0x70000700, C_IO, 0x70000720, C_IO, 0x70000740, C_IO, 0x70000780, C_IO, - 0x70000780, C_IO, 0x700007A0, C_IO, 0x700007C0, C_IO, 0x700007E0, C_IO, + 0x70000700, C_IO, 0x70000720, C_IO, 0x70000740, C_IO, 0x70000780, C_IO, + 0x70000780, C_IO, 0x700007A0, C_IO, 0x700007C0, C_IO, 0x700007E0, C_IO, 0x701F0E00, C_IAC, 0x701F0F00, C_IAC, 0x80000000, C_MR, 0x84000000, C_MR, 0x88000000, C_MR, 0x8C000000, C_MR, 0x90000000, C_MR, 0x94000000, C_MR, 0x98000000, C_MR, 0x9C000000, C_MR,