PDP11: Fixed bug in CSM (John Dundas)
John Dundas said: Bob and all, I ran across what I believe to be a bug in the CSM code: case 070: /* CSM */ if (CPUT (HAS_CSM) && (MMR3 & MMR3_CSM) || (cm != MD_KER)) { According to the Architecture Handbook, CSM may be executed only if the MMR3 bit is set AND the mode is not Kernel. Changing the code to: case 070: /* CSM */ if (CPUT (HAS_CSM) && (MMR3 & MMR3_CSM) && (cm != MD_KER)) { also has the effect of making the ZKDKB0 diagnostic much happier. Thanks, John -- John A. Dundas III
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@ -25,6 +25,7 @@
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cpu PDP-11 CPU
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cpu PDP-11 CPU
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05-Dec-13 RMS Fixed bug in CSM (John Dundas)
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23-Oct-13 RMS Fixed PS behavior on initialization and boot
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23-Oct-13 RMS Fixed PS behavior on initialization and boot
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10-Apr-13 RMS MMR1 does not track PC changes (Johnny Billquist)
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10-Apr-13 RMS MMR1 does not track PC changes (Johnny Billquist)
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29-Apr-12 RMS Fixed compiler warning (Mark Pizzolato)
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29-Apr-12 RMS Fixed compiler warning (Mark Pizzolato)
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@ -1298,7 +1299,7 @@ while (reason == 0) {
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break;
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break;
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case 070: /* CSM */
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case 070: /* CSM */
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if ((CPUT (HAS_CSM) && (MMR3 & MMR3_CSM)) || (cm != MD_KER)) {
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if (CPUT (HAS_CSM) && (MMR3 & MMR3_CSM) && (cm != MD_KER)) {
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dst = dstreg? R[dstspec]: ReadW (GeteaW (dstspec));
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dst = dstreg? R[dstspec]: ReadW (GeteaW (dstspec));
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PSW = get_PSW () & ~PSW_CC; /* PSW, cc = 0 */
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PSW = get_PSW () & ~PSW_CC; /* PSW, cc = 0 */
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STACKFILE[cm] = SP;
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STACKFILE[cm] = SP;
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