From 2f0db74483bead32a9a6ef9c1606ba3162f63fc5 Mon Sep 17 00:00:00 2001
From: Bob Supnik <bob@supnik.org>
Date: Sat, 13 Apr 2019 12:49:43 -0700
Subject: [PATCH] VAX: Provide support for MTPR/MFPR opcodes to set V & C
 condition codes

---
 VAX/vax_cpu.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/VAX/vax_cpu.c b/VAX/vax_cpu.c
index 9e20f375..98509a50 100644
--- a/VAX/vax_cpu.c
+++ b/VAX/vax_cpu.c
@@ -253,6 +253,7 @@ int32 in_ie = 0;                                        /* in exc, int */
 int32 recq[6];                                          /* recovery queue */
 int32 recqptr;                                          /* recq pointer */
 int32 hlt_pin = 0;                                      /* HLT pin intr */
+int32 mxpr_cc_vc = 0;                                   /* cc V & C bits from mtpr/mfpr operations */
 int32 mem_err = 0;
 int32 crd_err = 0;
 int32 p1 = 0, p2 = 0;                                   /* fault parameters */
@@ -3068,14 +3069,18 @@ for ( ;; ) {
         break;
 
     case MTPR:
-        cc = (cc & CC_C) | op_mtpr (opnd);
+        mxpr_cc_vc = cc & CC_C;
+        cc = op_mtpr (opnd);
+        cc = cc | (mxpr_cc_vc & (CC_V|CC_C));
         SET_IRQL;                                       /* update intreq */
         break;
 
     case MFPR:
+        mxpr_cc_vc = cc & CC_C;
         r = op_mfpr (opnd);
         WRITE_L (r);
-        CC_IIZP_L (r);
+        CC_IIZZ_L (r);
+        cc = cc | (mxpr_cc_vc & (CC_V|CC_C));
         break;
 
 /* CIS or emulated instructions */