VAX8600: Fix for console I/O from Johnny Billquist
Writing to the TXCS register always updated the transmit enable mask, even when the "Write Mask Now" bit was not set. That bit needs to be set for the write to the register to actually update the transmit enable mask.
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cad8bf1cfc
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3116ce5265
1 changed files with 11 additions and 8 deletions
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@ -55,8 +55,8 @@
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#define TXCS_V_TEN 16 /* Transmitter en */
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#define TXCS_M_TEN 0xF
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#define TXCS_TEN (TXCS_M_TEN << TXCS_V_TEN)
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#define TXCS_RD (CSR_DONE + CSR_IE + TXCS_TEN + TXCS_IDC) /* terminal output */
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#define TXCS_WR (CSR_IE + TXCS_TEN)
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#define TXCS_RD (CSR_DONE + CSR_IE + TXCS_TEN + TXCS_IDC + TXCS_WMN) /* Readable bits */
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#define TXCS_WR (CSR_IE) /* Writeable bits */
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#define ID_CT 0 /* console terminal */
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#define ID_RS 1 /* remote services */
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#define ID_EMM 2 /* environmental monitoring module */
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@ -493,13 +493,16 @@ return (tto_csr & TXCS_RD);
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void txcs_wr (int32 data)
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{
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tto_csr = (tto_csr & ~TXCS_WR) | (data & TXCS_WR);
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if (data & TXCS_WMN) /* updating mask? */
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tto_update_int ();
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if ((data & CSR_IE) == 0)
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tto_csr = (tto_csr & ~TXCS_WR) | (data & TXCS_WR); /* Write new bits. */
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if (data & TXCS_WMN) { /* Updating enable mask? */
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tto_csr = (tto_csr & ~TXCS_TEN) | (data & TXCS_TEN); /* Yes. Modify enable mask. */
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tto_update_int (); /* This can change interrupt requests... */
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}
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if ((tto_csr & CSR_IE) == 0)
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tto_int = 0;
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else if ((tto_csr & (CSR_DONE + CSR_IE)) == CSR_DONE)
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tto_int = 1;
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else
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if ((tto_csr & CSR_DONE) == CSR_DONE)
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tto_int = 1;
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return;
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}
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