TIMER: Fixed generic coscheduling and extended details in debug information
This commit is contained in:
parent
1555056396
commit
34ffe98605
3 changed files with 77 additions and 51 deletions
118
sim_timer.c
118
sim_timer.c
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@ -723,6 +723,7 @@ else
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static int32 rtc_ticks[SIM_NTIMERS+1] = { 0 }; /* ticks */
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static int32 rtc_ticks[SIM_NTIMERS+1] = { 0 }; /* ticks */
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static uint32 rtc_hz[SIM_NTIMERS+1] = { 0 }; /* tick rate */
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static uint32 rtc_hz[SIM_NTIMERS+1] = { 0 }; /* tick rate */
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static uint32 rtc_last_hz[SIM_NTIMERS+1] = { 0 }; /* prior tick rate */
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static uint32 rtc_rtime[SIM_NTIMERS+1] = { 0 }; /* real time */
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static uint32 rtc_rtime[SIM_NTIMERS+1] = { 0 }; /* real time */
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static uint32 rtc_vtime[SIM_NTIMERS+1] = { 0 }; /* virtual time */
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static uint32 rtc_vtime[SIM_NTIMERS+1] = { 0 }; /* virtual time */
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static double rtc_gtime[SIM_NTIMERS+1] = { 0 }; /* instruction time */
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static double rtc_gtime[SIM_NTIMERS+1] = { 0 }; /* instruction time */
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@ -834,6 +835,7 @@ rtc_rtime[tmr] = sim_os_msec ();
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rtc_vtime[tmr] = rtc_rtime[tmr];
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rtc_vtime[tmr] = rtc_rtime[tmr];
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rtc_nxintv[tmr] = 1000;
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rtc_nxintv[tmr] = 1000;
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rtc_ticks[tmr] = 0;
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rtc_ticks[tmr] = 0;
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rtc_last_hz[tmr] = rtc_hz[tmr];
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rtc_hz[tmr] = 0;
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rtc_hz[tmr] = 0;
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rtc_based[tmr] = time;
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rtc_based[tmr] = time;
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rtc_currd[tmr] = time;
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rtc_currd[tmr] = time;
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@ -873,6 +875,7 @@ else {
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if (rtc_hz[tmr] != ticksper) { /* changing tick rate? */
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if (rtc_hz[tmr] != ticksper) { /* changing tick rate? */
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if (rtc_hz[tmr] == 0)
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if (rtc_hz[tmr] == 0)
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rtc_clock_tick_start_time[tmr] = sim_timenow_double ();
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rtc_clock_tick_start_time[tmr] = sim_timenow_double ();
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rtc_last_hz[tmr] = rtc_hz[tmr];
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rtc_hz[tmr] = ticksper;
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rtc_hz[tmr] = ticksper;
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_rtcn_configure_calibrated_clock (tmr);
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_rtcn_configure_calibrated_clock (tmr);
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if (ticksper != 0) {
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if (ticksper != 0) {
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@ -2090,30 +2093,37 @@ for (tmr=0; tmr<SIM_NTIMERS; tmr++) {
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}
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}
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if (tmr == SIM_NTIMERS) { /* None found? */
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if (tmr == SIM_NTIMERS) { /* None found? */
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if ((tmr != newtmr) && (!sim_is_active (&SIM_INTERNAL_UNIT))) {
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if ((tmr != newtmr) && (!sim_is_active (&SIM_INTERNAL_UNIT))) {
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if ((sim_calb_tmr != SIM_NTIMERS) &&/* non internal timer */
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if ((sim_calb_tmr != SIM_NTIMERS) &&/* not internal timer? */
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(sim_calb_tmr != -1) && /* previously active? */
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(sim_calb_tmr != -1) && /* previously active? */
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(!rtc_hz[sim_calb_tmr])) { /* now stopped? */
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(!rtc_hz[sim_calb_tmr])) { /* now stopped? */
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sim_debug (DBG_CAL, &sim_timer_dev, "_rtcn_configure_calibrated_clock(newtmr=%d) - Cleaning up stopped timer %s support\n", newtmr, sim_uname(sim_clock_unit[sim_calb_tmr]));
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sim_debug (DBG_CAL, &sim_timer_dev, "_rtcn_configure_calibrated_clock(newtmr=%d) - Cleaning up stopped timer %s support\n", newtmr, sim_uname(sim_clock_unit[sim_calb_tmr]));
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if (sim_clock_unit[sim_calb_tmr])
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sim_cancel (sim_clock_unit[sim_calb_tmr]);
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sim_cancel (&sim_timer_units[sim_calb_tmr]);
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/* Migrate any coscheduled devices to the standard queue */
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/* Migrate any coscheduled devices to the standard queue */
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/* they will fire and subsequently requeue themselves */
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/* with appropriate usecs_remaining reflecting their currently */
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while (sim_clock_cosched_queue[tmr] != QUEUE_LIST_END) {
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/* scheduled firing time. sim_process_event() will coschedule */
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UNIT *uptr = sim_clock_cosched_queue[tmr];
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/* appropriately. */
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/* temporarily restore prior hz to get correct remaining time */
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rtc_hz[sim_calb_tmr] = rtc_last_hz[sim_calb_tmr];
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while (sim_clock_cosched_queue[sim_calb_tmr] != QUEUE_LIST_END) {
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UNIT *uptr = sim_clock_cosched_queue[sim_calb_tmr];
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double usecs_remaining = sim_timer_activate_time_usecs (uptr) - 1;
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_sim_coschedule_cancel (uptr);
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_sim_coschedule_cancel (uptr);
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_sim_activate (uptr, 1);
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_sim_activate (uptr, 1);
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uptr->usecs_remaining = usecs_remaining;
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}
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}
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rtc_hz[sim_calb_tmr] = 0; /* back to 0 */
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if (sim_clock_unit[sim_calb_tmr])
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sim_cancel (sim_clock_unit[sim_calb_tmr]);
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sim_cancel (&sim_timer_units[sim_calb_tmr]);
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}
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}
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/* Start the internal timer */
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/* Start the internal timer */
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sim_calb_tmr = SIM_NTIMERS;
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sim_calb_tmr = SIM_NTIMERS;
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sim_debug (DBG_CAL, &sim_timer_dev, "_rtcn_configure_calibrated_clock(newtmr=%d) - Starting Internal Calibrated Timer at %dHz\n", newtmr, sim_int_clk_tps);
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sim_debug (DBG_CAL, &sim_timer_dev, "_rtcn_configure_calibrated_clock(newtmr=%d) - Starting Internal Calibrated Timer at %dHz\n", newtmr, sim_int_clk_tps);
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SIM_INTERNAL_UNIT.action = &sim_timer_clock_tick_svc;
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SIM_INTERNAL_UNIT.action = &sim_timer_clock_tick_svc;
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SIM_INTERNAL_UNIT.flags = UNIT_IDLE;
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SIM_INTERNAL_UNIT.flags = UNIT_IDLE;
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sim_register_internal_device (&sim_int_timer_dev); /* Register Internal timer device */
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sim_register_internal_device (&sim_int_timer_dev); /* Register Internal timer device */
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sim_rtcn_init_unit (&SIM_INTERNAL_UNIT, (CLK_INIT*CLK_TPS)/sim_int_clk_tps, SIM_INTERNAL_CLK);
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sim_rtcn_init_unit (&SIM_INTERNAL_UNIT, (CLK_INIT*CLK_TPS)/sim_int_clk_tps, SIM_INTERNAL_CLK);
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SIM_INTERNAL_UNIT.action (&SIM_INTERNAL_UNIT); /* Force tick to activate timer */
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SIM_INTERNAL_UNIT.action (&SIM_INTERNAL_UNIT); /* Force tick to activate timer */
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}
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}
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return;
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return;
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}
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}
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@ -2124,21 +2134,28 @@ if (sim_calb_tmr == SIM_NTIMERS) { /* was old the internal timer? */
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sim_debug (DBG_CAL, &sim_timer_dev, "_rtcn_configure_calibrated_clock(newtmr=%d) - Stopping Internal Calibrated Timer, New Timer = %d (%dHz)\n", newtmr, tmr, rtc_hz[tmr]);
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sim_debug (DBG_CAL, &sim_timer_dev, "_rtcn_configure_calibrated_clock(newtmr=%d) - Stopping Internal Calibrated Timer, New Timer = %d (%dHz)\n", newtmr, tmr, rtc_hz[tmr]);
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rtc_initd[SIM_NTIMERS] = 0;
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rtc_initd[SIM_NTIMERS] = 0;
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rtc_hz[SIM_NTIMERS] = 0;
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rtc_hz[SIM_NTIMERS] = 0;
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sim_register_clock_unit_tmr (NULL, SIM_INTERNAL_CLK);
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sim_cancel (&SIM_INTERNAL_UNIT);
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sim_cancel (&SIM_INTERNAL_UNIT);
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sim_cancel (&sim_timer_units[SIM_NTIMERS]);
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sim_cancel (&sim_timer_units[SIM_NTIMERS]);
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sim_register_clock_unit_tmr (NULL, SIM_INTERNAL_CLK);
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}
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}
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else {
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else {
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if ((sim_calb_tmr != -1) &&
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if ((sim_calb_tmr != -1) &&
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(rtc_hz[sim_calb_tmr] == 0)) {
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(rtc_hz[sim_calb_tmr] == 0)) {
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/* Migrate any coscheduled devices to the standard queue */
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/* Migrate any coscheduled devices to the standard queue */
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/* they will fire and subsequently requeue themselves */
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/* with appropriate usecs_remaining reflecting their currently */
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/* scheduled firing time. sim_process_event() will coschedule */
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/* appropriately. */
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/* temporarily restore prior hz to get correct remaining time */
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rtc_hz[sim_calb_tmr] = rtc_last_hz[sim_calb_tmr];
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while (sim_clock_cosched_queue[tmr] != QUEUE_LIST_END) {
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while (sim_clock_cosched_queue[tmr] != QUEUE_LIST_END) {
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UNIT *uptr = sim_clock_cosched_queue[tmr];
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UNIT *uptr = sim_clock_cosched_queue[tmr];
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double usecs_remaining = sim_timer_activate_time_usecs (uptr) - 1;
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_sim_coschedule_cancel (uptr);
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_sim_coschedule_cancel (uptr);
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_sim_activate (uptr, 1);
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_sim_activate (uptr, 1);
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uptr->usecs_remaining = usecs_remaining;
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}
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}
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rtc_hz[sim_calb_tmr] = 0; /* back to 0 */
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}
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}
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sim_debug (DBG_CAL, &sim_timer_dev, "_rtcn_configure_calibrated_clock(newtmr=%d) - Changing Calibrated Timer from %d (%dHz) to %d (%dHz)\n", newtmr, sim_calb_tmr, rtc_hz[sim_calb_tmr], tmr, rtc_hz[tmr]);
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sim_debug (DBG_CAL, &sim_timer_dev, "_rtcn_configure_calibrated_clock(newtmr=%d) - Changing Calibrated Timer from %d (%dHz) to %d (%dHz)\n", newtmr, sim_calb_tmr, rtc_hz[sim_calb_tmr], tmr, rtc_hz[tmr]);
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sim_calb_tmr = tmr;
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sim_calb_tmr = tmr;
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@ -2205,13 +2222,16 @@ for (tmr=0; tmr<=SIM_NTIMERS; tmr++) {
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accum = 0;
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accum = 0;
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while (sim_clock_cosched_queue[tmr] != QUEUE_LIST_END) {
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while (sim_clock_cosched_queue[tmr] != QUEUE_LIST_END) {
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UNIT *cptr = sim_clock_cosched_queue[tmr];
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UNIT *cptr = sim_clock_cosched_queue[tmr];
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double usecs_remaining = cptr->usecs_remaining;
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cptr->usecs_remaining = 0;
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sim_clock_cosched_queue[tmr] = cptr->next;
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sim_clock_cosched_queue[tmr] = cptr->next;
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cptr->next = NULL;
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cptr->next = NULL;
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cptr->cancel = NULL;
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cptr->cancel = NULL;
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accum += cptr->time;
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accum += cptr->time;
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sim_debug (DBG_QUE, &sim_timer_dev, "sim_stop_timer_services() - tmr=%d scheduling %s after %d\n", tmr, sim_uname (cptr), clock_time + accum*rtc_currd[tmr]);
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sim_debug (DBG_QUE, &sim_timer_dev, "sim_stop_timer_services() - tmr=%d scheduling %s after %d\n", tmr, sim_uname (cptr), clock_time + accum*rtc_currd[tmr]);
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_sim_activate (cptr, clock_time + accum*rtc_currd[tmr]);
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_sim_activate (cptr, clock_time + accum*rtc_currd[tmr]);
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cptr->usecs_remaining = usecs_remaining;
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}
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}
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sim_cosched_interval[tmr] = 0;
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sim_cosched_interval[tmr] = 0;
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}
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}
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@ -2413,9 +2433,11 @@ if (NULL == uptr) { /* deregistering? */
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/* they will fire and subsequently requeue themselves */
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/* they will fire and subsequently requeue themselves */
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while (sim_clock_cosched_queue[tmr] != QUEUE_LIST_END) {
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while (sim_clock_cosched_queue[tmr] != QUEUE_LIST_END) {
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UNIT *uptr = sim_clock_cosched_queue[tmr];
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UNIT *uptr = sim_clock_cosched_queue[tmr];
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double usecs_remaining = sim_timer_activate_time_usecs (uptr) - 1;
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_sim_coschedule_cancel (uptr);
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_sim_coschedule_cancel (uptr);
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_sim_activate (uptr, 1);
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_sim_activate (uptr, 1);
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uptr->usecs_remaining = usecs_remaining;
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}
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}
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if (sim_clock_unit[tmr]) {
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if (sim_clock_unit[tmr]) {
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sim_cancel (sim_clock_unit[tmr]);
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sim_cancel (sim_clock_unit[tmr]);
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@ -2435,18 +2457,11 @@ return SCPE_OK;
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}
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}
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/* Default timer is 0, otherwise use a calibrated one if it exists */
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/* Default timer is 0, otherwise use a calibrated one if it exists */
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static int32 _default_tmr ()
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int32 sim_rtcn_calibrated_tmr (void)
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{
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{
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return ((rtc_currd[0] && rtc_hz[0]) ? 0 : ((sim_calb_tmr != -1) ? sim_calb_tmr : 0));
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return ((rtc_currd[0] && rtc_hz[0]) ? 0 : ((sim_calb_tmr != -1) ? sim_calb_tmr : 0));
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}
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}
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static int32 _tick_size ()
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{
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int32 tmr = _default_tmr ();
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return ((rtc_currd[tmr] && rtc_hz[tmr]) ? rtc_currd[tmr] : 10000);
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}
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int32 sim_rtcn_tick_size (int32 tmr)
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int32 sim_rtcn_tick_size (int32 tmr)
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{
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{
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return (rtc_currd[tmr]) ? rtc_currd[tmr] : 10000;
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return (rtc_currd[tmr]) ? rtc_currd[tmr] : 10000;
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@ -2459,19 +2474,18 @@ return sim_register_clock_unit_tmr (uptr, 0);
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t_stat sim_clock_coschedule (UNIT *uptr, int32 interval)
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t_stat sim_clock_coschedule (UNIT *uptr, int32 interval)
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{
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{
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int32 ticks = (interval + (_tick_size ()/2))/_tick_size ();/* Convert to ticks */
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int32 tmr = sim_rtcn_calibrated_tmr ();
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int32 ticks = (interval + (sim_rtcn_tick_size (tmr)/2))/sim_rtcn_tick_size (tmr);/* Convert to ticks */
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sim_debug (DBG_QUE, &sim_timer_dev, "sim_clock_coschedule(%s, interval=%d, ticks=%d)\n", sim_uname(uptr), interval, ticks);
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sim_debug (DBG_QUE, &sim_timer_dev, "sim_clock_coschedule(%s, interval=%d, ticks=%d)\n", sim_uname(uptr), interval, ticks);
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return sim_clock_coschedule_tmr (uptr, _default_tmr (), ticks);
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return sim_clock_coschedule_tmr (uptr, tmr, ticks);
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}
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}
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t_stat sim_clock_coschedule_abs (UNIT *uptr, int32 interval)
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t_stat sim_clock_coschedule_abs (UNIT *uptr, int32 interval)
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{
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{
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int32 ticks = (interval + (_tick_size ()/2))/_tick_size ();/* Convert to ticks */
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sim_debug (DBG_QUE, &sim_timer_dev, "sim_clock_coschedule_abs(%s, interval=%d)\n", sim_uname(uptr), interval);
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sim_debug (DBG_QUE, &sim_timer_dev, "sim_clock_coschedule_abs(%s, interval=%d, ticks=%d)\n", sim_uname(uptr), interval, ticks);
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sim_cancel (uptr);
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sim_cancel (uptr);
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return sim_clock_coschedule_tmr (uptr, _default_tmr (), ticks);
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return sim_clock_coschedule (uptr, interval);
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}
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}
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t_stat sim_clock_coschedule_tmr (UNIT *uptr, int32 tmr, int32 ticks)
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t_stat sim_clock_coschedule_tmr (UNIT *uptr, int32 tmr, int32 ticks)
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@ -2488,15 +2502,15 @@ else {
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if ((tmr < 0) || (tmr > SIM_NTIMERS))
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if ((tmr < 0) || (tmr > SIM_NTIMERS))
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return sim_activate (uptr, MAX(1, ticks) * 10000);
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return sim_activate (uptr, MAX(1, ticks) * 10000);
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}
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}
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if (NULL == sim_clock_unit[tmr]) {
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if ((NULL == sim_clock_unit[tmr]) || (rtc_hz[tmr] == 0)) {
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sim_debug (DBG_TIM, &sim_timer_dev, "sim_clock_coschedule_tmr(%s, tmr=%d, ticks=%d) - no clock activating after %d instructions\n", sim_uname (uptr), tmr, ticks, ticks * (rtc_currd[tmr] ? rtc_currd[tmr] : _tick_size ()));
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sim_debug (DBG_TIM, &sim_timer_dev, "sim_clock_coschedule_tmr(%s, tmr=%d, ticks=%d) - no clock activating after %d instructions\n", sim_uname (uptr), tmr, ticks, ticks * (rtc_currd[tmr] ? rtc_currd[tmr] : rtc_currd[sim_rtcn_calibrated_tmr ()]));
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return sim_activate (uptr, ticks * (rtc_currd[tmr] ? rtc_currd[tmr] : _tick_size ()));
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return sim_activate (uptr, ticks * (rtc_currd[tmr] ? rtc_currd[tmr] : rtc_currd[sim_rtcn_calibrated_tmr ()]));
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}
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}
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else {
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else {
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UNIT *cptr, *prvptr;
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UNIT *cptr, *prvptr;
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int32 accum;
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int32 accum;
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sim_debug (DBG_QUE, &sim_timer_dev, "sim_clock_coschedule_tmr(%s, tmr=%d, ticks=%d) - queueing for clock co-schedule\n", sim_uname (uptr), tmr, ticks);
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sim_debug (DBG_QUE, &sim_timer_dev, "sim_clock_coschedule_tmr(%s, tmr=%d, ticks=%d, hz=%d) - queueing for clock co-schedule\n", sim_uname (uptr), tmr, ticks, rtc_hz[tmr]);
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prvptr = NULL;
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prvptr = NULL;
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accum = 0;
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accum = 0;
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for (cptr = sim_clock_cosched_queue[tmr]; cptr != QUEUE_LIST_END; cptr = cptr->next) {
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for (cptr = sim_clock_cosched_queue[tmr]; cptr != QUEUE_LIST_END; cptr = cptr->next) {
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@ -2725,6 +2739,7 @@ double sim_timer_activate_time_usecs (UNIT *uptr)
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{
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{
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UNIT *cptr;
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UNIT *cptr;
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int32 tmr;
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int32 tmr;
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double result = -1.0;
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/* If this is a clock unit, we need to return the related clock assist unit instead */
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/* If this is a clock unit, we need to return the related clock assist unit instead */
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for (tmr=0; tmr<=SIM_NTIMERS; tmr++) {
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for (tmr=0; tmr<=SIM_NTIMERS; tmr++) {
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@ -2736,30 +2751,35 @@ for (tmr=0; tmr<=SIM_NTIMERS; tmr++) {
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#if defined(SIM_ASYNCH_CLOCKS)
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#if defined(SIM_ASYNCH_CLOCKS)
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if (uptr->a_is_active == &_sim_wallclock_is_active) {
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if (uptr->a_is_active == &_sim_wallclock_is_active) {
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double d_result;
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pthread_mutex_lock (&sim_timer_lock);
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pthread_mutex_lock (&sim_timer_lock);
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if (uptr == sim_wallclock_entry) {
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if (uptr == sim_wallclock_entry) {
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d_result = uptr->a_due_gtime - sim_gtime ();
|
result = uptr->a_due_gtime - sim_gtime ();
|
||||||
if (d_result < 0.0)
|
if (result < 0.0)
|
||||||
d_result = 0.0;
|
result = 0.0;
|
||||||
pthread_mutex_unlock (&sim_timer_lock);
|
pthread_mutex_unlock (&sim_timer_lock);
|
||||||
return uptr->usecs_remaining + (1000000.0 * (d_result / sim_timer_inst_per_sec ())) + 1;
|
result = uptr->usecs_remaining + (1000000.0 * (result / sim_timer_inst_per_sec ())) + 1;
|
||||||
|
sim_debug (DBG_QUE, &sim_timer_dev, "sim_timer_activate_time_usecs(%s) wallclock_entry - %.0f usecs, inst_per_sec=%.0f\n", sim_uname (uptr), result, sim_timer_inst_per_sec ());
|
||||||
|
return result;
|
||||||
}
|
}
|
||||||
for (cptr = sim_wallclock_queue;
|
for (cptr = sim_wallclock_queue;
|
||||||
cptr != QUEUE_LIST_END;
|
cptr != QUEUE_LIST_END;
|
||||||
cptr = cptr->a_next)
|
cptr = cptr->a_next)
|
||||||
if (uptr == cptr) {
|
if (uptr == cptr) {
|
||||||
d_result = uptr->a_due_gtime - sim_gtime ();
|
result = uptr->a_due_gtime - sim_gtime ();
|
||||||
if (d_result < 0.0)
|
if (result < 0.0)
|
||||||
d_result = 0.0;
|
result = 0.0;
|
||||||
pthread_mutex_unlock (&sim_timer_lock);
|
pthread_mutex_unlock (&sim_timer_lock);
|
||||||
return uptr->usecs_remaining + (1000000.0 * (d_result / sim_timer_inst_per_sec ())) + 1;
|
result = uptr->usecs_remaining + (1000000.0 * (result / sim_timer_inst_per_sec ())) + 1;
|
||||||
|
sim_debug (DBG_QUE, &sim_timer_dev, "sim_timer_activate_time_usecs(%s) wallclock - %.0f usecs, inst_per_sec=%.0f\n", sim_uname (uptr), result, sim_timer_inst_per_sec ());
|
||||||
|
return result;
|
||||||
}
|
}
|
||||||
pthread_mutex_unlock (&sim_timer_lock);
|
pthread_mutex_unlock (&sim_timer_lock);
|
||||||
}
|
}
|
||||||
if (uptr->a_next)
|
if (uptr->a_next) {
|
||||||
return uptr->usecs_remaining + (1000000.0 * (uptr->a_event_time / sim_timer_inst_per_sec ())) + 1;
|
result = uptr->usecs_remaining + (1000000.0 * (uptr->a_event_time / sim_timer_inst_per_sec ())) + 1;
|
||||||
|
sim_debug (DBG_QUE, &sim_timer_dev, "sim_timer_activate_time_usecs(%s) asynch - %.0f usecs, inst_per_sec=%.0f\n", sim_uname (uptr), result, sim_timer_inst_per_sec ());
|
||||||
|
return result;
|
||||||
|
}
|
||||||
#endif /* defined(SIM_ASYNCH_CLOCKS) */
|
#endif /* defined(SIM_ASYNCH_CLOCKS) */
|
||||||
|
|
||||||
if (uptr->cancel == &_sim_coschedule_cancel) {
|
if (uptr->cancel == &_sim_coschedule_cancel) {
|
||||||
|
@ -2773,15 +2793,21 @@ if (uptr->cancel == &_sim_coschedule_cancel) {
|
||||||
if (cptr == uptr) {
|
if (cptr == uptr) {
|
||||||
if (accum > 0)
|
if (accum > 0)
|
||||||
--accum;
|
--accum;
|
||||||
return uptr->usecs_remaining + (1000000.0 * ((rtc_currd[tmr] * accum) + sim_activate_time (&sim_timer_units[tmr])) / sim_timer_inst_per_sec ());
|
result = uptr->usecs_remaining + (1000000.0 * ((rtc_currd[tmr] * accum) + sim_activate_time (&sim_timer_units[tmr])) / sim_timer_inst_per_sec ());
|
||||||
|
sim_debug (DBG_QUE, &sim_timer_dev, "sim_timer_activate_time_usecs(%s) coscheduled - %.0f usecs, inst_per_sec=%.0f, tmr=%d, hz=%d\n", sim_uname (uptr), result, sim_timer_inst_per_sec (), sim_calb_tmr, rtc_hz[sim_calb_tmr]);
|
||||||
|
return result;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
for (tmr=0; tmr<=SIM_NTIMERS; tmr++)
|
for (tmr=0; tmr<=SIM_NTIMERS; tmr++) {
|
||||||
if (sim_clock_unit[tmr] == uptr)
|
if (sim_clock_unit[tmr] == uptr) {
|
||||||
return sim_clock_unit[tmr]->usecs_remaining + (1000000.0 * sim_activate_time (&sim_timer_units[tmr])) / sim_timer_inst_per_sec ();
|
result = sim_clock_unit[tmr]->usecs_remaining + (1000000.0 * sim_activate_time (&sim_timer_units[tmr])) / sim_timer_inst_per_sec ();
|
||||||
return -1.0; /* Not found. */
|
sim_debug (DBG_QUE, &sim_timer_dev, "sim_timer_activate_time_usecs(%s) clock - %.0f usecs, inst_per_sec=%.0f\n", sim_uname (uptr), result, sim_timer_inst_per_sec ());
|
||||||
|
return result;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return result; /* Not found. */
|
||||||
}
|
}
|
||||||
|
|
||||||
/* read only memory delayed support
|
/* read only memory delayed support
|
||||||
|
|
|
@ -146,6 +146,7 @@ t_stat sim_clock_coschedule_tmr (UNIT *uptr, int32 tmr, int32 ticks);
|
||||||
t_stat sim_clock_coschedule_tmr_abs (UNIT *uptr, int32 tmr, int32 ticks);
|
t_stat sim_clock_coschedule_tmr_abs (UNIT *uptr, int32 tmr, int32 ticks);
|
||||||
double sim_timer_inst_per_sec (void);
|
double sim_timer_inst_per_sec (void);
|
||||||
int32 sim_rtcn_tick_size (int32 tmr);
|
int32 sim_rtcn_tick_size (int32 tmr);
|
||||||
|
int32 sim_rtcn_calibrated_tmr (void);
|
||||||
t_bool sim_timer_idle_capable (uint32 *host_ms_sleep_1, uint32 *host_tick_ms);
|
t_bool sim_timer_idle_capable (uint32 *host_ms_sleep_1, uint32 *host_tick_ms);
|
||||||
#define PRIORITY_BELOW_NORMAL -1
|
#define PRIORITY_BELOW_NORMAL -1
|
||||||
#define PRIORITY_NORMAL 0
|
#define PRIORITY_NORMAL 0
|
||||||
|
|
|
@ -3895,17 +3895,16 @@ return _sim_activate_after_abs (uptr, (double)usecs_walltime);
|
||||||
|
|
||||||
t_stat tmxr_clock_coschedule (UNIT *uptr, int32 interval)
|
t_stat tmxr_clock_coschedule (UNIT *uptr, int32 interval)
|
||||||
{
|
{
|
||||||
int32 ticks = (interval + (sim_rtcn_tick_size (0)/2))/sim_rtcn_tick_size (0);/* Convert to ticks */
|
int32 tmr = sim_rtcn_calibrated_tmr ();
|
||||||
|
int32 ticks = (interval + (sim_rtcn_tick_size (tmr)/2))/sim_rtcn_tick_size (tmr);/* Convert to ticks */
|
||||||
|
|
||||||
return tmxr_clock_coschedule_tmr (uptr, 0, ticks);
|
return tmxr_clock_coschedule_tmr (uptr, tmr, ticks);
|
||||||
}
|
}
|
||||||
|
|
||||||
t_stat tmxr_clock_coschedule_abs (UNIT *uptr, int32 interval)
|
t_stat tmxr_clock_coschedule_abs (UNIT *uptr, int32 interval)
|
||||||
{
|
{
|
||||||
int32 ticks = (interval + (sim_rtcn_tick_size (0)/2))/sim_rtcn_tick_size (0);/* Convert to ticks */
|
|
||||||
|
|
||||||
sim_cancel (uptr);
|
sim_cancel (uptr);
|
||||||
return tmxr_clock_coschedule_tmr (uptr, 0, ticks);
|
return tmxr_clock_coschedule (uptr, interval);
|
||||||
}
|
}
|
||||||
|
|
||||||
#define MIN(a,b) (((a) < (b)) ? (a) : (b))
|
#define MIN(a,b) (((a) < (b)) ? (a) : (b))
|
||||||
|
|
Loading…
Add table
Reference in a new issue