diff --git a/PDP10/pdp10_cpu.c b/PDP10/pdp10_cpu.c index 47e4025c..6df6e8ee 100644 --- a/PDP10/pdp10_cpu.c +++ b/PDP10/pdp10_cpu.c @@ -2359,17 +2359,35 @@ sim_brk_types = sim_brk_dflt = SWMASK ('E'); return SCPE_OK; } +static const char *cpu_next_caveats = +"The NEXT command in the PDP10 simulator currently will enable stepping\n" +"across subroutine calls which are initiated by the PUSHJ, JSP, JSA and\n" +"JRA instructions. This stepping works by dynamically establishing\n" +"breakpoints at the 10 memory addresses immediately following the\n" +"instruction which initiated the subroutine call. These dynamic\n" +"breakpoints are automatically removed once the simulator returns to the\n" +"sim> prompt for any reason. If the called routine returns somewhere\n" +"other than one of these locations due to a trap, stack unwind or any\n" +"other reason, instruction execution will continue until some other\n" +"reason causes execution to stop.\n"; + t_bool cpu_is_pc_a_subroutine_call (t_addr **ret_addrs) { #define MAX_SUB_RETURN_SKIP 10 static t_addr returns[MAX_SUB_RETURN_SKIP+1] = {0}; +static t_bool caveats_displayed = FALSE; a10 ea; d10 inst, indrct; int32 i, pflgs = 0; t_addr adn, max_returns = MAX_SUB_RETURN_SKIP; - int32 xr, ac; +if (!caveats_displayed) { + caveats_displayed = TRUE; + printf ("%s", cpu_next_caveats); + if (sim_log) + fprintf (sim_log, "%s", cpu_next_caveats); + } if (SCPE_OK != get_aval ((saved_PC & AMASK), &cpu_dev, &cpu_unit)) /* get data */ return FALSE; inst = sim_eval[0]; @@ -2396,7 +2414,7 @@ switch (GET_OP(inst)) max_returns = (t_addr)(ea - returns[0]); for (adn=1; adn prompt for any reason.\n" +"If the called routine returns somewhere other than one of these\n" +"locations due to a trap, stack unwind or any other reason, instruction\n" +"execution will continue until some other reason causes execution to stop.\n"; + t_bool cpu_is_pc_a_subroutine_call (t_addr **ret_addrs) { #define MAX_SUB_RETURN_SKIP 10 static t_addr returns[MAX_SUB_RETURN_SKIP + 1] = {0}; +static t_bool caveats_displayed = FALSE; +if (!caveats_displayed) { + caveats_displayed = TRUE; + printf ("%s", cpu_next_caveats); + if (sim_log) + fprintf (sim_log, "%s", cpu_next_caveats); + } if (SCPE_OK != get_aval (PC, &cpu_dev, &cpu_unit)) /* get data */ return FALSE; if ((sim_eval[0] & 0177000) == 0004000) { /* JSR */ diff --git a/VAX/vax_cpu.c b/VAX/vax_cpu.c index 4138c1b7..8aa276de 100644 --- a/VAX/vax_cpu.c +++ b/VAX/vax_cpu.c @@ -3207,20 +3207,42 @@ if (M == NULL) { /* first time init? */ return build_dib_tab (); } +static const char *cpu_next_caveats = +"The NEXT command in this VAX architecture simulator currently will\n" +"enable stepping across subroutine calls which are initiated by the\n" +"BSBB, BSBW, JSB, CALLG, CALLS, CHMK, CHME, CHMS, and CHMU instructions.\n" +"This stepping works by dynamically establishing breakpoints at the\n" +"memory address immediately following the instruction which initiated\n" +"the subroutine call. These dynamic breakpoints are automatically\n" +"removed once the simulator returns to the sim> prompt for any reason.\n" +"If the called routine returns somewhere other than one of these\n" +"locations due to a trap, stack unwind or any other reason, instruction\n" +"execution will continue until some other reason causes execution to stop.\n"; + t_bool cpu_is_pc_a_subroutine_call (t_addr **ret_addrs) { -static t_addr returns[2] = {0, 0}; +#define MAX_SUB_RETURN_SKIP 9 +static t_addr returns[MAX_SUB_RETURN_SKIP+1] = {0}; +static t_bool caveats_displayed = FALSE; +int i; +if (!caveats_displayed) { + caveats_displayed = TRUE; + printf ("%s", cpu_next_caveats); + if (sim_log) + fprintf (sim_log, "%s", cpu_next_caveats); + } if (SCPE_OK != get_aval (PC, &cpu_dev, &cpu_unit)) /* get data */ return FALSE; switch (sim_eval[0]) { - case BSBB: - case BSBW: - case JSB: - case CALLG: - case CALLS: + case BSBB: case BSBW: case JSB: + case CALLG: case CALLS: + case CHMK: case CHME: case CHMS: case CHMU: returns[0] = PC + (1 - fprint_sym (stdnul, PC, sim_eval, &cpu_unit, SWMASK ('M'))); + for (i=1; i