folkert/simh-testsetgenerator
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

Notes For V3.7

Browse source 
1. New Features

1.1 3.7-0

1.1.1 SCP

- Added SET THROTTLE and SET NOTHROTTLE commands to regulate simulator
  execution rate and host resource utilization.
- Added idle support (based on work by Mark Pizzolato).
- Added -e to control error processing in nested DO commands (from
  Dave Bryan).

1.1.2 HP2100

- Added Double Integer instructions, 1000-F CPU, and Floating Point
  Processor (from Dave Bryan).
- Added 2114 and 2115 CPUs, 12607B and 12578A DMA controllers, and
  21xx binary loader protection (from Dave Bryan).

1.1.3 Interdata

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state.

1.1.4 PDP-11

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state (WAIT instruction executed).
- Added TA11/TU60 cassette support.

1.1.5 PDP-8

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state (keyboard poll loop or jump-to-self).
- Added TA8E/TU60 cassette support.

1.1.6 PDP-1

- Added support for 16-channel sequence break system.
- Added support for PDP-1D extended features and timesharing clock.
- Added support for Type 630 data communications subsystem.

1.1.6 PDP-4/7/9/15

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state (keyboard poll loop or jump-to-self).

1.1.7 VAX, VAX780

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state (more than 200 cycles at IPL's 0, 1, or 3 in kernel mode).

1.1.8 PDP-10

- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
  state (operating system dependent).
- Added CD20 (CD11) support.

2. Bugs Fixed

Please see the revision history on http://simh.trailing-edge.com or
in the source module sim_rev.h.
This commit is contained in:
Bob Supnik 2007-09-02 05:30:00 -07:00 • committed by Mark Pizzolato
parent 56a7d31770
commit 3cb7c60d5d
11 changed files with 169 additions and 78 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

10
PDP10/pdp10_cpu.c
View file

@ -25,6 +25,7 @@
cpu KS10 central processor cpu KS10 central processor
17-Jul-07 RMS Fixed non-portable usage in SHOW HISTORY
28-Apr-07 RMS Removed clock initialization 28-Apr-07 RMS Removed clock initialization
22-Sep-05 RMS Fixed declarations (from Sterling Garwood) 22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
Fixed warning in MOVNI Fixed warning in MOVNI
@ -2316,11 +2317,14 @@ for (k = 0; k < lnt; k++) { /* print specified */
h = &hst[(++di) % hst_lnt]; /* entry pointer */ h = &hst[(++di) % hst_lnt]; /* entry pointer */
if (h->pc & HIST_PC) { /* instruction? */ if (h->pc & HIST_PC) { /* instruction? */
fprintf (st, "%06o ", h->pc & AMASK); fprintf (st, "%06o ", h->pc & AMASK);
fprintf (st, "%012o ", h->ac); fprint_val (st, h->ac, 8, 36, PV_RZRO);
fputs (" ", st);
fprintf (st, "%06o ", h->ea); fprintf (st, "%06o ", h->ea);
sim_eval = h->ir; sim_eval = h->ir;
if ((fprint_sym (st, h->pc & AMASK, &sim_eval, &cpu_unit, SWMASK ('M'))) > 0) if ((fprint_sym (st, h->pc & AMASK, &sim_eval, &cpu_unit, SWMASK ('M'))) > 0) {
fprintf (st, "(undefined) %012o", h->ir); fputs ("(undefined) ", st);
fprint_val (st, h->ir, 8, 36, PV_RZRO);
}
fputc ('\n', st); /* end line */ fputc ('\n', st); /* end line */
} /* end else instruction */ } /* end else instruction */
} /* end for */ } /* end for */

22
PDP11/pdp11_ta.c
View file

@ -1,6 +1,6 @@
/* pdp11_ta.c: PDP-11 cassette tape simulator /* pdp11_ta.c: PDP-11 cassette tape simulator
Copyright (c) 2006, Robert M Supnik Copyright (c) 2007, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"), copy of this software and associated documentation files (the "Software"),
@ -25,6 +25,8 @@
ta TA11/TU60 cassette tape ta TA11/TU60 cassette tape
06-Aug-07 RMS Foward op at BOT skips initial file gap
Magnetic tapes are represented as a series of variable records Magnetic tapes are represented as a series of variable records
of the form: of the form:
@ -43,7 +45,9 @@
rather than file marks. If the controller spaces or reads into a file rather than file marks. If the controller spaces or reads into a file
gap and then reverses direction, the file gap is not seen again. This gap and then reverses direction, the file gap is not seen again. This
is in contrast to magnetic tapes, where the file mark is a character is in contrast to magnetic tapes, where the file mark is a character
sequence and is seen again if direction is reversed. sequence and is seen again if direction is reversed. In addition,
cassettes have an initial file gap which is automatically skipped on
forward operations from beginning of tape.
*/ */
#include "pdp11_defs.h" #include "pdp11_defs.h"
@ -278,11 +282,19 @@ else {
} }
ta_cs &= ~TACS_BEOT; /* tape in motion */ ta_cs &= ~TACS_BEOT; /* tape in motion */
uptr->FNC = fnc; /* save function */ uptr->FNC = fnc; /* save function */
if ((fnc != TACS_REW) && !(flg & OP_WRI)) { /* read cmd? */ if ((fnc != TACS_REW) && !(flg & OP_WRI)) { /* spc/read cmd? */
t_mtrlnt t;
t_stat st;
uptr->UST = flg & UST_REV; /* save direction */ uptr->UST = flg & UST_REV; /* save direction */
if (sim_tape_bot (uptr) && (flg & OP_FWD)) { /* spc/read fwd bot? */
st = sim_tape_rdrecf (uptr, ta_xb, &t, TA_MAXFR); /* skip file gap */
if (st != MTSE_TMK) /* not there? */
sim_tape_rewind (uptr); /* restore tap pos */
else old_ust = 0; /* defang next */
}
if ((old_ust ^ uptr->UST) == (UST_REV|UST_GAP)) { /* reverse in gap? */ if ((old_ust ^ uptr->UST) == (UST_REV|UST_GAP)) { /* reverse in gap? */
t_mtrlnt t; /* skip file mark */ if (uptr->UST) /* skip file gap */
if (uptr->UST) sim_tape_rdrecr (uptr, ta_xb, &t, TA_MAXFR); sim_tape_rdrecr (uptr, ta_xb, &t, TA_MAXFR);
else sim_tape_rdrecf (uptr, ta_xb, &t, TA_MAXFR); else sim_tape_rdrecf (uptr, ta_xb, &t, TA_MAXFR);
if (DEBUG_PRS (ta_dev)) fprintf (sim_deb, if (DEBUG_PRS (ta_dev)) fprintf (sim_deb,
">>TA skip gap: op=%o, old_sta = %o, pos=%d\n", ">>TA skip gap: op=%o, old_sta = %o, pos=%d\n",

2
PDP18B/pdp18b_cpu.c
View file

@ -2196,7 +2196,7 @@ return SCPE_OK;
void cpu_inst_hist (int32 addr, int32 inst) void cpu_inst_hist (int32 addr, int32 inst)
{ {
t_value word; t_value word = 0;
hst[hst_p].pc = addr | HIST_PC; hst[hst_p].pc = addr | HIST_PC;
hst[hst_p].ir = inst; hst[hst_p].ir = inst;

38
PDP8/pdp8_ct.c
View file

@ -25,6 +25,8 @@
ct TA8E/TU60 cassette tape ct TA8E/TU60 cassette tape
13-Aug-07 RMS Fixed handling of BEOT
06-Aug-07 RMS Foward op at BOT skips initial file gap
30-May-2007 RMS Fixed typo (from Norm Lastovica) 30-May-2007 RMS Fixed typo (from Norm Lastovica)
Magnetic tapes are represented as a series of variable records Magnetic tapes are represented as a series of variable records
@ -45,7 +47,9 @@
rather than file marks. If the controller spaces or reads into a file rather than file marks. If the controller spaces or reads into a file
gap and then reverses direction, the file gap is not seen again. This gap and then reverses direction, the file gap is not seen again. This
is in contrast to magnetic tapes, where the file mark is a character is in contrast to magnetic tapes, where the file mark is a character
sequence and is seen again if direction is reversed. sequence and is seen again if direction is reversed. In addition,
cassettes have an initial file gap which is automatically skipped on
forward operations from beginning of tape.
Note that the read and write sequences for the cassette are asymmetric: Note that the read and write sequences for the cassette are asymmetric:
@ -134,6 +138,7 @@
extern int32 int_req, stop_inst; extern int32 int_req, stop_inst;
extern UNIT cpu_unit; extern UNIT cpu_unit;
extern FILE *sim_deb;
uint32 ct_sra = 0; /* status reg A */ uint32 ct_sra = 0; /* status reg A */
uint32 ct_srb = 0; /* status reg B */ uint32 ct_srb = 0; /* status reg B */
@ -221,7 +226,7 @@ DEVICE ct_dev = {
CT_NUMDR, 10, 31, 1, 8, 8, CT_NUMDR, 10, 31, 1, 8, 8,
NULL, NULL, &ct_reset, NULL, NULL, &ct_reset,
&ct_boot, &ct_attach, &ct_detach, &ct_boot, &ct_attach, &ct_detach,
&ct_dib, DEV_DISABLE | DEV_DIS &ct_dib, DEV_DISABLE | DEV_DIS | DEV_DEBUG
}; };
/* IOT routines */ /* IOT routines */
@ -285,6 +290,9 @@ uint32 fnc = GET_FNC (ct_sra);
uint32 flg = ct_fnc_tab[fnc]; uint32 flg = ct_fnc_tab[fnc];
uint32 old_ust = uptr->UST; uint32 old_ust = uptr->UST;
if (DEBUG_PRS (ct_dev)) fprintf (sim_deb,
">>CT start: op=%o, old_sta = %o, pos=%d\n",
fnc, uptr->UST, uptr->pos);
if ((ct_sra & SRA_ENAB) && (uptr->flags & UNIT_ATT)) { /* enabled, att? */ if ((ct_sra & SRA_ENAB) && (uptr->flags & UNIT_ATT)) { /* enabled, att? */
ct_srb &= ~(SRB_XFRERR|SRB_REW); /* clear err, rew */ ct_srb &= ~(SRB_XFRERR|SRB_REW); /* clear err, rew */
if (flg & OP_WRI) { /* write-type op? */ if (flg & OP_WRI) { /* write-type op? */
@ -299,12 +307,24 @@ if ((ct_sra & SRA_ENAB) && (uptr->flags & UNIT_ATT)) { /* enabled, att? */
ct_write = 0; ct_write = 0;
ct_db = 0; ct_db = 0;
} }
ct_srb &= ~SRB_BEOT; /* tape in motion */
if (fnc == SRA_REW) ct_srb |= SRB_REW; /* rew? set flag */ if (fnc == SRA_REW) ct_srb |= SRB_REW; /* rew? set flag */
if ((fnc != SRA_REW) && !(flg & OP_WRI)) { /* read cmd? */ if ((fnc != SRA_REW) && !(flg & OP_WRI)) { /* read cmd? */
t_mtrlnt t;
t_stat st;
uptr->UST = flg & UST_REV; /* save direction */ uptr->UST = flg & UST_REV; /* save direction */
if (sim_tape_bot (uptr) && (flg & OP_FWD)) { /* spc/read fwd bot? */
st = sim_tape_rdrecf (uptr, ct_xb, &t, CT_MAXFR); /* skip file gap */
if (st != MTSE_TMK) /* not there? */
sim_tape_rewind (uptr); /* restore tap pos */
else old_ust = 0; /* defang next */
}
if ((old_ust ^ uptr->UST) == (UST_REV|UST_GAP)) { /* rev in gap? */ if ((old_ust ^ uptr->UST) == (UST_REV|UST_GAP)) { /* rev in gap? */
t_mtrlnt t; /* skip tape mark */ if (DEBUG_PRS (ct_dev)) fprintf (sim_deb,
if (uptr->UST) sim_tape_rdrecr (uptr, ct_xb, &t, CT_MAXFR); ">>CT skip gap: op=%o, old_sta = %o, pos=%d\n",
fnc, uptr->UST, uptr->pos);
if (uptr->UST) /* skip file gap */
sim_tape_rdrecr (uptr, ct_xb, &t, CT_MAXFR);
else sim_tape_rdrecf (uptr, ct_xb, &t, CT_MAXFR); else sim_tape_rdrecf (uptr, ct_xb, &t, CT_MAXFR);
} }
} }
@ -362,6 +382,7 @@ if ((uptr->flags & UNIT_ATT) == 0) { /* not attached? */
} }
if (((flgs & OP_REV) && sim_tape_bot (uptr)) || /* rev at BOT or */ if (((flgs & OP_REV) && sim_tape_bot (uptr)) || /* rev at BOT or */
((flgs & OP_FWD) && sim_tape_eot (uptr))) { /* fwd at EOT? */ ((flgs & OP_FWD) && sim_tape_eot (uptr))) { /* fwd at EOT? */
ct_srb |= SRB_BEOT; /* error */
ct_updsta (uptr); /* op done */ ct_updsta (uptr); /* op done */
return SCPE_OK; return SCPE_OK;
} }
@ -429,6 +450,7 @@ switch (uptr->FNC) { /* case on function */
case SRA_REW: /* rewind */ case SRA_REW: /* rewind */
sim_tape_rewind (uptr); sim_tape_rewind (uptr);
ct_srb |= SRB_BEOT; /* set BOT */
break; break;
case SRA_SRB: /* space rev blk */ case SRA_SRB: /* space rev blk */
@ -451,6 +473,9 @@ switch (uptr->FNC) { /* case on function */
} /* end case */ } /* end case */
ct_updsta (uptr); /* update status */ ct_updsta (uptr); /* update status */
if (DEBUG_PRS (ct_dev)) fprintf (sim_deb,
">>CT done: op=%o, statusA = %o, statusB = %o, pos=%d\n",
uptr->FNC, ct_sra, ct_srb, uptr->pos);
return r; return r;
} }
@ -467,13 +492,11 @@ if (uptr == NULL) { /* unit specified? */
} }
else if (ct_srb & SRB_EOF) uptr->UST |= UST_GAP; /* save gap */ else if (ct_srb & SRB_EOF) uptr->UST |= UST_GAP; /* save gap */
if (uptr) { /* any unit? */ if (uptr) { /* any unit? */
ct_srb &= ~(SRB_WLK|SRB_BEOT|SRB_EMP|SRB_RDY); /* clear dyn flags */ ct_srb &= ~(SRB_WLK|SRB_EMP|SRB_RDY); /* clear dyn flags */
if ((uptr->flags & UNIT_ATT) == 0) /* unattached? */ if ((uptr->flags & UNIT_ATT) == 0) /* unattached? */
ct_srb = (ct_srb | SRB_EMP|SRB_WLK) & ~SRB_REW; /* empty, locked */ ct_srb = (ct_srb | SRB_EMP|SRB_WLK) & ~SRB_REW; /* empty, locked */
if (!sim_is_active (uptr)) { /* not busy? */ if (!sim_is_active (uptr)) { /* not busy? */
ct_srb = (ct_srb | SRB_RDY) & ~SRB_REW; /* ready, ~rew */ ct_srb = (ct_srb | SRB_RDY) & ~SRB_REW; /* ready, ~rew */
if (sim_tape_bot (uptr) || sim_tape_eot (uptr)) /* update BEOT */
ct_srb |= SRB_BEOT;
} }
if (sim_tape_wrp (uptr) || (ct_srb & SRB_REW)) /* locked or rew? */ if (sim_tape_wrp (uptr) || (ct_srb & SRB_REW)) /* locked or rew? */
ct_srb |= SRB_WLK; /* set locked */ ct_srb |= SRB_WLK; /* set locked */
@ -572,6 +595,7 @@ switch (st) {
break; break;
case MTSE_BOT: /* reverse into BOT */ case MTSE_BOT: /* reverse into BOT */
ct_srb |= SRB_BEOT; /* set BOT */
break; break;
case MTSE_WRP: /* write protect */ case MTSE_WRP: /* write protect */

8
PDP8/pdp8_defs.h
View file

@ -1,6 +1,6 @@
/* pdp8_defs.h: PDP-8 simulator definitions /* pdp8_defs.h: PDP-8 simulator definitions
Copyright (c) 1993-2006, Robert M Supnik Copyright (c) 1993-2007, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"), copy of this software and associated documentation files (the "Software"),
@ -23,6 +23,7 @@
used in advertising or otherwise to promote the sale, use or other dealings used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik. in this Software without prior written authorization from Robert M Supnik.
21-Aug-07 RMS Added FPP8 support
13-Dec-06 RMS Added TA8E support 13-Dec-06 RMS Added TA8E support
30-Oct-06 RMS Added infinite loop stop 30-Oct-06 RMS Added infinite loop stop
13-Oct-03 RMS Added TSC8-75 support 13-Oct-03 RMS Added TSC8-75 support
@ -94,6 +95,7 @@ typedef struct {
#define DEV_CLK 013 /* clock */ #define DEV_CLK 013 /* clock */
#define DEV_TSC 036 #define DEV_TSC 036
#define DEV_KJ8 040 /* extra terminals */ #define DEV_KJ8 040 /* extra terminals */
#define DEV_FPP 055 /* floating point */
#define DEV_DF 060 /* DF32 */ #define DEV_DF 060 /* DF32 */
#define DEV_RF 060 /* RF08 */ #define DEV_RF 060 /* RF08 */
#define DEV_RL 060 /* RL8A */ #define DEV_RL 060 /* RL8A */
@ -154,7 +156,8 @@ typedef struct {
#define INT_V_PWR (INT_V_DIRECT+8) /* power int */ #define INT_V_PWR (INT_V_DIRECT+8) /* power int */
#define INT_V_UF (INT_V_DIRECT+9) /* user int */ #define INT_V_UF (INT_V_DIRECT+9) /* user int */
#define INT_V_TSC (INT_V_DIRECT+10) /* TSC8-75 int */ #define INT_V_TSC (INT_V_DIRECT+10) /* TSC8-75 int */
#define INT_V_OVHD (INT_V_DIRECT+11) /* overhead start */ #define INT_V_FPP (INT_V_DIRECT+11) /* FPP8 */
#define INT_V_OVHD (INT_V_DIRECT+12) /* overhead start */
#define INT_V_NO_ION_PENDING (INT_V_OVHD+0) /* ion pending */ #define INT_V_NO_ION_PENDING (INT_V_OVHD+0) /* ion pending */
#define INT_V_NO_CIF_PENDING (INT_V_OVHD+1) /* cif pending */ #define INT_V_NO_CIF_PENDING (INT_V_OVHD+1) /* cif pending */
#define INT_V_ION (INT_V_OVHD+2) /* interrupts on */ #define INT_V_ION (INT_V_OVHD+2) /* interrupts on */
@ -184,6 +187,7 @@ typedef struct {
#define INT_PWR (1 << INT_V_PWR) #define INT_PWR (1 << INT_V_PWR)
#define INT_UF (1 << INT_V_UF) #define INT_UF (1 << INT_V_UF)
#define INT_TSC (1 << INT_V_TSC) #define INT_TSC (1 << INT_V_TSC)
#define INT_FPP (1 << INT_V_FPP)
#define INT_NO_ION_PENDING (1 << INT_V_NO_ION_PENDING) #define INT_NO_ION_PENDING (1 << INT_V_NO_ION_PENDING)
#define INT_NO_CIF_PENDING (1 << INT_V_NO_CIF_PENDING) #define INT_NO_CIF_PENDING (1 << INT_V_NO_CIF_PENDING)
#define INT_ION (1 << INT_V_ION) #define INT_ION (1 << INT_V_ION)

14
VAX/vax_cpu.c
View file

@ -25,6 +25,7 @@
cpu VAX central processor cpu VAX central processor
13-Aug-07 RMS Fixed bug in read access g-format indexed specifiers
28-Apr-07 RMS Removed clock initialization 28-Apr-07 RMS Removed clock initialization
29-Oct-06 RMS Added idle support 29-Oct-06 RMS Added idle support
22-May-06 RMS Fixed format error in CPU history (found by Peter Schorn) 22-May-06 RMS Fixed format error in CPU history (found by Peter Schorn)
@ -1429,23 +1430,24 @@ for ( ;; ) {
RSVD_ADDR_FAULT; /* end case idxspec */ RSVD_ADDR_FAULT; /* end case idxspec */
} }
switch (disp & (DR_ACMASK|DR_LNMASK)) { /* case disp type */ switch (disp & (DR_ACMASK|DR_SPFLAG|DR_LNMASK)) { /* case acc+lnt */
case VB:
case WB: case WW: case WL: case WQ: case WO: case WB: case WW: case WL: case WQ: case WO:
opnd[j++] = OP_MEM; opnd[j++] = OP_MEM;
case AB: case AW: case AL: case AQ: case AO: case AB: case AW: case AL: case AQ: case AO:
va = opnd[j++] = index; va = opnd[j++] = index;
break; break;
case RB: case RW: case RL: case RB: case RW: case RL: case RF:
opnd[j++] = Read (va = index, DR_LNT (disp), RA); opnd[j++] = Read (va = index, DR_LNT (disp), RA);
break; break;
case RQ: case RQ: case RD: case RG:
opnd[j++] = Read (va = index, L_LONG, RA); opnd[j++] = Read (va = index, L_LONG, RA);
opnd[j++] = Read (index + 4, L_LONG, RA); opnd[j++] = Read (index + 4, L_LONG, RA);
break; break;
case RO: case RO: case RH:
j = ReadOcta (va = index, opnd, j, RA); j = ReadOcta (va = index, opnd, j, RA);
break; break;
@ -1461,6 +1463,10 @@ for ( ;; ) {
case MO: case MO:
j = ReadOcta (va = index, opnd, j, WA); j = ReadOcta (va = index, opnd, j, WA);
break; break;
default: /* all others */
RSVD_ADDR_FAULT; /* fault */
break;
} /* end case access/lnt */ } /* end case access/lnt */
break; /* end index */ break; /* end index */

5
VAX/vax_defs.h
View file

@ -450,11 +450,10 @@
rd = d_floating, treated as rq except for short literal rd = d_floating, treated as rq except for short literal
rg = g_floating, treated as rq except for short literal rg = g_floating, treated as rq except for short literal
rh = h_floating, treated as ro except for short literal rh = h_floating, treated as ro except for short literal
bw = branch byte displacement bb = branch byte displacement
bw = branch word displacement bw = branch word displacement
The 'underlying' access type and length must be correct for Length field must be correct
indexing. rg works because rq and mq are treated identically.
*/ */
#define VB (DR_SPFLAG|WB) /* .vb */ #define VB (DR_SPFLAG|WB) /* .vb */

89
descrip.mms
View file

@ -52,7 +52,7 @@
# /DEBUG so that the traceback and debug information is always available # /DEBUG so that the traceback and debug information is always available
# in the object files. # in the object files.
CC_DEBUG = /DEB CC_DEBUG = /DEBUG
.IFDEF DEBUG .IFDEF DEBUG
LINK_DEBUG = /DEBUG/TRACEBACK LINK_DEBUG = /DEBUG/TRACEBACK
@ -62,21 +62,21 @@ CC_OPTIMIZE = /NOOPTIMIZE
ALPHA_OR_IA64 = 1 ALPHA_OR_IA64 = 1
CC_FLAGS = /PREF=ALL CC_FLAGS = /PREF=ALL
ARCH = AXP-DBG ARCH = AXP-DBG
CC_DEFS = _LARGEFILE CC_DEFS = "_LARGEFILE"
.ENDIF .ENDIF
.IFDEF MMSIA64 .IFDEF MMSIA64
ALPHA_OR_IA64 = 1 ALPHA_OR_IA64 = 1
CC_FLAGS = /PREF=ALL CC_FLAGS = /PREF=ALL
ARCH = I64-DBG ARCH = I64-DBG
CC_DEFS = _LARGEFILE CC_DEFS = "_LARGEFILE"
.ENDIF .ENDIF
.IFDEF MMSVAX .IFDEF MMSVAX
ALPHA_OR_IA64 = 0 ALPHA_OR_IA64 = 0
CC_FLAGS = $(CC_FLAGS) CC_FLAGS = $(CC_FLAGS)
ARCH = VAX-DBG ARCH = VAX-DBG
CC_DEFS = __VAX CC_DEFS = "__VAX"
.ENDIF .ENDIF
.ELSE .ELSE
@ -87,7 +87,7 @@ ALPHA_OR_IA64 = 1
CC_OPTIMIZE = /OPT=(LEV=5)/ARCH=HOST CC_OPTIMIZE = /OPT=(LEV=5)/ARCH=HOST
CC_FLAGS = /PREF=ALL CC_FLAGS = /PREF=ALL
ARCH = AXP ARCH = AXP
CC_DEFS = _LARGEFILE CC_DEFS = "_LARGEFILE"
LINK_SECTION_BINDING = /SECTION_BINDING LINK_SECTION_BINDING = /SECTION_BINDING
.ENDIF .ENDIF
@ -96,7 +96,7 @@ ALPHA_OR_IA64 = 1
CC_OPTIMIZE = /OPT=(LEV=5) CC_OPTIMIZE = /OPT=(LEV=5)
CC_FLAGS = /PREF=ALL CC_FLAGS = /PREF=ALL
ARCH = I64 ARCH = I64
CC_DEFS = _LARGEFILE CC_DEFS = "_LARGEFILE"
.ENDIF .ENDIF
.IFDEF MMSVAX .IFDEF MMSVAX
@ -104,7 +104,7 @@ ALPHA_OR_IA64 = 0
CC_OPTIMIZE = /OPTIMIZE CC_OPTIMIZE = /OPTIMIZE
CC_FLAGS = $(CC_FLAGS) CC_FLAGS = $(CC_FLAGS)
ARCH = VAX ARCH = VAX
CC_DEFS = __VAX CC_DEFS = "__VAX"
.ENDIF .ENDIF
.ENDIF .ENDIF
@ -255,10 +255,10 @@ HP2100_SOURCE = $(HP2100_DIR)HP2100_STDDEV.C,$(HP2100_DIR)HP2100_DP.C,\
$(HP2100_DIR)HP2100_MT.C,$(HP2100_DIR)HP2100_MUX.C,\ $(HP2100_DIR)HP2100_MT.C,$(HP2100_DIR)HP2100_MUX.C,\
$(HP2100_DIR)HP2100_CPU.C,$(HP2100_DIR)HP2100_FP.C,\ $(HP2100_DIR)HP2100_CPU.C,$(HP2100_DIR)HP2100_FP.C,\
$(HP2100_DIR)HP2100_SYS.C,$(HP2100_DIR)HP2100_LPT.C,\ $(HP2100_DIR)HP2100_SYS.C,$(HP2100_DIR)HP2100_LPT.C,\
$(HP2100_DIR)HP2100_IPL.C,$(HP2100_DIR)HP2100_CPU0.C,\ $(HP2100_DIR)HP2100_IPL.C,$(HP2100_DIR)HP2100_DS.C,\
$(HP2100_DIR)HP2100_CPU1.C,$(HP2100_DIR)HP2100_CPU2.C,\ $(HP2100_DIR)HP2100_CPU0.C,$(HP2100_DIR)HP2100_CPU1.C,\
$(HP2100_DIR)HP2100_CPU3.C,$(HP2100_DIR)HP2100_CPU4.C,\ $(HP2100_DIR)HP2100_CPU2.C,$(HP2100_DIR)HP2100_CPU3.C,\
$(HP2100_DIR)HP2100_FP1.C $(HP2100_DIR)HP2100_CPU4.C,$(HP2100_DIR)HP2100_FP1.C
.IF ALPHA_OR_IA64 .IF ALPHA_OR_IA64
HP2100_OPTIONS = /INCL=($(SIMH_DIR),$(HP2100_DIR))\ HP2100_OPTIONS = /INCL=($(SIMH_DIR),$(HP2100_DIR))\
/DEF=($(CC_DEFS),"HAVE_INT64=1") /DEF=($(CC_DEFS),"HAVE_INT64=1")
@ -299,7 +299,9 @@ IBM1130_SOURCE = $(IBM1130_DIR)IBM1130_CPU.C,$(IBM1130_DIR)IBM1130_CR.C,\
$(IBM1130_DIR)IBM1130_DISK.C,$(IBM1130_DIR)IBM1130_STDDEV.C,\ $(IBM1130_DIR)IBM1130_DISK.C,$(IBM1130_DIR)IBM1130_STDDEV.C,\
$(IBM1130_DIR)IBM1130_SYS.C,$(IBM1130_DIR)IBM1130_GDU.C,\ $(IBM1130_DIR)IBM1130_SYS.C,$(IBM1130_DIR)IBM1130_GDU.C,\
$(IBM1130_DIR)IBM1130_GUI.C,$(IBM1130_DIR)IBM1130_PRT.C,\ $(IBM1130_DIR)IBM1130_GUI.C,$(IBM1130_DIR)IBM1130_PRT.C,\
$(IBM1130_DIR)IBM1130_FMT.C,$(IBM1130_DIR)IBM1130_PTRP.C $(IBM1130_DIR)IBM1130_FMT.C,$(IBM1130_DIR)IBM1130_PTRP.C,\
$(IBM1130_DIR)IBM1130_PLOT.C,$(IBM1130_DIR)IBM1130_SCA.C,\
$(IBM1130_DIR)IBM1130_T2741.C
IBM1130_OPTIONS = /INCL=($(SIMH_DIR),$(IBM1130_DIR))/DEF=($(CC_DEFS)) IBM1130_OPTIONS = /INCL=($(SIMH_DIR),$(IBM1130_DIR))/DEF=($(CC_DEFS))
# #
@ -456,21 +458,22 @@ VAX_OPTIONS = /INCL=($(SIMH_DIR),$(VAX_DIR),$(PDP11_DIR)$(PCAP_INC))\
# Digital Equipment VAX780 Simulator Definitions. # Digital Equipment VAX780 Simulator Definitions.
# #
VAX780_DIR = SYS$DISK:[.VAX] VAX780_DIR = SYS$DISK:[.VAX]
VAX780_LIB = $(LIB_DIR)VAX780-$(ARCH).OLB VAX780_LIB1 = $(LIB_DIR)VAX780L1-$(ARCH).OLB
VAX780_SOURCE = $(VAX780_DIR)VAX_CIS.C,$(VAX780_DIR)VAX_CMODE.C,\ VAX780_SOURCE1 = $(VAX780_DIR)VAX_CPU.C,$(VAX780_DIR)VAX_CPU1.C,\
$(VAX780_DIR)VAX_CPU.C,$(VAX780_DIR)VAX_CPU1.C,\ $(VAX780_DIR)VAX_FPA.C,$(VAX780_DIR)VAX_CIS.C,\
$(VAX780_DIR)VAX_FPA.C,$(VAX780_DIR)VAX_MMU.C,\ $(VAX780_DIR)VAX_OCTA.C,$(VAX780_DIR)VAX_CMODE.C,\
$(VAX780_DIR)VAX_OCTA.C,$(VAX780_DIR)VAX_SYS.C,\ $(VAX780_DIR)VAX_MMU.C,$(VAX780_DIR)VAX_SYS.C,\
$(VAX780_DIR)VAX_SYSCM.C,\ $(VAX780_DIR)VAX_SYSCM.C,$(VAX780_DIR)VAX780_STDDEV.C,\
$(VAX780_DIR)VAX780_MBA.C,$(VAX780_DIR)VAX780_MEM.C,\ $(VAX780_DIR)VAX780_SBI.C,$(VAX780_DIR)VAX780_MEM.C,\
$(VAX780_DIR)VAX780_SBI.C,$(VAX780_DIR)VAX780_STDDEV.C,\ $(VAX780_DIR)VAX780_UBA.C,$(VAX780_DIR)VAX780_MBA.C,\
$(VAX780_DIR)VAX780_SYSLIST.C,$(VAX780_DIR)VAX780_UBA.C,\ $(VAX780_DIR)VAX780_FLOAD.C,$(VAX780_DIR)VAX780_SYSLIST.C
$(PDP11_DIR)PDP11_DZ.C,$(PDP11_DIR)PDP11_HK.C,\ VAX780_LIB2 = $(LIB_DIR)VAX780L2-$(ARCH).OLB
$(PDP11_DIR)PDP11_LP.C,$(PDP11_DIR)PDP11_RL.C,\ VAX780_SOURCE2 = $(PDP11_DIR)PDP11_RL.C,$(PDP11_DIR)PDP11_RQ.C,\
$(PDP11_DIR)PDP11_RP.C,$(PDP11_DIR)PDP11_RQ.C,\ $(PDP11_DIR)PDP11_TS.C,$(PDP11_DIR)PDP11_DZ.C,\
$(PDP11_DIR)PDP11_RY.C,$(PDP11_DIR)PDP11_TQ.C,\ $(PDP11_DIR)PDP11_LP.C,$(PDP11_DIR)PDP11_TQ.C,\
$(PDP11_DIR)PDP11_TS.C,$(PDP11_DIR)PDP11_TU.C,\ $(PDP11_DIR)PDP11_XU.C,$(PDP11_DIR)PDP11_RY.C,\
$(PDP11_DIR)PDP11_XU.C,$(PDP11_DIR)PDP11_CR.C $(PDP11_DIR)PDP11_CR.C,$(PDP11_DIR)PDP11_RP.C,\
$(PDP11_DIR)PDP11_TU.C,$(PDP11_DIR)PDP11_HK.C
VAX780_OPTIONS = /INCL=($(SIMH_DIR),$(VAX780_DIR),$(PDP11_DIR)$(PCAP_INC))\ VAX780_OPTIONS = /INCL=($(SIMH_DIR),$(VAX780_DIR),$(PDP11_DIR)$(PCAP_INC))\
/DEF=($(CC_DEFS),"VM_VAX=1"$(PCAP_DEFS),"VAX_780=1") /DEF=($(CC_DEFS),"VM_VAX=1"$(PCAP_DEFS),"VAX_780=1")
@ -479,11 +482,11 @@ VAX780_OPTIONS = /INCL=($(SIMH_DIR),$(VAX780_DIR),$(PDP11_DIR)$(PCAP_INC))\
I7094_DIR = SYS$DISK:[.I7094] I7094_DIR = SYS$DISK:[.I7094]
I7094_LIB = $(LIB_DIR)I7094-$(ARCH).OLB I7094_LIB = $(LIB_DIR)I7094-$(ARCH).OLB
I7094_SOURCE = $(I7094_DIR)I7094_CPU.C,$(I7094_DIR)I7094_CPU1.C,\ I7094_SOURCE = $(I7094_DIR)I7094_CPU.C,$(I7094_DIR)I7094_CPU1.C,\
$(I7094_DIR)I7094_IO.C,$(I7094_DIR)I7094_SYS.C,\ $(I7094_DIR)I7094_IO.C,$(I7094_DIR)I7094_CD.C,\
$(I7094_DIR)I7094_CD.C,$(I7094_DIR)I7094_COM.C,\ $(I7094_DIR)I7094_CLK.C,$(I7094_DIR)I7094_COM.C,\
$(I7094_DIR)I7094_DSK.C,$(I7094_DIR)I7094_DRM.C,\ $(I7094_DIR)I7094_DRM.C,$(I7094_DIR)I7094_DSK.C,\
$(I7094_DIR)I7094_MT.C,\ $(I7094_DIR)I7094_SYS.C,$(I7094_DIR)I7094_LP.C,\
$(I7094_DIR)I7094_CLK.C,$(I7094_DIR)I7094_LP.C $(I7094_DIR)I7094_MT.C,$(I7094_DIR)I7094_BINLOADER.C
I7094_OPTIONS = /INCL=($(SIMH_DIR),$(I7094_DIR))/DEF=($(CC_DEFS)) I7094_OPTIONS = /INCL=($(SIMH_DIR),$(I7094_DIR))/DEF=($(CC_DEFS))
# If we're not a VAX, Build Everything # If we're not a VAX, Build Everything
@ -492,12 +495,14 @@ I7094_OPTIONS = /INCL=($(SIMH_DIR),$(I7094_DIR))/DEF=($(CC_DEFS))
ALL : ALTAIR ALTAIRZ80 ECLIPSE GRI LGP H316 HP2100 I1401 I1620 IBM1130 ID16 \ ALL : ALTAIR ALTAIRZ80 ECLIPSE GRI LGP H316 HP2100 I1401 I1620 IBM1130 ID16 \
ID32 NOVA PDP1 PDP4 PDP7 PDP8 PDP9 PDP10 PDP11 PDP15 S3 VAX VAX780 SDS \ ID32 NOVA PDP1 PDP4 PDP7 PDP8 PDP9 PDP10 PDP11 PDP15 S3 VAX VAX780 SDS \
I7094 I7094
@CONTINUE
.ELSE .ELSE
# #
# Else We Are On VAX And Build Everything EXCEPT the 64b simulators # Else We Are On VAX And Build Everything EXCEPT the 64b simulators
# #
ALL : ALTAIR ALTAIRZ80 GRI H316 HP2100 I1401 I1620 IBM1130 ID16 ID32 \ ALL : ALTAIR ALTAIRZ80 GRI H316 HP2100 I1401 I1620 IBM1130 ID16 ID32 \
NOVA PDP1 PDP4 PDP7 PDP8 PDP9 PDP11 PDP15 S3 VAX VAX780 SDS NOVA PDP1 PDP4 PDP7 PDP8 PDP9 PDP11 PDP15 S3 VAX VAX780 SDS
@CONTINUE
.ENDIF .ENDIF
CLEAN : CLEAN :
@ -830,9 +835,20 @@ $(VAX_LIB) : $(VAX_SOURCE)
$ LIBRARY/REPLACE $(MMS$TARGET) $(BLD_DIR)*.OBJ $ LIBRARY/REPLACE $(MMS$TARGET) $(BLD_DIR)*.OBJ
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
$(VAX780_LIB) : $(VAX780_SOURCE) $(VAX780_LIB1) : $(VAX780_SOURCE1)
$! $!
$! Building The $(VAX_780LIB) Library. $! Building The $(VAX780_LIB1) Library.
$!
$ $(CC)$(VAX780_OPTIONS)/OBJ=$(VAX780_DIR) -
/OBJ=$(BLD_DIR) $(MMS$CHANGED_LIST)
$ IF (F$SEARCH("$(MMS$TARGET)").EQS."") THEN -
LIBRARY/CREATE $(MMS$TARGET)
$ LIBRARY/REPLACE $(MMS$TARGET) $(BLD_DIR)*.OBJ
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
$(VAX780_LIB2) : $(VAX780_SOURCE2)
$!
$! Building The $(VAX780_LIB2) Library.
$! $!
$ $(CC)$(VAX780_OPTIONS)/OBJ=$(VAX780_DIR) - $ $(CC)$(VAX780_OPTIONS)/OBJ=$(VAX780_DIR) -
/OBJ=$(BLD_DIR) $(MMS$CHANGED_LIST) /OBJ=$(BLD_DIR) $(MMS$CHANGED_LIST)
@ -1123,14 +1139,15 @@ VAX : $(SIMH_LIB) $(PCAP_LIBD) $(VAX_LIB) $(PCAP_EXECLET)
$(SIMH_LIB)/LIBRARY$(PCAP_LIBR) $(SIMH_LIB)/LIBRARY$(PCAP_LIBR)
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
VAX780 : $(SIMH_LIB) $(PCAP_LIBD) $(VAX780_LIB) $(PCAP_EXECLET) VAX780 : $(SIMH_LIB) $(PCAP_LIBD) $(VAX780_LIB1) $(VAX780_LIB2) $(PCAP_EXECLET)
$! $!
$! Building The $(BIN_DIR)VAX780-$(ARCH).EXE Simulator. $! Building The $(BIN_DIR)VAX780-$(ARCH).EXE Simulator.
$! $!
$ $(CC)$(VAX780_OPTIONS)/OBJ=$(BLD_DIR) SCP.C $ $(CC)$(VAX780_OPTIONS)/OBJ=$(BLD_DIR) SCP.C
$ LINK $(LINK_DEBUG)$(LINK_SECTION_BINDING)- $ LINK $(LINK_DEBUG)$(LINK_SECTION_BINDING)-
/EXE=$(BIN_DIR)VAX780-$(ARCH).EXE - /EXE=$(BIN_DIR)VAX780-$(ARCH).EXE -
$(BLD_DIR)SCP.OBJ,$(VAX780_LIB)/LIBRARY,- $(BLD_DIR)SCP.OBJ,-
$(VAX780_LIB1)/LIBRARY,$(VAX780_LIB2)/LIBRARY,-
$(SIMH_LIB)/LIBRARY$(PCAP_LIBR) $(SIMH_LIB)/LIBRARY$(PCAP_LIBR)
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*

21
scp.c
View file

@ -23,6 +23,7 @@
used in advertising or otherwise to promote the sale, use or other dealings used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik. in this Software without prior written authorization from Robert M Supnik.
18-Jul-07 RMS Modified match_ext for VMS ext;version support
28-Apr-07 RMS Modified sim_instr invocation to call sim_rtcn_init_all 28-Apr-07 RMS Modified sim_instr invocation to call sim_rtcn_init_all
Fixed bug in get_sim_opt Fixed bug in get_sim_opt
Fixed bug in restoration with changed memory size Fixed bug in restoration with changed memory size
@ -3568,13 +3569,21 @@ char *match_ext (char *fnam, char *ext)
{ {
char *pptr, *fptr, *eptr; char *pptr, *fptr, *eptr;
if ((fnam == NULL) || (ext == NULL)) return NULL; if ((fnam == NULL) || (ext == NULL)) /* bad arguments? */
pptr = strrchr (fnam, '.'); return NULL;
if (pptr) { pptr = strrchr (fnam, '.'); /* find last . */
for (fptr = pptr + 1, eptr = ext; *fptr; fptr++, eptr++) { if (pptr) { /* any? */
if (toupper (*fptr) != toupper (*eptr)) return NULL; for (fptr = pptr + 1, eptr = ext; /* match characters */
#if defined (VMS) /* VMS: stop at ; or null */
(*fptr != 0) && (*fptr != ';');
#else
*fptr != 0; /* others: stop at null */
#endif
fptr++, eptr++) {
if (toupper (*fptr) != toupper (*eptr))
return NULL;
} }
if (*eptr) return NULL; if (*eptr != 0) return NULL; /* ext exhausted? */
} }
return pptr; return pptr;
} }

20
sim_rev.h
View file

@ -29,13 +29,29 @@
#define SIM_MAJOR 3 #define SIM_MAJOR 3
#define SIM_MINOR 7 #define SIM_MINOR 7
#define SIM_PATCH 2 #define SIM_PATCH 3
/* V3.7 revision history /* V3.7 revision history
patch date module(s) and fix(es) patch date module(s) and fix(es)
2 tbd sim_ether.c (from Dave Hittner): 3 02-Sep-07 scp.c:
- fixed bug in SET THROTTLE command
pdp10_cpu.c:
- fixed non-portable usage in SHOW HISTORY routine
pdp11_ta.c:
- forward op at BOT skips initial file gap
pdp8_ct.c:
- forward op at BOT skips initial file gap
- fixed handling of BEOT
vax_cpu.c:
- fixed bug in read access g-format indexed specifiers
2 12-Jul-07 sim_ether.c (from Dave Hittner):
- fixed non-ethernet device removal loop (from Naoki Hamada) - fixed non-ethernet device removal loop (from Naoki Hamada)
- added dynamic loading of wpcap.dll; - added dynamic loading of wpcap.dll;
- corrected exceed max index bug in ethX lookup - corrected exceed max index bug in ethX lookup

2
sim_timer.c
View file

@ -523,7 +523,7 @@ else {
if (*tptr != 0) return SCPE_ARG; if (*tptr != 0) return SCPE_ARG;
if (c == 'M') sim_throt_type = SIM_THROT_MCYC; if (c == 'M') sim_throt_type = SIM_THROT_MCYC;
else if (c == 'K') sim_throt_type = SIM_THROT_KCYC; else if (c == 'K') sim_throt_type = SIM_THROT_KCYC;
else if ((c = '%') && (val > 0) && (val < 100)) else if ((c == '%') && (val > 0) && (val < 100))
sim_throt_type = SIM_THROT_PCT; sim_throt_type = SIM_THROT_PCT;
else return SCPE_ARG; else return SCPE_ARG;
if (sim_idle_enab) { if (sim_idle_enab) {