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VAX, VAX780: Added hook for unpredictable indexed immediate

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Originally, the VAX allowed immediate operands (8F) to be used without
restrictions in address mode instructions, either standalone or indexed.
Starting with MicroVAX II, immediate indexed became reserved. This
remained true for all subsequent chip implementations. The SRM was
ECOed in March, 1985 to make immediate indexed unpredictable.

In MicroVAX II, immediate g-floating operands didn't work correctly. The
problem was found a couple of months after tape-out. While the index
flows could be fixed, and were fixed according to the microcode revision
history:

;    7-May-84    [RMS]    Fixed FD problem in index flows (JLR)

the problem in indexed immediate could only be fixed by a significant
hardware change in an area that was already packed full. The VAX
Architecture Team, which had always been very sympathetic to the
VAX chip efforts, proposed a much simpler solution: make immediate
indexed unpredictable. It was useless, in any case.

I'm rather surprised that this wasn't flagged by the 780 diagnostics.
Maybe it was never tested. It was tested in HCORE (the original MicroVAX I
core diagnostic that is failing), but I removed it subsequently:

; 8-may-85    rms    removed indexed immediate tests

Bottom line - the simulator is right for the chip VAXes (including, I think,
V11) and wrong for MicroVAX I and probably the 8600, 780, 750, and 730.

# Conflicts:
#	VAX/vax_cpu.c
This commit is contained in:
Bob Supnik 2019-04-23 22:58:02 -07:00 • committed by Mark Pizzolato
parent 7eee73770d
commit 3f9a77bd10
12 changed files with 96 additions and 34 deletions
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8
VAX/vax410_defs.h
View file

@ -49,6 +49,14 @@
#undef FULL_VAX
#endif
#ifdef CMPM_VAX
#undef CMPM_VAX /* No Compatibility Mode */
#endif
#ifndef NOEXS_VAX
#define NOEXS_VAX 1 /* No Extra String Instructions Implemented */
#endif
#ifndef _VAX_410_DEFS_H_
#define _VAX_410_DEFS_H_ 1

11
VAX/vax610_defs.h
View file

@ -40,6 +40,14 @@
#undef FULL_VAX
#endif
#ifdef CMPM_VAX
#undef CMPM_VAX /* No Compatibility Mode */
#endif
#ifndef NOEXS_VAX
#define NOEXS_VAX 1 /* No Extra String Instructions Implemented */
#endif
#ifndef VAX_610_DEFS_H_
#define VAX_610_DEFS_H_ 1
@ -87,7 +95,7 @@
#define CPU_MODEL_MODIFIERS { MTAB_XTD|MTAB_VDV, 0, "LEDS", NULL, \
NULL, &cpu_show_leds, NULL, "Display the CPU LED values" }, \
{ MTAB_XTD|MTAB_VDV, 0, "MODEL", "MODEL={MicroVAX|VAXstation}", \
{ MTAB_XTD|MTAB_VDV, 0, "MODEL", "MODEL={MicroVAX|VAXStation}", \
&cpu_set_model, &cpu_show_model, NULL, "Set/Show the simulator CPU Model" }
/* QVSS memory space */
@ -143,6 +151,7 @@ extern t_stat cpu_show_memory (FILE* st, UNIT* uptr, int32 val, CONST void* desc
#define LP_MBZ92_TEST(r)
#define MT_AST_TEST(r) if ((r) > AST_MAX) RSVD_OPND_FAULT
#define IDX_IMM_TEST
/* Qbus I/O modes */

8
VAX/vax630_defs.h
View file

@ -47,6 +47,14 @@
#undef FULL_VAX
#endif
#ifdef CMPM_VAX
#undef CMPM_VAX /* No Compatibility Mode */
#endif
#ifndef NOEXS_VAX
#define NOEXS_VAX 1 /* No Extra String Instructions Implemented */
#endif
#ifndef VAX_630_DEFS_H_
#define VAX_630_DEFS_H_ 1

7
VAX/vax730_defs.h
View file

@ -38,7 +38,11 @@
*/
#ifndef FULL_VAX
#define FULL_VAX 1
#define FULL_VAX 1 /* Full Instruction Set Implemented */
#endif
#ifndef CMPM_VAX
#define CMPM_VAX 1 /* Compatibility Mode Implemented */
#endif
#ifndef VAX_730_DEFS_H_
@ -118,6 +122,7 @@
#define MT_AST_TEST(r) r = (r) & 07; \
if ((r) > AST_MAX) RSVD_OPND_FAULT
#define IDX_IMM_TEST
/* Memory */

7
VAX/vax750_defs.h
View file

@ -44,7 +44,11 @@
*/
#ifndef FULL_VAX
#define FULL_VAX 1
#define FULL_VAX 1 /* Full Instruction Set Implemented */
#endif
#ifndef CMPM_VAX
#define CMPM_VAX 1 /* Compatibility Mode Implemented */
#endif
#ifndef VAX_750_DEFS_H_
@ -139,6 +143,7 @@
#define MT_AST_TEST(r) r = (r) & 07; \
if ((r) > AST_MAX) RSVD_OPND_FAULT
#define IDX_IMM_TEST
/* Memory */

2
VAX/vax780_bug_history.txt
View file

@ -61,7 +61,7 @@ Bugs Found And Fixed During Simulator Debug
58. POLYx: add step <does> require truncation (proved by AXE tests).
59. Unaligned references to IO space: incorrect on CVAX.
60. REI to compatibility mode: PSL<dv,fu,iv> were not checked for mbz.
61. Indexed immediate not does fault.

10
VAX/vax780_defs.h
View file

@ -1,6 +1,6 @@
/* vax780_defs.h: VAX 780 model-specific definitions file
Copyright (c) 2004-2017, Robert M Supnik
Copyright (c) 2004-2019, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@ -23,6 +23,7 @@
used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik.
23-Apr-19 RMS Added hook for unpredictable indexed immediate .aw
18-May-17 RMS Added model-specific AST validation test
19-Jan-17 RMS Moved CR to BR6 (Mark Pizzolato)
29-Mar-15 RMS Added model specific IPR max
@ -54,7 +55,11 @@
*/
#ifndef FULL_VAX
#define FULL_VAX 1
#define FULL_VAX 1 /* Full Instruction Set Implemented */
#endif
#ifndef CMPM_VAX
#define CMPM_VAX 1 /* Compatibility Mode Implemented */
#endif
#ifndef VAX_780_DEFS_H_
@ -157,6 +162,7 @@
#define MT_AST_TEST(r) r = (r) & 07; \
if ((r) > AST_MAX) RSVD_OPND_FAULT
#define IDX_IMM_TEST
/* Memory */

7
VAX/vax860_defs.h
View file

@ -74,7 +74,11 @@
*/
#ifndef FULL_VAX
#define FULL_VAX 1
#define FULL_VAX 1 /* Full Instruction Set Implemented */
#endif
#ifndef CMPM_VAX
#define CMPM_VAX 1 /* Compatibility Mode Implemented */
#endif
#ifndef VAX_860_DEFS_H_
@ -176,6 +180,7 @@
#define MT_AST_TEST(r) r = (r) & 07; \
if ((r) > AST_MAX) RSVD_OPND_FAULT
#define IDX_IMM_TEST
/* Memory */

2
VAX/vax_cmode.c
View file

@ -40,7 +40,7 @@
#include "vax_defs.h"
#if defined (FULL_VAX)
#if defined (CMPM_VAX)
#define RdMemB(a) Read (a, L_BYTE, RA)
#define RdMemMB(a) Read (a, L_BYTE, WA)

34
VAX/vax_cpu.c
View file

@ -1,6 +1,6 @@
/* vax_cpu.c: VAX CPU
Copyright (c) 1998-2017, Robert M Supnik
Copyright (c) 1998-2019, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@ -25,6 +25,8 @@
cpu VAX central processor
23-Apr-19 RMS Added hook for unpredictable indexed immediate .aw
14-Apr-19 RMS Added hook for non-standard MxPR CC's
31-Mar-17 RMS Fixed uninitialized variable on FPD path (COVERITY)
13-Mar-17 RMS Fixed dangling else in show_opnd (COVERITY)
20-Sep-11 MP Fixed idle conditions for various versions of Ultrix,
@ -253,11 +255,11 @@ int32 in_ie = 0; /* in exc, int */
int32 recq[6]; /* recovery queue */
int32 recqptr; /* recq pointer */
int32 hlt_pin = 0; /* HLT pin intr */
int32 mxpr_cc_vc = 0; /* cc V & C bits from mtpr/mfpr operations */
int32 mem_err = 0;
int32 crd_err = 0;
int32 p1 = 0, p2 = 0; /* fault parameters */
int32 fault_PC; /* fault PC */
int32 mxpr_cc_vc = 0; /* MxPR V,C bits */
int32 pcq_p = 0; /* PC queue ptr */
int32 badabo = 0;
int32 cpu_astop = 0;
@ -902,20 +904,11 @@ for ( ;; ) {
case AIN|VB:
case AIN|WB: case AIN|WW: case AIN|WL: case AIN|WQ: case AIN|WO:
/* CHECK_FOR_PC; */
opnd[j++] = OP_MEM;
case AIN|AB: case AIN|AW: case AIN|AL: case AIN|AQ: case AIN|AO:
va = opnd[j++] = R[rn];
if (rn == nPC) {
if (DR_LNT (disp) >= L_QUAD) {
GET_ISTR (temp, L_LONG);
GET_ISTR (temp, L_LONG);
if (DR_LNT (disp) == L_OCTA) {
GET_ISTR (temp, L_LONG);
GET_ISTR (temp, L_LONG);
}
}
else GET_ISTR (temp, DR_LNT (disp));
SETPC (PC + DR_LNT (disp));
}
else {
R[rn] = R[rn] + DR_LNT (disp);
@ -1426,10 +1419,15 @@ for ( ;; ) {
break;
case AIN:
CHECK_FOR_PC;
index = index + R[rn];
if (rn == nPC) {
IDX_IMM_TEST;
SETPC (PC + DR_LNT (disp));
}
else {
R[rn] = R[rn] + DR_LNT (disp);
recq[recqptr++] = RQ_REC (AIN | (disp & DR_LNMASK), rn);
}
break;
case AID:
@ -3069,18 +3067,18 @@ for ( ;; ) {
break;
case MTPR:
mxpr_cc_vc = cc & CC_C;
mxpr_cc_vc = cc & CC_C; /* std: V=0, C unchgd */
cc = op_mtpr (opnd);
cc = cc | (mxpr_cc_vc & (CC_V|CC_C));
cc = cc | (mxpr_cc_vc & (CC_V|CC_C)); /* or in V,C */
SET_IRQL; /* update intreq */
break;
case MFPR:
mxpr_cc_vc = cc & CC_C;
mxpr_cc_vc = cc & CC_C; /* std: V=0, C unchgd */
r = op_mfpr (opnd);
WRITE_L (r);
CC_IIZZ_L (r);
cc = cc | (mxpr_cc_vc & (CC_V|CC_C));
CC_IIZZ_L (r); /* set NV, clr VC */
cc = cc | (mxpr_cc_vc & (CC_V|CC_C)); /* or in V,C */
break;
/* CIS or emulated instructions */

16
VAX/vax_defs.h
View file

@ -1,6 +1,6 @@
/* vax_defs.h: VAX architecture definitions file
Copyright (c) 1998-2011, Robert M Supnik
Copyright (c) 1998-2019, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@ -26,6 +26,7 @@
The author gratefully acknowledges the help of Stephen Shirron, Antonio
Carlini, and Kevin Peterson in providing specifications for the Qbus VAX's
23-Apr-19 RMS Added hook for unpredictable indexed immediate .aw
05-Nov-11 RMS Added PSL_IPL17 definition
09-May-06 RMS Added system PTE ACV error code
03-May-06 RMS Added EDITPC get/put cc's macros
@ -384,6 +385,16 @@ extern jmp_buf save_env;
#define IE_EXC 0 /* normal exception */
#define IE_INT 1 /* interrupt */
/*
* FULL_VAX If defined, all instructions implemented (780 like)
* CMPM_VAX If defined, compatibility mode is implemented.
* (Defined for 780, 750, 730 and 8600 only)
* NOEXS_VAX If defined, no extra string instructions.
* (Defined for MicroVAX I and II only)
* NOEXF_VAX If defined, no extra floating point instructions.
* (Available for future Rigel, Mariah and NVAX implementations)
*/
/* Decode ROM: opcode entry */
#define DR_F 0x80 /* FPD ok flag */
@ -933,6 +944,9 @@ extern void rom_wr_B (int32 pa, int32 val);
#ifndef CPU_MODEL_MODIFIERS
#define CPU_MODEL_MODIFIERS /* No model specific CPU modifiers */
#endif
#ifndef IDX_IMM_TEST
#define IDX_IMM_TEST RSVD_ADDR_FAULT
#endif
#include "vax_watch.h" /* Watch chip definitions */

4
VAX/vaxmod_defs.h
View file

@ -71,6 +71,10 @@
#undef FULL_VAX
#endif
#ifdef CMPM_VAX
#undef CMPM_VAX /* No Compatibility Mode */
#endif
#ifndef VAXMOD_DEFS_H_
#define VAXMOD_DEFS_H_ 1