diff --git a/alpha/alpha_cpu.c b/alpha/alpha_cpu.c
index d48dff78..14d9faf0 100644
--- a/alpha/alpha_cpu.c
+++ b/alpha/alpha_cpu.c
@@ -1,6 +1,6 @@
 /* alpha_cpu.c: Alpha CPU simulator
 
-   Copyright (c) 2003-2006, Robert M Supnik
+   Copyright (c) 2003-2017, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -23,6 +23,10 @@
    used in advertising or otherwise to promote the sale, use or other dealings
    in this Software without prior written authorization from Robert M Supnik.
 
+   27-May-2017  RMS     Fixed MIN/MAXx4 iteration counts (Mark Pizzolato)
+   26-May-2017  RMS     Fixed other reversed definitions in opcode 12
+   28-Apr-2017  RMS     Fixed reversed definitions of INSQH, EXTQH (Maurice Marks)
+  	
    Alpha architecturally-defined CPU state:
 
    PC<63:0>                     program counter
@@ -1069,46 +1073,46 @@ while (reason == 0) {
             res = byte_zap (R[ra], 0x3 >> sc);
             break;
 
-        case 0x57:                                      /* EXTWH */
-            sc = (64 - (((uint32) rbv) << 3)) & 0x3F;
-            res = (R[ra] << sc) & M16;
-            break;
-
-        case 0x5A:                                      /* INSWH */
+        case 0x57:                                      /* INSWH */
             sc = (64 - (((uint32) rbv) << 3)) & 0x3F;
             res = (R[ra] & M16) >> sc;
             break;
 
+        case 0x5A:                                      /* EXTWH */
+            sc = (64 - (((uint32) rbv) << 3)) & 0x3F;
+            res = (R[ra] << sc) & M16;
+            break;
+
         case 0x62:                                      /* MSKLH */
             sc = 8 - (((uint32) rbv) & 7);
             res = byte_zap (R[ra], 0xF >> sc);
             break;
 
-        case 0x67:                                      /* EXTLH */
-            sc = (64 - (((uint32) rbv) << 3)) & 0x3F;
-            res = (R[ra] << sc) & M32;
-            break;
-
-        case 0x6A:                                      /* INSLH */
+        case 0x67:                                      /* INSLH */
             sc = (64 - (((uint32) rbv) << 3)) & 0x3F;
             res = (R[ra] & M32) >> sc;
             break;
 
+        case 0x6A:                                      /* EXTLH */
+            sc = (64 - (((uint32) rbv) << 3)) & 0x3F;
+            res = (R[ra] << sc) & M32;
+            break;
+
         case 0x72:                                      /* MSKQH */
             sc = 8 - (((uint32) rbv) & 7);
             res = byte_zap (R[ra], 0xFF >> sc);
             break;
 
-        case 0x77:                                      /* EXTQH */
-            sc = (64 - (((uint32) rbv) << 3)) & 0x3F;
-            res = R[ra] << sc;
-            break;
-
-        case 0x7A:                                      /* INSQH */
+        case 0x77:                                      /* INSQH */
             sc = (64 - (((uint32) rbv) << 3)) & 0x3F;
             res = R[ra] >> sc;
             break;
 
+        case 0x7A:                                      /* EXTQH */
+            sc = (64 - (((uint32) rbv) << 3)) & 0x3F;
+            res = R[ra] << sc;
+            break;
+
         default:
             res = R[rc];
             break;
diff --git a/alpha/alpha_sys.c b/alpha/alpha_sys.c
index 6df76fdb..6e3dc5ba 100644
--- a/alpha/alpha_sys.c
+++ b/alpha/alpha_sys.c
@@ -1,6 +1,6 @@
 /* alpha_sys.c: Alpha simulator interface
 
-   Copyright (c) 2003-2006, Robert M Supnik
+   Copyright (c) 2003-20017, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -22,6 +22,8 @@
    Except as contained in this notice, the name of Robert M Supnik shall not be
    used in advertising or otherwise to promote the sale, use or other dealings
    in this Software without prior written authorization from Robert M Supnik.
+
+   26-May-17    RMS     Fixed bad mnemonics and reversed definitions in opcode 12
 */
 
 #include "alpha_defs.h"
@@ -198,9 +200,9 @@ const char *opcode[] = {
  "MSKLL", "EXTLL", "INSLL",
  "ZAP", "ZAPNOT", "MSKQL", "SRL",
  "EXTQL", "SLL", "INSQL", "SRA",
- "MSKWQ", "EXTWQ", "INSWQ",
- "MSKLQ", "EXTLQ", "INSLQ",
- "MSKQH", "EXTQH", "INSQH",
+ "MSKWH", "INSWH", "EXTWH",
+ "MSKLH", "INSLH", "EXTLH",
+ "MSKQH", "INSQH", "EXTQH",
  "MULL", "MULQ", "UMULH",
  "MULL/V", "MULLQ/V",
  "ITOFS", "ITOFF", "ITOFT",