SEL32: Add new SEL32 simulator.
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AZBevier
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112
SEL32/README.md
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SEL32/README.md
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# SEL32 Concept/32 Simulator
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This is a working simulator for the SEL Concept/32 computer. The current
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version is for the SEL 32/27, 32/67, 32/77, 32/87, 32/97, V6, and V9
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computers. All of the processors except for the 32/77 can run the Gould
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diags. Operational support for the 32/77 computers may be added in the
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future.
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# SEL Concept/32
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This simulator is capable of running UTX2.1A, UTX2.1B, MPX 1.5F, MPX 3.4,
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MPX 3.5, MPX 3.6, and SEL diagnostics. Actually any software using the SEL
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instruction set should work. It is capable of creating a disk image for the
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O/S from a UTX or MPX SDT tape. The disk image can be booted, initialized,
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and can run many of the UTX and MPX utilities and programs. Ethernet is
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supported on UTX and will be added to MPX in the future. Eight terminals
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can be used to access MPX or UTX via Telnet port 4747. The sumulator has
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support for excess 64 floating point arithmetic and passes the 32/27 and
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32/67 FP diags. UTX is the SEL version of System V Unix and BSD Unix
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ported to the V6 and V9 processors. UTX utilizes the basemode instruction
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set and a virtual memory system supported by the V6 & V9 CPUs. The system
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needs further testing to solidify the SEL32 simulator code in all of the
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supported environmenets and hardware configurations.
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# SEL32 installation configuration files in the installs directory:
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The installs directory contains the simh command files to install and run
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multiple UTX, MPX1X, and MPX3X systems. The install tape images are in
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the tapes directory and created disks are in the dsk directory. The dsk
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and tapes directories are initially missing but will be created during
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the installation. The required tape(s) are read from the repo at
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https://github.com/AZBevier/SEL32-installs when the installation
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simh command file is run. The tapes are tar gzipped files that are
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extracted during the installation. Only the tape(s) required for the
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specific UTX or MPX installation are downloaded. A bootable disk is
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created in the dsk directory. This disk can then be booted and the
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installed operating system executed by using a second simh command file.
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See the README.md file in the install directory for a description of the
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available configurations.
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# SEL32 test configuration files in the tests directory:
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The tests directory contains the SEL32 machine diagnostic command file and
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bootable tape. They are used by the simh makefile to test the SEL32
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simulator after it built. All of the instruction set and operating modes
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are validated by the diagnostic. There is a pass/failure indication from
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the diagnostic. The command file sel32_test.ini is used by the makefile.
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The command file diag.ini can be run at any time by the user to rerun the
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diagnostics. There is an example of the initial configuration file (ICL)
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used by the diagnostic. The machine configuration is loaded by the diag
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or the UTX or MPX operating system at boot time. See the MPX manuals at
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bitsavers.org/pdf/sel/sel32_mpx for using MPX 1X or 3X.
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#sel32_test.ini - diag.tap; type "../sel32_test.ini" or run from makefile.
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Auto run by sel32 makefile to validate build or can be run at any time
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to validate system functionality.
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#diag.ini - diag.tap; type "../sel32 diag.ini" to run.
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This is the SEL32 memory diagnostic that validates the SEL32 instruction
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set and memory management sumulated hardware. Any errors are reported
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to the terminal. Different cpu models can be configured to test various
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cpu model features.
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Available Level One Diagnostic boot tape in tests directory:
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diag.ini - command file to start diags. Type "../sel32 diag.ini"
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diag.tap - bootable level one diagnostic tape w/auto testing.
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Set cpu type to 32/27, 32/67, 32/87, 32/97, V6 or V9. All
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cpu models now run all diagnostics provided on the
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diagnostic tape. Running DEXP stand alone causes input
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to stop after a few characters are entered. More testing
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is still required.
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CV.CSL - Firmware control diag. Disabled in auto testing.
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CV.CP1 - CPU diag part 1 runs OK.
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CV.CP2 - CPU diag part 2 runs OK.
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CV.CP3 - CPU diag part 3 runs OK.
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CV.EAD - Effective address diag runs OK.
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CV.BRD - Base register instruction diag runs OK
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Not supported on 32/27.
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CV.INT - Interrupt diag runs OK.
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CV.TRP - Traps diag runs OK.
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CV.CMD - Cache/Shadow diag. Disabled in auto testing.
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CN.MMM - Non virtual memory diag runs OK.
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VM.MMM - Virtual memory diag for V6 & V9 runs OK.
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CV.IPT - IPU trap diag. Disabled in auto testing.
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CV.CSD - WCS read/write trap diag. Disabled in auto testing.
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CV.CON - Operators Console runs all tests for all CPUs.
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CV.DXP - Diagnostic executive for level 2 diags. OK in batch.
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67.FPT - Level two floating point diag runs under DXP OK.
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CV.ITD - Level two interval timer diag runs under DXP OK.
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Set GPR[0] = 0xffffffff before booting from tape to disable the
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auto test and go to the Diagnostic Overlay Loader (DOL>) prompt.
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Testing is extremely difficult without any source for the
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diagnostics. Updates to follow as tests are corrected.
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Other MPX versions support:
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I have recently received some old MPX 3.X save tapes. Using
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these I have been able to hand build a MPX3.6 SDT tape that
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can be used to install MPX3.6. Once installed, the system can
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be used to build a new user SDT tape and install it elsewhere.
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Both based and non-based O/S images can be created. More images
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for installation will be made available in the future as I work
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my way through the save tapes. I still do not have a master SDT
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tape for any of the MPX 1.X or MPX 3.X systems. I have a
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1600/6250 BPI tape drive that can read 9 track tapes and convert
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them to .tap files. If you have a master SDT, I would be very
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thankfull. Please keep looking.
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James C. Bevier
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02/28/2022
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6
SEL32/installs/.gitignore
vendored
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6
SEL32/installs/.gitignore
vendored
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#tape files are dynamically downloaded from github.com/AZBevier/SEL32-installs as they are needed.
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/tape
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#disk files are created by the simh installation command files. These are SEL32 bootable disks.
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/dsk
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#ignore lp output from MPX-1X install.
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lprout
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172
SEL32/installs/README.md
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172
SEL32/installs/README.md
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# SEL32 Concept/32 Simulator
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The installs directory contains the simh command files to install and run
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multiple UTX, MPX1X, and MPX3X systems. The install tape images are in
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the tapes directory and created disks are in the dsk directory. The dsk
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and tapes directories are initially missing but will be created during
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the installation. The required tape(s) are read from the repo at
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https://github.com/AZBevier/SEL32-installs when the installation
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simh command file is run. The tapes are tar gzipped files that are
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extracted during the installation. Only the tape(s) required for the
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specific UTX or MPX installation are downloaded. A bootable disk is
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created in the dsk directory. This disk can then be booted and the
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installed operating system executed by using a second simh command file.
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This method of installation replaces the prebuilt disks from previous
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releases. This allows more versions to be supplied in the minimum
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amount of storage space. Minimal or no user input is required to
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create the bootable system. The command files are in pairs, one to do
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the install and one to execute the installed system. Some MPX systems
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also contain some of the NBC software environment. See the NBC project
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at github.com/AZBevier/nbc for all of the NBC software. See the MPX
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manuals at bitsavers.org/pdf/sel/sel32_mpx for using MPX 1X or 3X.
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# SEL32 installation configuration files in the install directory:
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--------------------
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#sel32load1x.ini - sel32sdt.tap; type "../sel32 sel32load1x.ini
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This is a minimal MPX 1.5F installation to a UDP/DPII 300 MB disk. It
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will initialize the disk and install an MPX bootable system. The disk
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image is in the dsk directory named sel32disk.
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#sel32run1x.ini - dsk/sel32disk; type "../sel32 sel32run1x.ini" to run.
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The disk is booted up to the TSM> prompt logged in as "SYSTEM". Use
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@@A to log into the system console.
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--------------------
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#loaddma1x67.ini - mpx1xsdt.tap; type "../sel32 loaddma1x67.ini
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This is an MPX 1.5F installation to a UDP/DPII 300 MB disk. It will
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initialize the disk and install an MPX bootable system. The disk
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image is in the dsk directory named mpx1xdma0. Once the MPX software
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is loaded an MPX command file is executed that runs the SYSGEN program
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to create a new MPX O/S image. That system is then restarted to
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install the new image to the disk as the new bootable image. The
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system reboots to the new image, logs in as SYSTEM and exits TSM.
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Use @@A to relogin to the console.
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#rundma1x67.ini - dsk/mpx1xdma0; type "../sel32 rundma1x67.ini" to run.
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The disk is booted up to the TSM> prompt and logged in as "SYSTEM".
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MPX can be accessed from a second Linux screen by using the command
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"telnet localhost 4747". This will bring up the "ENTER OWNERNAME
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AND KEY:". Any name is valid, but SYSTEM should be used. At the
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"TSM>" prompt, type "EXIT" to exit TSM. Use ^G to get the login
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prompt when the "RING IN FOR SERVICE" message is displayed.
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--------------------
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#loaddma21b.ini - utx21b1.tap, utx21b2.tap, utx21b3.tap;
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type "../sel32 loaddma21b.ini" to install UTX 21b to UDP/DPII disk.
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This is an automated installation of UTX 21b to disk. Two disks,
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21bdisk0.dma and 21bdisk1.dma are initialized and then the file
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systems are created and loaded. Tape 1 loads "/" and tape 2 and 3
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loads "/usr.POWERNODE" filesystems. The system boots from tape and
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installs the root filesystem. The system restarts and boots from
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the new root filesystem where the 2nd & 3rd tapes are then loaded to
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/usr.POWERNODE. A third empty file system is created and mounted
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as /usr/POWERNODE/src. The second disk is one large filesystem and is
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mounted under /home. Several files are modified during installation
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to allow the system to be booted into multiuser mode. Only the user
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"root" is created and is the only allowable user login.
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#rundma21b.ini - dsk/21bdisk0.dma & dsk/21bdisk1.dma;
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type "../sel32 rundma21b.ini" to run the installed UTX system.
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The disk is booted up to the "login:" prompt for the user to login
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as "root" in multi-user mode.
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--------------------
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#loadscsi21b.ini - utx21b1.tap, utx21b2.tap, utx21b3.tap;
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type "../sel32 loadscsi21b.ini" to install UTX 21b to MFP SCSI disks.
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This is an automated installation of UTX 21b to disk. Two disks,
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scsidiska0 and scsidiska1 are initialized and then the file systems
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are created and loaded. Tape 1 loads root "/" and tapes 2 and 3
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loads "/usr.POWERNODE" filesystem. The system boots from tape and
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installs the root filesystem. The system restarts and boots from
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the new root filesystem where the 2nd & 3rd tapes are then loaded to
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/usr.POWERNODE. A third empty file system is created and mounted
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as /usr/POWERNODE/src. The second disk is one large filesystem and is
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mounted under /home. Several files are modified during installation
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to allow the system to be booted into multiuser mode. Only the user
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"root" is created and is the only allowable user login.
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#rundscsi21b.ini - dsk/scsidiska0 & dsk/scsidiska1;
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type "../sel32 rundscsi21b.ini" to run the installed UTX system.
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The disk is booted up to the "login:" prompt for the user to login
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as "root" in multi-user mode.
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--------------------
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#loadscsi3x.ini - mpxsdt69.tap;
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type "../sel32 loadscsi3x.ini" to install MPX 3.4 to MFP SCSI disks.
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This is an automated installation of MPX 3.4 to disk. Two 300MB disks,
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mpx3xsba0.dsk and mpx3xsbb0.dsk are initialized and then the file
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systems are created and loaded. The user sdt tape contains system
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and user files that are loaded to multiple directories. The second
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disk is initialized and formatted and only a system directory defined.
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The install is exited and @@A is used to login into MPX. The username
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SYSTEM is used to login into TSM without a password.
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#runscsi3x.ini - dsk/mpx3xsba0.dsk & dsk/mpx3csbb0.dsk;
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- dsk/scsi35m1disk0 & dsk/scsi35m2disk0;
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type "../sel32 rundscsi3x.ini" to run the installed MPX system.
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The disk is booted up to the MPX message "Press Attention for TSM".
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Use @@A to get login prompt. Login as SYSTEM. The WORK volume will
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be mounted along with the SYSTEM volume and the system is ready for
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use. MPX can be accessed from a second Linux screen by using the
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command "telnet locallhost 4747". This will bring up the "Connected
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to the SEL-32 simulator COMC device, line 0". Use ^G as the wakeup
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character to get the "ENTER YOUR OWNERNAME:" login prompt. Any name
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is valid, but SYSTEM should be used. At the "TSM>" prompt, type
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"EXIT" to exit TSM. Use ^G to get the login prompt when the "RING
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IN FOR SERVICE" message is displayed.
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--------------------
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#user36esdtp2.ini - user36esdtp2.tap;
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type "../sel32 user36esdtp2.ini" to install MPX 3.6 to HSDP disks.
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This is an automated installation of MPX 3.6 to disk. A 300MB system
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disk volume (user36p2udp0) and a 600MB work disk volume (user36s1udp1)
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are initialized and then the file systems are created and loaded using
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the volmgr. The user sdt tape contains system and user files that
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are loaded to multiple directories. The second disk is initialized
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and formatted and only a system directory defined. The disk is mounted
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as the volume "work" as the 2nd disk drive. The installed MPX system
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also has 2 scsi disks configured into the system. Two 700MB SCSI disks
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are created, but they are not initialized and no directories are
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created. The usage of these disks is left as an exercise for the user.
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A third HSDP 600MD disk is also configured in MPX, but not used. The
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user can provide other data volumes that can be mounted for use on the
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system. The install is exited and @@A can be used to login into MPX.
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The username SYSTEM is used to login into TSM without a password. Any
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username is valid until an m.key file is created for valid user logins.
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#user36erunp2.ini - dsk/user36p2udp0 & dsk/user36s1udp1;
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type "../sel32 user36erunp2.ini" to run the installed MPX 3.6 system.
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The disk is booted up to the MPX message "Press Attention for TSM".
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@@A is used to get the login prompt and the user is logged in as SYSTEM.
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The WORK volume will be mounted along with the SYSTEM volume and the
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system is ready for use at the TSM> prompt. The install tape also has
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some of the NBC development system. A complete installation tape is
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available at github.com/azbevier/nbc.
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--------------------
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Other MPX versions support:
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I have recently received some old MPX 3.X save tapes. Using these
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I have been able to hand build a MPX3.6 SDT tape that can be used
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to install MPX3.6. Once installed, the system can be used to build
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a new user SDT tape and install it elsewhere. Both based and non-
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based O/S images can be created. More images for installation will
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be made available in the future as I work my way through the save
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tapes. I still do not have a master SDT tape for any of the MPX 1.X
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or MPX 3.X systems. I have a 1600/6250 BPI tape drive that can read
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9 track tapes and convert them to .tap files. If you have a master
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SDT, I would be very thankfull. Please keep looking.
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James C. Bevier
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02/27/2022
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142
SEL32/installs/loaddma1x67.ini
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142
SEL32/installs/loaddma1x67.ini
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;======================================================
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; SEL32 System Engineering Labs 32 bit computer
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; MPX - Ver 1.5F hardware configuration
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; CPU - 32/67 4M Sel32 Concept/32
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; IOP - 7e00 Model 8001 IOP Processor Controller
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; DMA - 0800 2311/2314 Disk Processor II
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; dma0 MH300 Model 8127 300MB MHD
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; dma0 <-> dsk/mpx1xdma0.dsk
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; LPR - 7ef8/7ef9 Model 924X High Speed Line Printer
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; COM - 7ec0 8512 8-line async communications
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; CON - 7efc/7efd Console Terminal
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; RTC - 7f06 60 HZ Real-Time clock
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; ITM - 7f04 38.4MS Interval timer
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; MT - 1000 8051 Buffered Tape Processor
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; mta0 <- tapes/mpx1xsdt.tap
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; EC - 0e00 Model 8516 Ethernet (not supported)
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;======================================================
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; Set hostname
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set env HOST=sel32
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; Set local IP address
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; set env IP=192.168.1.5 (N/U)
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;======================================================
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; Set directory for disk images
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mkdir dsk
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mkdir tapes
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; Set tape image filename
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set env FILE=mpx1xsdt.tap
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; Set github.com URL for downloading files
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set env GITURL=https://github.com/AZBevier/SEL32-installs/raw/main/tapes/
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if exist "tapes/%FILE%" goto exists
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if not exist "tapes/%FILE%" echof "file %FILE% missing, trying %FILE%.tgz"
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cd tapes
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if exist "%FILE%.tgz" goto nocurl
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echof "fetching %FILE%.tgz file from github.com\n"
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;curl -LJO https://raw.githubusercontent.com/AZBevier/sims/master/SEL32/tests/tapes/%FILE%.tgz
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curl -LJO %GITURL%/%FILE%.tgz
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if not exist "%FILE%.tgz" echof "FAILED - file %FILE% not available"; exit 1
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:nocurl
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echof "untar %FILE%.tgz file\n"
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tar -xzf %FILE%.tgz
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cd ..
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:exists
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echof "file %FILE% present, doing install"
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;
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; Set debug output
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; set debug -n sel.log
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;
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; CPU type and memory size
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set CPU 32/67 4M
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;
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; RTC realtime clock at 7f06
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set RTC 60
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set RTC enable
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;
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; ITM interval timer at 7f04
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set ITM 3840
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;
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; IOP at channel 7e00
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set iop enable
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set iop0 dev=7e00
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;
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; COM 8-Line at 7ec0
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set coml enable
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set coml0 dev=7ec0
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set coml0 enable
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set coml1 enable
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set coml2 enable
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set coml3 enable
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set coml4 enable
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set coml5 enable
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set coml6 enable
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set coml7 enable
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;
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; Enable telnet sessions on port 4747
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set comc enable
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at comc 4747
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;
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; LPR at 7ef8
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set lpr enable
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; LPR output file
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at lpr lprout
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;
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; EC ethernet at 0e00
|
||||
; Support not available yet
|
||||
;set ec enable
|
||||
;set ec mode=2
|
||||
;set ec0 dev=0e00
|
||||
;at ec tap:tap0
|
||||
; set mac address to cause ec to be attached
|
||||
;set ec MAC=08:00:5D:01:01:20
|
||||
;
|
||||
; CON Console at 7efc
|
||||
; enable console
|
||||
set con enable
|
||||
set con0 dev=7efc
|
||||
;
|
||||
; MTA Buffered tape processor at 1000
|
||||
set mta enable
|
||||
set mta0 dev=1000
|
||||
; Attach install sdt tape file
|
||||
set mta0 locked
|
||||
at mta0 tapes/mpx1xsdt.tap
|
||||
;
|
||||
; DMA disk processor II/UDP at 800
|
||||
set dma enable
|
||||
set dma0 dev=800
|
||||
set dma0 type=MH300
|
||||
; Attach diskfile
|
||||
at dma0 -i dsk/mpx1xdma0.dsk
|
||||
;
|
||||
; set console switches
|
||||
deposit CSW 0
|
||||
;
|
||||
; allow cpu idle
|
||||
set cpu idle
|
||||
; wait for expected output from simulator, then enter this text
|
||||
expect "COLD OR WARM START (C OR W)?" send "C\r"; continue
|
||||
; Set expect script for auto time entry on MPX at OPCOM prompt
|
||||
expect "??" send " %DATE_MM%/%DATE_DD%/%DATE_YY%,%TIME_HH%:%TIME_MM%:%TIME_SS%\r@@A"; continue
|
||||
;expect "" after=800000, delay=4000, send "@@A"; continue
|
||||
expect "??" send "X\r"; continue
|
||||
expect "TSM>" send "A4 SLO=UT\r"; continue
|
||||
expect "TSM>" send "A3 IN=M91000,TAP\r"; continue
|
||||
expect "TSM>" send "PAGE 0\r"; continue
|
||||
expect "TSM>" send "FILEMGR\r"; continue
|
||||
; restore all files
|
||||
expect "FIL>" send "RESTORE\r"; continue
|
||||
expect "FIL>" send "EXIT\r"; continue
|
||||
; sysgen new mpx image
|
||||
expect "TSM>" send "MAKSIMH1\r"; continue
|
||||
; restart to new image
|
||||
expect "TSM>" send "RESTART SEL32SY1,DEFAULT\r"; continue
|
||||
expect " RESTART...DO YOU WANT TO REBOOT(Y/N)?" send "Y\r"; continue
|
||||
expect "??" send " %DATE_MM%/%DATE_DD%/%DATE_YY%,%TIME_HH%:%TIME_MM%:%TIME_SS%\r@@A"; continue
|
||||
expect "??" send "X\r"; continue
|
||||
expect "TSM>" send "WHO\r"; continue
|
||||
expect "TSM>" send "EXIT\r"; continue
|
||||
expect "RING IN FOR SERVICE" send "\r^E"
|
||||
; Boot from mag tape
|
||||
bo mta0
|
||||
detach all
|
||||
quit
|
||||
239
SEL32/installs/loaddma21b.ini
Normal file
239
SEL32/installs/loaddma21b.ini
Normal file
|
|
@ -0,0 +1,239 @@
|
|||
;======================================================
|
||||
; SEL32 System Engineering Labs 32 bit computer
|
||||
; UTX - Ver 2.1B hardware configuration
|
||||
; CPU - V6 8M Sel32 Powernode
|
||||
; MFP - 7e00 Model 8001 IOP Processor Controller
|
||||
; DMA - 0800 2311/2314 Disk Processor II
|
||||
; dma0 Model 8858 340MB
|
||||
; dma0 <-> dsk/21bdisk0.dma
|
||||
; dma1 Model 8858 340MB
|
||||
; dma1 <-> dsk/21bdisk1.dma
|
||||
; LPR - 7ef8/7ef9 Model 924X High Speed Line Printer
|
||||
; COM - 7ee0 8512 8-line async communications
|
||||
; CON - 7efc/7efd Console Terminal
|
||||
; RTC - 7f06 50 HZ Real-Time clock
|
||||
; ITM - 7f04 38.4MS Interval timer
|
||||
; MT - 1000 8051 Buffered Tape Processor
|
||||
; mta0 <- tapes/utx21b1.tap
|
||||
; EC - 0e00 Model 8516 Ethernet
|
||||
;======================================================
|
||||
; Set hostname
|
||||
set env HOST=sel32
|
||||
; Set local IP address
|
||||
set env IP=192.168.1.5
|
||||
;======================================================
|
||||
; Set directory for disk images
|
||||
mkdir dsk
|
||||
mkdir tapes
|
||||
; Set tape image filename
|
||||
set env FILE1=utx21b1.tap
|
||||
; Set github.com URL for downloading files
|
||||
set env GITURL=https://github.com/AZBevier/SEL32-installs/raw/main/tapes/
|
||||
if exist "tapes/%FILE1%" goto exists1
|
||||
if not exist "tapes/%FILE1%" echof "file %FILE1% missing, trying %FILE1%.tgz"
|
||||
cd tapes
|
||||
if exist "%FILE1%.tgz" goto nocurl1
|
||||
echof "fetching %FILE1%.tgz file from github.com\n"
|
||||
curl -LJO %GITURL%/%FILE1%.tgz
|
||||
if not exist "%FILE1%.tgz" echof "FAILED - file %FILE1% not available"; exit 1
|
||||
:nocurl1
|
||||
echof "untar %FILE1%.tgz file\n"
|
||||
tar -xzf %FILE1%.tgz
|
||||
cd ..
|
||||
:exists1
|
||||
echof "file %FILE1% present, doing install"
|
||||
;
|
||||
; Set directory for disk images
|
||||
mkdir dsk
|
||||
mkdir tapes
|
||||
; Set tape image filename
|
||||
set env FILE2=utx21b2.tap
|
||||
if exist "tapes/%FILE2%" goto exists2
|
||||
if not exist "tapes/%FILE2%" echof "file %FILE2% missing, trying %FILE2%.tgz"
|
||||
cd tapes
|
||||
if exist "%FILE2%.tgz" goto nocurl2
|
||||
echof "fetching %FILE2%.tgz file from github.com\n"
|
||||
curl -LJO %GITURL%/%FILE2%.tgz
|
||||
if not exist "%FILE2%.tgz" echof "FAILED - file %FILE2% not available"; exit 1
|
||||
:nocurl2
|
||||
echof "untar %FILE2%.tgz file\n"
|
||||
tar -xzf %FILE2%.tgz
|
||||
cd ..
|
||||
:exists2
|
||||
echof "file %FILE2% present, doing install"
|
||||
;
|
||||
; Set directory for disk images
|
||||
mkdir dsk
|
||||
mkdir tapes
|
||||
; Set tape image filename
|
||||
set env FILE3=utx21b3.tap
|
||||
if exist "tapes/%FILE3%" goto exists3
|
||||
if not exist "tapes/%FILE3%" echof "file %FILE% missing, trying %FILE%.tgz"
|
||||
cd tapes
|
||||
if exist "%FILE3%.tgz" goto nocurl3
|
||||
echof "fetching %FILE3%.tgz file from github.com\n"
|
||||
curl -LJO %GITURL%/%FILE3%.tgz
|
||||
if not exist "%FILE3%.tgz" echof "FAILED - file %FILE% not available"; exit 1
|
||||
:nocurl3
|
||||
echof "untar %FILE3%.tgz file\n"
|
||||
tar -xzf %FILE3%.tgz
|
||||
cd ..
|
||||
:exists3
|
||||
echof "file %FILE3% present, doing install"
|
||||
;
|
||||
set RTC 50
|
||||
set CPU V6 8M
|
||||
set RTC enable
|
||||
set iop enable
|
||||
set iop0 dev=7e00
|
||||
set dma enable
|
||||
set dma0 dev=800
|
||||
set dma0 type=8858
|
||||
set dma1 type=8858
|
||||
set coml0 dev=7ee0
|
||||
set coml0 enable
|
||||
set coml1 enable
|
||||
set coml2 enable
|
||||
set coml3 enable
|
||||
set coml4 enable
|
||||
set coml5 enable
|
||||
set coml6 enable
|
||||
set coml7 enable
|
||||
set con enable
|
||||
set con0 dev=7efc
|
||||
set mta enable
|
||||
set mta0 dev=1000
|
||||
set lpr enable
|
||||
set comc enable
|
||||
at comc 4747
|
||||
set ec enable
|
||||
set ec mode=2
|
||||
set ec0 dev=0e00
|
||||
; set mac address to cause ec to be attached
|
||||
set ec MAC=08:00:5D:01:01:20
|
||||
;at lpr lprout
|
||||
;set cpu idle
|
||||
;
|
||||
deposit BOOTR[7] 42
|
||||
deposit BOOTR[6] 800
|
||||
set mta0 locked
|
||||
at mta0 tapes/utx21b1.tap
|
||||
at dma0 -i dsk/21bdisk0.dma
|
||||
at dma1 -i dsk/21bdisk1.dma
|
||||
at ec tap:tap0
|
||||
expect "#" continue
|
||||
expect "#" send "prep /dev/rdk0a\r"; continue
|
||||
expect "Ready to prep /dev/rdk0a" send "yes\r"; continue
|
||||
expect "Which option ?" send "2\r"; continue
|
||||
expect "Warning: some data may be lost on the pack, proceed <no>?" send "yes\r"; continue
|
||||
expect "Rebuild UTX flaw map from diagnostic flaw map <no>?" send "yes\r"; continue
|
||||
expect "Please select a drive type:" send "8\r"; continue
|
||||
expect "#" continue
|
||||
expect "#" continue
|
||||
expect "How many spare tracks should be allocated " send "\r"; continue
|
||||
expect "Do you really want to do this <no>?" send "yes\r"; continue
|
||||
expect "Which option ?" send "3\r"; continue
|
||||
expect "Which option ?" send "2\r"; continue
|
||||
expect "(a) Starting Cylinder <0>?" send "0\r"; continue
|
||||
expect "(a) Size In Blocks <25344> or Ending Cylinder <C65>?" send "c65\r"; continue
|
||||
expect "(a) Swap <no>?" send "\r"; continue
|
||||
expect "(b) Starting Cylinder <66>?" send "66\r"; continue
|
||||
expect "(b) Size In Blocks <20352> or Ending Cylinder <C118>?" send "c118\r"; continue
|
||||
expect "(b) Swap <yes>?" send "\r"; continue
|
||||
expect "(c) Starting Cylinder <0>?" send "\r"; continue
|
||||
expect "(c) Size In Blocks <271488> or Ending Cylinder <C706>?" send "\r"; continue
|
||||
expect "(c) Swap <no>?" send "\r"; continue
|
||||
expect "(d) Starting Cylinder <119>?" send "119\r"; continue
|
||||
expect "(d) Size In Blocks <70272> or Ending Cylinder <C301>?" send "c301\r"; continue
|
||||
expect "(d) Swap <no>?" send "\r"; continue
|
||||
expect "(e) Starting Cylinder <302>?" send "302\r"; continue
|
||||
expect "(e) Size In Blocks <100224> or Ending Cylinder <C562>?" send "C706\r"; continue
|
||||
expect "(e) Swap <no>?" send "\r"; continue
|
||||
expect "(f) Starting Cylinder <563>?" send "0\r"; continue
|
||||
expect "(f) Size In Blocks <55296> or Ending Cylinder <C143>?" send "0\r"; continue
|
||||
expect "(f) Swap <no>?" send "\r"; continue
|
||||
expect "(g) Starting Cylinder <0>?" send "\r"; continue
|
||||
expect "(g) Size In Blocks <0> or Ending Cylinder <C0>?" send "\r"; continue
|
||||
expect "(g) Swap <no>?" send "\r"; continue
|
||||
expect "(h) Starting Cylinder <0>?" send "\r"; continue
|
||||
expect "(h) Size In Blocks <0> or Ending Cylinder <C0>?" send "\r"; continue
|
||||
expect "(h) Swap <no>?" send "\r"; continue
|
||||
expect "Do you really want to do this <no>?" send "yes\r"; continue
|
||||
expect "Which option ?" send "0\r"; continue
|
||||
expect "Which option ?" send "0\r"; continue
|
||||
expect "#" send "prep /dev/rdk1a\r"; continue
|
||||
expect "Ready to prep /dev/rdk1a" send "yes\r"; continue
|
||||
expect "Which option ?" send "2\r"; continue
|
||||
expect "Warning: some data may be lost on the pack, proceed <no>?" send "yes\r"; continue
|
||||
expect "Rebuild UTX flaw map from diagnostic flaw map <no>?" send "yes\r"; continue
|
||||
expect "Please select a drive type:" send "8\r"; continue
|
||||
expect "#" continue
|
||||
expect "#" continue
|
||||
expect "How many spare tracks should be allocated " send "\r"; continue
|
||||
expect "Do you really want to do this <no>?" send "yes\r"; continue
|
||||
expect "Which option ?" send "0\r"; continue
|
||||
expect "#" send "newfs /dev/dk0a\r"; continue
|
||||
expect "#" continue
|
||||
expect "#" send "mount /dev/dk0a /mnt\r"; continue
|
||||
expect "#" send "cd /mnt\r"; continue
|
||||
expect "#" send "restore r\r"; continue
|
||||
expect "#" send "cd /\r"; continue
|
||||
expect "#" send "umount /dev/dk0a\r"; continue
|
||||
expect "#" send "halt\r"; continue
|
||||
bo mta0
|
||||
deposit BOOTR[7] 2
|
||||
at mta0 tapes/utx21b2.tap
|
||||
; do not allow cpu to idle
|
||||
; works around a reboot issue with UTX
|
||||
; if allowed, installation will hang checking root file system
|
||||
set cpu noidle
|
||||
;at mta0 tapes/utx21b2-3.tap
|
||||
expect "#" continue
|
||||
expect "#" send "newfs /dev/dk0d\r"; continue
|
||||
expect "#" continue
|
||||
expect "#" send "newfs /dev/dk0e\r"; continue
|
||||
expect "#" continue
|
||||
expect "#" send "mount /dev/dk0d /usr.POWERNODE\r"; continue
|
||||
expect "#" send "rm /restoresymtable\r"; continue
|
||||
expect "#" send "cd /usr.POWERNODE\r"; continue
|
||||
expect "#" send "restore rf /dev/rmt0\r"; continue
|
||||
expect "then enter tape name (default: /dev/rmt0)" at mta0 tapes/utx21b3.tap; send "\r"; continue
|
||||
expect "#" send "rm /usr.POWERNODE/restoresymtable\r"; continue
|
||||
expect "#" send "cd /\r"; continue
|
||||
expect "#" send "/ranlib.sh\r"; continue
|
||||
expect "#" send 'echo "/dev/dk0e /usr.POWERNODE/src 4.3 rw,noquota 1 3" >>/etc/fstab\r'; continue
|
||||
expect "echo" continue
|
||||
;expect "#" send "mount /dev/dk0e /usr.POWERNODE/src\r"; at mta0 tapes/utx21b_src.tap; continue
|
||||
;expect "#" send "cd /usr.POWERNODE/src\r"; continue
|
||||
;expect "#" send "tar xf /dev/rmt0\r"; continue
|
||||
expect "#" send "ed /etc/rc.boot\r"; continue
|
||||
expect "1522" send "/preen/\r"; continue
|
||||
expect "#" send "s/#/ /\r.+1\r"; continue
|
||||
expect "#" continue
|
||||
expect "echo" send "d\r"; 'expect "\r\n" send "/noname/\r"; continue' ; continue
|
||||
expect "/bin/hostname noname" send "s/noname/%HOST%/\rw\rq\r"; continue
|
||||
expect "#" send "ed /etc/hosts\r"; continue
|
||||
expect "128" send "/sysname/\r"; continue
|
||||
expect "sysname" continue
|
||||
expect "sysname" send "d\r"; 'expect "\r\n" send "i\r%IP% %HOST%\r.\rw\rq\r"; continue'; continue
|
||||
expect "#" send "ed /etc/rc.local\r" ; continue
|
||||
expect "3849" send "/echo 'Setup/\r"; continue
|
||||
expect "#" send "s/# //\r"; 'expect "\r\n" send "/en0 inet/\r"; continue' ; continue
|
||||
expect "#" continue
|
||||
expect "#" send "s/# //\r"; 'expect "\r\n" send "w\rq\r"; continue'; continue
|
||||
expect "#" continue
|
||||
expect "#" send "newfs /dev/dk1c\r"; continue
|
||||
expect "#" continue
|
||||
expect "#" send "mkdir /home\r"; continue
|
||||
expect "#" send 'echo "/dev/dk1c /home 4.3 rw,noquota 2 1" >>/etc/fstab\r'; continue
|
||||
expect "echo" continue
|
||||
expect "#" send 'bin/echo "stty intr \003" >>/.profile\r'; continue
|
||||
expect "#" send "mount /dev/dk1c /home\r"; continue
|
||||
expect "#" send "df\r"; continue
|
||||
;expect "#" send "reboot\r"; continue
|
||||
expect "#" send "halt\r"; continue
|
||||
expect "sim>" send "q\r"; continue
|
||||
;Boot from disk dma0
|
||||
bo dma0
|
||||
;stop simh execution
|
||||
quit
|
||||
399
SEL32/installs/loadscsi21b.ini
Normal file
399
SEL32/installs/loadscsi21b.ini
Normal file
|
|
@ -0,0 +1,399 @@
|
|||
;======================================================
|
||||
; SEL32 System Engineering Labs 32 bit computer
|
||||
; UTX - Ver 2.1B hardware configuration
|
||||
; CPU - V6 8M Sel32 Powernode
|
||||
; MFP - 7e00 Model 8002 Multi-Function Processor
|
||||
; SBA - 7e00/7e08 MFP SCSI Disk controller
|
||||
; sba0 Model 8821 300MB
|
||||
; sba0 <-> dsk/scsidiska0
|
||||
; sba1 Model 8821 300MB
|
||||
; sba1 <-> dsk/scsidiska1
|
||||
; LPR - 7ef8/7ef9 Model 924X High Speed Line Printer
|
||||
; COM - 7ee0 8512 8-line async communications
|
||||
; CON - 7efc/7efd Console Terminal
|
||||
; RTC - 7f06 50 HZ Real-Time clock
|
||||
; ITM - 7f04 38.4MS Interval timer
|
||||
; MT - 1000 8051 Buffered Tape Processor
|
||||
; mta0 <- tapes/utx21b1.tap
|
||||
; EC - 0e00 Model 8516 Ethernet
|
||||
;======================================================
|
||||
; Set hostname
|
||||
set env HOST=sel32
|
||||
; Set local IP address
|
||||
;set env IP=192.168.0.20
|
||||
set env IP=192.168.1.5
|
||||
;======================================================
|
||||
; Set debug output
|
||||
;set debug -n sel.log
|
||||
;set debug stderr
|
||||
;
|
||||
; Set directory for disk images
|
||||
mkdir dsk
|
||||
mkdir tapes
|
||||
; Set tape image filename
|
||||
set env FILE1=utx21b1.tap
|
||||
if exist "tapes/%FILE1%" goto exists1
|
||||
; Set github.com URL for downloading files
|
||||
set env GITURL=https://github.com/AZBevier/SEL32-installs/raw/main/tapes/
|
||||
if not exist "tapes/%FILE1%" echof "file %FILE1% missing, trying %FILE1%.tgz"
|
||||
cd tapes
|
||||
if exist "%FILE1%.tgz" goto nocurl1
|
||||
echof "fetching %FILE1%.tgz file from github.com\n"
|
||||
curl -LJO %GITURL%/%FILE1%.tgz
|
||||
if not exist "%FILE1%.tgz" echof "FAILED - file %FILE1% not available"; exit 1
|
||||
:nocurl1
|
||||
echof "untar %FILE1%.tgz file\n"
|
||||
tar -xzf %FILE1%.tgz
|
||||
cd ..
|
||||
:exists1
|
||||
echof "file %FILE1% present, doing install"
|
||||
;
|
||||
; Set tape image filename
|
||||
set env FILE2=utx21b2.tap
|
||||
if exist "tapes/%FILE2%" goto exists2
|
||||
if not exist "tapes/%FILE2%" echof "file %FILE2% missing, trying %FILE2%.tgz"
|
||||
cd tapes
|
||||
if exist "%FILE2%.tgz" goto nocurl2
|
||||
echof "fetching %FILE2%.tgz file from github.com\n"
|
||||
curl -LJO %GITURL%/%FILE2%.tgz
|
||||
if not exist "%FILE2%.tgz" echof "FAILED - file %FILE2% not available"; exit 1
|
||||
:nocurl2
|
||||
echof "untar %FILE2%.tgz file\n"
|
||||
tar -xzf %FILE2%.tgz
|
||||
cd ..
|
||||
:exists2
|
||||
echof "file %FILE2% present, doing install"
|
||||
;
|
||||
; Set tape image filename
|
||||
set env FILE3=utx21b3.tap
|
||||
if exist "tapes/%FILE3%" goto exists3
|
||||
if not exist "tapes/%FILE3%" echof "file %FILE% missing, trying %FILE%.tgz"
|
||||
cd tapes
|
||||
if exist "%FILE3%.tgz" goto nocurl3
|
||||
echof "fetching %FILE3%.tgz file from github.com\n"
|
||||
curl -LJO %GITURL%/%FILE3%.tgz
|
||||
if not exist "%FILE3%.tgz" echof "FAILED - file %FILE% not available"; exit 1
|
||||
:nocurl3
|
||||
echof "untar %FILE3%.tgz file\n"
|
||||
tar -xzf %FILE3%.tgz
|
||||
cd ..
|
||||
:exists3
|
||||
echof "file %FILE3% present, doing install"
|
||||
;
|
||||
; CPU type and memory
|
||||
;set CPU 32/97 4M
|
||||
;set CPU V6 4M
|
||||
set CPU V6 8M
|
||||
;set CPU V9 4M
|
||||
;set CPU V9 8M
|
||||
;
|
||||
; CPU debug options
|
||||
;set cpu debug=cmd;exp;inst;detail;trap;xio;irq
|
||||
; Set instruction trace history size
|
||||
;set cpu history=10000
|
||||
; useful options
|
||||
;set cpu debug=exp;irq;xio;trap;cmd
|
||||
;;set cpu debug=cmd;exp;irq;trap;xio
|
||||
;set cpu debug=cmd;irq;trap;exp
|
||||
;;set cpu debug=irq;trap;exp;xio
|
||||
;set cpu debug=irq;xio
|
||||
;
|
||||
; RTC realtime clock
|
||||
set RTC enable
|
||||
; address is 7f06
|
||||
set RTC 50
|
||||
;set RTC 60
|
||||
; RTC debug options
|
||||
;set RTC debug=cmd
|
||||
;
|
||||
; ITM interval timer
|
||||
; address is 7f04
|
||||
; set itm 3840
|
||||
;set ITM debug=cmd
|
||||
;
|
||||
; IOP at channel 7e00
|
||||
; useful options
|
||||
;set iop debug=cmd;exp
|
||||
;set iop debug=cmd
|
||||
; make iop online
|
||||
;set iop enable
|
||||
; set iop channel address
|
||||
;set iop0 dev=7e00
|
||||
;
|
||||
; MFP at channel 7e00
|
||||
; useful options
|
||||
;set mfp debug=cmd;exp
|
||||
; make mfp online
|
||||
set mfp enable
|
||||
; set mfp channel address
|
||||
set mfp0 dev=7e00
|
||||
;set mfp0 dev=7600
|
||||
;
|
||||
; EC at channel 0e00
|
||||
; useful options
|
||||
;set ec debug=cmd;exp
|
||||
; set the mode
|
||||
set EC mode=1
|
||||
; make ec online
|
||||
set ec enable
|
||||
; set ec channel address
|
||||
set ec0 dev=0e00
|
||||
at ec tap:tap0
|
||||
;
|
||||
; COM 8-Line
|
||||
;set com debug=cmd;
|
||||
;set coml0 enable
|
||||
;set coml1 enable
|
||||
;set coml2 enable
|
||||
;set coml3 enable
|
||||
;set coml4 enable
|
||||
;set coml5 enable
|
||||
;set coml6 enable
|
||||
;set coml7 enable
|
||||
;
|
||||
; Enable telnet sessions on port 4747
|
||||
;set comc enable
|
||||
;at comc 4747
|
||||
;
|
||||
; LPR
|
||||
;set lpr debug=cmd;detail
|
||||
;set lpr enable
|
||||
set lpr enable
|
||||
; LPR output file
|
||||
;at lpr lprout
|
||||
at lpr lprout
|
||||
;
|
||||
; CON Console
|
||||
; useful options
|
||||
;set con debug=cmd;exp;detail
|
||||
;set con debug=cmd;exp;
|
||||
; enable console
|
||||
set con enable
|
||||
; set console address
|
||||
; set con0 enable
|
||||
set con0 dev=7efc
|
||||
; set con1 enable
|
||||
set con1 dev=7efd
|
||||
;
|
||||
; MTA Buffered tape processor
|
||||
;set mta debug=cmd;exp;detail;data
|
||||
; useful options
|
||||
;set mta debug=cmd;detail;exp
|
||||
;
|
||||
; enable the MTA to change channel
|
||||
set mta enable
|
||||
; set mt channel
|
||||
set mta0 dev=1000
|
||||
; attach in/out tape files
|
||||
;at mta0 mpxsdt.tap
|
||||
;at mta0 nbctape.tap
|
||||
set mta0 locked
|
||||
at mta0 tapes/utx21b1.tap
|
||||
;at mta0 utx21a1.tap
|
||||
;at mta1 temptape.tap
|
||||
;at mta1 utx21a2.tap
|
||||
;at mta2 output.tap
|
||||
;at mta0 sim32sdt.tap
|
||||
;at mta0 diag.tap
|
||||
;
|
||||
; DMA disk processor II/UDP
|
||||
;set dma enable
|
||||
; set disk chan to 0800
|
||||
;set dma0 dev=800
|
||||
; set disk type to MPX MH300
|
||||
;set dma0 type=MH300
|
||||
; set disk type to UTX 9346
|
||||
;set dma0 type=9346
|
||||
;set dma0 type=8155
|
||||
;set dma0 type=8887
|
||||
;set dma0 type=8148
|
||||
; Attach diskfile
|
||||
;at dma0 utx0disk
|
||||
;at dma0 utx1disk
|
||||
;at dma0 sim32disk
|
||||
;at dma0 diagdisk
|
||||
;
|
||||
;set dma debug=cmd;exp;detail;data
|
||||
; useful options
|
||||
;set dma debug=cmd;exp
|
||||
;set dma debug=exp;cmd;detail
|
||||
;
|
||||
; SDA SCFI disk processor
|
||||
;set sda debug=cmd;exp;data;detail
|
||||
; Attach diskfiles
|
||||
;at sda0 scsidisk0
|
||||
;at sda1 scsidisk1
|
||||
;
|
||||
; SBA MFP SCSI bus 1 disk processor
|
||||
set sba enable
|
||||
; set disk chan to 7600
|
||||
;set sba0 dev=7600
|
||||
set sba0 dev=7e00
|
||||
;set sba1 dev=7e08
|
||||
; set disk type to MPX MH300
|
||||
set sba0 type=8821
|
||||
set sba1 type=8821
|
||||
;set sba0 type=SD300
|
||||
;set sba0 type=SD150
|
||||
;set sba0 type=8820
|
||||
;set sba debug=cmd;exp;data;detail
|
||||
;set sba debug=cmd;exp;detail
|
||||
; Attach diskfiles
|
||||
at sba0 -i dsk/scsidiska0
|
||||
at sba1 -i dsk/scsidiska1
|
||||
;
|
||||
; SBB MFP SCSI bus 2 disk processor
|
||||
;;set sbb enable
|
||||
; set disk chan to 7640
|
||||
;set sbb0 dev=7640
|
||||
;;set sbb0 dev=7e40
|
||||
; set disk type to MPX MH300
|
||||
;set sbb0 type=SD300
|
||||
;set sbb0 type=8821
|
||||
;;set sbb0 type=SD150
|
||||
;set sbb0 type=8820
|
||||
;set sbb debug=cmd;exp;data;detail
|
||||
;;set sbb debug=cmd;exp;detail
|
||||
; Attach diskfiles
|
||||
;;at sbb0 scsidiskb0
|
||||
;at sbb1 scsi1disk
|
||||
;
|
||||
; DPA high speed disk processor
|
||||
; enable the HSDP to change channel
|
||||
;set dpa enable
|
||||
; set channel addr
|
||||
;set dpa0 dev=800
|
||||
; set disk type to UTX 8887
|
||||
;set dpa0 type=8887
|
||||
; Attach diskfiles
|
||||
;at dpa0 utxdsk.dsk
|
||||
;at dpa0 utx0hsdp
|
||||
;at dpa1 utx1hsdp
|
||||
;
|
||||
;set dpa debug=cmd;detail;exp
|
||||
; useful options
|
||||
;set dpa debug=cmd;exp;detail
|
||||
;
|
||||
; set console switches
|
||||
deposit CSW 0
|
||||
;
|
||||
;UTX boot tape options
|
||||
;set GPR 7 to 0x00 to boot in multi-user mode
|
||||
;set GPR 7 to 0x01 to prompt for unix filename
|
||||
;set GPR 7 to 0x02 to boot in single user mode
|
||||
;set GPR 7 to 0x10 to disable swapping and paging
|
||||
;set GPR 7 to 0x20 to boot from device specified in GPR6
|
||||
;set GPR 7 to 0x40 to allow progress messages on boot
|
||||
;deposit BOOTR[7] 40
|
||||
;deposit BOOTR[7] 52
|
||||
deposit BOOTR[7] 42
|
||||
;deposit BOOTR[7] 2
|
||||
;deposit BOOTR[6] 800
|
||||
;deposit BOOTR[0] ffffffff
|
||||
;
|
||||
; Set register content at boot for SEL diagnostics
|
||||
; uncomment next line to get diag loader prompt
|
||||
;deposit bootr[0] ffffffff
|
||||
;deposit bootr[1] 0
|
||||
;deposit bootr[2] 0
|
||||
;
|
||||
; do not allow cpu to idle
|
||||
; works around a reboot issue with UTX
|
||||
; if allowed, installation will hang checking root file system
|
||||
set cpu noidle
|
||||
;
|
||||
expect "#" continue
|
||||
expect "#" send "prep /dev/rsd0a\r"; continue
|
||||
expect "Ready to prep /dev/rsd0a" send "yes\r"; continue
|
||||
expect "Which option ?" send "2\r"; continue
|
||||
expect "Please select a drive type:" send "7\r"; continue
|
||||
expect "#" continue
|
||||
expect "#" continue
|
||||
expect "#" continue
|
||||
expect "Do you really want to do this <no>?" send "yes\r"; continue
|
||||
expect "Which option ?" send "0\r"; continue
|
||||
;
|
||||
expect "#" continue
|
||||
expect "#" continue
|
||||
expect "#" send "prep /dev/rsd1a\r"; continue
|
||||
expect "Which option ?" send "2\r"; continue
|
||||
expect "Please select a drive type:" send "7\r"; continue
|
||||
expect "#" continue
|
||||
expect "#" continue
|
||||
expect "#" continue
|
||||
expect "Do you really want to do this <no>?" send "yes\r"; continue
|
||||
expect "Ready to prep /dev/rsd1a" send "yes\r"; continue
|
||||
expect "Which option ?" send "0\r"; continue
|
||||
expect "#" continue
|
||||
expect "#" continue
|
||||
expect "#" send "newfs /dev/sd0a\r"; continue
|
||||
expect "#" continue
|
||||
expect "#" send "newfs /dev/sd0d\r"; continue
|
||||
expect "#" continue
|
||||
expect "#" send "newfs /dev/sd0e\r"; continue
|
||||
expect "#" continue
|
||||
expect "#" send "mount /dev/sd0a /mnt\r"; continue
|
||||
expect "#" send "cd /mnt\r"; continue
|
||||
expect "#" send "restore r\r"; continue
|
||||
expect "#" send 'bin/echo "/dev/sd0a / 4.3 rw,noquota 1 1" >etc/fstab\r'; continue
|
||||
expect "#" send 'bin/echo "#/dev/sd0b is the default swap partition" >>etc/fstab\r'; continue
|
||||
expect "#" send 'bin/echo "/dev/sd0d /usr.POWERNODE 4.3 rw,noquota 1 2" >>etc/fstab\r'; continue
|
||||
expect "#" send "cd /\r"; continue
|
||||
expect "#" send "umount /dev/sd0a\r"; continue
|
||||
expect "#" send "halt\r"; continue
|
||||
;expect "#" send "/mnt/etc/reboot\r"; continue
|
||||
; Boot from mag tape
|
||||
bo mta0
|
||||
; Set expect script to load UTX 2.1B
|
||||
deposit BOOTR[7] 2
|
||||
at mta0 tapes/utx21b2.tap
|
||||
;set sba debug=cmd;exp;data;detail
|
||||
;
|
||||
expect "#" continue
|
||||
expect "#" send "mount /dev/sd0d /usr.POWERNODE\r"; continue
|
||||
expect "#" send "rm /restoresymtable\r"; continue
|
||||
expect "#" send "cd /usr.POWERNODE\r"; continue
|
||||
;expect "#" send "mkdir src\r"; continue
|
||||
expect "#" send "restore rf /dev/rmt0\r"; continue
|
||||
expect "then enter tape name (default: /dev/rmt0)" at mta0 tapes/utx21b3.tap; send "\r"; continue
|
||||
expect "#" send "rm /usr.POWERNODE/restoresymtable\r"; continue
|
||||
expect "#" send "cd /\r"; continue
|
||||
expect "#" send "/ranlib.sh\r"; continue
|
||||
;expect "#" send 'echo "/dev/sd0d /usr.POWERNODE 4.3 rw,noquota 1 2" >>/etc/fstab\r'; continue
|
||||
expect "#" send 'echo "/dev/sd0e /usr.POWERNODE/src 4.3 rw,noquota 1 3" >>/etc/fstab\r'; continue
|
||||
expect "echo" continue
|
||||
;expect "#" send "mount /dev/sd0e /usr.POWERNODE/src\r"; at mta0 tapes/utx21b_src.tap; continue
|
||||
;expect "#" send "cd /usr.POWERNODE/src\r"; continue
|
||||
;expect "#" send "tar xf /dev/rmt0\r"; continue
|
||||
expect "#" send "ed /etc/rc.boot\r"; continue
|
||||
expect "1522" send "/preen/\r"; continue
|
||||
expect "#" send "s/#/ /\r.+1\r"; continue
|
||||
expect "#" continue
|
||||
expect "echo" send "d\r"; 'expect "\r\n" send "/noname/\r"; continue' ; continue
|
||||
expect "/bin/hostname noname" send "s/noname/%HOST%/\rw\rq\r"; continue
|
||||
expect "#" send "ed /etc/hosts\r"; continue
|
||||
expect "128" send "/sysname/\r"; continue
|
||||
expect "sysname" continue
|
||||
expect "sysname" send "d\r"; 'expect "\r\n" send "i\r%IP% %HOST%\r.\rw\rq\r"; continue'; continue
|
||||
expect "#" send "ed /etc/rc.local\r" ; continue
|
||||
expect "3849" send "/echo 'Setup/\r"; continue
|
||||
expect "#" send "s/# //\r"; 'expect "\r\n" send "/en0 inet/\r"; continue' ; continue
|
||||
expect "#" continue
|
||||
expect "#" send "s/# //\r"; 'expect "\r\n" send "w\rq\r"; continue'; continue
|
||||
expect "#" continue
|
||||
expect "#" send "newfs /dev/sd1c\r"; continue
|
||||
expect "#" continue
|
||||
expect "#" send "mkdir /home\r"; continue
|
||||
expect "#" send 'echo "/dev/sd1c /home 4.3 rw,noquota 2 1" >>/etc/fstab\r'; continue
|
||||
expect "echo" continue
|
||||
expect "#" send "mount /dev/sd1c /home\r"; continue
|
||||
expect "#" send "df\r"; continue
|
||||
expect "#" send 'bin/echo "stty intr \003" >>/.profile\r'; continue
|
||||
expect "#" send 'bin/echo "Run runscsi21b.ini to run installed UTX 21b"\r'; continue
|
||||
;expect "#" send "reboot\r"; continue
|
||||
expect "#" send "halt\r"; continue
|
||||
expect "sim>" send "q\r"; continue
|
||||
;Boot from disk sba0
|
||||
bo sba0
|
||||
;stop simh execution
|
||||
quit
|
||||
168
SEL32/installs/loadscsi3x.ini
Normal file
168
SEL32/installs/loadscsi3x.ini
Normal file
|
|
@ -0,0 +1,168 @@
|
|||
;======================================================
|
||||
; SEL32 System Engineering Labs 32 bit computer
|
||||
; MPX - Ver 3.4 hardware configuration
|
||||
; CPU - 32/67 8M Sel32 Concept/32
|
||||
; IOP - 7e00 Model 8001 IOP Processor Controller
|
||||
; MFP - 7600 Model 8002 Multi Function Processor
|
||||
; SBA - 7600 MFP SCSI Disk Controller
|
||||
; sba0 SD300 Model 8828 300MB MHD
|
||||
; sba0 <-> dsk/mpx3xsba0.dsk
|
||||
; SBA - 7640 MFP SCSI Disk Controller
|
||||
; sbb0 SD300 Model 8828 300MB MHD
|
||||
; sbb0 <-> dsk/mpx3xsbb0.dsk
|
||||
; LPR - 7ef8/7ef9 Model 924X High Speed Line Printer
|
||||
; COM - 7ec0 8512 8-line async communications
|
||||
; CON - 7efc/7efd Console Terminal
|
||||
; RTC - 7f06 60 HZ Real-Time clock
|
||||
; ITM - 7f04 38.4MS Interval timer
|
||||
; MT - 1000 8051 Buffered Tape Processor
|
||||
; mta0 <- tapes/mpxsdt69.tap
|
||||
; EC - 0e00 Model 8516 Ethernet (not supported)
|
||||
;======================================================
|
||||
; Set HOST simulator
|
||||
set env HOST=sel32
|
||||
; Set local IP address
|
||||
; set env IP=192.168.1.5 (N/U)
|
||||
;======================================================
|
||||
; Set directory for disk images
|
||||
mkdir dsk
|
||||
mkdir tapes
|
||||
; Set tape image filename
|
||||
set env FILE=mpxsdt69.tap
|
||||
; Set github.com URL for downloading files
|
||||
set env GITURL=https://github.com/AZBevier/SEL32-installs/raw/main/tapes/
|
||||
if exist "tapes/%FILE%" goto exists
|
||||
if not exist "tapes/%FILE%" echof "file %FILE% missing, trying %FILE%.tgz"
|
||||
cd tapes
|
||||
if exist "%FILE%.tgz" goto nocurl
|
||||
echof "fetching %FILE%.tgz file from github.com\n"
|
||||
curl -LJO %GITURL%/%FILE%.tgz
|
||||
if not exist "%FILE%.tgz" echof "FAILED - file %FILE% not available"; exit 1
|
||||
:nocurl
|
||||
echof "untar %FILE%.tgz file\n"
|
||||
tar -xzf %FILE%.tgz
|
||||
cd ..
|
||||
:exists
|
||||
echof "file %FILE% present, doing install"
|
||||
;
|
||||
; Set directory for disk
|
||||
mkdir dsk
|
||||
; Set debug output
|
||||
; set debug -n sel.log
|
||||
;
|
||||
; CPU type and memory size
|
||||
set CPU 32/67 8M
|
||||
;set CPU 32/97 8M
|
||||
;
|
||||
; RTC realtime clock at 7f06
|
||||
set RTC 60
|
||||
set RTC enable
|
||||
;
|
||||
; ITM interval timer at 7f04
|
||||
set ITM 3840
|
||||
;
|
||||
; IOP at channel 7e00
|
||||
set iop enable
|
||||
set iop0 dev=7e00
|
||||
;
|
||||
; MFP at channel 7600
|
||||
set mfp enable
|
||||
set mfp0 dev=7600
|
||||
;
|
||||
; COM 8-Line at 7ec0
|
||||
set coml enable
|
||||
set coml0 dev=7ec0
|
||||
set coml0 enable
|
||||
set coml1 enable
|
||||
set coml2 enable
|
||||
set coml3 enable
|
||||
set coml4 enable
|
||||
set coml5 enable
|
||||
set coml6 enable
|
||||
set coml7 enable
|
||||
;
|
||||
; Enable telnet sessions on port 4747
|
||||
set comc enable
|
||||
at comc 4747
|
||||
;
|
||||
; LPR0 at 7ef8
|
||||
set lpr enable
|
||||
; LPR output file
|
||||
;at lpr lprout
|
||||
;
|
||||
; EC ethernet at 0e00
|
||||
; Support not available yet
|
||||
;set ec enable
|
||||
;set ec mode=2
|
||||
;set ec0 dev=0e00
|
||||
;at ec tap:tap0
|
||||
; set mac address to cause ec to be attached
|
||||
;set ec MAC=08:00:5D:01:01:20
|
||||
;
|
||||
; CON Console at 7efc
|
||||
set con enable
|
||||
set con0 dev=7efc
|
||||
;
|
||||
; MTA Buffered tape processor at 1000
|
||||
set mta enable
|
||||
set mta0 dev=1000
|
||||
; Attach install sdt tape file
|
||||
set mta0 locked
|
||||
at mta0 tapes/mpxsdt69.tap
|
||||
;
|
||||
; SBA MFP SCSI buss 1 disk processor at 7600
|
||||
set sba enable
|
||||
; set disk chan to 7600
|
||||
set sba0 dev=7600
|
||||
set sba0 type=SD300
|
||||
; Attach diskfile
|
||||
at sba0 -i dsk/mpx3xsba0.dsk
|
||||
;
|
||||
; SBB MFP SCSI buss 2 disk processor at 7640
|
||||
set sbb enable
|
||||
set sbb0 dev=7640
|
||||
set sbb0 type=SD300
|
||||
; Attach diskfile
|
||||
at sbb0 -i dsk/mpx3xsbb0.dsk
|
||||
;
|
||||
; set console switches
|
||||
deposit CSW 0
|
||||
;
|
||||
; allow cpu idle
|
||||
set cpu idle
|
||||
;
|
||||
; wait for expected output from simulator, then enter this text
|
||||
expect "ENTER" send " %DATE_MM%/%DATE_DD%/%DATE_YY%,%TIME_HH%:%TIME_MM%:%TIME_SS%\r"; continue
|
||||
expect "FMT>" send "INITIALIZE DEVICE=DM7600 DEST=Y DISC=DM0300 CON=N\r"; continue
|
||||
expect "FMT>" send "FORMAT DEVICE=DM7600 VOLUME=SYSTEM MAXRES=7000 CON=N\r"; continue
|
||||
expect "ENTER SYSTEM VOLUME CHANNEL AND SUBADDRESS: " send "7600\r"; continue
|
||||
expect "VOL>" send "CREATE D SYSTEM ENTRIES=2000\r"; continue
|
||||
; restore system
|
||||
expect "VOL>" send "RESTORE VOL=SYSTEM\r"; continue
|
||||
; restore object, object_e, oldobj
|
||||
expect "VOL>" send "RESTORE VOL=SYSTEM\r"; continue
|
||||
; restore bin, doc, nblib, sample
|
||||
expect "VOL>" send "RESTORE VOL=SYSTEM\r"; continue
|
||||
expect "VOL>" send "REWIND\r"; continue
|
||||
expect "VOL>" send "EXIT\r"; continue
|
||||
; initialize 2nd disk
|
||||
;expect "SYSTEM READY... PRESS ATTENTION FOR TSM..." send "@@A"; continue
|
||||
expect "SYSTEM READY... PRESS ATTENTION FOR TSM..." send after=500000 delay=6000 "HIT @@A"; continue
|
||||
;expect "" send after=1500000, delay=4000, " HIT @@A"; continue
|
||||
expect "ENTER YOUR OWNERNAME:" send "SYSTEM\r"; continue
|
||||
expect "TSM>" send "WHO\r"; continue
|
||||
expect "TSM>" send "@SYSTEM(SYSTEM)J.VFMT\r"; continue
|
||||
expect "FMT>" send "INITIALIZE DEV=DM7640 DES=Y DIS=DM0300 CON=N\r"; continue
|
||||
expect "FMT>" send "FORMAT DEV=DM7640 VOL=WORK MAXRE=7000 CON=N\r"; continue
|
||||
expect "TSM>" send "MOUNT WORK ON DM7640 OPTI=PUBLIC\r"; continue
|
||||
expect "TSM>" send "VOLMGR\r"; continue
|
||||
expect "VOL>" send "CREATE D @WORK^SYSTEM ENTRIES=1000\r"; continue
|
||||
expect "VOL>" send "EXIT\r"; continue
|
||||
expect "TSM>" send "!STAT VOL\r"; continue
|
||||
;;expect "TSM>" send "WHO\r"; continue
|
||||
expect "TSM>" send "EXIT\r"; continue
|
||||
expect "RING IN FOR SERVICE" send "\r^E"
|
||||
; Boot from mag tape
|
||||
bo mta0
|
||||
det all
|
||||
quit
|
||||
215
SEL32/installs/rundma1x67.ini
Normal file
215
SEL32/installs/rundma1x67.ini
Normal file
|
|
@ -0,0 +1,215 @@
|
|||
;======================================================
|
||||
; SEL32 System Engineering Labs 32 bit computer
|
||||
; MPX - Ver 1.5F hardware configuration
|
||||
; CPU - 32/67 4M Sel32 Concept/32
|
||||
; IOP - 7e00 Model 8001 IOP Processor Controller
|
||||
; DMA - 0800 2311/2314 Disk Processor II
|
||||
; dma0 MH300 Model 8127 300MB MHD
|
||||
; dma0 <-> dsk/mpx1xdma0.dsk
|
||||
; LPR - 7ef8/7ef9 Model 924X High Speed Line Printer
|
||||
; COM - 7ec0 8512 8-line async communications
|
||||
; CON - 7efc/7efd Console Terminal
|
||||
; RTC - 7f06 60 HZ Real-Time clock
|
||||
; ITM - 7f04 38.4MS Interval timer
|
||||
; MT - 1000 8051 Buffered Tape Processor
|
||||
; mta0 <- tapes/mpx1xsdt.tap
|
||||
; EC - 0e00 Model 8516 Ethernet (not supported)
|
||||
;======================================================
|
||||
; Set hostname
|
||||
set env HOST=sel32
|
||||
; Set local IP address
|
||||
; set env IP=192.168.1.5 (N/U)
|
||||
;======================================================
|
||||
; Set directory for disk images
|
||||
mkdir dsk
|
||||
; Set debug output
|
||||
; set debug -n sel.log
|
||||
;
|
||||
; CPU type and memory size
|
||||
set CPU 32/67 4M
|
||||
;
|
||||
; RTC realtime clock at 7f06
|
||||
set RTC 60
|
||||
set RTC enable
|
||||
;
|
||||
; ITM interval timer at 7f04
|
||||
set ITM 3840
|
||||
;
|
||||
; IOP at channel 7e00
|
||||
set iop enable
|
||||
set iop0 dev=7e00
|
||||
;
|
||||
; COM 8-Line at 7ec0
|
||||
set coml enable
|
||||
set coml0 dev=7ec0
|
||||
; Set debug output
|
||||
;set debug -n sel.log
|
||||
;
|
||||
; CPU type and memory size
|
||||
;set CPU 32/27 4M
|
||||
;set CPU 32/87 4M
|
||||
set CPU 32/67 4M
|
||||
;set CPU 32/97 4M
|
||||
;
|
||||
; CPU debug options
|
||||
;set cpu debug=cmd;exp;inst;detail;trap;xio;irq
|
||||
; Set instruction trace history size
|
||||
;set cpu history=10000
|
||||
;
|
||||
; RTC realtime clock
|
||||
; RTC debug options
|
||||
;set RTC debug=cmd
|
||||
; device address is 7f06
|
||||
set RTC enable
|
||||
;set RTC 50
|
||||
set RTC 60
|
||||
;
|
||||
; ITM interval timer
|
||||
; ITM debug options
|
||||
;set ITM debug=cmd
|
||||
; device address is 7f04
|
||||
set ITM 3840
|
||||
;
|
||||
; IOP at channel 7e00
|
||||
; IOP debug options
|
||||
;set iop debug=cmd;exp
|
||||
set iop enable
|
||||
; set iop channel address
|
||||
set iop0 dev=7e00
|
||||
;
|
||||
; MFP at channel 7e00
|
||||
; Only supported on MPX-3X and UTX
|
||||
; MFP debug options
|
||||
;set mfp debug=cmd;exp
|
||||
; enable MFP to change address
|
||||
;set mfp enable
|
||||
; set mfp channel address
|
||||
;set mfp0 dev=7e00
|
||||
;set mfp0 dev=7600
|
||||
;
|
||||
; COM 8-Line
|
||||
; COM debug options
|
||||
;set coml debug=cmd;exp;xio
|
||||
; enable COML to change address
|
||||
set coml enable
|
||||
; MPX 3X wants 7ea0
|
||||
; set coml0 dev=7ea0
|
||||
; MPX 1X wants 7ec0
|
||||
set coml0 dev=7ec0
|
||||
set coml0 enable
|
||||
set coml1 enable
|
||||
set coml2 enable
|
||||
set coml3 enable
|
||||
set coml4 enable
|
||||
set coml5 enable
|
||||
set coml6 enable
|
||||
set coml7 enable
|
||||
;
|
||||
; COMC 8-Line Mux
|
||||
; COMC debug options
|
||||
;set comc debug=cmd
|
||||
; COMC has no address
|
||||
set comc enable
|
||||
; Enable telnet sessions on port 4747
|
||||
at comc 4747
|
||||
;
|
||||
; LPR at 7ef8
|
||||
; LPR debug options
|
||||
;set lpr debug=cmd;detail
|
||||
; enable LPR to change address
|
||||
set lpr enable
|
||||
; attach LPR output file
|
||||
at lpr lprout
|
||||
;
|
||||
; EC ethernet 0e00
|
||||
; Support not available yet
|
||||
; EC debug options
|
||||
;set ec debug=cmd;exp;xio;detail;irq
|
||||
;set ec enable
|
||||
;set ec0 dev=0e00
|
||||
;set ec mode=2
|
||||
;at ec tap:tap0
|
||||
; set mac address to cause ec to be attached
|
||||
;set ec MAC=08:00:5D:01:01:20
|
||||
;
|
||||
; CON Console
|
||||
; CON debug options
|
||||
;set con debug=cmd;exp;detail
|
||||
; enable console
|
||||
set con enable
|
||||
; set console address
|
||||
set con0 dev=7efc
|
||||
;
|
||||
; MTA Buffered tape processor
|
||||
; MTA debug options
|
||||
;set mta debug=cmd;exp;detail;data
|
||||
; enable MTA to change channel
|
||||
set mta enable
|
||||
; set mta channel address
|
||||
set mta0 dev=1000
|
||||
; Attach in/out tape files
|
||||
;at mta0 output.tap
|
||||
;set mta0 locked
|
||||
;
|
||||
; DMA disk processor II/UDP
|
||||
; DMA debug options
|
||||
;set dma debug=cmd;exp;detail;data
|
||||
; enable DMA to change channel
|
||||
set dma enable
|
||||
; set channel address
|
||||
set dma0 dev=800
|
||||
; set disk type to MPX MH300 (8887)
|
||||
; must match sysgen assignment
|
||||
set dma0 type=MH300
|
||||
; Attach diskfile
|
||||
at dma0 dsk/mpx1xdma0.dsk
|
||||
;
|
||||
; SDA SCFI disk processor
|
||||
; Only supported on MPX-1X
|
||||
; SDA debug options
|
||||
;set sda debug=cmd;exp;data;detail
|
||||
; enable SCFI to change channel
|
||||
;set sda enable
|
||||
; set channel address
|
||||
;set sda0 dev=800
|
||||
; set disk type to MPX SG120
|
||||
; must match sysgen assignment
|
||||
;set sda0 type=SG120
|
||||
; Attach diskfiles
|
||||
;at sda0 dsk/mpx1xsda0.dsk
|
||||
;
|
||||
; DPA high speed disk processor
|
||||
; DPA debug options
|
||||
;set dpa debug=cmd;exp;data;detail
|
||||
; enable DPA to change channel
|
||||
;set dpa enable
|
||||
; set channel address
|
||||
;set dpa0 dev=800
|
||||
; set disk type to MPX MH300 (8887)
|
||||
; must match sysgen assignment
|
||||
;set dpa0 type=MH300
|
||||
; Attach diskfiles
|
||||
;at dpa0 dsk/mpx1xdpa0.dsk
|
||||
;
|
||||
; set console switches
|
||||
deposit CSW 0
|
||||
;
|
||||
;SEL32 boot register options
|
||||
;deposit BOOTR[7] 0
|
||||
;deposit BOOTR[6] 800
|
||||
;;
|
||||
; allow cpu idle
|
||||
set cpu idle
|
||||
; Set expect script for auto time entry on MPX at OPCOM prompt
|
||||
;expect haltafter=20000
|
||||
; wait for expected output from simulator, then enter this text
|
||||
expect " DO YOU WISH TO USE *SEL32SY1* DEFAULT IMAGE(Y/N)?" send "Y\r"; continue
|
||||
expect "??" send " %DATE_MM%/%DATE_DD%/%DATE_YY%,%TIME_HH%:%TIME_MM%:%TIME_SS%\r@@A"; GO
|
||||
;expect "" send "@@A"; continue
|
||||
expect "" send after=400000, delay=6000, " @@A"
|
||||
expect "??" send "X\r"; continue
|
||||
expect "TSM>" send "WHO\r"; continue
|
||||
;expect "TSM>" send "EXIT\r"; continue
|
||||
;
|
||||
; Boot from disk
|
||||
bo dma0
|
||||
70
SEL32/installs/rundma21b.ini
Normal file
70
SEL32/installs/rundma21b.ini
Normal file
|
|
@ -0,0 +1,70 @@
|
|||
;======================================================
|
||||
; SEL32 System Engineering Labs 32 bit computer
|
||||
; UTX - Ver 2.1B hardware configuration
|
||||
; CPU - V6 8M Sel32 Powernode
|
||||
; MFP - 7e00 Model 8001 IOP Processor Controller
|
||||
; DMA - 0800 2311/2314 Disk Processor II
|
||||
; dma0 Model 8858 340MB
|
||||
; dma0 <-> dsk/21bdisk0.dma
|
||||
; dma1 Model 8858 340MB
|
||||
; dma1 <-> dsk/21bdisk1.dma
|
||||
; LPR - 7ef8/7ef9 Model 924X High Speed Line Printer
|
||||
; COM - 7ee0 8512 8-line async communications
|
||||
; CON - 7efc/7efd Console Terminal
|
||||
; RTC - 7f06 50 HZ Real-Time clock
|
||||
; ITM - 7f04 38.4MS Interval timer
|
||||
; MT - 1000 8051 Buffered Tape Processor
|
||||
; mta0 <-> not assigned
|
||||
; EC - 0e00 Model 8516 Ethernet
|
||||
;======================================================
|
||||
; Set hostname
|
||||
set env HOST=sel32
|
||||
; Set local IP address
|
||||
set env IP=192.168.1.5
|
||||
;======================================================
|
||||
;set debug -n sel.log
|
||||
mkdir dsk
|
||||
set RTC 50
|
||||
set CPU V6 8M
|
||||
set RTC enable
|
||||
set iop enable
|
||||
set iop0 dev=7e00
|
||||
set dma enable
|
||||
set dma0 dev=800
|
||||
set dma0 type=8858
|
||||
set dma1 type=8858
|
||||
set coml0 dev=7ee0
|
||||
set coml0 enable
|
||||
set coml1 enable
|
||||
set coml2 enable
|
||||
set coml3 enable
|
||||
set coml4 enable
|
||||
set coml5 enable
|
||||
set coml6 enable
|
||||
set coml7 enable
|
||||
set con enable
|
||||
set con0 dev=7efc
|
||||
set mta enable
|
||||
set mta0 dev=1000
|
||||
set lpr enable
|
||||
set comc enable
|
||||
at comc 4747
|
||||
set ec enable
|
||||
set ec mode=1
|
||||
set ec0 dev=0e00
|
||||
; set mac address to cause ec to be attached
|
||||
set ec MAC=08:00:5D:01:01:20
|
||||
;set ec debug=cmd;exp;xio;detail;irq
|
||||
;at lpr lprout
|
||||
set cpu idle
|
||||
;
|
||||
;deposit BOOTR[7] 42
|
||||
deposit BOOTR[7] 0
|
||||
deposit BOOTR[6] 800
|
||||
;at mta0 tapes/temp.tap
|
||||
;at mta0 tapes/src.tar.tap
|
||||
;at mta0 tapes/y2k21ab.tar.tap
|
||||
at dma0 dsk/21bdisk0.dma
|
||||
at dma1 dsk/21bdisk1.dma
|
||||
at ec tap:tap0
|
||||
bo dma0
|
||||
248
SEL32/installs/runscsi21b.ini
Normal file
248
SEL32/installs/runscsi21b.ini
Normal file
|
|
@ -0,0 +1,248 @@
|
|||
;======================================================
|
||||
; SEL32 System Engineering Labs 32 bit computer
|
||||
; UTX - Ver 2.1B hardware configuration
|
||||
; CPU - V6 8M Sel32 Powernode
|
||||
; MFP - 7e00 Model 8002 Multi-Function Processor
|
||||
; SBA - 7e00/7e08 MFP SCSI Disk controller
|
||||
; sba0 Model 8821 300MB
|
||||
; sba0 <-> dsk/scsidiska0
|
||||
; sba1 Model 8821 300MB
|
||||
; sba1 <-> dsk/scsidiska1
|
||||
; LPR - 7ef8/7ef9 Model 924X High Speed Line Printer
|
||||
; COM - 7ee0 8512 8-line async communications
|
||||
; CON - 7efc/7efd Console Terminal
|
||||
; RTC - 7f06 50 HZ Real-Time clock
|
||||
; ITM - 7f04 38.4MS Interval timer
|
||||
; MT - 1000 8051 Buffered Tape Processor
|
||||
; mta0 <- tapes/utx21b1.tap
|
||||
; EC - 0e00 Model 8516 Ethernet
|
||||
;======================================================
|
||||
; Set hostname
|
||||
set env HOST=sel32
|
||||
; Set local IP address
|
||||
set env IP=192.168.1.5
|
||||
;======================================================
|
||||
; Set debug output
|
||||
;set debug -n sel.log
|
||||
;set debug stderr
|
||||
;
|
||||
;mkdir dsk
|
||||
; CPU type and memory
|
||||
;set CPU 32/97 4M
|
||||
;set CPU V6 4M
|
||||
set CPU V6 8M
|
||||
;set CPU V9 4M
|
||||
;set CPU V9 8M
|
||||
;
|
||||
; CPU debug options
|
||||
;set cpu debug=cmd;exp;inst;detail;trap;xio;irq
|
||||
; Set instruction trace history size
|
||||
;set cpu history=10000
|
||||
; useful options
|
||||
;set cpu debug=exp;irq;xio;trap;cmd
|
||||
;;set cpu debug=cmd;exp;irq;trap;xio
|
||||
;set cpu debug=cmd;irq;trap;exp
|
||||
;;set cpu debug=irq;trap;exp;xio
|
||||
;;set cpu debug=irq;xio
|
||||
;
|
||||
; RTC realtime clock
|
||||
set RTC enable
|
||||
; address is 7f06
|
||||
;set RTC 50
|
||||
set RTC 60
|
||||
; RTC debug options
|
||||
;set RTC debug=cmd
|
||||
;
|
||||
; ITM interval timer
|
||||
; address is 7f04
|
||||
; set itm 3840
|
||||
;set ITM debug=cmd
|
||||
;
|
||||
; IOP at channel 7e00
|
||||
; useful options
|
||||
;set iop debug=cmd;exp
|
||||
;set iop debug=cmd
|
||||
; make iop online
|
||||
;set iop enable
|
||||
; set iop channel address
|
||||
;set iop0 dev=7e00
|
||||
;
|
||||
; MFP at channel 7e00
|
||||
; useful options
|
||||
;set mfp debug=cmd;exp
|
||||
; make mfp online
|
||||
set mfp enable
|
||||
; set mfp channel address
|
||||
set mfp0 dev=7e00
|
||||
;set mfp0 dev=7600
|
||||
;
|
||||
; EC at channel 0e00
|
||||
; useful options
|
||||
;set ec debug=cmd;exp
|
||||
; set the mode
|
||||
set EC mode=1
|
||||
; make ec online
|
||||
set ec enable
|
||||
; set ec channel address
|
||||
set ec0 dev=0e00
|
||||
at ec tap:tap0
|
||||
;
|
||||
; COM 8-Line
|
||||
;set com debug=cmd;
|
||||
;set coml0 enable
|
||||
;set coml1 enable
|
||||
;set coml2 enable
|
||||
;set coml3 enable
|
||||
;set coml4 enable
|
||||
;set coml5 enable
|
||||
;set coml6 enable
|
||||
;set coml7 enable
|
||||
;
|
||||
; Enable telnet sessions on port 4747
|
||||
;set comc enable
|
||||
;at comc 4747
|
||||
;
|
||||
; LPR
|
||||
;set lpr debug=cmd;detail
|
||||
;set lpr enable
|
||||
set lpr enable
|
||||
; LPR output file
|
||||
;at lpr lprout
|
||||
;at lpr lprout
|
||||
;
|
||||
; CON Console
|
||||
; useful options
|
||||
;set con debug=cmd;exp;detail
|
||||
;set con debug=cmd;exp;
|
||||
; enable console
|
||||
set con enable
|
||||
; set console address
|
||||
; set con0 enable
|
||||
set con0 dev=7efc
|
||||
; set con1 enable
|
||||
set con1 dev=7efd
|
||||
;
|
||||
; MTA Buffered tape processor
|
||||
;set mta debug=cmd;exp;detail;data
|
||||
; useful options
|
||||
;set mta debug=cmd;detail;exp
|
||||
;
|
||||
; enable the MTA to change channel
|
||||
set mta enable
|
||||
; set mt channel
|
||||
set mta0 dev=1000
|
||||
; attach in/out tape files
|
||||
;at mta0 mpxsdt.tap
|
||||
;at mta0 nbctape.tap
|
||||
;at mta0 tapes/utx21b1.tap
|
||||
;at mta0 utx21a1.tap
|
||||
;at mta1 temptape.tap
|
||||
;at mta1 utx21a2.tap
|
||||
;at mta2 output.tap
|
||||
;at mta0 sim32sdt.tap
|
||||
;at mta0 diag.tap
|
||||
;
|
||||
; DMA disk processor II/UDP
|
||||
;set dma enable
|
||||
; set disk chan to 0800
|
||||
;set dma0 dev=800
|
||||
; set disk type to MPX MH300
|
||||
;set dma0 type=MH300
|
||||
; set disk type to UTX 9346
|
||||
;set dma0 type=9346
|
||||
;set dma0 type=8155
|
||||
;set dma0 type=8887
|
||||
;set dma0 type=8148
|
||||
; Attach diskfile
|
||||
;at dma0 utx0disk
|
||||
;at dma0 utx1disk
|
||||
;at dma0 sim32disk
|
||||
;at dma0 diagdisk
|
||||
;
|
||||
;set dma debug=cmd;exp;detail;data
|
||||
; useful options
|
||||
;set dma debug=cmd;exp
|
||||
;set dma debug=exp;cmd;detail
|
||||
;
|
||||
; SDA SCFI disk processor
|
||||
;set sda debug=cmd;exp;data;detail
|
||||
; Attach diskfiles
|
||||
;at sda0 scsidisk0
|
||||
;at sda1 scsidisk1
|
||||
;
|
||||
; SBA MFP SCSI bus 1 disk processor
|
||||
set sba enable
|
||||
; set disk chan to 7600
|
||||
;set sba0 dev=7600
|
||||
set sba0 dev=7e00
|
||||
;set sba1 dev=7e08
|
||||
; set disk type to UTX MH300
|
||||
set sba0 type=8821
|
||||
set sba1 type=8821
|
||||
;set sba0 type=8820
|
||||
;set sba debug=cmd;exp;data;detail
|
||||
;set sba debug=cmd;exp;detail
|
||||
; Attach diskfiles
|
||||
at sba0 dsk/scsidiska0
|
||||
at sba1 dsk/scsidiska1
|
||||
;
|
||||
; SBB MFP SCSI bus 2 disk processor
|
||||
;;set sbb enable
|
||||
; set disk chan to 7640
|
||||
;set sbb0 dev=7640
|
||||
;;set sbb0 dev=7e40
|
||||
; set disk type to MPX MH300
|
||||
;set sbb0 type=SD300
|
||||
;set sbb0 type=8821
|
||||
;;set sbb0 type=SD150
|
||||
;set sbb0 type=8820
|
||||
;set sbb debug=cmd;exp;data;detail
|
||||
;;set sbb debug=cmd;exp;detail
|
||||
; Attach diskfiles
|
||||
;;at sbb0 scsidiskb0
|
||||
;at sbb1 scsi1disk
|
||||
;
|
||||
; DPA high speed disk processor
|
||||
; enable the HSDP to change channel
|
||||
;set dpa enable
|
||||
; set channel addr
|
||||
;set dpa0 dev=800
|
||||
; set disk type to UTX 8887
|
||||
;set dpa0 type=8887
|
||||
; Attach diskfiles
|
||||
;at dpa0 utxdsk.dsk
|
||||
;at dpa0 utx0hsdp
|
||||
;at dpa1 utx1hsdp
|
||||
;
|
||||
;set dpa debug=cmd;detail;exp
|
||||
; useful options
|
||||
;set dpa debug=cmd;exp;detail
|
||||
;
|
||||
; set console switches
|
||||
deposit CSW 0
|
||||
;
|
||||
;UTX boot tape options
|
||||
;set GPR 7 to 0x00 to boot in multi-user mode
|
||||
;set GPR 7 to 0x01 to prompt for unix filename
|
||||
;set GPR 7 to 0x02 to boot in single user mode
|
||||
;set GPR 7 to 0x10 to disable swapping and paging
|
||||
;set GPR 7 to 0x20 to boot from device specified in GPR6
|
||||
;set GPR 7 to 0x40 to allow progress messages on boot
|
||||
;deposit BOOTR[7] 40
|
||||
;deposit BOOTR[7] 52
|
||||
deposit BOOTR[7] 40
|
||||
;deposit BOOTR[7] 2
|
||||
;deposit BOOTR[6] 800
|
||||
;deposit BOOTR[0] ffffffff
|
||||
;
|
||||
; Set register content at boot for SEL diagnostics
|
||||
; uncomment next line to get diag loader prompt
|
||||
;deposit bootr[0] ffffffff
|
||||
;deposit bootr[1] 0
|
||||
;deposit bootr[2] 0
|
||||
;
|
||||
; allow cpu idle
|
||||
set cpu idle
|
||||
;
|
||||
;Boot from disk
|
||||
bo sba0
|
||||
219
SEL32/installs/runscsi3x.ini
Normal file
219
SEL32/installs/runscsi3x.ini
Normal file
|
|
@ -0,0 +1,219 @@
|
|||
;======================================================
|
||||
; SEL32 System Engineering Labs 32 bit computer
|
||||
; MPX - Ver 3.4 hardware configuration
|
||||
; CPU - 32/67 8M Sel32 Concept/32
|
||||
; IOP - 7e00 Model 8001 IOP Processor Controller
|
||||
; MFP - 7600 Model 8002 Multi Function Processor
|
||||
; SBA - 7600 MFP SCSI Disk Controller
|
||||
; sba0 SD300 Model 8828 300MB MHD
|
||||
; sba0 <-> dsk/mpx3xsba0.dsk
|
||||
; SBA - 7640 MFP SCSI Disk Controller
|
||||
; sbb0 SD300 Model 8828 300MB MHD
|
||||
; sbb0 <-> dsk/mpx3xsbb0.dsk
|
||||
; LPR - 7ef8/7ef9 Model 924X High Speed Line Printer
|
||||
; COM - 7ec0 8512 8-line async communications
|
||||
; CON - 7efc/7efd Console Terminal
|
||||
; RTC - 7f06 60 HZ Real-Time clock
|
||||
; ITM - 7f04 38.4MS Interval timer
|
||||
; MT - 1000 8051 Buffered Tape Processor
|
||||
; mta0 <- tapes/mpxsdt69.tap
|
||||
; EC - 0e00 Model 8516 Ethernet (not supported)
|
||||
;======================================================
|
||||
; Set HOST simulator
|
||||
set env HOST=sel32
|
||||
; Set local IP address
|
||||
; set env IP=192.168.1.5 (N/U)
|
||||
;======================================================
|
||||
; Set debug output
|
||||
;set debug -n sel.log
|
||||
;
|
||||
; CPU type and memory size
|
||||
set CPU 32/67 8M
|
||||
;set CPU 32/97 8M
|
||||
;
|
||||
; CPU debug options
|
||||
;set cpu debug=cmd;exp;inst;detail;trap;xio;irq
|
||||
; Set instruction trace history size
|
||||
;set cpu history=10000
|
||||
;
|
||||
; RTC realtime clock
|
||||
; RTC debug options
|
||||
;set RTC debug=cmd
|
||||
; device address is 7f06
|
||||
set RTC enable
|
||||
;set RTC 50
|
||||
set RTC 60
|
||||
;
|
||||
; ITM interval timer
|
||||
; ITM debug options
|
||||
;set ITM debug=cmd
|
||||
; device address is 7f04
|
||||
set ITM 3840
|
||||
;
|
||||
; IOP at channel 7e00
|
||||
; IOP debug options
|
||||
;set iop debug=cmd;exp
|
||||
set iop enable
|
||||
; set iop channel address
|
||||
set iop0 dev=7e00
|
||||
;
|
||||
; MFP at channel 7600
|
||||
; Only supported on MPX-3X and UTX
|
||||
; MFP debug options
|
||||
;set mfp debug=cmd;exp
|
||||
; enable MFP to change address
|
||||
set mfp enable
|
||||
; set mfp channel address
|
||||
;set mfp0 dev=7e00
|
||||
set mfp0 dev=7600
|
||||
;
|
||||
; COM 8-Line
|
||||
; COM debug options
|
||||
;set coml debug=cmd;exp;xio
|
||||
; enable COML to change address
|
||||
set coml enable
|
||||
; MPX 3X wants 7ec0
|
||||
set coml0 dev=7ec0
|
||||
set coml0 enable
|
||||
set coml1 enable
|
||||
set coml2 enable
|
||||
set coml3 enable
|
||||
set coml4 enable
|
||||
set coml5 enable
|
||||
set coml6 enable
|
||||
set coml7 enable
|
||||
;
|
||||
; COMC 8-Line Mux
|
||||
; COMC debug options
|
||||
;set comc debug=cmd
|
||||
; COMC has no address
|
||||
set comc enable
|
||||
; Enable telnet sessions on port 4747
|
||||
at comc 4747
|
||||
;
|
||||
; LPR at 7ef8
|
||||
; LPR debug options
|
||||
;set lpr debug=cmd;detail
|
||||
; enable LPR to change address
|
||||
set lpr enable
|
||||
; attach LPR output file
|
||||
at lpr lprout
|
||||
;
|
||||
; EC ethernet 0e00
|
||||
; Support not available yet
|
||||
; EC debug options
|
||||
;set ec debug=cmd;exp;xio;detail;irq
|
||||
;set ec enable
|
||||
;set ec0 dev=0e00
|
||||
;set ec mode=2
|
||||
;at ec tap:tap0
|
||||
; set mac address to cause ec to be attached
|
||||
;set ec MAC=08:00:5D:01:01:20
|
||||
;
|
||||
; CON Console
|
||||
; CON debug options
|
||||
;set con debug=cmd;exp;detail
|
||||
; enable console
|
||||
set con enable
|
||||
; set console address
|
||||
set con0 dev=7efc
|
||||
;
|
||||
; MTA Buffered tape processor
|
||||
; MTA debug options
|
||||
;set mta debug=cmd;exp;detail;data
|
||||
; enable MTA to change channel
|
||||
set mta enable
|
||||
; set mta channel address
|
||||
set mta0 dev=1000
|
||||
; Attach in/out tape files
|
||||
;at mta0 output.tap
|
||||
;set mta0 locked
|
||||
;
|
||||
; DMA disk processor II/UDP
|
||||
; DMA debug options
|
||||
;set dma debug=cmd;exp;detail;data
|
||||
; enable DMA to change channel
|
||||
; set dma enable
|
||||
; set channel address
|
||||
; set dma0 dev=800
|
||||
; set disk type to MPX MH300 (8887)
|
||||
; must match sysgen assignment
|
||||
; set dma0 type=MH300
|
||||
; Attach diskfile
|
||||
; at dma0 dsk/mpx3xdma0.dsk
|
||||
;
|
||||
; SDA SCFI disk processor
|
||||
; Only supported on MPX-1X
|
||||
; SDA debug options
|
||||
;set sda debug=cmd;exp;data;detail
|
||||
; enable SCFI to change channel
|
||||
;set sda enable
|
||||
; set channel address
|
||||
;set sda0 dev=800
|
||||
; set disk type to MPX SG120
|
||||
; must match sysgen assignment
|
||||
;set sda0 type=SG120
|
||||
; Attach diskfiles
|
||||
;at sda0 dsk/mpx3xsda0.dsk
|
||||
;
|
||||
; DPA high speed disk processor
|
||||
; DPA debug options
|
||||
;set dpa debug=cmd;exp;data;detail
|
||||
; enable DPA to change channel
|
||||
;set dpa enable
|
||||
; set channel address
|
||||
;set dpa0 dev=800
|
||||
; set disk type to MPX MH300 (8887)
|
||||
; must match sysgen assignment
|
||||
;set dpa0 type=MH300
|
||||
; Attach diskfiles
|
||||
;at dpa0 dsk/mpx3xdpa0.dsk
|
||||
;
|
||||
; SBA MFP SCSI buss 1 disk processor
|
||||
; SBA debug options
|
||||
;set sba debug=cmd;exp;data;detail
|
||||
; enable SBA to change channel
|
||||
set sba enable
|
||||
; set channel address
|
||||
set sba0 dev=7600
|
||||
; set disk type to MPX SD300 (8828)
|
||||
set sba0 type=SD300
|
||||
; Attach diskfiles
|
||||
at sba0 dsk/mpx3xsba0.dsk
|
||||
;
|
||||
; SBB SCSI buss 2 disk processor
|
||||
; SBB debug options
|
||||
;set sbb debug=cmd;exp;data;detail
|
||||
; enable SBB to change channel
|
||||
set sbb enable
|
||||
; set channel address
|
||||
set sbb0 dev=7640
|
||||
; set disk type to MPX SD300 (8828)
|
||||
set sbb0 type=SD300
|
||||
; Attach diskfiles
|
||||
at sbb0 dsk/mpx3xsbb0.dsk
|
||||
;
|
||||
; set console switches
|
||||
deposit CSW 0
|
||||
;
|
||||
;SEL32 boot register options
|
||||
;deposit BOOTR[7] 0
|
||||
;deposit BOOTR[6] 800
|
||||
;;
|
||||
; allow cpu idle
|
||||
set cpu idle
|
||||
; Set expect script for auto time entry on MPX at OPCOM prompt
|
||||
;expect haltafter=20000
|
||||
; wait for expected output from simulator, then enter this text
|
||||
expect "??" send " %DATE_MM%/%DATE_DD%/%DATE_YY%,%TIME_HH%:%TIME_MM%:%TIME_SS%\r"; GO
|
||||
;expect "??" send "X\r"; continue
|
||||
;expect "SYSTEM READY... PRESS ATTENTION FOR TSM..." send "@@A"; continue
|
||||
expect "SYSTEM READY... PRESS ATTENTION FOR TSM..." send after=500000 delay=4000 "@@A"; continue
|
||||
expect "ENTER YOUR OWNERNAME:" send "SYSTEM\r"; continue
|
||||
expect "TSM>" send "MOUNT WORK ON DM7640 OPTI=PUBLIC\r"; continue
|
||||
expect "TSM>" send "!STAT VOL\r"; continue
|
||||
expect "TSM>" send "WHO\r"; continue
|
||||
;expect "TSM>" send "EXIT\r"; continue
|
||||
;
|
||||
; Boot from disk
|
||||
bo sba0
|
||||
245
SEL32/installs/sel32load1x.ini
Normal file
245
SEL32/installs/sel32load1x.ini
Normal file
|
|
@ -0,0 +1,245 @@
|
|||
;======================================================
|
||||
; SEL32 System Engineering Labs 32 bit computer
|
||||
; MPX - Ver 1.5F hardware configuration
|
||||
; CPU - 32/27 2M Sel32 Concept/32
|
||||
; IOP - 7e00 Model 8001 IOP Processor Controller
|
||||
; DMA - 0800 2311/2314 Disk Processor II
|
||||
; dma0 MH300 Model 8127 300MB MHD
|
||||
; dma0 <-> dsk/sel32disk
|
||||
; LPR - 7ef8/7ef9 Model 924X High Speed Line Printer
|
||||
; COM - 7ec0 8512 8-line async communications
|
||||
; CON - 7efc/7efd Console Terminal
|
||||
; RTC - 7f06 60 HZ Real-Time clock
|
||||
; ITM - 7f04 38.4MS Interval timer
|
||||
; MT - 1000 8051 Buffered Tape Processor
|
||||
; mta0 <- tapes/mpx1xsdt.tap
|
||||
; EC - 0e00 Model 8516 Ethernet (not supported)
|
||||
;======================================================
|
||||
; Set hostname
|
||||
set env HOST=sel32
|
||||
; Set local IP address
|
||||
; set env IP=192.168.1.5 (N/U)
|
||||
;======================================================
|
||||
; Set directory for disk images
|
||||
mkdir dsk
|
||||
mkdir tapes
|
||||
; Set tape image filename
|
||||
set env FILE=mpx1xsdt.tap
|
||||
; Set github.com URL for downloading files
|
||||
set env GITURL=https://github.com/AZBevier/SEL32-installs/raw/main/tapes/
|
||||
if exist "tapes/%FILE%" goto exists
|
||||
if not exist "tapes/%FILE%" echof "file %FILE% missing, trying %FILE%.tgz"
|
||||
cd tapes
|
||||
if exist "%FILE%.tgz" goto nocurl
|
||||
echof "fetching %FILE%.tgz file from github.com\n"
|
||||
curl -LJO %GITURL%/%FILE%.tgz
|
||||
if not exist "%FILE%.tgz" echof "FAILED - file %FILE% not available"; exit 1
|
||||
:nocurl
|
||||
echof "untar %FILE%.tgz file\n"
|
||||
tar -xzf %FILE%.tgz
|
||||
cd ..
|
||||
:exists
|
||||
echof "file %FILE% present, doing install"
|
||||
;
|
||||
; Set debug output
|
||||
;set debug -n sel.log
|
||||
;set debug stderr
|
||||
;
|
||||
; CPU type and memory
|
||||
; Bad on UTX
|
||||
set CPU 32/27 2M
|
||||
;set CPU 32/27 4M
|
||||
;set CPU 32/87 4M
|
||||
;set CPU 32/67 4M
|
||||
;End of Bad
|
||||
;set CPU 32/97 4M
|
||||
;set CPU V6 4M
|
||||
;set CPU V6 8M
|
||||
;set CPU V9 4M
|
||||
;set CPU V9 8M
|
||||
;
|
||||
; CPU debug options
|
||||
;set cpu debug=cmd;exp;inst;detail;trap;xio;irq
|
||||
; Set instruction trace history size
|
||||
;set cpu history=10000
|
||||
; useful options
|
||||
;set cpu debug=exp;xio;trap
|
||||
;set cpu debug=cmd;exp;irq;trap;xio;
|
||||
;set cpu debug=cmd;irq;trap;exp
|
||||
;set cpu debug=irq;trap;exp;xio
|
||||
;set cpu debug=irq;xio;exp;inst;cmd;trap
|
||||
;set cpu debug=irq;xio;exp;cmd;trap
|
||||
;
|
||||
; RTC realtime clock
|
||||
; address is 7f06
|
||||
;set RTC 50
|
||||
set RTC 60
|
||||
set RTC enable
|
||||
; RTC debug options
|
||||
;set RTC debug=cmd
|
||||
;
|
||||
; ITM interval timer
|
||||
; address is 7f04
|
||||
; set ITM 3840
|
||||
;set ITM debug=cmd
|
||||
;
|
||||
; IOP at channel 7e00
|
||||
set iop enable
|
||||
; set iop channel
|
||||
set iop0 dev=7e00
|
||||
;set iop debug=cmd;exp
|
||||
;set iop debug=cmd
|
||||
;
|
||||
; COM 8-Line
|
||||
set coml enable
|
||||
set coml0 dev=7ec0
|
||||
;set coml debug=cmd;
|
||||
set coml0 enable
|
||||
set coml1 enable
|
||||
set coml2 enable
|
||||
set coml3 enable
|
||||
set coml4 enable
|
||||
set coml5 enable
|
||||
set coml6 enable
|
||||
set coml7 enable
|
||||
;
|
||||
; Enable telnet sessions on port 4747
|
||||
set comc enable
|
||||
;set comc debug=cmd;
|
||||
at comc 4747
|
||||
;
|
||||
; LPR
|
||||
; LPR0 is at 7EF8
|
||||
; LPR1 is at 7EF9
|
||||
; useful options
|
||||
;set lpr debug=cmd;detail
|
||||
set lpr enable
|
||||
; LPR output file
|
||||
;at lpr lprout
|
||||
;
|
||||
;; CON Console
|
||||
;set con debug=cmd;exp;detail
|
||||
; useful options
|
||||
; enable console
|
||||
;;set con debug=cmd;exp
|
||||
set con enable
|
||||
; set console address
|
||||
; set con0 enable
|
||||
set con0 dev=7efc
|
||||
; set con1 enable
|
||||
set con1 dev=7efd
|
||||
;set con debug=cmd;exp
|
||||
;
|
||||
; MTA Buffered tape processor
|
||||
;set mta debug=cmd;exp;detail;data
|
||||
; useful options
|
||||
;;set mta debug=cmd;detail;exp
|
||||
;set mta debug=cmd;exp
|
||||
;
|
||||
; enable MTA to change channel
|
||||
set mta enable
|
||||
; set mta channel
|
||||
set mta0 dev=1000
|
||||
;
|
||||
; Attach in/out tape files
|
||||
set mta0 locked
|
||||
at mta0 tapes/mpx1xsdt.tap
|
||||
;at mta0 nbctape.tap
|
||||
;at mta0 usertape.tap
|
||||
;at mta0 mpxsdt6r.tap
|
||||
;at mta0 tapes/sel32sdt.tap
|
||||
;at mta0 diag.tap
|
||||
;at mta1 temptape.tap
|
||||
;at mta2 output.tap
|
||||
;
|
||||
; DMA disk processor II/UDP
|
||||
; enable DMA to change channel
|
||||
set dma enable
|
||||
; set disk chan to 0800
|
||||
set dma0 dev=800
|
||||
; set disk type to MPX MH300
|
||||
set dma0 type=MH300
|
||||
; set disk type to MPX MH080
|
||||
;set dma0 type=MH080
|
||||
; set disk type to UTX 9346
|
||||
;set dma0 type=9346
|
||||
;set dma0 type=8155
|
||||
;set dma0 type=8887
|
||||
;set dma0 type=8148
|
||||
;
|
||||
; Attach diskfile
|
||||
at dma0 -i dsk/sel32disk
|
||||
;
|
||||
; Debug options
|
||||
;set dma debug=cmd;exp;detail;data
|
||||
; useful options
|
||||
;set dma debug=cmd;exp
|
||||
;set dma debug=exp
|
||||
;
|
||||
; SDA SCFI disk processor
|
||||
;set sda debug=cmd;exp;data;detail
|
||||
; Attach diskfiles
|
||||
;at sda0 diskfile4
|
||||
;at sda1 diskfile5
|
||||
;
|
||||
; DPA high speed disk processor
|
||||
; enable HSDP to change channel
|
||||
;set dpa enable
|
||||
; set channel addr
|
||||
;set dpa0 dev=800
|
||||
; set disk type to UTX 8887
|
||||
;set dpa0 type=8887
|
||||
;
|
||||
; Attach diskfiles
|
||||
;at dpa0 utxdsk.dsk
|
||||
;at dpa0 utx0hsdp
|
||||
;at dpa1 utx1hsdp
|
||||
;
|
||||
;set dpa debug=cmd;detail;exp
|
||||
; useful options
|
||||
;set dpa debug=cmd;exp
|
||||
;
|
||||
; set console switches
|
||||
deposit CSW 0
|
||||
;
|
||||
;UTX boot tape options
|
||||
;set GPR 7 to 0x00 to boot in multi-user mode
|
||||
;set GPR 7 to 0x01 to prompt for unix filename
|
||||
;set GPR 7 to 0x02 to boot in single user mode
|
||||
;set GPR 7 to 0x10 to disable swapping and paging
|
||||
;set GPR 7 to 0x20 to boot from device specified in GPR6
|
||||
;set GPR 7 to 0x40 to allow progress messages on boot
|
||||
;deposit BOOTR[7] 40
|
||||
;deposit BOOTR[7] 52
|
||||
;deposit BOOTR[7] 42
|
||||
;deposit BOOTR[7] 2
|
||||
;deposit BOOTR[6] 800
|
||||
;deposit BOOTR[0] ffffffff
|
||||
;
|
||||
; Set register content at boot for SEL diagnostics
|
||||
; uncomment next line to get diag loader prompt
|
||||
;deposit bootr[0] ffffffff
|
||||
;deposit bootr[1] 0
|
||||
;deposit bootr[2] 0
|
||||
;
|
||||
; allow cpu idle
|
||||
set cpu idle
|
||||
; wait for expected output from simulator, then enter this text
|
||||
expect "COLD OR WARM START (C OR W)?" send "C\r"; continue
|
||||
; Set expect script for auto time entry on MPX at OPCOM prompt
|
||||
;expect "??" send " %DATE_MM%/%DATE_DD%/%DATE_YY%,%TIME_HH%:%TIME_MM%:%TIME_SS%\r@@A"; continue
|
||||
expect "??" send " %DATE_MM%/%DATE_DD%/%DATE_YY%,%TIME_HH%:%TIME_MM%:%TIME_SS%\r@@Ax\r"; GO
|
||||
expect "TSM>" send "A4 SLO=UT\r"; continue
|
||||
expect "TSM>" send "A3 IN=M91000,TAP\r"; continue
|
||||
expect "TSM>" send "PAGE 0\r"; continue
|
||||
expect "TSM>" send "FILEMGR\r"; continue
|
||||
; restore all files
|
||||
expect "FIL>" send "RESTORE\r"; continue
|
||||
expect "FIL>" send "EXIT\r"; continue
|
||||
expect "TSM>" send "WHO\r"; continue
|
||||
expect "TSM>" send "EXIT\r"; continue
|
||||
expect "RING IN FOR SERVICE" send "\r^E"
|
||||
; Boot from mag tape
|
||||
bo mta0
|
||||
detach all
|
||||
quit
|
||||
210
SEL32/installs/sel32run1x.ini
Normal file
210
SEL32/installs/sel32run1x.ini
Normal file
|
|
@ -0,0 +1,210 @@
|
|||
;======================================================
|
||||
; SEL32 System Engineering Labs 32 bit computer
|
||||
; MPX - Ver 1.5F hardware configuration
|
||||
; CPU - 32/27 2M Sel32 Concept/32
|
||||
; IOP - 7e00 Model 8001 IOP Processor Controller
|
||||
; DMA - 0800 2311/2314 Disk Processor II
|
||||
; dma0 MH300 Model 8127 300MB MHD
|
||||
; dma0 <-> dsk/sel32disk
|
||||
; LPR - 7ef8/7ef9 Model 924X High Speed Line Printer
|
||||
; COM - 7ec0 8512 8-line async communications
|
||||
; CON - 7efc/7efd Console Terminal
|
||||
; RTC - 7f06 60 HZ Real-Time clock
|
||||
; ITM - 7f04 38.4MS Interval timer
|
||||
; MT - 1000 8051 Buffered Tape Processor
|
||||
; mta0 <-> (not assigned)
|
||||
; EC - 0e00 Model 8516 Ethernet (not supported)
|
||||
;======================================================
|
||||
; Set hostname
|
||||
set env HOST=sel32
|
||||
; Set local IP address
|
||||
; set env IP=192.168.1.5 (N/U)
|
||||
;======================================================
|
||||
; Set debug output
|
||||
;set debug -n sel.log
|
||||
;set debug stderr
|
||||
;
|
||||
; CPU type and memory
|
||||
; Bad on UTX
|
||||
set CPU 32/27 2M
|
||||
;set CPU 32/27 4M
|
||||
;set CPU 32/87 4M
|
||||
;set CPU 32/67 4M
|
||||
;End of Bad
|
||||
;set CPU 32/97 4M
|
||||
;set CPU V6 4M
|
||||
;set CPU V6 8M
|
||||
;set CPU V9 4M
|
||||
;set CPU V9 8M
|
||||
;
|
||||
; CPU debug options
|
||||
;set cpu debug=cmd;exp;inst;detail;trap;xio;irq
|
||||
; Set instruction trace history size
|
||||
;set cpu history=10000
|
||||
; useful options
|
||||
;set cpu debug=exp;xio;trap
|
||||
;set cpu debug=cmd;exp;irq;trap;xio;
|
||||
;set cpu debug=cmd;irq;trap;exp
|
||||
;set cpu debug=irq;trap;exp;xio
|
||||
;set cpu debug=irq;xio;exp;inst;cmd;trap
|
||||
;set cpu debug=irq;xio;exp;cmd;trap
|
||||
;
|
||||
; RTC realtime clock
|
||||
; address is 7f06
|
||||
;set RTC 50
|
||||
set RTC 60
|
||||
set RTC enable
|
||||
; RTC debug options
|
||||
;set RTC debug=cmd
|
||||
;
|
||||
; ITM interval timer
|
||||
; address is 7f04
|
||||
set ITM 3840
|
||||
;set ITM debug=cmd
|
||||
;
|
||||
; IOP at channel 7e00
|
||||
set iop enable
|
||||
; set iop channel
|
||||
set iop0 dev=7e00
|
||||
;set iop debug=cmd;exp
|
||||
;set iop debug=cmd
|
||||
;
|
||||
; COM 8-Line
|
||||
set coml enable
|
||||
set coml0 dev=7ec0
|
||||
;set coml debug=cmd;
|
||||
set coml0 enable
|
||||
set coml1 enable
|
||||
set coml2 enable
|
||||
set coml3 enable
|
||||
set coml4 enable
|
||||
set coml5 enable
|
||||
set coml6 enable
|
||||
set coml7 enable
|
||||
;
|
||||
; Enable telnet sessions on port 4747
|
||||
set comc enable
|
||||
;set comc debug=cmd;
|
||||
at comc 4747
|
||||
;
|
||||
; LPR
|
||||
;set lpr debug=cmd;detail
|
||||
set lpr enable
|
||||
; LPR output file
|
||||
;at lpr lprout
|
||||
;
|
||||
;; CON Console
|
||||
;set con debug=cmd;exp;detail
|
||||
; useful options
|
||||
; enable console
|
||||
;;set con debug=cmd;exp
|
||||
set con enable
|
||||
; set console address
|
||||
; set con0 enable
|
||||
set con0 dev=7efc
|
||||
;set con debug=cmd;exp
|
||||
;
|
||||
; MTA Buffered tape processor
|
||||
;set mta debug=cmd;exp;detail;data
|
||||
; useful options
|
||||
;;set mta debug=cmd;detail;exp
|
||||
;set mta debug=cmd;exp
|
||||
;
|
||||
; enable MTA to change channel
|
||||
set mta enable
|
||||
; set mta channel
|
||||
set mta0 dev=1000
|
||||
;
|
||||
; Attach in/out tape files
|
||||
;at mta0 tapes/mpx1xsdt.tap
|
||||
;at mta0 nbctape.tap
|
||||
;set mta0 locked
|
||||
;at mta0 usertape.tap
|
||||
;at mta0 mpxsave6.tap
|
||||
;at mta0 tapes/sel32sdt.tap
|
||||
;at mta0 diag.tap
|
||||
;at mta1 temptape.tap
|
||||
;at mta2 output.tap
|
||||
;
|
||||
; DMA disk processor II/UDP
|
||||
; enable DMA to change channel
|
||||
set dma enable
|
||||
; set disk chan to 0800
|
||||
set dma0 dev=800
|
||||
; set disk type to MPX MH300
|
||||
set dma0 type=MH300
|
||||
; set disk type to MPX MH080
|
||||
;set dma0 type=MH080
|
||||
; set disk type to UTX 9346
|
||||
;set dma0 type=9346
|
||||
;set dma0 type=8155
|
||||
;set dma0 type=8887
|
||||
;set dma0 type=8148
|
||||
;
|
||||
; Attach diskfile
|
||||
;at dma0 diskfile6r
|
||||
at dma0 dsk/sel32disk
|
||||
;at dma0 diagdisk
|
||||
;
|
||||
; Debug options
|
||||
;set dma debug=cmd;exp;detail;data
|
||||
; useful options
|
||||
;set dma debug=cmd;exp
|
||||
;set dma debug=exp
|
||||
;
|
||||
; SDA SCFI disk processor
|
||||
;set sda debug=cmd;exp;data;detail
|
||||
; Attach diskfiles
|
||||
;at sda0 diskfile4
|
||||
;at sda1 diskfile5
|
||||
;
|
||||
; DPA high speed disk processor
|
||||
; enable HSDP to change channel
|
||||
;set dpa enable
|
||||
; set channel addr
|
||||
;set dpa0 dev=800
|
||||
; set disk type to UTX 8887
|
||||
;set dpa0 type=8887
|
||||
;
|
||||
; Attach diskfiles
|
||||
;at dpa0 utxdsk.dsk
|
||||
;at dpa0 utx0hsdp
|
||||
;at dpa1 utx1hsdp
|
||||
;
|
||||
;set dpa debug=cmd;detail;exp
|
||||
; useful options
|
||||
;set dpa debug=cmd;exp
|
||||
;
|
||||
; set console switches
|
||||
deposit CSW 0
|
||||
;
|
||||
;UTX boot tape options
|
||||
;set GPR 7 to 0x00 to boot in multi-user mode
|
||||
;set GPR 7 to 0x01 to prompt for unix filename
|
||||
;set GPR 7 to 0x02 to boot in single user mode
|
||||
;set GPR 7 to 0x10 to disable swapping and paging
|
||||
;set GPR 7 to 0x20 to boot from device specified in GPR6
|
||||
;set GPR 7 to 0x40 to allow progress messages on boot
|
||||
;deposit BOOTR[7] 40
|
||||
;deposit BOOTR[7] 52
|
||||
;deposit BOOTR[7] 42
|
||||
;deposit BOOTR[7] 2
|
||||
;deposit BOOTR[6] 800
|
||||
;deposit BOOTR[0] ffffffff
|
||||
;
|
||||
; Set register content at boot for SEL diagnostics
|
||||
; uncomment next line to get diag loader prompt
|
||||
;deposit bootr[0] ffffffff
|
||||
;deposit bootr[1] 0
|
||||
;deposit bootr[2] 0
|
||||
;
|
||||
; allow cpu idle
|
||||
set cpu idle
|
||||
; Set expect script for auto time entry on MPX at OPCOM prompt
|
||||
;expect haltafter=20000
|
||||
; wait for expected output from simulator, then enter this text
|
||||
expect "??" send " %DATE_MM%/%DATE_DD%/%DATE_YY%,%TIME_HH%:%TIME_MM%:%TIME_SS%\r@@Ax\r"; GO
|
||||
expect "TSM>" send "WHO\r"; continue
|
||||
; Boot from disk
|
||||
;bo dpa0
|
||||
bo dma0
|
||||
327
SEL32/installs/user36erunp2.ini
Normal file
327
SEL32/installs/user36erunp2.ini
Normal file
|
|
@ -0,0 +1,327 @@
|
|||
;======================================================
|
||||
; SEL32 System Engineering Labs 32 bit computer
|
||||
; MPX - Ver 3.6 extended hardware configuration
|
||||
; CPU - 32/67 16M Sel32 Concept/32
|
||||
; IOP - 7e00 Model 8001 IOP Processor Controller
|
||||
; MFP - 7600 Model 8002 Multi Function Processor
|
||||
; SBA - 7e00/7e08 MFP SCSI Disk controller
|
||||
; sba0 SD700 Model 8833 700MB
|
||||
; sba0 <-> dsk/scsi35m1disk0
|
||||
; sba1 SD700 Model 8833 700MB
|
||||
; sba1 <-> dsk/scsi35m2disk0
|
||||
; DMA - 0800 DMA HSDP Disk Controller
|
||||
; dma0 MD300 Model 8127 300MB MHD
|
||||
; dma0 <-> dsk/user36p2udp0
|
||||
; - 0802 DMA HSDP Disk Controller
|
||||
; dma1 MH600 Model 8155 600MB MHD
|
||||
; dma1 <-> dsk/user36s1udp1
|
||||
; - 0804 DMA HSDP Disk Controller
|
||||
; dma1 MH600 Model 8155 600MB MHD
|
||||
; dma1 <-> dsk/user36s1udp2
|
||||
; LPR - 7ef8/7ef9 Model 924X High Speed Line Printer
|
||||
; COM - 7ec0 8512 8-line async communications
|
||||
; CON - 7efc/7efd Console Terminal
|
||||
; RTC - 7f06 60 HZ Real-Time clock
|
||||
; ITM - 7f04 38.4MS Interval timer
|
||||
; MT - 1000 8051 Buffered Tape Processor
|
||||
; mta0 <- tapes/nbctape3x.tap
|
||||
; EC - 0e00 Model 8516 Ethernet (not supported)
|
||||
;======================================================
|
||||
; Set HOST simulator
|
||||
set env HOST=sel32
|
||||
; Set local IP address
|
||||
; set env IP=192.168.1.5 (N/U)
|
||||
;======================================================
|
||||
; Set debug output
|
||||
;set debug -n sel.log
|
||||
;set debug stderr
|
||||
;
|
||||
; CPU type and memory
|
||||
; Bad on UTX
|
||||
;set CPU 32/27 2M
|
||||
;set CPU 32/27 4M
|
||||
;set CPU 32/87 4M
|
||||
;set CPU 32/87 8M
|
||||
;End of Bad
|
||||
;set CPU 32/67 4M
|
||||
;set CPU 32/67 8M
|
||||
;set CPU 32/67 12M
|
||||
set CPU 32/67 16M
|
||||
;set CPU 32/97 4M
|
||||
;set CPU 32/97 8M
|
||||
;set CPU V6 4M
|
||||
;set CPU V6 8M
|
||||
;set CPU V9 4M
|
||||
;set CPU V9 8M
|
||||
;
|
||||
; CPU debug options
|
||||
;set cpu debug=cmd;exp;inst;detail;trap;xio;irq
|
||||
; Set instruction trace history size
|
||||
;set cpu history=10000
|
||||
; useful options
|
||||
;set cpu debug=exp
|
||||
;set cpu debug=cmd;exp;irq;trap;xio;inst
|
||||
;;;;set cpu debug=cmd;exp;irq;trap;xio
|
||||
;set cpu debug=cmd;irq;trap;exp
|
||||
;set cpu debug=cmd;exp;xio
|
||||
;;;set cpu debug=cmd;irq;trap;exp;xio
|
||||
;
|
||||
; RTC realtime clock
|
||||
; address is 7f06
|
||||
;set RTC 50
|
||||
set RTC 60
|
||||
; enable RTC
|
||||
set RTC enable
|
||||
; RTC debug options
|
||||
;set RTC debug=cmd
|
||||
;
|
||||
; ITM interval timer
|
||||
; address is 7f04
|
||||
set ITM 3840
|
||||
;set ITM debug=cmd
|
||||
;
|
||||
; IOP at channel 7e00
|
||||
; useful options
|
||||
;;;;set iop debug=cmd;exp
|
||||
;;set iop debug=cmd
|
||||
; make iop online
|
||||
set iop enable
|
||||
; set iop channel address
|
||||
set iop0 dev=7e00
|
||||
;
|
||||
; MFP at channel 7e00
|
||||
; useful options
|
||||
;;;;set mfp debug=cmd;exp
|
||||
; make mfp online
|
||||
set mfp enable
|
||||
; set mfp channel address
|
||||
;set mfp0 dev=7e00
|
||||
set mfp0 dev=7600
|
||||
;
|
||||
; COM 8-Line on 7ec0
|
||||
; useful options
|
||||
;;set com debug=cmd;
|
||||
set coml enable
|
||||
set coml0 dev=7ec0
|
||||
set coml0 enable
|
||||
set coml1 enable
|
||||
set coml2 enable
|
||||
set coml3 enable
|
||||
set coml4 enable
|
||||
set coml5 enable
|
||||
set coml6 enable
|
||||
set coml7 enable
|
||||
;
|
||||
; Enable telnet sessions on port 4747
|
||||
set comc enable
|
||||
at comc 4747
|
||||
;
|
||||
; LPR
|
||||
; LPR0 is at 7EF8
|
||||
; LPR1 is at 7EF9
|
||||
; useful options
|
||||
;;set lpr debug=cmd;detail
|
||||
;set lpr debug=cmd
|
||||
set lpr enable
|
||||
; LPR output file
|
||||
at lpr lprout
|
||||
;
|
||||
; CON Console
|
||||
; useful options
|
||||
;set con debug=cmd;exp;detail
|
||||
; enable console
|
||||
set con enable
|
||||
; set console address
|
||||
set con0 dev=7efc
|
||||
;;;;set con debug=cmd;exp
|
||||
;
|
||||
; MTA Buffered tape processor
|
||||
;set mta debug=cmd;exp;xio;data
|
||||
; useful options
|
||||
;set mta debug=cmd;exp;xio;data
|
||||
;;set mta debug=cmd;exp;xio
|
||||
;
|
||||
; enable MTA to change channel
|
||||
set mta enable
|
||||
; set mt channel
|
||||
set mta0 dev=1000
|
||||
;
|
||||
; Attach in/out tape files
|
||||
;at mta0 user36sdts2.tap
|
||||
;at mta0 user36sdts1.tap
|
||||
set mta0 locked
|
||||
at mta0 tapes/nbctape3x.tap
|
||||
;at mta0 test.tap
|
||||
;at mta0 user36sdt.tap
|
||||
;at mta1 output.tap
|
||||
;at mta0 iscsys_dsk.tap
|
||||
;
|
||||
; EC at channel 0d00
|
||||
; useful options
|
||||
;set ec debug=cmd;exp
|
||||
; set mode
|
||||
;;set mode=1
|
||||
; make ec online
|
||||
;;set ec enable
|
||||
; set ec channel address
|
||||
;;set ec0 dev=0d00
|
||||
; set mac address to cause ec to be attached
|
||||
;set ec MAC=00:00:02:00:00:00
|
||||
;;at ec tap:tap0
|
||||
;
|
||||
; DMA disk processor II/UDP
|
||||
; enable DMA to change channel
|
||||
set dma enable
|
||||
; set disk chan to 0800
|
||||
set dma0 dev=800
|
||||
; set disk type to MPX MH300 8127
|
||||
set dma0 type=MH300
|
||||
; set disk type to MPX MH600 8155
|
||||
;set dma0 type=MH600
|
||||
; set disk chan to 0802
|
||||
set dma1 dev=802
|
||||
; set disk type to MPX MH300 8127
|
||||
;set dma1 type=MH300
|
||||
; set disk type to MPX MH600 8155
|
||||
set dma1 type=MH600
|
||||
; set disk chan to 0804
|
||||
set dma2 dev=804
|
||||
; set disk type to MPX MH300 8127
|
||||
;set dma2 type=MH300
|
||||
; set disk type to MPX MH600 8155
|
||||
set dma2 type=MH600
|
||||
;
|
||||
; Attach diskfile
|
||||
;at dma0 -i user36s1udp0
|
||||
at dma0 dsk/user36p2udp0
|
||||
;at dma1 -i user36s1udp1
|
||||
at dma1 dsk/user36s1udp1
|
||||
;at dma2 -i user36s1udp2
|
||||
;at dma2 dsk/user36s1udp2
|
||||
;;at dma0 mpx0disk
|
||||
;;at dma1 mpx1disk
|
||||
;
|
||||
;set dma debug=cmd;exp;detail;data
|
||||
; useful options
|
||||
;;set dma debug=cmd;exp
|
||||
;set dma debug=exp;cmd;detail
|
||||
;
|
||||
; SDA SCFI disk processor
|
||||
;set sda debug=cmd;exp;data;detail
|
||||
;set sda debug=cmd;exp
|
||||
; Attach diskfiles
|
||||
;at sda0 diskfile4
|
||||
;at sda1 diskfile5
|
||||
;
|
||||
; SBA MFP SCSI buss 1 disk processor
|
||||
set sba enable
|
||||
; set disk chan to 7600
|
||||
set sba0 dev=7600
|
||||
; set disk type to MPX MH300
|
||||
;set sba0 type=SD300
|
||||
;set sba0 type=SD150
|
||||
;;set sba0 type=SD700
|
||||
set sba0 type=SD700
|
||||
set sba1 type=SD700
|
||||
;;;;set sba debug=cmd;exp;data;detail
|
||||
;;;;set sba debug=cmd;exp;xio;exp;data
|
||||
; Attach diskfiles
|
||||
;;at sba0 -i scsi36m1disk0
|
||||
at sba0 dsk/scsi35m1disk0
|
||||
;at sba1 scsi1disk
|
||||
at sba1 dsk/scsi35m2disk0
|
||||
;
|
||||
; SBB SCSI buss 2 disk processor
|
||||
;set sbb enable
|
||||
; set disk chan to 7640
|
||||
;set sbb0 dev=7640
|
||||
; set disk type to MPX MH300
|
||||
;;;;set sbb0 type=SD150
|
||||
;set sbb0 type=SD150
|
||||
;set sbb0 type=SD700
|
||||
;set sbb0 type=SD300
|
||||
;set sbb debug=cmd;exp;data;xio;detail
|
||||
;set sbb debug=cmd;exp
|
||||
; Attach diskfiles
|
||||
;at sbb0 scsi35m2disk0
|
||||
;at sbb1 scsi1disk
|
||||
;
|
||||
; DPA high speed disk processor
|
||||
; enable HSDP to change channel
|
||||
;set dpa enable
|
||||
; set channel addr
|
||||
;set dpa0 dev=800
|
||||
; set disk type to UTX 8887
|
||||
;set dpa0 type=8887
|
||||
;
|
||||
; Attach diskfiles
|
||||
;at dpa0 mpx0hsdp
|
||||
;at dpa1 mpx1hsdp
|
||||
;
|
||||
; useful options
|
||||
;set dpa debug=cmd;exp
|
||||
;
|
||||
; set console switches
|
||||
deposit CSW 0
|
||||
;
|
||||
; Set register content at boot for SEL diagnostics
|
||||
; uncomment next line to get diag loader prompt
|
||||
;deposit bootr[0] ffffffff
|
||||
;deposit bootr[1] 0
|
||||
;deposit bootr[2] 0
|
||||
;
|
||||
; set Boot reg 0 1 to boot MSTRALL from master SDT
|
||||
deposit bootr[0] 1
|
||||
; set Boot reg 0 2 to boot MSTREXT from master SDT
|
||||
;deposit bootr[0] 2
|
||||
;
|
||||
; allow cpu idle
|
||||
set cpu idle
|
||||
; Set expect script for auto time entry on MPX at OPCOM prompt
|
||||
;expect haltafter=20000
|
||||
;
|
||||
; wait for expected output from simulator, then enter this text
|
||||
;expect " >>" send "BR 31D10\r"; continue
|
||||
;expect " >>" send "BR 2b4q\r"; continue
|
||||
;expect " >>" send "BR 430q\r"; continue
|
||||
expect " >>" send "TE\r"; continue
|
||||
;expect "ENTER SYSTEM DEVICE CHANNEL AND SUBADDRESS: " send "7600\r"; continue
|
||||
;expect "ENTER SYSTEM DEVICE CHANNEL AND SUBADDRESS: " send "0800\r"; continue
|
||||
;expect "PLEASE ENTER THE 4 CHAR. DEVICE....." send "0800\r"; continue
|
||||
;expect "PLEASE ENTER THE 4 CHAR. DEVICE....." send "7600\r"; continue
|
||||
;expect "ENTER DISC CONTROLLER TYPE:" send "X\r"; continue
|
||||
;expect " (OR <CR> IF SYSTEM VOLUME):" send "\r"; continue
|
||||
;expect "ENTER DISC CONTROLLER TYPE:" send "M\r"; continue
|
||||
expect "ENTER DATE" send " %DATE_MM%/%DATE_DD%/%DATE_YY%,%TIME_HH%:%TIME_MM%:%TIME_SS%\r"; GO
|
||||
expect "ENTER SWAP DEVICE CHANNEL AND SUBADDRESS" send "0800\r"; continue
|
||||
expect "TASK J.INIT , 04000002 REPLY R, H, A, OR DEVICE:" send "R\r"; continue
|
||||
expect "TASK J.INIT , 04000002 REPLY R, H, A, OR DEVICE:" send "R\r"; continue
|
||||
expect "TASK J.INIT , 04000002 REPLY R, H, A, OR DEVICE:" send "R\r"; continue
|
||||
expect "TASK J.INIT , 04000002 REPLY R, H, A, OR DEVICE:" send "R\r"; continue
|
||||
;expect "MOUNT DISK VOLUME ISCSYS ON DRIVE DM0802 ---" send "R\r"; continue
|
||||
;expect "MOUNT DISK VOLUME NBCSRC ON DRIVE DM0804 ---" send "R\r"; continue
|
||||
;expect "MOUNT DISK VOLUME ISCSRC ON DRIVE DM7600 ---" send "R\r"; continue
|
||||
;expect "MOUNT DISK VOLUME IRELAND ON DRIVE DM7608 ---" send "R\r"; continue
|
||||
;
|
||||
;expect "ENTER SYSTEM VOLUME CHANNEL AND SUBADDRESS: " send "7600\r"; continue
|
||||
;expect "ENTER SYSTEM VOLUME CHANNEL AND SUBADDRESS: " send "0800\r"; continue
|
||||
;expect "SYSTEM READY... PRESS ATTENTION FOR TSM..."
|
||||
expect "SYSTEM READY... PRESS ATTENTION FOR TSM..." send "@@A"; continue
|
||||
expect "ENTER YOUR OWNERNAME:" send "SYSTEM\r"; continue
|
||||
expect "TSM>" send "WHO\r"; continue
|
||||
expect "TSM>" send "SYSINFO\r"; continue
|
||||
expect "TSM>" send "MOUNT WORK ON DM0802 OPTI=PUBLIC\r"; continue
|
||||
;expect "MOUNT DISK VOLUME WORK ON DRIVE DM0802 ---" send "R\r"; continue
|
||||
expect "TASK J.TSM" send "R\r"; continue
|
||||
expect "TSM>" send "!STAT VOL\r"; continue
|
||||
;;;expect "TSM>" send "EXIT\r"; continue
|
||||
#expect "TSM>" send "J.VFMT\r"; continue
|
||||
#expect "FMT>" send "INITIALIZE DEV=DM0804 DIS=MH0600 DES=Y CON=N\r"; continue
|
||||
#expect "FMT>" send "FORMAT DEV=DM0804 VOL=NBCSRC MAXRE=9000 CON=N\r"; continue
|
||||
#expect "TSM>" send "VOLMGR\r"; continue
|
||||
#expect "VOL>" send "CREATE D @NBCSRC^SYSTEM ENTRIES=1000\r"; continue
|
||||
#expect "VOL>" send "EXIT\r"; continue
|
||||
;
|
||||
; Boot from disk
|
||||
bo dma0
|
||||
;bo sba0
|
||||
364
SEL32/installs/user36esdtp2.ini
Normal file
364
SEL32/installs/user36esdtp2.ini
Normal file
|
|
@ -0,0 +1,364 @@
|
|||
;======================================================
|
||||
; SEL32 System Engineering Labs 32 bit computer
|
||||
; MPX - Ver 3.6 extended hardware configuration
|
||||
; CPU - 32/67 16M Sel32 Concept/32
|
||||
; IOP - 7e00 Model 8001 IOP Processor Controller
|
||||
; MFP - 7600 Model 8002 Multi Function Processor
|
||||
; SBA - 7e00/7e08 MFP SCSI Disk controller
|
||||
; sba0 SD700 Model 8833 700MB
|
||||
; sba0 <-> dsk/scsi35m1disk0
|
||||
; sba1 SD700 Model 8833 700MB
|
||||
; sba1 <-> dsk/scsi35m2disk0
|
||||
; DMA - 0800 DMA HSDP Disk Controller
|
||||
; dma0 MD300 Model 8127 300MB MHD
|
||||
; dma0 <-> dsk/user36p2udp0
|
||||
; - 0802 DMA HSDP Disk Controller
|
||||
; dma1 MH600 Model 8155 600MB MHD
|
||||
; dma1 <-> dsk/user36s1udp1
|
||||
; - 0804 DMA HSDP Disk Controller
|
||||
; dma2 MH600 Model 8155 600MB MHD (N/U)
|
||||
; dma2 <-> dsk/user36s1udp2 (N/U)
|
||||
; LPR - 7ef8/7ef9 Model 924X High Speed Line Printer
|
||||
; COM - 7ec0 8512 8-line async communications
|
||||
; CON - 7efc/7efd Console Terminal
|
||||
; RTC - 7f06 60 HZ Real-Time clock
|
||||
; ITM - 7f04 38.4MS Interval timer
|
||||
; MT - 1000 8051 Buffered Tape Processor
|
||||
; mta0 <- tapes/user36esdtp2.tap
|
||||
; EC - 0e00 Model 8516 Ethernet (not supported)
|
||||
;======================================================
|
||||
; Set HOST simulator
|
||||
set env HOST=sel32
|
||||
; Set local IP address
|
||||
; set env IP=192.168.1.5 (N/U)
|
||||
;======================================================
|
||||
; Set directory for disk images
|
||||
mkdir dsk
|
||||
mkdir tapes
|
||||
; Set tape image filename
|
||||
set env FILE=user36esdtp2.tap
|
||||
; Set github.com URL for downloading files
|
||||
set env GITURL=https://github.com/AZBevier/SEL32-installs/raw/main/tapes/
|
||||
if exist "tapes/%FILE%" goto exists
|
||||
if not exist "tapes/%FILE%" echof "file %FILE% missing, trying %FILE%.tgz"
|
||||
cd tapes
|
||||
if exist "%FILE%.tgz" goto nocurl
|
||||
echof "fetching %FILE%.tgz file from github.com\n"
|
||||
curl -LJO %GITURL%/%FILE%.tgz
|
||||
if not exist "%FILE%.tgz" echof "FAILED - file %FILE% not available"; exit 1
|
||||
:nocurl
|
||||
echof "untar %FILE%.tgz file\n"
|
||||
tar -xzf %FILE%.tgz
|
||||
cd ..
|
||||
:exists
|
||||
echof "file %FILE% present, doing install"
|
||||
;
|
||||
; Set NBC tape image filename
|
||||
set env FILE2=nbctape3x.tap
|
||||
if exist "tapes/%FILE2%" goto exists2
|
||||
if not exist "tapes/%FILE2%" echof "file %FILE2% missing, trying %FILE2%.tgz"
|
||||
cd tapes
|
||||
if exist "%FILE2%.tgz" goto nocurl2
|
||||
echof "fetching %FILE2%.tgz file from github.com\n"
|
||||
curl -LJO %GITURL%/%FILE2%.tgz
|
||||
if not exist "%FILE2%.tgz" echof "FAILED - file %FILE2% not available"; exit 1
|
||||
:nocurl2
|
||||
echof "untar %FILE2%.tgz file\n"
|
||||
tar -xzf %FILE2%.tgz
|
||||
cd ..
|
||||
:exists2
|
||||
echof "file %FILE2% present, doing install"
|
||||
;
|
||||
; Set debug output
|
||||
;set debug -n sel.log
|
||||
;set debug stderr
|
||||
;
|
||||
; CPU type and memory
|
||||
;set CPU 32/27 2M
|
||||
;set CPU 32/27 4M
|
||||
;set CPU 32/87 4M
|
||||
;set CPU 32/87 8M
|
||||
;set CPU 32/67 4M
|
||||
set CPU 32/67 8M
|
||||
;set CPU 32/67 16M
|
||||
;set CPU 32/97 4M
|
||||
;set CPU 32/97 8M
|
||||
;
|
||||
; CPU debug options
|
||||
;set cpu debug=cmd;exp;inst;detail;trap;xio;irq
|
||||
; Set instruction trace history size
|
||||
;set cpu history=10000
|
||||
; useful options
|
||||
;set cpu debug=exp
|
||||
;set cpu debug=cmd;exp;irq;trap;xio;inst
|
||||
;;;;set cpu debug=cmd;exp;irq;trap;xio
|
||||
;set cpu debug=cmd;irq;trap;exp
|
||||
;set cpu debug=cmd;exp;xio
|
||||
;set cpu debug=irq;trap;exp;xio
|
||||
;
|
||||
; RTC realtime clock
|
||||
; address is 7f06
|
||||
;set RTC 50
|
||||
set RTC 60
|
||||
; enable RTC
|
||||
set RTC enable
|
||||
; RTC debug options
|
||||
;set RTC debug=cmd
|
||||
;
|
||||
; ITM interval timer
|
||||
; address is 7f04
|
||||
set ITM 3840
|
||||
;set ITM debug=cmd
|
||||
;
|
||||
; IOP at channel 7e00
|
||||
; useful options
|
||||
;;;;set iop debug=cmd;exp
|
||||
;;set iop debug=cmd
|
||||
; make iop online
|
||||
set iop enable
|
||||
; set iop channel address
|
||||
set iop0 dev=7e00
|
||||
;
|
||||
; MFP at channel 7e00
|
||||
; useful options
|
||||
;;;;set mfp debug=cmd;exp
|
||||
; make mfp online
|
||||
set mfp enable
|
||||
; set mfp channel address
|
||||
;set mfp0 dev=7e00
|
||||
set mfp0 dev=7600
|
||||
;
|
||||
; COM 8-Line on 7ec0
|
||||
; useful options
|
||||
;;set com debug=cmd;
|
||||
set coml enable
|
||||
set coml0 dev=7ec0
|
||||
set coml0 enable
|
||||
set coml1 enable
|
||||
set coml2 enable
|
||||
set coml3 enable
|
||||
set coml4 enable
|
||||
set coml5 enable
|
||||
set coml6 enable
|
||||
set coml7 enable
|
||||
;
|
||||
; Enable telnet sessions on port 4747
|
||||
;set comc enable
|
||||
;at comc 4747
|
||||
;
|
||||
; LPR
|
||||
; LPR0 is at 7EF8
|
||||
; LPR1 is at 7EF9
|
||||
; useful options
|
||||
;set lpr debug=cmd;detail
|
||||
;;;;set lpr debug=cmd
|
||||
set lpr enable
|
||||
; LPR output file
|
||||
;at lpr lprout
|
||||
;
|
||||
; CON Console
|
||||
; useful options
|
||||
;set con debug=cmd;exp;detail
|
||||
; enable console
|
||||
set con enable
|
||||
; set console address
|
||||
set con0 dev=7efc
|
||||
;;;;set con debug=cmd;exp
|
||||
;
|
||||
; MTA Buffered tape processor
|
||||
;set mta debug=cmd;exp;xio;data
|
||||
; useful options
|
||||
;set mta debug=cmd;exp;xio;data
|
||||
;set mta debug=cmd;exp;xio
|
||||
;
|
||||
; enable MTA to change channel
|
||||
set mta enable
|
||||
; set mt channel
|
||||
set mta0 dev=1000
|
||||
;
|
||||
; Attach in/out tape files
|
||||
set mta0 locked
|
||||
at mta0 tapes/user36esdtp2.tap
|
||||
;at mta0 user36sdts1.tap
|
||||
;at mta1 temptape.tap
|
||||
;at mta2 output.tap
|
||||
;
|
||||
; DMA disk processor II/UDP
|
||||
; enable DMA to change channel
|
||||
set dma enable
|
||||
; set disk chan to 0800
|
||||
set dma0 dev=800
|
||||
; set disk type to MPX MH300 8127
|
||||
set dma0 type=MH300
|
||||
; set disk type to MPX MH600 8155
|
||||
;set dma0 type=MH600
|
||||
; set disk chan to 0802
|
||||
set dma1 dev=802
|
||||
; set disk type to MPX MH300 8127
|
||||
;set dma1 type=MH300
|
||||
; set disk type to MPX MH600 8155
|
||||
set dma1 type=MH600
|
||||
;
|
||||
; Attach diskfile
|
||||
;at dma0 udp35disk0
|
||||
at dma0 -i dsk/user36p2udp0
|
||||
;at dma1 udp35disk1
|
||||
; use s1 disk 2
|
||||
at dma1 -i dsk/user36s1udp1
|
||||
;;at dma0 mpx0disk
|
||||
;;at dma1 mpx1disk
|
||||
;at dma2 -i dsk/user36s1udp2
|
||||
;
|
||||
;set dma debug=cmd;exp;detail;data
|
||||
; useful options
|
||||
;;set dma debug=cmd;exp
|
||||
;set dma debug=exp;cmd;detail
|
||||
;
|
||||
; SDA SCFI disk processor
|
||||
;set sda debug=cmd;exp;data;detail
|
||||
;set sda debug=cmd;exp
|
||||
; Attach diskfiles
|
||||
;at sda0 diskfile4
|
||||
;at sda1 diskfile5
|
||||
;
|
||||
; SBA MFP SCSI buss 1 disk processor
|
||||
set sba enable
|
||||
; set disk chan to 7600
|
||||
set sba0 dev=7600
|
||||
; set disk type to MPX MH300
|
||||
;set sba0 type=SD300
|
||||
;set sba0 type=SD150
|
||||
set sba0 type=SD700
|
||||
set sba1 type=SD700
|
||||
;;;;set sba debug=cmd;exp;data;detail
|
||||
;;;;set sba debug=cmd;exp;xio;exp;data
|
||||
; Attach diskfiles
|
||||
;at sba0 scsia0disk
|
||||
at sba0 -i dsk/scsi35m1disk0
|
||||
;at sba1 scsi1disk
|
||||
at sba1 -i dsk/scsi35m2disk0
|
||||
;
|
||||
; SBB SCSI buss 2 disk processor
|
||||
;set sbb enable
|
||||
; set disk chan to 7640
|
||||
;set sbb0 dev=7640
|
||||
; set disk type to MPX MH300
|
||||
;;;;set sbb0 type=SD150
|
||||
;set sbb0 type=SD150
|
||||
;set sbb0 type=SD700
|
||||
;set sbb0 type=SD300
|
||||
;set sbb debug=cmd;exp;data;xio;detail
|
||||
;set sbb debug=cmd;exp
|
||||
; Attach diskfiles
|
||||
;at sbb0 -i scsi35m2disk0
|
||||
;at sbb1 scsi1disk
|
||||
;
|
||||
; DPA high speed disk processor
|
||||
; enable HSDP to change channel
|
||||
;set dpa enable
|
||||
; set channel addr
|
||||
;set dpa0 dev=800
|
||||
; set disk type to UTX 8887
|
||||
;set dpa0 type=8887
|
||||
;
|
||||
; Attach diskfiles
|
||||
;at dpa0 utxdsk.dsk
|
||||
;at dpa0 utx0hsdp
|
||||
;at dpa1 utx1hsdp
|
||||
;
|
||||
; useful options
|
||||
;set dpa debug=cmd;exp
|
||||
;
|
||||
; set console switches
|
||||
deposit CSW 0
|
||||
;
|
||||
;UTX boot tape options
|
||||
;set GPR 7 to 0x00 to boot in multi-user mode
|
||||
;set GPR 7 to 0x01 to prompt for unix filename
|
||||
;set GPR 7 to 0x02 to boot in single user mode
|
||||
;set GPR 7 to 0x10 to disable swapping and paging
|
||||
;set GPR 7 to 0x20 to boot from device specified in GPR6
|
||||
;set GPR 7 to 0x40 to allow progress messages on boot
|
||||
;deposit BOOTR[7] 40
|
||||
;deposit BOOTR[7] 52
|
||||
deposit BOOTR[7] 42
|
||||
;deposit BOOTR[7] 2
|
||||
;deposit BOOTR[6] 800
|
||||
;deposit BOOTR[0] ffffffff
|
||||
;
|
||||
; Set register content at boot for SEL diagnostics
|
||||
; uncomment next line to get diag loader prompt
|
||||
;deposit bootr[0] ffffffff
|
||||
;deposit bootr[1] 0
|
||||
;deposit bootr[2] 0
|
||||
; set Boot reg 0 1 to boot MSTRALL from master SDT
|
||||
deposit bootr[0] 1
|
||||
; set Boot reg 0 2 to boot MSTREXT from master SDT
|
||||
;deposit bootr[0] 2
|
||||
;
|
||||
; allow cpu idle
|
||||
set cpu idle
|
||||
; Set expect script for auto time entry on MPX at OPCOM prompt
|
||||
;expect haltafter=20000
|
||||
;
|
||||
; wait for expected output from simulator, then enter this text
|
||||
;expect " >>" send "BR 31D10\r"; continue
|
||||
;expect " >>" send "BR 2b4q\r"; continue
|
||||
;expect " >>" send "BR 430q\r"; continue
|
||||
expect " >>" send "TE\r"; continue
|
||||
;expect "ENTER SYSTEM VOLUME CHANNEL AND SUBADDRESS: " send "7600\r"; continue
|
||||
expect "ENTER SYSTEM DEVICE CHANNEL AND SUBADDRESS: " send "0800\r"; continue
|
||||
;;expect "BOOT FROM A SCSI TAPE? (REPLY Y OR N): " send "N\r"; continue
|
||||
;;expect "PLEASE ENTER THE 4 CHAR. DEVICE....." send "0800\r"; continue
|
||||
;expect "PLEASE ENTER THE 4 CHAR. DEVICE....." send "7600\r"; continue
|
||||
;;expect "ENTER DISC CONTROLLER TYPE:" send "X\r"; continue
|
||||
;expect "ENTER DISC CONTROLLER TYPE:" send "M\r"; continue
|
||||
expect "ENTER DATE" send " %DATE_MM%/%DATE_DD%/%DATE_YY%,%TIME_HH%:%TIME_MM%:%TIME_SS%\r"; GO
|
||||
;
|
||||
expect "FMT>" send "INITIALIZE DEV=DM0800 DIS=MH0300 DES=Y CON=N\r"; continue
|
||||
;expect "FMT>" send "INITIALIZE DEV=DM7600 DIS=SD0700 DES=Y CON=N\r"; continue
|
||||
;expect "FMT>" send "INITIALIZE DEV=DM7600 DIS=SD0300 DES=Y CON=N\r"; continue
|
||||
expect "FMT>" send "FORMAT DEV=DM0800 VOL=SYSTEM MAXRE=8000 DES=Y CON=N\r"; continue;
|
||||
;expect "FMT>" send "FORMAT DEV=DM7600 VOL=SYSTEM MAXRE=8000 CON=N\r"; continue
|
||||
;expect "FMT>" send "INI DEV=DM7600 DIS=SD0150 DES=Y CON=N\r"; continue
|
||||
;expect "FMT>" send "FOR DEV=DM7600 DIS=SD0700 VOL=SYSTEM MAXRE=8000 DES=Y CON=N\r"; continue
|
||||
;expect "FMT>" send "INITIALIZE DEVICE=DM7600 DEST=Y DISC=SD0700 CONFIRM=N\r"; continue
|
||||
;expect "FMT>" send "INITIALIZE DISC=SD0700 DEST=Y CONFIRM=N\r"; continue
|
||||
;expect "FMT>" send "INITIALIZE DEST=Y CONFIRM=N\r"; continue
|
||||
;;expect "FMT>" send "EXIT\r"; continue
|
||||
expect "VOL>" send "CREATE D SYSTEM ENTRIES=2000\r"; continue
|
||||
; restore system
|
||||
expect "VOL>" send "RESTORE VOL=SYSTEM\r"; continue
|
||||
; restore object, object_e, oldobj
|
||||
;;expect "VOL>" send "RESTORE VOL=SYSTEM\r"; continue
|
||||
; restore bin, doc, nblib, sample
|
||||
;;expect "VOL>" send "RESTORE VOL=SYSTEM\r"; continue
|
||||
expect "VOL>" send "REWIND\r"; continue
|
||||
expect "VOL>" send "EXIT\r"; continue
|
||||
;expect "SYSTEM READY... PRESS ATTENTION FOR TSM..."
|
||||
expect "SYSTEM READY... PRESS ATTENTION FOR TSM..." send "@@A"; continue
|
||||
expect "ENTER YOUR OWNERNAME:" send "SYSTEM\r"; continue
|
||||
expect "TSM>" send "WHO\r"; continue
|
||||
expect "TSM>" send "J.VFMT\r"; continue
|
||||
expect "FMT>" send "INITIALIZE DEV=DM0802 DIS=MH0600 DES=Y CON=N\r"; continue
|
||||
expect "CONTINUE - Y/N" send "Y\r"; continue
|
||||
expect "TASK J.VFMT" send "R\r"; continue
|
||||
expect "FMT>" send "FORMAT DEV=DM0802 VOL=WORK MAXRE=10000 DES=Y CON=N\r"; continue
|
||||
expect "TSM>" send "MOUNT WORK ON DM0802 OPTI=PUBLIC\r"; continue
|
||||
expect "TASK J.TSM" send "R\r"; continue
|
||||
expect "TSM>" send "VOLMGR\r"; continue
|
||||
expect "VOL>" send "CREATE D @WORK^SYSTEM ENTRIES=2000\r"; continue
|
||||
expect "VOL>" send "EXIT\r"; continue
|
||||
expect "TSM>" send "!STAT VOL\r"; continue
|
||||
expect "TSM>" send "SYSINFO\r"; continue
|
||||
;;expect "TSM>" send "WHO\r"; continue
|
||||
expect "TSM>" send "SHUTDOWN 0\r"; continue
|
||||
;;;expect "TSM>" send "EXIT\r"; continue
|
||||
expect "sim>" send "q\r"; continue
|
||||
;
|
||||
; Boot from disk
|
||||
;bo dma0
|
||||
;
|
||||
; Boot from mag tape
|
||||
bo mta0
|
||||
quit
|
||||
2971
SEL32/sel32_chan.c
Normal file
2971
SEL32/sel32_chan.c
Normal file
File diff suppressed because it is too large
Load diff
714
SEL32/sel32_clk.c
Normal file
714
SEL32/sel32_clk.c
Normal file
|
|
@ -0,0 +1,714 @@
|
|||
/* sel32_clk.c: SEL 32 Class F IOP processor RTOM functions.
|
||||
|
||||
Copyright (c) 2018-2021, James C. Bevier
|
||||
Portions provided by Richard Cornwell, Geert Rolf and other SIMH contributers
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
to deal in the Software without restriction, including without limitation
|
||||
the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
and/or sell copies of the Software, and to permit persons to whom the
|
||||
Software is furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in
|
||||
all copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
JAMES C. BEVIER BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
|
||||
This module support the real-time clock and the interval timer.
|
||||
These are CD/TD class 3 devices. The RTC can be programmed to
|
||||
50/100 HZ or 60/120 HZ rates and creates an interrupt at the
|
||||
requested rate. The interval timer is a 32 bit register that is
|
||||
loaded with a value to be down counted. An interrupt is generated
|
||||
when the count reaches zero, The clock continues down counting
|
||||
until read/reset by the programmer. The rate can be external or
|
||||
38.4 microseconds per count.
|
||||
*/
|
||||
|
||||
#include "sel32_defs.h"
|
||||
|
||||
#if NUM_DEVS_RTOM > 0
|
||||
|
||||
#define UNIT_CLK UNIT_IDLE|UNIT_DISABLE
|
||||
|
||||
void rtc_setup (uint32 ss, uint32 level);
|
||||
t_stat rtc_srv (UNIT *uptr);
|
||||
t_stat rtc_reset (DEVICE *dptr);
|
||||
t_stat rtc_set_freq (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
|
||||
t_stat rtc_show_freq (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
|
||||
t_stat rtc_help(FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, CONST char *cptr);
|
||||
const char *rtc_desc(DEVICE *dptr);
|
||||
|
||||
extern int irq_pend; /* go scan for pending int or I/O */
|
||||
extern uint32 INTS[]; /* interrupt control flags */
|
||||
extern uint32 SPAD[]; /* computer SPAD */
|
||||
extern uint32 M[]; /* system memory */
|
||||
extern uint32 outbusy; /* output waiting on timeout */
|
||||
extern uint32 inbusy; /* input waiting on timeout */
|
||||
|
||||
int32 rtc_pie = 0; /* rtc pulse ie */
|
||||
int32 rtc_tps = 60; /* rtc ticks/sec */
|
||||
int32 rtc_lvl = 0x18; /* rtc interrupt level */
|
||||
|
||||
/* Clock data structures
|
||||
rtc_dev RTC device descriptor
|
||||
rtc_unit RTC unit
|
||||
rtc_reg RTC register list
|
||||
*/
|
||||
|
||||
/* clock can be enabled / disabled */
|
||||
/* default to 60 HZ RTC */
|
||||
//718UNIT rtc_unit = { UDATA (&rtc_srv, UNIT_IDLE, 0), 16666, UNIT_ADDR(0x7F06)};
|
||||
UNIT rtc_unit = { UDATA (&rtc_srv, UNIT_CLK, 0), 16666, UNIT_ADDR(0x7F06)};
|
||||
|
||||
REG rtc_reg[] = {
|
||||
{ FLDATA (PIE, rtc_pie, 0) },
|
||||
{ DRDATA (TIME, rtc_unit.wait, 32), REG_NZ + PV_LEFT },
|
||||
{ DRDATA (TPS, rtc_tps, 8), PV_LEFT + REG_HRO },
|
||||
{ NULL }
|
||||
};
|
||||
|
||||
MTAB rtc_mod[] = {
|
||||
{ MTAB_XTD|MTAB_VDV, 50, NULL, "50HZ",
|
||||
&rtc_set_freq, NULL, NULL },
|
||||
{ MTAB_XTD|MTAB_VDV, 60, NULL, "60HZ",
|
||||
&rtc_set_freq, NULL, NULL },
|
||||
{ MTAB_XTD|MTAB_VDV, 100, NULL, "100HZ",
|
||||
&rtc_set_freq, NULL, NULL },
|
||||
{ MTAB_XTD|MTAB_VDV, 120, NULL, "120HZ",
|
||||
&rtc_set_freq, NULL, NULL },
|
||||
{ MTAB_XTD|MTAB_VDV, 0, "FREQUENCY", NULL,
|
||||
NULL, &rtc_show_freq, NULL },
|
||||
{ 0 }
|
||||
};
|
||||
|
||||
DEVICE rtc_dev = {
|
||||
"RTC", &rtc_unit, rtc_reg, rtc_mod,
|
||||
1, 8, 8, 1, 8, 8,
|
||||
NULL, NULL, &rtc_reset, /* examine, deposit, reset */
|
||||
NULL, NULL, NULL, /* boot, attach, detach */
|
||||
/* dib, dev flags, debug flags, debug */
|
||||
NULL, DEV_DEBUG|DEV_DIS|DEV_DISABLE, 0, dev_debug,
|
||||
NULL, NULL, &rtc_help, /* ?, ?, help */
|
||||
NULL, NULL, &rtc_desc, /* ?, ?, description */
|
||||
};
|
||||
|
||||
/* The real time clock runs continuously; therefore, it only has
|
||||
a unit service routine and a reset routine. The service routine
|
||||
sets an interrupt that invokes the clock counter.
|
||||
*/
|
||||
|
||||
/* service clock signal from simulator */
|
||||
t_stat rtc_srv (UNIT *uptr)
|
||||
{
|
||||
#ifdef STOP_CLOCK_INTS_FOR_DEXP_TEST_DEBUGGING
|
||||
/* stop clock interrupts for dexp debugging */
|
||||
rtc_pie = 0;
|
||||
#endif
|
||||
/* if clock disabled, do not do interrupts */
|
||||
if (((rtc_dev.flags & DEV_DIS) == 0) && rtc_pie) {
|
||||
int lev = 0x13;
|
||||
sim_debug(DEBUG_CMD, &rtc_dev,
|
||||
"RT Clock mfp INTS[%02x] %08x SPAD[%02x] %08x\n",
|
||||
lev, INTS[lev], lev+0x80, SPAD[lev+0x80]);
|
||||
sim_debug(DEBUG_CMD, &rtc_dev,
|
||||
"RT Clock int INTS[%02x] %08x SPAD[%02x] %08x\n",
|
||||
rtc_lvl, INTS[rtc_lvl], rtc_lvl+0x80, SPAD[rtc_lvl+0x80]);
|
||||
if (((INTS[rtc_lvl] & INTS_ENAB) || /* make sure enabled */
|
||||
(SPAD[rtc_lvl+0x80] & SINT_ENAB)) && /* in spad too */
|
||||
(((INTS[rtc_lvl] & INTS_ACT) == 0) || /* and not active */
|
||||
((SPAD[rtc_lvl+0x80] & SINT_ACT) == 0))) { /* in spad too */
|
||||
#if 0
|
||||
/* HACK for console I/O stopping */
|
||||
/* This reduces the number of console I/O stopping errors */
|
||||
/* need to find real cause of I/O stopping on clock interrupt */
|
||||
if ((outbusy==0) && (inbusy==0)) /* skip interrupt if con I/O in busy wait */
|
||||
INTS[rtc_lvl] |= INTS_REQ; /* request the interrupt */
|
||||
else
|
||||
sim_debug(DEBUG_CMD, &rtc_dev,
|
||||
"RT Clock int console busy\n");
|
||||
#else
|
||||
INTS[rtc_lvl] |= INTS_REQ; /* request the interrupt */
|
||||
#endif
|
||||
irq_pend = 1; /* make sure we scan for int */
|
||||
}
|
||||
sim_debug(DEBUG_CMD, &rtc_dev,
|
||||
"RT Clock int INTS[%02x] %08x SPAD[%02x] %08x\n",
|
||||
rtc_lvl, INTS[rtc_lvl], rtc_lvl+0x80, SPAD[rtc_lvl+0x80]);
|
||||
}
|
||||
// temp = sim_rtcn_calb(rtc_tps, TMR_RTC); /* timer 0 for RTC */
|
||||
sim_rtcn_calb(rtc_tps, TMR_RTC); /* timer 0 for RTC */
|
||||
sim_activate_after(uptr, 1000000/rtc_tps); /* reactivate 16666 tics / sec */
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* Clock interrupt start/stop */
|
||||
/* ss = 1 - starting clock */
|
||||
/* ss = 0 - stopping clock */
|
||||
/* level = interrupt level */
|
||||
void rtc_setup(uint32 ss, uint32 level)
|
||||
{
|
||||
uint32 addr = SPAD[0xf1] + (level<<2); /* vector address in SPAD */
|
||||
|
||||
rtc_lvl = level; /* save the interrupt level */
|
||||
addr = M[addr>>2]; /* get the interrupt context block addr */
|
||||
if (ss == 1) { /* starting? */
|
||||
INTS[level] |= INTS_ENAB; /* make sure enabled */
|
||||
SPAD[level+0x80] |= SINT_ENAB; /* in spad too */
|
||||
sim_activate(&rtc_unit, 20); /* start us off */
|
||||
sim_debug(DEBUG_CMD, &rtc_dev,
|
||||
"RT Clock setup enable int %02x rtc_pie %01x ss %01x\n",
|
||||
rtc_lvl, rtc_pie, ss);
|
||||
} else {
|
||||
INTS[level] &= ~INTS_ENAB; /* make sure disabled */
|
||||
SPAD[level+0x80] &= ~SINT_ENAB; /* in spad too */
|
||||
INTS[level] &= ~INTS_ACT; /* make sure request not active */
|
||||
SPAD[level+0x80] &= ~SINT_ACT; /* in spad too */
|
||||
sim_debug(DEBUG_CMD, &rtc_dev,
|
||||
"RT Clock setup disable int %02x rtc_pie %01x ss %01x\n",
|
||||
rtc_lvl, rtc_pie, ss);
|
||||
}
|
||||
rtc_pie = ss; /* set new state */
|
||||
}
|
||||
|
||||
/* Clock reset */
|
||||
t_stat rtc_reset(DEVICE *dptr)
|
||||
{
|
||||
rtc_pie = 0; /* disable pulse */
|
||||
/* initialize clock calibration */
|
||||
sim_activate (&rtc_unit, rtc_unit.wait); /* activate unit */
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* Set frequency */
|
||||
t_stat rtc_set_freq(UNIT *uptr, int32 val, CONST char *cptr, void *desc)
|
||||
{
|
||||
if (cptr) /* if chars, bad */
|
||||
return SCPE_ARG; /* ARG error */
|
||||
if ((val != 50) && (val != 60) && (val != 100) && (val != 120))
|
||||
return SCPE_IERR; /* scope error */
|
||||
rtc_tps = val; /* set the new frequency */
|
||||
return SCPE_OK; /* we done */
|
||||
}
|
||||
|
||||
/* Show frequency */
|
||||
t_stat rtc_show_freq (FILE *st, UNIT *uptr, int32 val, CONST void *desc)
|
||||
{
|
||||
/* print the current frequency setting */
|
||||
if (rtc_tps < 100)
|
||||
fprintf (st, (rtc_tps == 50)? "50Hz": "60Hz");
|
||||
else
|
||||
fprintf (st, (rtc_tps == 100)? "100Hz": "120Hz");
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* sho help rtc */
|
||||
t_stat rtc_help(FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, CONST char *cptr)
|
||||
{
|
||||
fprintf(st, "SEL 32 IOP/MFP realtime clock at 0x7F06\r\n");
|
||||
fprintf(st, "Use:\r\n");
|
||||
fprintf(st, " sim> SET RTC [50][60][100][120]\r\n");
|
||||
fprintf(st, "to set clock interrupt rate in HZ\r\n");
|
||||
fprint_set_help(st, dptr);
|
||||
fprint_show_help(st, dptr);
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* device description */
|
||||
const char *rtc_desc(DEVICE *dptr)
|
||||
{
|
||||
return "SEL IOP/MFP realtime clock @ address 0x7F06";
|
||||
}
|
||||
|
||||
/************************************************************************/
|
||||
|
||||
/* Interval Timer support */
|
||||
int32 itm_src = 0; /* itm source freq 0=itm 1=rtc */
|
||||
int32 itm_pie = 0; /* itm pulse enable */
|
||||
int32 itm_run = 0; /* itm is running */
|
||||
int32 itm_cmd = 0; /* itm last user cmd */
|
||||
int32 itm_cnt = 0; /* itm reload pulse count */
|
||||
int32 itm_tick_size_x_100 = 3840; /* itm 26042 ticks/sec = 38.4 us per tic */
|
||||
int32 itm_lvl = 0x5f; /* itm interrupt level */
|
||||
int32 itm_strt = 0; /* clock start time in usec */
|
||||
int32 itm_load = 0; /* clock loaded */
|
||||
int32 itm_big = 26042 * 6000; /* about 100 minutes */
|
||||
t_stat itm_srv (UNIT *uptr);
|
||||
t_stat itm_set_freq (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
|
||||
t_stat itm_reset (DEVICE *dptr);
|
||||
t_stat itm_show_freq (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
|
||||
t_stat itm_help(FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, CONST char *cptr);
|
||||
const char *itm_desc(DEVICE *dptr);
|
||||
|
||||
/* Clock data structures
|
||||
itm_dev Interval Timer ITM device descriptor
|
||||
itm_unit Interval Timer ITM unit
|
||||
itm_reg Interval Timer ITM register list
|
||||
*/
|
||||
|
||||
/* Mark suggested I remove the UNIT_IDLE flag from ITM. This causes SEL32 */
|
||||
/* to use 100% of the CPU instead of waiting and running 10% cpu usage */
|
||||
//BAD Mark UNIT itm_unit = { UDATA (&itm_srv, UNIT_IDLE, 0), 26042, UNIT_ADDR(0x7F04)};
|
||||
UNIT itm_unit = { UDATA (&itm_srv, 0, 0), 26042, UNIT_ADDR(0x7F04)};
|
||||
|
||||
REG itm_reg[] = {
|
||||
{ FLDATA (PIE, itm_pie, 0) },
|
||||
{ FLDATA (CNT, itm_cnt, 0) },
|
||||
{ FLDATA (CMD, itm_cmd, 0) },
|
||||
{ DRDATA (TICK_SIZE, itm_tick_size_x_100, 32), PV_LEFT + REG_HRO },
|
||||
{ NULL }
|
||||
};
|
||||
|
||||
MTAB itm_mod[] = {
|
||||
{ MTAB_XTD|MTAB_VDV, 3840, NULL, "3840us",
|
||||
&itm_set_freq, NULL, NULL },
|
||||
{ MTAB_XTD|MTAB_VDV, 7680, NULL, "7680us",
|
||||
&itm_set_freq, NULL, NULL },
|
||||
{ MTAB_XTD|MTAB_VDV, 0, "RESOLUTION", NULL,
|
||||
NULL, &itm_show_freq, NULL },
|
||||
{ 0 }
|
||||
};
|
||||
|
||||
DEVICE itm_dev = {
|
||||
"ITM", &itm_unit, itm_reg, itm_mod,
|
||||
1, 8, 8, 1, 8, 8,
|
||||
NULL, NULL, &itm_reset, /* examine, deposit, reset */
|
||||
NULL, NULL, NULL, /* boot, attach, detach */
|
||||
/* dib, dev flags, debug flags, debug */
|
||||
// NULL, DEV_DEBUG|DEV_DIS|DEV_DISABLE, 0, dev_debug,
|
||||
NULL, DEV_DEBUG, 0, dev_debug, /* dib, dev flags, debug flags, debug */
|
||||
NULL, NULL, &itm_help, /* ?, ?, help */
|
||||
NULL, NULL, &itm_desc, /* ?, ?, description */
|
||||
};
|
||||
|
||||
/* The interval timer downcounts the value it is loaded with and
|
||||
runs continuously; therefore, it has a read/write routine,
|
||||
a unit service routine and a reset routine. The service routine
|
||||
sets an interrupt that invokes the clock counter.
|
||||
*/
|
||||
|
||||
/* service clock expiration from simulator */
|
||||
/* cause interrupt */
|
||||
t_stat itm_srv (UNIT *uptr)
|
||||
{
|
||||
if (itm_pie) { /* interrupt enabled? */
|
||||
time_t result = time(NULL);
|
||||
sim_debug(DEBUG_CMD, &itm_dev,
|
||||
"Intv Timer expired status %08x lev %02x cnt %x @ time %08x\n",
|
||||
INTS[itm_lvl], itm_lvl, itm_cnt, (uint32)result);
|
||||
if (((INTS[itm_lvl] & INTS_ENAB) || /* make sure enabled */
|
||||
(SPAD[itm_lvl+0x80] & SINT_ENAB)) && /* in spad too */
|
||||
(((INTS[itm_lvl] & INTS_ACT) == 0) || /* and not active */
|
||||
((SPAD[itm_lvl+0x80] & SINT_ACT) == 0))) { /* in spad too */
|
||||
INTS[itm_lvl] |= INTS_REQ; /* request the interrupt */
|
||||
irq_pend = 1; /* make sure we scan for int */
|
||||
}
|
||||
sim_cancel (&itm_unit); /* cancel current timer */
|
||||
itm_run = 0; /* timer is no longer running */
|
||||
/* if cmd BIT29 is set, reload & restart */
|
||||
if ((INTS[itm_lvl] & INTS_ENAB) && (itm_cmd & 0x04) && (itm_cnt != 0)) {
|
||||
sim_debug(DEBUG_CMD, &itm_dev,
|
||||
"Intv Timer reload on expired int %02x value %08x src %x\n",
|
||||
itm_lvl, itm_cnt, itm_src);
|
||||
/* restart timer with value from user */
|
||||
if (itm_src) /* use specified src freq */
|
||||
sim_activate_after_abs_d(&itm_unit, ((double)itm_cnt*350000)/rtc_tps);
|
||||
//DIAG sim_activate_after_abs_d(&itm_unit, ((double)itm_cnt*400000)/rtc_tps);
|
||||
//DIAG sim_activate_after_abs_d(&itm_unit, ((double)itm_cnt*1000000)/rtc_tps);
|
||||
else
|
||||
sim_activate_after_abs_d(&itm_unit, ((double)itm_cnt*itm_tick_size_x_100)/100.0);
|
||||
itm_run = 1; /* show timer running */
|
||||
itm_load = itm_cnt; /* save loaded value */
|
||||
itm_strt = 0; /* no negative start time */
|
||||
} else {
|
||||
int32 cnt = itm_big; /* 0x65ba TRY 1,000,000/38.4 10 secs */
|
||||
itm_strt = cnt; /* get negative start time */
|
||||
sim_debug(DEBUG_CMD, &itm_dev,
|
||||
"Intv Timer reload for neg cnts on expired int %02x value %08x src %x\n",
|
||||
itm_lvl, cnt, itm_src);
|
||||
/* restart timer with large value for negative timer value simulation */
|
||||
if (itm_src) /* use specified src freq */
|
||||
sim_activate_after_abs_d(&itm_unit, ((double)cnt*1000000)/rtc_tps);
|
||||
else
|
||||
sim_activate_after_abs_d(&itm_unit, ((double)cnt*itm_tick_size_x_100) / 100.0);
|
||||
itm_run = 1; /* show timer running */
|
||||
itm_load = cnt; /* save loaded value */
|
||||
}
|
||||
}
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* ITM read/load function called from CD command processing */
|
||||
/* cmd bit assignments */
|
||||
/* 0x40 = BIT25 = Read ITM value into R0 at anythime */
|
||||
/* 0x20 = BIT26 = Program ITM and BIT27-BIT31 are valid */
|
||||
/* 0x10 = BIT27 = =1 start timer, =0 stop timer */
|
||||
/* 0x08 = BIT28 = =1 store R0 into ITM, =0 do not alter clock value */
|
||||
/* 0x04 = BIT29 = =1 generate multiple ints on countdown to 0, reload start value */
|
||||
/* =0 generate single int on countdown to 0, continue counting negative */
|
||||
/* 0x02 = BIT30 = BIT30 = 0 BIT31 = 0 = use jumpered clock frequency */
|
||||
/* 0x01 = BIT31 = BIT30 = 0 BIT31 = 1 = use jumpered clock frequency */
|
||||
/* = BIT30 = 1 BIT31 = 0 = use RT clock frequency 50/60/100/120 HZ */
|
||||
/* = BIT30 = 1 BIT31 = 1 = use external clock frequency */
|
||||
/* level = interrupt level */
|
||||
/* cmd = 0x20 stop timer, do not transfer any value */
|
||||
/* = 0x39 load and enable interval timer, no return value */
|
||||
/* = 0x3d load and enable interval timer, countdown to zero, interrupt and reload */
|
||||
/* = 0x40 read timer value */
|
||||
/* = 0x60 read timer value and stop timer */
|
||||
/* = 0x79 read/reload and start timer */
|
||||
/* cnt = value to write to timer */
|
||||
/* ret = return value read from timer */
|
||||
int32 itm_rdwr(uint32 cmd, int32 cnt, uint32 level)
|
||||
{
|
||||
uint32 temp;
|
||||
|
||||
cmd &= 0x7f; /* just need the cmd */
|
||||
itm_cmd = cmd; /* save last cmd */
|
||||
switch (cmd) {
|
||||
case 0x20: /* stop timer */
|
||||
/* stop the timer and save the curr value for later */
|
||||
temp = itm_load; /* use last loaded value */
|
||||
sim_debug(DEBUG_CMD, &itm_dev,
|
||||
"Intv 0x%2x kill value %08x (%08d) itm_load %08x\n",
|
||||
cmd, cnt, cnt, temp);
|
||||
if (itm_run) { /* if we were running save curr cnt */
|
||||
/* read timer value */
|
||||
temp = (uint32)(100.0*sim_activate_time_usecs(&itm_unit)/itm_tick_size_x_100);
|
||||
sim_debug(DEBUG_CMD, &itm_dev,
|
||||
"Intv 0x%2x temp value %08x (%d)\n", cmd, temp, temp);
|
||||
if (itm_strt) { /* see if running neg */
|
||||
/* we only get here if timer ran out and no reload value */
|
||||
/* get simulated negative start time in counts */
|
||||
temp = temp - itm_strt; /* make into a negative number */
|
||||
}
|
||||
}
|
||||
sim_cancel (&itm_unit); /* cancel itc */
|
||||
itm_run = 0; /* timer is not running */
|
||||
itm_cnt = 0; /* no count reset value */
|
||||
itm_load = temp; /* last loaded value */
|
||||
itm_strt = 0; /* not restarted neg */
|
||||
return 0; /* does not matter, no value returned */
|
||||
break;
|
||||
|
||||
case 0x29: /* load new value and start lo rate */
|
||||
case 0x28: /* load new value and start hi rate */
|
||||
case 0x2a: /* load new value and use RTC */
|
||||
case 0x2b: /* load new value and start hi rate */
|
||||
case 0x38: /* load new value and start hi rate */
|
||||
case 0x39: /* load new value and start lo rate */
|
||||
case 0x3a: /* load new value and start hi rate */
|
||||
case 0x3b: /* load new value and start lo rate */
|
||||
if (itm_run) /* if we were running stop timer */
|
||||
sim_cancel (&itm_unit); /* cancel timer */
|
||||
itm_run = 0; /* stop timer running */
|
||||
if (cmd & 0x10) { /* clock to start? */
|
||||
/* start timer with value from user */
|
||||
/* if bits 30-31 == 20, use RTC freq */
|
||||
itm_src = (cmd>>1)&1; /* set src */
|
||||
if (itm_src) /* use specified src freq */
|
||||
/* use clock frequency */
|
||||
sim_activate_after_abs_d(&itm_unit, ((double)cnt*1000000)/rtc_tps);
|
||||
else {
|
||||
/* use interval timer freq */
|
||||
#ifdef MAYBE_CHANGE_FOR_MPX3X
|
||||
/* tsm does not run if fake time cnt is used */
|
||||
/// if (cnt == 0)
|
||||
/// cnt = 0x52f0;
|
||||
/* this fixes an extra interrupt being generated on context switch */
|
||||
/* the value is load for the new task anyway */
|
||||
/* need to verify that UTX likes it too */
|
||||
/*4MPX3X*/ sim_activate_after_abs_d(&itm_unit, ((double)(cnt+1)*itm_tick_size_x_100)/100.0);
|
||||
#else
|
||||
sim_activate_after_abs_d(&itm_unit, ((double)cnt*itm_tick_size_x_100)/100.0);
|
||||
#endif
|
||||
}
|
||||
itm_run = 1; /* set timer running */
|
||||
}
|
||||
sim_debug(DEBUG_CMD, &itm_dev,
|
||||
"Intv 0x%02x init value %08x (%08d)\n", cmd, cnt, cnt);
|
||||
itm_cnt = 0; /* no count reset value */
|
||||
itm_load = cnt; /* now loaded */
|
||||
itm_strt = 0; /* not restarted neg */
|
||||
return 0; /* does not matter, no value returned */
|
||||
break;
|
||||
|
||||
case 0x70: /* start timer with curr value*/
|
||||
case 0x71: /* start timer with curr value */
|
||||
case 0x72: /* start timer with RTC value*/
|
||||
case 0x74: /* start timer with curr value*/
|
||||
case 0x75: /* start timer with curr value */
|
||||
case 0x76: /* start timer with RTC value*/
|
||||
case 0x30: /* start timer with curr value*/
|
||||
case 0x31: /* start timer with curr value*/
|
||||
case 0x32: /* start timer with RTC value*/
|
||||
case 0x34: /* start timer with curr value*/
|
||||
case 0x35: /* start timer with curr value */
|
||||
case 0x36: /* start timer with RTC value*/
|
||||
case 0x37: /* start timer with curr value */
|
||||
temp = itm_load; /* get last loaded value */
|
||||
if (itm_run) { /* if we were running save curr cnt */
|
||||
/* read timer value */
|
||||
temp = (uint32)(100.0*sim_activate_time_usecs(&itm_unit)/itm_tick_size_x_100);
|
||||
sim_debug(DEBUG_CMD, &itm_dev,
|
||||
"Intv 0x%2x temp value %08x (%d)\n", cmd, temp, temp);
|
||||
if (itm_strt) { /* see if running neg */
|
||||
/* we only get here if timer ran out and no reload value */
|
||||
/* get simulated negative start time in counts */
|
||||
temp = temp - itm_strt; /* make into a negative number */
|
||||
}
|
||||
sim_cancel (&itm_unit); /* cancel timer */
|
||||
}
|
||||
/* start timer with current or user value, reload on zero time */
|
||||
cnt = temp; /* use current value */
|
||||
/* if bits 30-31 == 20, use RTC freq */
|
||||
itm_src = (cmd>>1)&1; /* set src */
|
||||
if (itm_src) /* use specified src freq */
|
||||
//DIAG sim_activate_after_abs_d(&itm_unit, ((double)cnt*400000)/rtc_tps);
|
||||
sim_activate_after_abs_d(&itm_unit, ((double)cnt*1000000)/rtc_tps);
|
||||
else
|
||||
sim_activate_after_abs_d(&itm_unit, ((double)cnt*itm_tick_size_x_100)/100.0);
|
||||
itm_run = 1; /* set timer running */
|
||||
|
||||
if (cmd & 0x04) /* do we reload on zero? */
|
||||
itm_cnt = cnt; /* count reset value */
|
||||
else
|
||||
itm_cnt = 0; /* no count reset value */
|
||||
itm_strt = 0; /* not restarted neg */
|
||||
itm_load = cnt; /* now loaded */
|
||||
sim_debug(DEBUG_CMD, &itm_dev,
|
||||
"Intv 0x%02x return value %08x (%08d)\n", cmd, temp, temp);
|
||||
return temp; /* return curr count */
|
||||
break;
|
||||
|
||||
case 0x3c: /* load timer with new value and start */
|
||||
case 0x3d: /* load timer with new value and start */
|
||||
/* load timer with new value and start using RTC as source */
|
||||
case 0x3e: /* load timer with new value and start RTC*/
|
||||
sim_debug(DEBUG_CMD, &itm_dev,
|
||||
"Intv 0x%2x init value %08x (%d)\n", cmd, cnt, cnt);
|
||||
sim_cancel (&itm_unit); /* cancel timer */
|
||||
/* if bits 30-31 == 20, use RTC freq */
|
||||
itm_src = (cmd>>1)&1; /* set src */
|
||||
if (itm_src) /* use specified src freq */
|
||||
sim_activate_after_abs_d(&itm_unit, ((double)cnt*700000)/rtc_tps);
|
||||
else
|
||||
sim_activate_after_abs_d(&itm_unit, ((double)cnt*itm_tick_size_x_100)/100.0);
|
||||
itm_run = 1; /* set timer running */
|
||||
|
||||
if (cmd & 0x04) /* do we reload on zero? */
|
||||
itm_cnt = cnt; /* count reset value */
|
||||
itm_strt = 0; /* not restarted neg */
|
||||
itm_load = cnt; /* now loaded */
|
||||
sim_debug(DEBUG_CMD, &itm_dev,
|
||||
"Intv 0x%02x return value %08x (%08d)\n", cmd, cnt, cnt);
|
||||
return 0; /* does not matter, no value returned */
|
||||
break;
|
||||
|
||||
case 0x40: /* read the current timer value */
|
||||
/* return current count value from timer */
|
||||
temp = itm_load; /* get last loaded value */
|
||||
if (itm_run) { /* if we were running save curr cnt */
|
||||
/* read timer value */
|
||||
temp = (uint32)(100.0*sim_activate_time_usecs(&itm_unit)/itm_tick_size_x_100);
|
||||
sim_debug(DEBUG_CMD, &itm_dev,
|
||||
"Intv 0x%2x read value %08x (%d)\n", cmd, temp, temp);
|
||||
if (itm_strt) { /* see if running neg */
|
||||
/* we only get here if timer ran out and no reload value */
|
||||
/* get simulated negative start time in counts */
|
||||
temp = temp - itm_strt; /* make into a negative number */
|
||||
}
|
||||
}
|
||||
sim_debug(DEBUG_CMD, &itm_dev,
|
||||
"Intv 0x40 return value %08x (%d)\n", temp, temp);
|
||||
return temp;
|
||||
break;
|
||||
|
||||
case 0x60: /* read and stop timer */
|
||||
/* get timer value and stop timer */
|
||||
temp = itm_load; /* get last loaded value */
|
||||
if (itm_run) { /* if we were running save curr cnt */
|
||||
/* read timer value */
|
||||
temp = (uint32)(100.0*sim_activate_time_usecs(&itm_unit)/itm_tick_size_x_100);
|
||||
sim_debug(DEBUG_CMD, &itm_dev,
|
||||
"Intv 0x%2x read value %08x (%d)\n", cmd, temp, temp);
|
||||
if (itm_strt) { /* see if running neg */
|
||||
/* we only get here if timer ran out and no reload value */
|
||||
/* get simulated negative start time in counts */
|
||||
temp = temp - itm_strt; /* make into a negative number */
|
||||
}
|
||||
sim_cancel (&itm_unit); /* cancel timer */
|
||||
}
|
||||
sim_debug(DEBUG_CMD, &itm_dev,
|
||||
"Intv 0x%2x temp value %08x (%d)\n", cmd, temp, temp);
|
||||
itm_run = 0; /* stop timer running */
|
||||
itm_cnt = 0; /* no reload count value */
|
||||
itm_load = temp; /* current loaded value */
|
||||
itm_strt = 0; /* not restarted neg */
|
||||
return temp; /* return current count value */
|
||||
break;
|
||||
|
||||
case 0x6a: /* read value & load new one */
|
||||
case 0x68: /* read value & load new one */
|
||||
case 0x69: /* read value & load new one */
|
||||
/* get timer value and load new value, do not start timer */
|
||||
temp = itm_load; /* get last loaded value */
|
||||
if (itm_run) { /* if we were running save curr cnt */
|
||||
/* read timer value */
|
||||
temp = (uint32)(100.0*sim_activate_time_usecs(&itm_unit)/itm_tick_size_x_100);
|
||||
sim_debug(DEBUG_CMD, &itm_dev,
|
||||
"Intv 0x%2x read value %08x (%d)\n", cmd, temp, temp);
|
||||
if (itm_strt) { /* see if running neg */
|
||||
/* we only get here if timer ran out and no reload value */
|
||||
/* get simulated negative start time in counts */
|
||||
temp = temp - itm_strt; /* make into a negative number */
|
||||
}
|
||||
sim_cancel (&itm_unit); /* cancel timer */
|
||||
}
|
||||
sim_debug(DEBUG_CMD, &itm_dev,
|
||||
"Intv 0x%02x temp value %08x (%08d)\n", cmd, temp, temp);
|
||||
sim_debug(DEBUG_CMD, &itm_dev,
|
||||
"Intv 0x%02x init value %08x (%08d)\n", cmd, cnt, cnt);
|
||||
itm_src = (cmd>>1)&1; /* set src */
|
||||
itm_run = 0; /* stop timer running */
|
||||
itm_cnt = 0; /* no count reset value */
|
||||
itm_strt = 0; /* not restarted neg */
|
||||
itm_load = cnt; /* now loaded */
|
||||
return temp; /* return current count value */
|
||||
break;
|
||||
|
||||
case 0x7d: /* read the current timer value */
|
||||
case 0x78: /* read the current timer value */
|
||||
case 0x79: /* read the current timer value */
|
||||
case 0x7a: /* read the current timer value */
|
||||
case 0x7b: /* read the current timer value */
|
||||
case 0x7c: /* read the current timer value */
|
||||
case 0x7e: /* read the current timer value */
|
||||
case 0x7f: /* read the current timer value */
|
||||
/* get timer value, load new value and start timer */
|
||||
temp = itm_load; /* get last loaded value */
|
||||
if (itm_run) { /* if we were running save curr cnt */
|
||||
/* read timer value */
|
||||
temp = (uint32)(100.0*sim_activate_time_usecs(&itm_unit)/itm_tick_size_x_100);
|
||||
sim_debug(DEBUG_CMD, &itm_dev,
|
||||
"Intv 0x%2x read value %08x (%d)\n", cmd, temp, temp);
|
||||
if (itm_strt) { /* see if running neg */
|
||||
/* we only get here if timer ran out and no reload value */
|
||||
/* get simulated negative start time in counts */
|
||||
temp = temp - itm_strt; /* make into a negative number */
|
||||
}
|
||||
//extra sim_cancel (&itm_unit); /* cancel timer */
|
||||
}
|
||||
sim_debug(DEBUG_CMD, &itm_dev,
|
||||
"Intv 0x%02x temp value %08x (%08d)\n", cmd, temp, temp);
|
||||
sim_debug(DEBUG_CMD, &itm_dev,
|
||||
"Intv 0x%02x init value %08x (%08d)\n", cmd, cnt, cnt);
|
||||
sim_cancel (&itm_unit); /* cancel timer */
|
||||
/* start timer to fire after cnt ticks */
|
||||
itm_src = (cmd>>1)&1; /* set src */
|
||||
if (itm_src) /* use specified src freq */
|
||||
sim_activate_after_abs_d(&itm_unit, ((double)cnt*1000000)/rtc_tps);
|
||||
else
|
||||
sim_activate_after_abs_d(&itm_unit, ((double)cnt*itm_tick_size_x_100)/100.0);
|
||||
itm_cnt = 0; /* no count reset value */
|
||||
if (cmd & 0x04) /* reload on int? */
|
||||
itm_cnt = cnt; /* set reload count value */
|
||||
itm_run = 1; /* set timer running */
|
||||
itm_strt = 0; /* not restarted neg */
|
||||
itm_load = cnt; /* now loaded */
|
||||
return temp; /* return current count value */
|
||||
break;
|
||||
default:
|
||||
sim_debug(DEBUG_CMD, &itm_dev,
|
||||
"Intv unknown cmd %02x level %02x\n", cmd, level);
|
||||
break;
|
||||
}
|
||||
return 0; /* does not matter, no value returned */
|
||||
}
|
||||
|
||||
/* Clock interrupt start/stop */
|
||||
/* ss = 1 - clock interrupt enabled */
|
||||
/* ss = 0 - clock interrupt disabled */
|
||||
/* level = interrupt level */
|
||||
void itm_setup(uint32 ss, uint32 level)
|
||||
{
|
||||
itm_lvl = level; /* save the interrupt level */
|
||||
itm_load = 0; /* not loaded */
|
||||
itm_src = 0; /* use itm for freq */
|
||||
itm_strt = 0; /* not restarted neg */
|
||||
itm_run = 0; /* not running */
|
||||
itm_cnt = 0; /* no count reset value */
|
||||
sim_cancel (&itm_unit); /* not running yet */
|
||||
if (ss == 1) { /* starting? */
|
||||
INTS[level] |= INTS_ENAB; /* make sure enabled */
|
||||
SPAD[level+0x80] |= SINT_ENAB; /* in spad too */
|
||||
sim_debug(DEBUG_CMD, &itm_dev,
|
||||
"Intv Timer setup enable int %02x value %08x itm_pie %01x ss %01x\n",
|
||||
itm_lvl, itm_cnt, itm_pie, ss);
|
||||
} else {
|
||||
INTS[level] &= ~INTS_ENAB; /* make sure disabled */
|
||||
SPAD[level+0x80] &= ~SINT_ENAB; /* in spad too */
|
||||
sim_debug(DEBUG_CMD, &itm_dev,
|
||||
"Intv Timer setup disable int %02x value %08x itm_pie %01x ss %01x\n",
|
||||
itm_lvl, itm_cnt, itm_pie, ss);
|
||||
}
|
||||
itm_pie = ss; /* set new state */
|
||||
}
|
||||
|
||||
/* Clock reset */
|
||||
t_stat itm_reset (DEVICE *dptr)
|
||||
{
|
||||
itm_pie = 0; /* disable pulse */
|
||||
itm_run = 0; /* not running */
|
||||
itm_load = 0; /* not loaded */
|
||||
itm_src = 0; /* use itm for freq */
|
||||
itm_strt = 0; /* not restarted neg */
|
||||
itm_cnt = 0; /* no count reset value */
|
||||
sim_cancel (&itm_unit); /* not running yet */
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* Set frequency */
|
||||
t_stat itm_set_freq (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
|
||||
{
|
||||
if (cptr) /* if chars, bad */
|
||||
return SCPE_ARG; /* ARG error */
|
||||
if ((val != 3840) && (val != 7680))
|
||||
return SCPE_IERR; /* scope error */
|
||||
itm_tick_size_x_100 = val; /* set the new frequency */
|
||||
return SCPE_OK; /* we done */
|
||||
}
|
||||
|
||||
/* Show frequency */
|
||||
t_stat itm_show_freq (FILE *st, UNIT *uptr, int32 val, CONST void *desc)
|
||||
{
|
||||
/* print the current interval count setting */
|
||||
fprintf (st, "%0.2fus", (itm_tick_size_x_100 / 100.0));
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* sho help rtc */
|
||||
t_stat itm_help(FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, CONST char *cptr)
|
||||
{
|
||||
fprintf(st, "SEL 32 IOP/MFP interval timer at 0x7F04\r\n");
|
||||
fprintf(st, "Use:\r\n");
|
||||
fprintf(st, " sim> SET ITM [3840][7680]\r\n");
|
||||
fprintf(st, "to set interval timer clock rate in us x 100\r\n");
|
||||
fprint_set_help(st, dptr);
|
||||
fprint_show_help(st, dptr);
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* device description */
|
||||
const char *itm_desc(DEVICE *dptr)
|
||||
{
|
||||
return "SEL IOP/MFP Interval Timer @ address 0x7F04";
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
1333
SEL32/sel32_com.c
Normal file
1333
SEL32/sel32_com.c
Normal file
File diff suppressed because it is too large
Load diff
799
SEL32/sel32_con.c
Normal file
799
SEL32/sel32_con.c
Normal file
|
|
@ -0,0 +1,799 @@
|
|||
/* sel32_con.c: SEL 32 Class F IOP processor console.
|
||||
|
||||
Copyright (c) 2018-2022, James C. Bevier
|
||||
Portions provided by Richard Cornwell, Geert Rolf and other SIMH contributers
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
to deal in the Software without restriction, including without limitation
|
||||
the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
and/or sell copies of the Software, and to permit persons to whom the
|
||||
Software is furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in
|
||||
all copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
JAMES C. BEVIER BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
|
||||
This is the standard console interface. It is subchannel of the IOP 7e00.
|
||||
|
||||
These units each buffer one record in local memory and signal
|
||||
ready when the buffer is full or empty. The channel must be
|
||||
ready to recieve/transmit data when they are activated since
|
||||
they will transfer their block during chan_cmd. All data is
|
||||
transmitted as ASCII characters.
|
||||
*/
|
||||
|
||||
#include "sel32_defs.h"
|
||||
#include "sim_tmxr.h"
|
||||
|
||||
#if NUM_DEVS_CON > 0
|
||||
|
||||
#define UNIT_CON UNIT_IDLE | UNIT_DISABLE
|
||||
|
||||
#define CMD u3
|
||||
/* Held in u3 is the device command and status */
|
||||
#define CON_INCH 0x00 /* Initialize channel command */
|
||||
#define CON_INCH2 0xf0 /* Initialize channel command for processing */
|
||||
#define CON_WR 0x01 /* Write console */
|
||||
#define CON_RD 0x02 /* Read console */
|
||||
#define CON_NOP 0x03 /* No op command */
|
||||
#define CON_SNS 0x04 /* Sense command */
|
||||
#define CON_ECHO 0x0a /* Read with Echo */
|
||||
#define CON_RDBWD 0x0c /* Read backward */
|
||||
#define CON_CON 0x1f /* connect line */
|
||||
#define CON_DIS 0x23 /* disconnect line */
|
||||
#define CON_RWD 0x37 /* TOF and write line */
|
||||
|
||||
#define CON_MSK 0xff /* Command mask */
|
||||
|
||||
/* Status held in u3 */
|
||||
/* controller/unit address in upper 16 bits */
|
||||
#define CON_ATAT 0x4000 /* working on @@A input */
|
||||
#define CON_READ 0x2000 /* Read mode selected */
|
||||
#define CON_OUTPUT 0x1000 /* Output ready for unit */
|
||||
#define CON_EKO 0x0800 /* Echo input character */
|
||||
#define CON_REQ 0x0400 /* Request key pressed */
|
||||
#define CON_CR 0x0200 /* Output at beginning of line */
|
||||
#define CON_INPUT 0x0100 /* Input ready for unit */
|
||||
|
||||
/* Input buffer pointer held in u4 */
|
||||
|
||||
#define SNS u5
|
||||
/* in u5 packs sense byte 0,1 and 3 */
|
||||
/* Sense byte 0 */
|
||||
#define SNS_CMDREJ 0x80000000 /* Command reject */
|
||||
#define SNS_INTVENT 0x40000000 /* Unit intervention required */
|
||||
/* sense byte 3 */
|
||||
#define SNS_RDY 0x80 /* device ready */
|
||||
#define SNS_ONLN 0x40 /* device online */
|
||||
#define SNS_DSR 0x08 /* data set ready */
|
||||
#define SNS_DCD 0x04 /* data carrier detect */
|
||||
|
||||
/* std devices. data structures
|
||||
con_dev Console device descriptor
|
||||
con_unit Console unit descriptor
|
||||
con_reg Console register list
|
||||
con_mod Console modifiers list
|
||||
*/
|
||||
|
||||
struct _con_data
|
||||
{
|
||||
uint8 incnt; /* char count */
|
||||
uint8 ibuff[145]; /* Input line buffer */
|
||||
}
|
||||
con_data[NUM_UNITS_CON];
|
||||
|
||||
uint32 atbuf=0; /* attention buffer */
|
||||
uint32 outbusy = 0; /* output waiting on timeout */
|
||||
uint32 inbusy = 0; /* input waiting on timeout */
|
||||
|
||||
/* forward definitions */
|
||||
t_stat con_preio(UNIT *uptr, uint16 chan);
|
||||
t_stat con_startcmd(UNIT*, uint16, uint8);
|
||||
void con_ini(UNIT*, t_bool);
|
||||
t_stat con_srvi(UNIT*);
|
||||
t_stat con_srvo(UNIT*);
|
||||
t_stat con_haltio(UNIT *);
|
||||
t_stat con_rschnlio(UNIT *uptr); /* Reset Channel */
|
||||
t_stat con_poll(UNIT *);
|
||||
t_stat con_reset(DEVICE *);
|
||||
|
||||
/* channel program information */
|
||||
CHANP con_chp[NUM_UNITS_CON] = {0};
|
||||
|
||||
MTAB con_mod[] = {
|
||||
{MTAB_XTD | MTAB_VUN | MTAB_VALR, 0, "DEV", "DEV", &set_dev_addr, &show_dev_addr, NULL},
|
||||
{0}
|
||||
};
|
||||
|
||||
UNIT con_unit[] = {
|
||||
{UDATA(&con_srvi, UNIT_CON, 0), 0, UNIT_ADDR(0x7EFC)}, /* 0 Input */
|
||||
{UDATA(&con_srvo, UNIT_CON, 0), 0, UNIT_ADDR(0x7EFD)}, /* 1 Output */
|
||||
};
|
||||
|
||||
DIB con_dib = {
|
||||
con_preio, /* t_stat (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
|
||||
con_startcmd, /* t_stat (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
|
||||
con_haltio, /* t_stat (*halt_io)(UNIT *uptr) */ /* Halt I/O */
|
||||
NULL, /* t_stat (*stop_io)(UNIT *uptr) */ /* Stop I/O */
|
||||
NULL, /* t_stat (*test_io)(UNIT *uptr) */ /* Test I/O */
|
||||
NULL, /* t_stat (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
|
||||
con_rschnlio, /* t_stat (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
|
||||
NULL, /* t_stat (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
|
||||
con_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
|
||||
con_unit, /* UNIT* units */ /* Pointer to units structure */
|
||||
con_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
|
||||
NULL, /* IOCLQ *ioclq_ptr */ /* IOCL entries, 1 per UNIT */
|
||||
NUM_UNITS_CON, /* uint8 numunits */ /* number of units defined */
|
||||
0x03, /* uint8 mask */ /* 2 devices - device mask */
|
||||
0x7e00, /* uint16 chan_addr */ /* parent channel address */
|
||||
0, /* uint32 chan_fifo_in */ /* fifo input index */
|
||||
0, /* uint32 chan_fifo_out */ /* fifo output index */
|
||||
{0} /* uint32 chan_fifo[FIFO_SIZE] */ /* interrupt status fifo for channel */
|
||||
};
|
||||
|
||||
DEVICE con_dev = {
|
||||
"CON", con_unit, NULL, con_mod,
|
||||
NUM_UNITS_CON, 8, 15, 1, 8, 8,
|
||||
// NULL, NULL, &con_reset, NULL, &con_attach, &con_detach,
|
||||
NULL, NULL, &con_reset, NULL, NULL, NULL,
|
||||
&con_dib, DEV_DIS|DEV_DISABLE|DEV_DEBUG, 0, dev_debug
|
||||
};
|
||||
|
||||
/*
|
||||
* Console print routines.
|
||||
*/
|
||||
/* initialize the console chan/unit */
|
||||
void con_ini(UNIT *uptr, t_bool f) {
|
||||
int unit = (uptr - con_unit); /* unit 0 */
|
||||
|
||||
uptr->u4 = 0; /* no input count */
|
||||
con_data[unit].incnt = 0; /* no input data */
|
||||
uptr->CMD &= LMASK; /* leave only chsa */
|
||||
uptr->SNS = SNS_RDY|SNS_ONLN; /* status is online & ready */
|
||||
sim_cancel(uptr); /* stop input poll */
|
||||
if (unit == 0) {
|
||||
sim_activate(uptr, 1000); /* start input poll */
|
||||
}
|
||||
}
|
||||
|
||||
/* start a console operation */
|
||||
t_stat con_preio(UNIT *uptr, uint16 chan) {
|
||||
DEVICE *dptr = get_dev(uptr);
|
||||
int unit = (uptr - dptr->units);
|
||||
|
||||
if ((uptr->CMD & CON_MSK) != 0) { /* just return if busy */
|
||||
sim_debug(DEBUG_CMD, dptr, "con_preio unit=%02x BUSY\n", unit);
|
||||
return SNS_BSY;
|
||||
}
|
||||
|
||||
sim_debug(DEBUG_CMD, dptr, "con_preio unit=%02x OK\n", unit);
|
||||
return SCPE_OK; /* good to go */
|
||||
}
|
||||
|
||||
/* start an I/O operation */
|
||||
t_stat con_startcmd(UNIT *uptr, uint16 chan, uint8 cmd) {
|
||||
DEVICE *dptr = uptr->dptr;
|
||||
int unit = (uptr - con_unit); /* unit 0 is read, unit 1 is write */
|
||||
|
||||
if ((uptr->CMD & CON_MSK) != 0) { /* is unit busy */
|
||||
sim_debug(DEBUG_EXP, dptr,
|
||||
"con_startcmd unit %01x chan %02x cmd %02x BUSY cmd %02x uptr %p\n",
|
||||
unit, chan, cmd, uptr->CMD, uptr);
|
||||
return SNS_BSY; /* yes, return busy */
|
||||
}
|
||||
|
||||
sim_debug(DEBUG_DETAIL, dptr,
|
||||
"con_startcmd unit %01x chan %02x cmd %02x enter\n", unit, chan, cmd);
|
||||
|
||||
/* substitute CON_INCH2 for CON_INCH for pprocessing */
|
||||
if (cmd == CON_INCH)
|
||||
cmd = CON_INCH2; /* save INCH command as 0xf0 */
|
||||
|
||||
/* process the commands */
|
||||
switch (cmd & 0xFF) {
|
||||
case CON_ECHO: /* 0x0a */ /* Read command w/ECHO */
|
||||
uptr->CMD |= CON_EKO; /* save echo status */
|
||||
case CON_RD: /* 0x02 */ /* Read command */
|
||||
atbuf = 0; /* reset attention buffer */
|
||||
uptr->CMD |= CON_READ; /* show read mode */
|
||||
/* fall through */
|
||||
case CON_INCH2: /* 0xf0 */ /* INCH command */
|
||||
case CON_RWD: /* 0x37 */ /* TOF and write line */
|
||||
case CON_WR: /* 0x01 */ /* Write command */
|
||||
case CON_NOP: /* 0x03 */ /* NOP has do nothing */
|
||||
case CON_RDBWD: /* 0x0c */ /* Read Backward */
|
||||
uptr->SNS |= (SNS_RDY|SNS_ONLN); /* status is online & ready */
|
||||
case CON_CON: /* 0x1f */ /* Connect, return Data Set ready */
|
||||
case CON_DIS: /* 0x23 */ /* Disconnect has do nothing */
|
||||
case CON_SNS: /* 0x04 */ /* Sense */
|
||||
uptr->CMD &= ~CON_MSK; /* remove old CMD */
|
||||
uptr->CMD |= (cmd & CON_MSK); /* save command */
|
||||
if (unit == 0) {
|
||||
sim_cancel(uptr); /* stop input poll */
|
||||
sim_activate(uptr, 300); /* start us off */
|
||||
// sim_activate(uptr, 1000); /* start us off */
|
||||
}
|
||||
else
|
||||
/* using value 500 or larger causes diag to fail on 32/27 */
|
||||
// sim_activate(uptr, 500); /* start us off */
|
||||
// sim_activate(uptr, 200); /* start us off */
|
||||
sim_activate(uptr, 30); /* start us off */
|
||||
return SCPE_OK; /* no status change */
|
||||
break;
|
||||
|
||||
default: /* invalid command */
|
||||
break;
|
||||
}
|
||||
/* invalid command */
|
||||
uptr->SNS |= SNS_CMDREJ; /* command rejected */
|
||||
sim_debug(DEBUG_EXP, dptr,
|
||||
"con_startcmd %04x: Invalid command %02x Sense %02x\n",
|
||||
chan, cmd, uptr->SNS);
|
||||
return SNS_CHNEND|SNS_DEVEND|STATUS_PCHK;
|
||||
}
|
||||
|
||||
/* Handle output transfers for console */
|
||||
t_stat con_srvo(UNIT *uptr) {
|
||||
DEVICE *dptr = uptr->dptr;
|
||||
uint16 chsa = GET_UADDR(uptr->CMD);
|
||||
int unit = (uptr - con_unit); /* unit 0 is read, unit 1 is write */
|
||||
int cmd = uptr->CMD & CON_MSK;
|
||||
CHANP *chp = find_chanp_ptr(chsa); /* find the chanp pointer */
|
||||
int len = chp->ccw_count; /* INCH command count */
|
||||
uint32 mema = chp->ccw_addr; /* get inch or buffer addr */
|
||||
uint32 tstart;
|
||||
uint8 ch;
|
||||
static uint32 dexp;
|
||||
static int cnt = 0;
|
||||
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvo enter CMD %08x chsa %04x cmd %02x iocla %06x cnt %04x\n",
|
||||
uptr->CMD, chsa, cmd, chp->chan_caw, chp->ccw_count);
|
||||
|
||||
switch (cmd) {
|
||||
|
||||
/* if input tried from output device, error */
|
||||
case CON_RD: /* 0x02 */ /* Read command */
|
||||
case CON_ECHO: /* 0x0a */ /* Read command w/ECHO */
|
||||
case CON_RDBWD: /* 0x0c */ /* Read Backward */
|
||||
/* if input requested for output device, give error */
|
||||
uptr->SNS |= SNS_CMDREJ; /* command rejected */
|
||||
uptr->CMD &= LMASK; /* nothing left, command complete */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvo Read to output device CMD %08x chsa %04x cmd = %02x\n", uptr->CMD, chsa, cmd);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_UNITCHK); /* unit check */
|
||||
break;
|
||||
|
||||
case CON_CON: /* 0x1f */ /* Connect, return Data Set ready */
|
||||
uptr->SNS |= (SNS_DSR|SNS_DCD); /* Data set ready, Data Carrier detected */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvo CON CMD %08x chsa %04x cmd = %02x\n", uptr->CMD, chsa, cmd);
|
||||
uptr->CMD &= ~CON_MSK; /* remove old CMD */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
|
||||
break;
|
||||
|
||||
case CON_DIS: /* 0x23 */ /* Disconnect has do nothing */
|
||||
uptr->SNS &= ~(SNS_DSR|SNS_DCD); /* Data set not ready */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvo DIS CMD %08x chsa %04x cmd = %02x\n", uptr->CMD, chsa, cmd);
|
||||
uptr->CMD &= ~CON_MSK; /* remove old CMD */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
|
||||
break;
|
||||
|
||||
case CON_INCH2: /* 0xf0 */ /* INCH command */
|
||||
uptr->CMD &= LMASK; /* nothing left, command complete */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvo INCH unit %02x: CMD %08x cmd %02x incnt %02x u4 %02x\n",
|
||||
unit, uptr->CMD, cmd, con_data[unit].incnt, uptr->u4);
|
||||
|
||||
/* now call set_inch() function to write and test inch buffer addresses */
|
||||
/* 1-256 wd buffer is provided for 128 status dbl words */
|
||||
tstart = set_inch(uptr, mema, 128); /* new address & 128 entries */
|
||||
if ((tstart == SCPE_MEM) || (tstart == SCPE_ARG)) { /* any error */
|
||||
/* we have error, bail out */
|
||||
uptr->SNS |= SNS_CMDREJ;
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvo INCH Error unit %02x: CMD %08x cmd %02x incnt %02x u4 %02x\n",
|
||||
unit, uptr->CMD, cmd, con_data[unit].incnt, uptr->u4);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
break;
|
||||
}
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvo INCH CMD %08x chsa %04x len %02x inch %06x\n", uptr->CMD, chsa, len, mema);
|
||||
/* WARNING, if SNS_DEVEND is not set, diags fail by looping in CON diag */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
|
||||
break;
|
||||
|
||||
case CON_NOP: /* 0x03 */ /* NOP has do nothing */
|
||||
uptr->CMD &= ~CON_MSK; /* remove old CMD */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvo NOP CMD %08x chsa %04x cmd = %02x\n", uptr->CMD, chsa, cmd);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
|
||||
break;
|
||||
|
||||
case CON_SNS: /* 0x04 */ /* Sense */
|
||||
/* value 4 is Data Set Ready */
|
||||
/* value 5 is Data carrier detected n/u */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvo cmd %04x: Cmd Sense %02x\n", chsa, uptr->SNS);
|
||||
/* value 4 is Data Set Ready */
|
||||
/* value 5 is Data carrier detected n/u */
|
||||
ch = uptr->SNS & 0xff; /* Sense byte 3 */
|
||||
if (chan_write_byte(chsa, &ch)) { /* write byte to memory */
|
||||
/* write error */
|
||||
cmd = 0; /* no cmd now */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvo write error unit %02x: CMD %08x read %02x u4 %02x ccw_count %02x\n",
|
||||
unit, uptr->CMD, ch, uptr->u4, chp->ccw_count);
|
||||
uptr->CMD &= LMASK; /* nothing left, command complete */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we done */
|
||||
break;
|
||||
}
|
||||
uptr->CMD &= LMASK; /* nothing left, command complete */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* good return */
|
||||
break;
|
||||
|
||||
case CON_RWD: /* 0x37 */ /* TOF and write line */
|
||||
case CON_WR: /* 0x01 */ /* Write command */
|
||||
#ifdef DO_OLDWAY
|
||||
/* see if write complete */
|
||||
if (uptr->CMD & CON_OUTPUT) {
|
||||
/* write is complete, post status */
|
||||
sim_debug(DEBUG_CMD, &con_dev,
|
||||
"con_srvo write CMD %08x chsa %04x cmd %02x complete\n",
|
||||
uptr->CMD, chsa, cmd);
|
||||
uptr->CMD &= ~CON_MSK; /* remove old CMD */
|
||||
uptr->CMD &= ~CON_OUTPUT; /* remove output command */
|
||||
/*RTC*/ outbusy = 0; /* output done */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* done */
|
||||
break;
|
||||
}
|
||||
/*RTC*/ outbusy = 1; /* tell clock output waiting */
|
||||
if (chan_read_byte(chsa, &ch) == SCPE_OK) { /* get byte from memory */
|
||||
/* Write to device */
|
||||
ch &= 0x7f; /* make 7 bit w/o parity */
|
||||
dexp = dexp<<8; /* move up last chars */
|
||||
dexp |= ch; /* insert new char */
|
||||
#ifdef DO_DYNAMIC_DEBUG
|
||||
// if ((cnt == 3) && (dexp == 0x4458503e)) { /* test for "DXP>" */
|
||||
if ((cnt == 13) && (dexp == 0x4E542E48)) { /* test for "NT.H" */
|
||||
cpu_dev.dctrl |= (DEBUG_INST|DEBUG_TRAP|DEBUG_IRQ); /* start instruction trace */
|
||||
con_dev.dctrl |= DEBUG_XIO|DEBUG_CMD;
|
||||
// sim_debug(DEBUG_INST, &cpu_dev, "|con_srvo DXP> received|\n");
|
||||
sim_debug(DEBUG_INST, &cpu_dev, "con_srvo CV.INT.H received start debug\n");
|
||||
}
|
||||
if ((cnt == 13) && (dexp == 0x52502E48)) { /* test for "RP.H" */
|
||||
/* turn of debug trace because we are already hung */
|
||||
sim_debug(DEBUG_INST, &cpu_dev, "con_srvo got CV.TRP.H stopping debug\n");
|
||||
cpu_dev.dctrl &= ~(DEBUG_INST|DEBUG_TRAP|DEBUG_IRQ); /* start instruction trace */
|
||||
con_dev.dctrl &= ~(DEBUG_XIO|DEBUG_CMD);
|
||||
}
|
||||
#endif
|
||||
sim_putchar(ch); /* output next char to device */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvo write wait %03x CMD %08x chsa %04x cmd %02x byte %d = %02x\n",
|
||||
1000, uptr->CMD, chsa, cmd, cnt, ch);
|
||||
cnt++; /* count chars output */
|
||||
//01132022 sim_activate(uptr, 500); /* wait for a while before next write */
|
||||
sim_activate(uptr, 50); /* wait for a while before next write */
|
||||
break;
|
||||
}
|
||||
/* nothing left, finish up */
|
||||
cnt = 0; /* zero for next output */
|
||||
uptr->CMD |= CON_OUTPUT; /* output command complete */
|
||||
sim_debug(DEBUG_CMD, &con_dev,
|
||||
"con_srvo write wait %03x CMD %08x chsa %04x cmd %02x to complete\n",
|
||||
1000, uptr->CMD, chsa, cmd);
|
||||
sim_activate(uptr, 500); /* wait for a while */
|
||||
break;
|
||||
#else
|
||||
cnt = 0; /* zero count */
|
||||
/*RTC*/ outbusy = 1; /* tell clock output waiting */
|
||||
mema = chp->ccw_addr; /* get buffer addr */
|
||||
/* Write to device */
|
||||
while (chan_read_byte(chsa, &ch) == SCPE_OK) { /* get byte from memory */
|
||||
/* HACK HACK HACK */
|
||||
ch &= 0x7f; /* make 7 bit w/o parity */
|
||||
dexp = dexp<<8; /* move up last chars */
|
||||
dexp |= ch; /* insert new char */
|
||||
#ifdef DO_DYNAMIC_DEBUG
|
||||
// if ((cnt == 3) && (dexp == 0x4458503e)) { /* test for "DXP>" */
|
||||
if ((cnt == 3) && (dexp == 0x44454641)) { /* test for "DEFA" */
|
||||
// cpu_dev.dctrl |= (DEBUG_INST|DEBUG_IRQ); /* start instruction trace */
|
||||
cpu_dev.dctrl |= (DEBUG_INST|DEBUG_TRAP|DEBUG_IRQ); /* start instruction trace */
|
||||
// con_dev.dctrl |= DEBUG_CMD;
|
||||
// sim_debug(DEBUG_INST, &cpu_dev, "|con_srvo DXP> received|\n");
|
||||
sim_debug(DEBUG_INST, &cpu_dev, "|con_srvo DEFA received|\n");
|
||||
}
|
||||
#endif
|
||||
sim_putchar(ch); /* output next char to device */
|
||||
if (isprint(ch))
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvo write addr %06x chsa %04x cmd %02x byte %d = %02x [%c]\n",
|
||||
mema, chsa, cmd, cnt, ch, ch);
|
||||
else
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvo write addr %06x chsa %04x cmd %02x byte %d = %02x\n",
|
||||
mema, chsa, cmd, cnt, ch);
|
||||
mema = chp->ccw_addr; /* get next buffer addr */
|
||||
cnt++; /* count chars output */
|
||||
}
|
||||
/* write is complete, post status */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvo write CMD %08x chsa %04x cmd %02x complete\n",
|
||||
uptr->CMD, chsa, cmd);
|
||||
uptr->CMD &= LMASK; /* nothing left, command complete */
|
||||
/*RTC*/ outbusy = 0; /* output done */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* done */
|
||||
break;
|
||||
#endif
|
||||
}
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* Handle input transfers for console */
|
||||
t_stat con_srvi(UNIT *uptr) {
|
||||
DEVICE *dptr = uptr->dptr;
|
||||
uint16 chsa = GET_UADDR(uptr->CMD);
|
||||
int unit = (uptr - con_unit); /* unit 0 is read, unit 1 is write */
|
||||
int cmd = uptr->CMD & CON_MSK;
|
||||
CHANP *chp = find_chanp_ptr(chsa); /* find the chanp pointer */
|
||||
int len = chp->ccw_count; /* INCH command count */
|
||||
uint32 mema = chp->ccw_addr; /* get inch or buffer addr */
|
||||
uint32 tstart;
|
||||
uint8 ch;
|
||||
t_stat r;
|
||||
int32 wait_time=10000;
|
||||
|
||||
switch (cmd) {
|
||||
|
||||
/* if output tried to input device, error */
|
||||
case CON_RWD: /* 0x37 */ /* TOF and write line */
|
||||
case CON_WR: /* 0x01 */ /* Write command */
|
||||
/* if input requested for output device, give error */
|
||||
uptr->SNS |= SNS_CMDREJ; /* command rejected */
|
||||
uptr->CMD &= LMASK; /* nothing left, command complete */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvi Write to input device CMD %08x chsa %04x cmd = %02x\n", uptr->CMD, chsa, cmd);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_UNITCHK); /* unit check */
|
||||
break;
|
||||
|
||||
case CON_INCH2: /* 0xf0 */ /* INCH command */
|
||||
uptr->CMD &= LMASK; /* nothing left, command complete */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvi INCH unit %02x: CMD %08x cmd %02x incnt %02x u4 %02x inch %06x\n",
|
||||
unit, uptr->CMD, cmd, con_data[unit].incnt, uptr->u4, mema);
|
||||
|
||||
/* now call set_inch() function to write and test inch buffer addresses */
|
||||
tstart = set_inch(uptr, mema, 128); /* new address & 128 entries */
|
||||
if ((tstart == SCPE_MEM) || (tstart == SCPE_ARG)) { /* any error */
|
||||
/* we have error, bail out */
|
||||
uptr->SNS |= SNS_CMDREJ;
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvi INCH Error unit %02x: CMD %08x cmd %02x incnt %02x u4 %02x\n",
|
||||
unit, uptr->CMD, cmd, con_data[unit].incnt, uptr->u4);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
break;
|
||||
}
|
||||
con_data[unit].incnt = 0; /* buffer empty */
|
||||
uptr->u4 = 0; /* no I/O yet */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvi INCH CMD %08x chsa %04x len %02x inch %06x\n", uptr->CMD, chsa, len, mema);
|
||||
/* WARNING, if SNS_DEVEND is not set, diags fail by looping in CON diag */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
|
||||
/* drop through to poll input */
|
||||
break;
|
||||
|
||||
case CON_NOP: /* 0x03 */ /* NOP has do nothing */
|
||||
uptr->CMD &= ~CON_MSK; /* remove old CMD */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvi NOP CMD %08x chsa %04x cmd = %02x\n", uptr->CMD, chsa, cmd);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
|
||||
/* drop through to poll input */
|
||||
break;
|
||||
|
||||
case CON_CON: /* 0x1f */ /* Connect, return Data Set ready */
|
||||
uptr->SNS |= (SNS_DSR|SNS_DCD); /* Data set ready, Data Carrier detected */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvi CON CMD %08x chsa %04x cmd = %02x\n", uptr->CMD, chsa, cmd);
|
||||
uptr->CMD &= ~CON_MSK; /* remove old CMD */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
|
||||
break;
|
||||
|
||||
case CON_DIS: /* 0x23 */ /* Disconnect has do nothing */
|
||||
uptr->SNS &= ~(SNS_DSR|SNS_DCD); /* Data set not ready */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvi DIS CMD %08x chsa %04x cmd = %02x\n", uptr->CMD, chsa, cmd);
|
||||
uptr->CMD &= ~CON_MSK; /* remove old CMD */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
|
||||
break;
|
||||
|
||||
case CON_SNS: /* 0x04 */ /* Sense */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvi cmd %04x: Cmd Sense %02x\n", chsa, uptr->SNS);
|
||||
/* value 4 is Data Set Ready */
|
||||
/* value 5 is Data carrier detected n/u */
|
||||
ch = uptr->SNS & 0xff; /* Sense byte 3 */
|
||||
if (chan_write_byte(chsa, &ch)) { /* write byte to memory */
|
||||
/* write error */
|
||||
cmd = 0; /* no cmd now */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvi write error unit %02x: CMD %08x read %02x u4 %02x ccw_count %02x\n",
|
||||
unit, uptr->CMD, ch, uptr->u4, chp->ccw_count);
|
||||
uptr->CMD &= LMASK; /* nothing left, command complete */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we done */
|
||||
break;
|
||||
}
|
||||
uptr->CMD &= LMASK; /* nothing left, command complete */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we done */
|
||||
break;
|
||||
|
||||
case CON_ECHO: /* 0x0a */ /* read from device w/ECHO */
|
||||
uptr->CMD |= CON_EKO; /* save echo status */
|
||||
case CON_RD: /* 0x02 */ /* read from device */
|
||||
case CON_RDBWD: /* 0x0c */ /* Read Backward */
|
||||
|
||||
if ((uptr->u4 != con_data[unit].incnt) || /* input empty */
|
||||
(uptr->CMD & CON_INPUT)) { /* input waiting? */
|
||||
ch = con_data[unit].ibuff[uptr->u4]; /* get char from read buffer */
|
||||
if (isprint(ch))
|
||||
sim_debug(DEBUG_IRQ, dptr,
|
||||
"con_srvi readbuf unit %02x: CMD %08x read %02x [%c] incnt %02x u4 %02x len %02x\n",
|
||||
unit, uptr->CMD, ch, ch, con_data[unit].incnt, uptr->u4, chp->ccw_count);
|
||||
else
|
||||
sim_debug(DEBUG_IRQ, dptr,
|
||||
"con_srvi readbuf unit %02x: CMD %08x read %02x incnt %02x u4 %02x len %02x\n",
|
||||
unit, uptr->CMD, ch, con_data[unit].incnt, uptr->u4, chp->ccw_count);
|
||||
#ifdef DO_DYNAMIC_DEBUG
|
||||
/* turn on instruction trace */
|
||||
cpu_dev.dctrl |= DEBUG_INST; /* start instruction trace */
|
||||
#endif
|
||||
|
||||
/* process any characters */
|
||||
if (uptr->u4 != con_data[unit].incnt) { /* input available */
|
||||
ch = con_data[unit].ibuff[uptr->u4]; /* get char from read buffer */
|
||||
/* this fixes mpx1x time entry on startup */
|
||||
if (uptr->CMD & CON_EKO) /* ECHO requested */
|
||||
sim_putchar(ch); /* ECHO the char */
|
||||
if (chan_write_byte(chsa, &ch)) { /* write byte to memory */
|
||||
/* write error */
|
||||
cmd = 0; /* no cmd now */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvi write error unit %02x: CMD %08x read %02x u4 %02x ccw_count %02x\n",
|
||||
unit, uptr->CMD, ch, uptr->u4, chp->ccw_count);
|
||||
uptr->CMD &= ~CON_MSK; /* remove old CMD */
|
||||
uptr->CMD &= ~CON_INPUT; /* input waiting? */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we done */
|
||||
break;
|
||||
}
|
||||
/* character accepted, bump buffer pointer */
|
||||
uptr->u4++; /* next char position */
|
||||
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvi write to mem unit %02x: CMD %08x read %02x u4 %02x incnt %02x\n",
|
||||
unit, uptr->CMD, ch, uptr->u4, con_data[unit].incnt);
|
||||
|
||||
/* see if at end of buffer */
|
||||
if (uptr->u4 >= (int32)sizeof(con_data[unit].ibuff))
|
||||
uptr->u4 = 0; /* reset pointer */
|
||||
|
||||
/* user want more data? */
|
||||
if ((test_write_byte_end(chsa)) == 0) {
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvi need more unit %02x CMD %08x u4 %02x ccw_count %02x incnt %02x\n",
|
||||
unit, uptr->CMD, uptr->u4, chp->ccw_count, con_data[unit].incnt);
|
||||
/* user wants more, look next time */
|
||||
if (uptr->u4 == con_data[unit].incnt) { /* input empty */
|
||||
uptr->CMD &= ~CON_INPUT; /* no input available */
|
||||
}
|
||||
// wait_time = 200; /* process next time */
|
||||
// wait_time = 400; /* process next time */
|
||||
wait_time = 800; /* process next time */
|
||||
break;
|
||||
}
|
||||
/* command is completed */
|
||||
if (isprint(ch))
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvi read done unit %02x CMD %08x read %02x [%c] u4 %02x ccw_count %02x incnt %02x\n",
|
||||
unit, uptr->CMD, ch, ch, uptr->u4, chp->ccw_count, con_data[unit].incnt);
|
||||
else
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvi read done unit %02x CMD %08x read %02x u4 %02x ccw_count %02x incnt %02x\n",
|
||||
unit, uptr->CMD, ch, uptr->u4, chp->ccw_count, con_data[unit].incnt);
|
||||
#ifdef DO_DYNAMIC_DEBUG
|
||||
/* turn on instruction trace */
|
||||
cpu_dev.dctrl |= DEBUG_INST; /* start instruction trace */
|
||||
#endif
|
||||
cmd = 0; /* no cmd now */
|
||||
uptr->CMD &= LMASK; /* nothing left, command complete */
|
||||
if (uptr->u4 != con_data[unit].incnt) { /* input empty */
|
||||
uptr->CMD |= CON_INPUT; /* input still available */
|
||||
}
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we done */
|
||||
break;
|
||||
}
|
||||
break;
|
||||
}
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
/* check for next input if reading or @@A sequence */
|
||||
r = sim_poll_kbd(); /* poll for a char */
|
||||
if (r & SCPE_KFLAG) { /* got a char */
|
||||
ch = r & 0xff; /* drop any extra bits */
|
||||
if ((uptr->CMD & CON_READ)) { /* looking for input? */
|
||||
atbuf = 0; /* reset attention buffer */
|
||||
uptr->CMD &= ~CON_ATAT; /* no @@A input */
|
||||
if (ch == '@') { /* maybe for console int */
|
||||
atbuf = (ch)<<8; /* start anew */
|
||||
uptr->CMD |= CON_ATAT; /* show getting @ */
|
||||
}
|
||||
#ifndef TEST4MPX
|
||||
if (ch == '\n') /* convert newline */
|
||||
ch = '\r'; /* make newline into carriage return */
|
||||
#endif
|
||||
if (isprint(ch))
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvi handle readch unit %02x: CMD %08x read %02x [%c] u4 %02x incnt %02x r %x\n",
|
||||
unit, uptr->CMD, ch, ch, uptr->u4, con_data[unit].incnt, r);
|
||||
else
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvi handle readch unit %02x: CMD %08x read %02x u4 %02x incnt %02x r %x\n",
|
||||
unit, uptr->CMD, ch, uptr->u4, con_data[unit].incnt, r);
|
||||
#ifdef DO_DYNAMIC_DEBUG
|
||||
/* turn on instruction trace */
|
||||
cpu_dev.dctrl |= DEBUG_INST; /* start instruction trace */
|
||||
#endif
|
||||
|
||||
/* put char in buffer */
|
||||
con_data[unit].ibuff[con_data[unit].incnt++] = ch;
|
||||
|
||||
/* see if count at max, if so reset to start */
|
||||
if (con_data[unit].incnt >= sizeof(con_data[unit].ibuff))
|
||||
con_data[unit].incnt = 0; /* reset buffer cnt */
|
||||
|
||||
uptr->CMD |= CON_INPUT; /* we have a char available */
|
||||
if (isprint(ch))
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvi readch unit %02x: CMD %08x read %02x [%c] u4 %02x incnt %02x\n",
|
||||
unit, uptr->CMD, ch, ch, uptr->u4, con_data[unit].incnt);
|
||||
else
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvi readch unit %02x: CMD %08x read %02x u4 %02x incnt %02x\n",
|
||||
unit, uptr->CMD, ch, uptr->u4, con_data[unit].incnt);
|
||||
sim_activate(uptr, 30); /* do this again */
|
||||
//01172021 sim_activate(uptr, 400); /* do this again */
|
||||
// sim_activate(uptr, 800); /* do this again */
|
||||
return SCPE_OK;
|
||||
}
|
||||
/* not looking for input, look for attn or wakeup */
|
||||
if (ch == '?') {
|
||||
/* set ring bit? */
|
||||
set_devwake(chsa, SNS_ATTN|SNS_DEVEND|SNS_CHNEND); /* tell user */
|
||||
}
|
||||
/* not wanting input, but we have a char, look for @@A */
|
||||
if (uptr->CMD & CON_ATAT) { /* looking for @@A */
|
||||
/* we have at least one @, look for another */
|
||||
if (ch == '@' || ch == 'A' || ch == 'a') {
|
||||
uint8 cc = ch;
|
||||
if (cc == 'a')
|
||||
cc = 'A'; /* make uppercase */
|
||||
sim_putchar(ch); /* ECHO the char */
|
||||
atbuf = (atbuf|cc)<<8; /* merge new char */
|
||||
if (atbuf == 0x40404100) {
|
||||
attention_trap = CONSOLEATN_TRAP; /* console attn (0xb4) */
|
||||
atbuf = 0; /* reset attention buffer */
|
||||
uptr->CMD &= ~CON_ATAT; /* no @@A input */
|
||||
sim_putchar('\r'); /* return char */
|
||||
sim_putchar('\n'); /* line feed char */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvi unit %02x: CMD %08x read @@A Console Trap\n", unit, uptr->CMD);
|
||||
uptr->u4 = 0; /* no input count */
|
||||
con_data[unit].incnt = 0; /* no input data */
|
||||
}
|
||||
// sim_activate(uptr, wait_time); /* do this again */
|
||||
sim_activate(uptr, 400); /* do this again */
|
||||
// sim_activate(uptr, 4000); /* do this again */
|
||||
return SCPE_OK;
|
||||
}
|
||||
/* char not for us, so keep looking */
|
||||
atbuf = 0; /* reset attention buffer */
|
||||
uptr->CMD &= ~CON_ATAT; /* no @@A input */
|
||||
}
|
||||
/* not looking for input, look for attn or wakeup */
|
||||
if (ch == '@') {
|
||||
atbuf = (atbuf|ch)<<8; /* merge in char */
|
||||
uptr->CMD |= CON_ATAT; /* show getting @ */
|
||||
sim_putchar(ch); /* ECHO the char */
|
||||
}
|
||||
/* assume it is for next read request, so save it */
|
||||
/* see if count at max, if so reset to start */
|
||||
if (con_data[unit].incnt >= sizeof(con_data[unit].ibuff))
|
||||
con_data[unit].incnt = 0; /* reset buffer cnt */
|
||||
|
||||
/* put char in buffer */
|
||||
con_data[unit].ibuff[con_data[unit].incnt++] = ch;
|
||||
|
||||
uptr->CMD |= CON_INPUT; /* we have a char available */
|
||||
if (isprint(ch))
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvi readch2 unit %02x: CMD %08x read %02x [%c] u4 %02x incnt %02x r %x\n",
|
||||
unit, uptr->CMD, ch, ch, uptr->u4, con_data[unit].incnt, r);
|
||||
else
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"con_srvi readch2 unit %02x: CMD %08x read %02x u4 %02x incnt %02x r %x\n",
|
||||
unit, uptr->CMD, ch, uptr->u4, con_data[unit].incnt, r);
|
||||
#ifdef DO_DYNAMIC_DEBUG
|
||||
/* turn off debug trace because we are already hung */
|
||||
sim_debug(DEBUG_INST, &cpu_dev, "con_srvi readch3 stopping debug\n");
|
||||
cpu_dev.dctrl &= ~(DEBUG_INST|DEBUG_TRAP|DEBUG_IRQ); /* start instruction trace */
|
||||
con_dev.dctrl &= ~(DEBUG_XIO|DEBUG_CMD);
|
||||
#endif
|
||||
}
|
||||
sim_activate(uptr, wait_time); /* do this again */
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
t_stat con_reset(DEVICE *dptr) {
|
||||
tmxr_set_console_units (&con_unit[0], &con_unit[1]);
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* Handle rschnlio cmds for console */
|
||||
t_stat con_rschnlio(UNIT *uptr) {
|
||||
uint16 chsa = GET_UADDR(uptr->CMD);
|
||||
int cmd = uptr->CMD & CON_MSK;
|
||||
con_ini(uptr, 0); /* reset the unit */
|
||||
sim_debug(DEBUG_EXP, &con_dev, "con_rschnl chsa %04x cmd = %02x\n", chsa, cmd);
|
||||
// cpu_dev.dctrl |= (DEBUG_INST|DEBUG_TRAP|DEBUG_IRQ); /* start instruction trace */
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* Handle haltio transfers for console */
|
||||
t_stat con_haltio(UNIT *uptr) {
|
||||
uint16 chsa = GET_UADDR(uptr->CMD);
|
||||
int cmd = uptr->CMD & CON_MSK;
|
||||
int unit = (uptr - con_unit); /* unit # 0 is read, 1 is write */
|
||||
CHANP *chp = find_chanp_ptr(chsa); /* find the chanp pointer */
|
||||
|
||||
sim_debug(DEBUG_EXP, &con_dev,
|
||||
"con_haltio enter chsa %04x cmd = %02x\n", chsa, cmd);
|
||||
|
||||
/* terminate any input command */
|
||||
/* UTX wants SLI bit, but no unit exception */
|
||||
/* status must not have an error bit set */
|
||||
/* otherwise, UTX will panic with "bad status" */
|
||||
if ((uptr->CMD & CON_MSK) != 0) { /* is unit busy */
|
||||
sim_debug(DEBUG_CMD, &con_dev,
|
||||
"con_haltio HIO chsa %04x cmd = %02x ccw_count %02x\n",
|
||||
chsa, cmd, chp->ccw_count);
|
||||
sim_cancel(uptr); /* stop timer */
|
||||
/* stop any I/O and post status and return error status */
|
||||
chp->ccw_count = 0; /* zero the count */
|
||||
chp->ccw_flags &= ~(FLAG_DC|FLAG_CC); /* reset chaining bits */
|
||||
uptr->CMD &= LMASK; /* make non-busy */
|
||||
uptr->u4 = 0; /* no I/O yet */
|
||||
con_data[unit].incnt = 0; /* no input data */
|
||||
uptr->SNS = SNS_RDY|SNS_ONLN; /* status is online & ready */
|
||||
sim_debug(DEBUG_CMD, &con_dev,
|
||||
"con_haltio HIO I/O stop chsa %04x cmd = %02x\n", chsa, cmd);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* force end */
|
||||
return CC2BIT | SCPE_IOERR; /* tell chan code to post status */
|
||||
}
|
||||
uptr->CMD &= LMASK; /* make non-busy */
|
||||
uptr->SNS = SNS_RDY|SNS_ONLN; /* status is online & ready */
|
||||
sim_debug(DEBUG_CMD, &con_dev,
|
||||
"con_haltio HIO not busy chsa %04x cmd = %02x ccw_count %02x\n",
|
||||
chsa, cmd, chp->ccw_count);
|
||||
return CC1BIT | SCPE_OK; /* not busy */
|
||||
}
|
||||
#endif
|
||||
|
||||
7636
SEL32/sel32_cpu.c
Normal file
7636
SEL32/sel32_cpu.c
Normal file
File diff suppressed because it is too large
Load diff
535
SEL32/sel32_defs.h
Normal file
535
SEL32/sel32_defs.h
Normal file
|
|
@ -0,0 +1,535 @@
|
|||
/* sel32_defs.h: SEL-32 Concept/32 simulator definitions
|
||||
|
||||
Copyright (c) 2018-2022, James C. Bevier
|
||||
Portions provided by Richard Cornwell, Geert Rolf and other SIMH contributers
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
to deal in the Software without restriction, including without limitation
|
||||
the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
and/or sell copies of the Software, and to permit persons to whom the
|
||||
Software is furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in
|
||||
all copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
JAMES C. BEVIER BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
|
||||
*/
|
||||
|
||||
#include "sim_defs.h" /* simh simulator defns */
|
||||
|
||||
/* Simulator stop codes */
|
||||
#define STOP_IONRDY 1 /* I/O dev not ready */
|
||||
#define STOP_HALT 2 /* HALT */
|
||||
#define STOP_IBKPT 3 /* breakpoint */
|
||||
#define STOP_UUO 4 /* invalid opcode */
|
||||
#define STOP_INVINS 5 /* invalid instr */
|
||||
#define STOP_INVIOP 6 /* invalid I/O op */
|
||||
#define STOP_INDLIM 7 /* indirect limit */
|
||||
#define STOP_XECLIM 8 /* XEC limit */
|
||||
#define STOP_IOCHECK 9 /* IOCHECK */
|
||||
#define STOP_MMTRP 10 /* mm in trap */
|
||||
#define STOP_TRPINS 11 /* trap inst not BRM */
|
||||
#define STOP_RTCINS 12 /* rtc inst not MIN/SKR */
|
||||
#define STOP_ILLVEC 13 /* zero vector */
|
||||
#define STOP_CCT 14 /* runaway CCT */
|
||||
|
||||
/* I/O equates */
|
||||
/* Channel sense bytes set by device */
|
||||
#define SNS_BSY 0x80 /* Unit Busy */
|
||||
#define SNS_SMS 0x40 /* Status modified */
|
||||
#define SNS_CTLEND 0x20 /* Control unit end */
|
||||
#define SNS_ATTN 0x10 /* Unit attention */
|
||||
#define SNS_CHNEND 0x08 /* Channel end */
|
||||
#define SNS_DEVEND 0x04 /* Device end */
|
||||
#define SNS_UNITCHK 0x02 /* Unit check */
|
||||
#define SNS_UNITEXP 0x01 /* Unit exception */
|
||||
|
||||
/* Command masks */
|
||||
#define CCMDMSK 0xff000000 /* Mask for command */
|
||||
#define CMD_CHAN 0x00 /* Channel control */
|
||||
#define CMD_SENSE 0x04 /* Sense channel command */
|
||||
#define CMD_TIC 0x08 /* Transfer in channel */
|
||||
#define CMD_RDBWD 0x0c /* Read backward */
|
||||
/* operation types */
|
||||
#define CMD_TYPE 0x03 /* Type mask */
|
||||
#define CMD_WRITE 0x01 /* Write command */
|
||||
#define CMD_READ 0x02 /* Read command */
|
||||
#define CMD_CTL 0x03 /* Control command */
|
||||
|
||||
/* IOCD word 2 status bits */
|
||||
#define STATUS_ECHO 0x8000 /* Halt I/O and Stop I/O function */
|
||||
#define STATUS_PCI 0x4000 /* Program controlled interrupt */
|
||||
#define STATUS_LENGTH 0x2000 /* Incorrect length */
|
||||
#define STATUS_PCHK 0x1000 /* Channel program check */
|
||||
#define STATUS_CDATA 0x0800 /* Channel data check */
|
||||
#define STATUS_CCNTL 0x0400 /* Channel control check */
|
||||
#define STATUS_INTER 0x0200 /* Channel interface check */
|
||||
#define STATUS_CHAIN 0x0100 /* Channel chain check */
|
||||
#define STATUS_BUSY 0x0080 /* Device busy */
|
||||
#define STATUS_MOD 0x0040 /* Status modified */
|
||||
#define STATUS_CTLEND 0x0020 /* Controller end */
|
||||
#define STATUS_ATTN 0x0010 /* Device raised attention */
|
||||
#define STATUS_CEND 0x0008 /* Channel end */
|
||||
#define STATUS_DEND 0x0004 /* Device end */
|
||||
#define STATUS_CHECK 0x0002 /* Unit check */
|
||||
#define STATUS_EXPT 0x0001 /* Unit exception */
|
||||
#define STATUS_ERROR 0x3f03 /* bad errors */
|
||||
//#define STATUS_ERROR (STATUS_LENGTH|STATUS_PCHK|STATUS_CDATA|STATUS_CCNTL|
|
||||
// STATUS_INTER|STATUS_CHAIN|STATUS_CHECK|STATUS_EXPT)
|
||||
|
||||
/* Class F channel bits */
|
||||
/* bit 32 - 37 of IOCD word 2 (0-5) */
|
||||
/* ccw_flags bit assignment */
|
||||
#define FLAG_DC 0x8000 /* Data chain */
|
||||
#define FLAG_CC 0x4000 /* Chain command */
|
||||
#define FLAG_SLI 0x2000 /* Suppress length indicator */
|
||||
#define FLAG_SKIP 0x1000 /* Suppress memory write */
|
||||
#define FLAG_PCI 0x0800 /* Program controlled interrupt */
|
||||
#define FLAG_RTO 0x0400 /* Real-Time Option */
|
||||
|
||||
/* chan_byte bit assignments */
|
||||
#define BUFF_EMPTY 0x00 /* Buffer is empty */
|
||||
#define BUFF_BUSY 0x04 /* Channel program busy & empty */
|
||||
#define BUFF_NEXT 0x0C /* 0x08|0x04 Continue Channel with next IOCB */
|
||||
#define BUFF_CHNEND 0x14 /* 0x10|0x04 Channel end */
|
||||
#define BUFF_DONE 0x20 /* 0x20 Channel ready for new command */
|
||||
#define BUFF_POST 0x24 /* 0x20|0x04 Waiting for status to be posted */
|
||||
|
||||
/* chan_info bit flags */
|
||||
#define INFO_SIOCD 0x01 /* Initial IOCD from SIO if set */
|
||||
#define INFO_CEND 0x02 /* Channel End (chan_end) called if set */
|
||||
/* bits 0-5 unused */
|
||||
|
||||
#define MAX_CHAN 128 /* max channels that can be defined */
|
||||
#define SUB_CHANS 256 /* max sub channels that can be defined */
|
||||
#define MAX_DEV (MAX_CHAN * SUB_CHANS) /* max possible */
|
||||
|
||||
/* simulator devices configuration */
|
||||
#define NUM_DEVS_IOP 1 /* 1 device IOP channel controller */
|
||||
#define NUM_UNITS_IOP 1 /* 1 master IOP channel device */
|
||||
#define NUM_DEVS_MFP 1 /* 1 device MFP channel controller */
|
||||
#define NUM_UNITS_MFP 1 /* 1 master MFP channel device */
|
||||
#define NUM_DEVS_COM 2 /* 8-Line async controller */
|
||||
#define NUM_UNITS_COM 16 /* 8-Line async units */
|
||||
#define NUM_DEVS_CON 1 /* 1 I/O console controller */
|
||||
#define NUM_UNITS_CON 2 /* 2 console input & output */
|
||||
#define NUM_DEVS_MT 1 /* 1 mag tape controllers */
|
||||
#define NUM_UNITS_MT 4 /* 4 of 8 devices */
|
||||
#define NUM_DEVS_HSDP 1 /* 1 hspd disk drive controller */
|
||||
//#define NUM_UNITS_HSDP 2 /* 2 disk drive devices */
|
||||
#define NUM_UNITS_HSDP 4 /* 4 disk drive devices */
|
||||
#define NUM_DEVS_DISK 1 /* 1 dp02 disk drive controller */
|
||||
//#define NUM_UNITS_DISK 2 /* 2 disk drive devices */
|
||||
#define NUM_UNITS_DISK 4 /* 4 disk drive devices */
|
||||
#define NUM_DEVS_SCFI 1 /* 1 scfi (SCSI) disk drive units */
|
||||
//#define NUM_UNITS_SCFI 2 /* 1 of 4 disk drive devices */
|
||||
#define NUM_UNITS_SCFI 4 /* 1 of 4 disk drive devices */
|
||||
#define NUM_DEVS_SCSI 2 /* 2 scsi (MFP SCSI) scsi buss units */
|
||||
#define NUM_UNITS_SCSI 2 /* 2 scsi disk drive devices */
|
||||
#define NUM_DEVS_RTOM 1 /* 1 IOP RTOM channel */
|
||||
#define NUM_UNITS_RTOM 1 /* 1 IOP RTOM device (clock & interval timer) */
|
||||
#define NUM_DEVS_LPR 1 /* 1 IOP Line printer */
|
||||
#define NUM_UNITS_LPR 1 /* 1 IOP Line printer device */
|
||||
#define NUM_DEVS_ETHER 1 /* 1 Ethernet controller */
|
||||
#define NUM_UNITS_ETHER 16 /* 16 Ethernet devices */
|
||||
|
||||
extern DEVICE cpu_dev; /* cpu device */
|
||||
extern UNIT cpu_unit; /* the cpu unit */
|
||||
#ifdef NUM_DEVS_IOP
|
||||
extern DEVICE iop_dev; /* IOP channel controller */
|
||||
#endif
|
||||
#ifdef NUM_DEVS_MFP
|
||||
extern DEVICE mfp_dev; /* MFP channel controller */
|
||||
#endif
|
||||
#ifdef NUM_DEVS_RTOM
|
||||
extern DEVICE rtc_dev; /* RTOM rtc */
|
||||
extern DEVICE itm_dev; /* RTOM itm */
|
||||
#endif
|
||||
#ifdef NUM_DEVS_CON
|
||||
extern DEVICE con_dev;
|
||||
#endif
|
||||
#ifdef NUM_DEVS_MT
|
||||
extern DEVICE mta_dev;
|
||||
#endif
|
||||
#if NUM_DEVS_MT > 1
|
||||
extern DEVICE mtb_dev;
|
||||
#endif
|
||||
#ifdef NUM_DEVS_DISK
|
||||
extern DEVICE dda_dev;
|
||||
#endif
|
||||
#if NUM_DEVS_DISK > 1
|
||||
extern DEVICE ddb_dev;
|
||||
#endif
|
||||
#ifdef NUM_DEVS_HSDP
|
||||
extern DEVICE dpa_dev;
|
||||
#endif
|
||||
#if NUM_DEVS_HSDP > 1
|
||||
extern DEVICE dpb_dev;
|
||||
#endif
|
||||
#ifdef NUM_DEVS_SCFI
|
||||
extern DEVICE sda_dev;
|
||||
#endif
|
||||
#if NUM_DEVS_SCFI > 1
|
||||
extern DEVICE sdb_dev;
|
||||
#endif
|
||||
#ifdef NUM_DEVS_SCSI
|
||||
extern DEVICE sba_dev;
|
||||
#endif
|
||||
#if NUM_DEVS_SCSI > 1
|
||||
extern DEVICE sbb_dev;
|
||||
#endif
|
||||
#ifdef NUM_DEVS_COM
|
||||
extern DEVICE coml_dev;
|
||||
extern DEVICE com_dev;
|
||||
#endif
|
||||
#ifdef NUM_DEVS_LPR
|
||||
extern DEVICE lpr_dev;
|
||||
#endif
|
||||
#ifdef NUM_DEVS_ETHER
|
||||
extern DEVICE ec_dev;
|
||||
#endif
|
||||
|
||||
/* Memory */
|
||||
|
||||
#define MAXMEMSIZE ((16*1024*1024)/4) /* max memory size in 32bit words */
|
||||
#define MEMSIZE (cpu_unit.capac) /* actual memory size */
|
||||
#define MEM_ADDR_OK(x) (((x)) < MEMSIZE)
|
||||
|
||||
/* channel program data for a chan/sub-address */
|
||||
typedef struct chp {
|
||||
/* channel program values */
|
||||
UNIT *unitptr; /* Back pointer to units structure */
|
||||
uint32 chan_inch_addr; /* Current channel status dw addr in memory */
|
||||
uint32 base_inch_addr; /* Original channel status dw addr in memory */
|
||||
uint16 max_inch_addr; /* maximum inch buffer pointer */
|
||||
uint32 chan_caw; /* Channel command address word */
|
||||
uint32 ccw_addr; /* Channel address */
|
||||
#ifdef TEST_FOR_IOCL_CHANGE
|
||||
uint32 new_iocla; /* start iocl address */
|
||||
uint32 new_iocd1; /* start word 1 of iocd */
|
||||
uint32 new_iocd2; /* start word 2 of iocd */
|
||||
#endif
|
||||
uint32 chan_buf; /* Channel data buffer */
|
||||
uint16 ccw_count; /* Channel count */
|
||||
uint16 ccw_flags; /* Channel flags */
|
||||
uint16 chan_status; /* Channel status */
|
||||
uint16 chan_dev; /* Device on channel */
|
||||
uint8 ccw_cmd; /* Channel command and flags */
|
||||
uint8 chan_byte; /* Current byte, empty/full */
|
||||
uint8 chan_int; /* channel interrupt level */
|
||||
uint8 chan_info; /* misc flags for channel */
|
||||
} CHANP;
|
||||
|
||||
/* Device information block */
|
||||
#define FIFO_SIZE 256 /* fifo to hold 128 double words of status */
|
||||
extern int32 FIFO_Put(uint16 chsa, uint32 entry);
|
||||
extern int32 FIFO_Get(uint16 chsa, uint32 *old);
|
||||
extern int32 FIFO_Num(uint16 chsa);
|
||||
|
||||
#define IOCLQ_SIZE 32 /* fifo to hold 32 iocl cmds */
|
||||
|
||||
typedef struct ioclq {
|
||||
uint32 ioclq_fifo[IOCLQ_SIZE];
|
||||
int16 ioclq_in;
|
||||
int16 ioclq_out;
|
||||
} IOCLQ;
|
||||
|
||||
extern int32 IOCLQ_Put(IOCLQ *qptr, uint32 entry);
|
||||
extern int32 IOCLQ_Get(IOCLQ *qptr, uint32 *old);
|
||||
extern int32 IOCLQ_Num(IOCLQ *qptr);
|
||||
|
||||
typedef struct dib {
|
||||
/* Pre start I/O operation */
|
||||
t_stat (*pre_io)(UNIT *uptr, uint16 chan);
|
||||
/* Start a channel command SIO */
|
||||
t_stat (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd);
|
||||
/* Halt I/O HIO */
|
||||
t_stat (*halt_io)(UNIT *uptr); /* Halt I/O */
|
||||
/* Test I/O STOPIO */
|
||||
t_stat (*stop_io)(UNIT *uptr); /* Stop I/O */
|
||||
/* Test I/O TESTIO */
|
||||
t_stat (*test_io)(UNIT *uptr); /* Test I/O */
|
||||
/* Reset Controller RSCTL */
|
||||
t_stat (*rsctl_io)(UNIT *uptr); /* Reset Controller */
|
||||
/* Reset Controller RSCHNL */
|
||||
t_stat (*rschnl_io)(UNIT *uptr); /* Reset Channel */
|
||||
/* Post I/O processing */
|
||||
t_stat (*iocl_io)(CHANP *chp, int32 tic_ok); /* IOCL processing */
|
||||
/* Controller init */
|
||||
void (*dev_ini)(UNIT *, t_bool); /* init function */
|
||||
UNIT *units; /* Pointer to units structure */
|
||||
CHANP *chan_prg; /* Pointer to channel program */
|
||||
IOCLQ *ioclq_ptr; /* pointer to array of IOCLQ entries */
|
||||
uint8 numunits; /* number of units */
|
||||
uint8 mask; /* device mask */
|
||||
uint16 chan_addr; /* parent channel address */
|
||||
uint32 chan_fifo_in; /* fifo input index */
|
||||
uint32 chan_fifo_out; /* fifo output index */
|
||||
uint32 chan_fifo[FIFO_SIZE]; /* interrupt status fifo for each channel */
|
||||
} DIB;
|
||||
|
||||
extern DIB *dib_unit[MAX_DEV]; /* Pointer to Device info block */
|
||||
extern DIB *dib_chan[MAX_CHAN]; /* Pointer to channel mux dib */
|
||||
|
||||
/* defined in upper 16 bits of dptr->flags */
|
||||
#define DEV_CHAN (1 << DEV_V_UF) /* Device is channel mux if set */
|
||||
#define DEV_V_UF2 (DEV_V_UF+1) /* current usage */
|
||||
#define DEV_BUF_NUM(x) (((x) & 07) << DEV_V_UF2)
|
||||
#define GET_DEV_BUF(x) (((x) >> DEV_V_UF2) & 07)
|
||||
|
||||
#ifdef NOT_USED_NOW
|
||||
//#define DEV_V_ADDR DEV_V_UF /* Pointer to device address (16) */
|
||||
//#define DEV_V_DADDR (DEV_V_UF + 8) /* Device address */
|
||||
//#define DEV_ADDR_MASK (0x7f << DEV_V_DADDR) /* 24 bits shift */
|
||||
//#define DEV_V_UADDR (DEV_V_UF) /* Device address in Unit */
|
||||
//#define DEV_UADDR (1 << DEV_V_UADDR)
|
||||
//#define GET_DADDR(x) (0x7f & ((x) >> DEV_V_ADDR))
|
||||
//#define DEV_ADDR(x) ((x) << DEV_V_ADDR)
|
||||
//#define PROTECT_V UNIT_V_UF+15
|
||||
//#define PROTECT (1 << PROTECT_V)
|
||||
#endif
|
||||
|
||||
/* defined in rightmost 8 bits of upper 16 bits of uptr->flags */
|
||||
/* allow 255 type disks */
|
||||
#define UNIT_SUBCHAN (1 << (UNIT_V_UF_31))
|
||||
#define UNIT_V_TYPE (UNIT_V_UF + 0)
|
||||
#define UNIT_TYPE (0xff << UNIT_V_TYPE)
|
||||
/* get & set disk types */
|
||||
#define GET_TYPE(x) ((UNIT_TYPE & (x)) >> UNIT_V_TYPE)
|
||||
#define SET_TYPE(x) (UNIT_TYPE & ((x) << UNIT_V_TYPE))
|
||||
|
||||
/* defined in uptr->u3 upper 16 bits */
|
||||
/* DEV 0x7F000000 UNIT 0x00ff0000 */
|
||||
#define UNIT_V_ADDR 16
|
||||
#define UNIT_ADDR_MASK (0x7fff << UNIT_V_ADDR)
|
||||
#define GET_UADDR(x) ((UNIT_ADDR_MASK & x) >> UNIT_V_ADDR)
|
||||
#define UNIT_ADDR(x) ((x) << UNIT_V_ADDR)
|
||||
|
||||
/* Debugging controls */
|
||||
#define DEBUG_CMD 0x0000001 /* Show device commands */
|
||||
#define DEBUG_DATA 0x0000002 /* Show data transfers */
|
||||
#define DEBUG_DETAIL 0x0000004 /* Show details */
|
||||
#define DEBUG_INFO 0x0000004 /* Show details */
|
||||
#define DEBUG_EXP 0x0000008 /* Show error conditions */
|
||||
#define DEBUG_INST 0x0000010 /* Show instructions */
|
||||
#define DEBUG_XIO 0x0000020 /* Show XIO I/O instructions */
|
||||
#define DEBUG_IRQ 0x0000040 /* Show IRQ requests */
|
||||
#define DEBUG_TRAP 0x0000080 /* Show TRAP requests */
|
||||
|
||||
extern DEBTAB dev_debug[];
|
||||
|
||||
/* defines for all programs */
|
||||
#define RMASK 0x0000FFFF /* right hw 16 bit mask */
|
||||
#define LMASK 0xFFFF0000 /* left hw 16 bit mask */
|
||||
#define FMASK 0xFFFFFFFF /* 32 bit mask */
|
||||
#define DMASK 0xFFFFFFFFFFFFFFFFLL /* 64 bit all bits mask */
|
||||
#define D48LMASK 0xFFFFFFFFFFFF0000LL /* 64 bit left 48 bits mask */
|
||||
#define D32LMASK 0xFFFFFFFF00000000LL /* 64 bit left 32 bits mask */
|
||||
#define D32RMASK 0x00000000FFFFFFFFLL /* 64 bit right 32 bits mask */
|
||||
#define MSIGN 0x80000000 /* 32 bit minus sign */
|
||||
#define DMSIGN 0x8000000000000000LL /* 64 bit minus sign */
|
||||
#define FSIGN 0x80000000 /* 32 bit minus sign */
|
||||
/* sign extend 16 bit value to uint32 */
|
||||
#define SEXT16(x) (x&0x8000?(uint32)(((uint32)x&RMASK)|LMASK):(uint32)x)
|
||||
/* sign extend 16 bit value to uint64 */
|
||||
#define DSEXT16(x) (x&0x8000?(l_uint64)(((l_uint64)x&RMASK)|D48LMASK):(t_uint64)x)
|
||||
/* sign extend 32 bit value to uint64 */
|
||||
#define DSEXT32(x) (x&0x8000?(l_uint64)(((l_uint64)x&D32RMASK)|D32LMASK):(t_uint64)x)
|
||||
#define NEGATE32(val) ((~val) + 1) /* negate a value 16/32/64 bits */
|
||||
|
||||
/* defined in rightmost 8 bits of upper 16 bits of uptr->flags */
|
||||
#define UNIT_V_MODEL (UNIT_V_UF + 0)
|
||||
#define UNIT_MODEL (7 << UNIT_V_MODEL)
|
||||
#define MODEL(x) (x << UNIT_V_MODEL)
|
||||
#define UNIT_V_MSIZE (UNIT_V_MODEL + 3)
|
||||
#define UNIT_MSIZE (0x1F << UNIT_V_MSIZE)
|
||||
#define MEMAMOUNT(x) (x << UNIT_V_MSIZE)
|
||||
#define CPU_MODEL ((cpu_unit.flags >> UNIT_V_MODEL) & 0x7) /* cpu model 0-7 */
|
||||
|
||||
#define MODEL_55 0 /* 512K Mode Only */
|
||||
#define MODEL_75 1 /* Extended */
|
||||
#define MODEL_27 2 /* */
|
||||
#define MODEL_67 3 /* */
|
||||
#define MODEL_87 4 /* */
|
||||
#define MODEL_97 5 /* */
|
||||
#define MODEL_V6 6 /* V6 CPU */
|
||||
#define MODEL_V9 7 /* V9 CPU */
|
||||
|
||||
#define TMR_RTC 1 /* RTC will not work if set to 0!! */
|
||||
//#define TMR_RTC 0
|
||||
|
||||
#define HIST_MIN 64
|
||||
#define HIST_MAX 10000
|
||||
#define HIST_PC 0x80000000
|
||||
|
||||
/* CC defs Held in CC */
|
||||
#define CC1BIT 0x40000000 /* CC1 in PSD1 */
|
||||
#define CC2BIT 0x20000000 /* CC2 in PSD1 */
|
||||
#define CC3BIT 0x10000000 /* CC3 in PSD1 */
|
||||
#define CC4BIT 0x08000000 /* CC4 in PSD1 */
|
||||
|
||||
#define MAPMODE 0x40 /* Map mode, PSD 2 bit 0 */
|
||||
#define RETMODE 0x20 /* Retain current maps, PSD 2 bit 15 */
|
||||
#define RETBLKM 0x10 /* Set retain blocked mode, PSD 2 bit 16 */
|
||||
#define BLKMODE 0x08 /* Set blocked mode, PSD 2 bit 17 */
|
||||
|
||||
/* PSD mode bits in PSD words 1&2 variable */
|
||||
#define PRIVBIT 0x80000000 /* Privileged mode PSD 1 bit 0 */
|
||||
#define EXTDBIT 0x04000000 /* Extended Addressing PSD 1 bit 5 */
|
||||
#define BASEBIT 0x02000000 /* Base Mode PSD 1 bit 6 */
|
||||
#define AEXPBIT 0x01000000 /* Arithmetic exception PSD 1 bit 7 */
|
||||
|
||||
#define MAPBIT 0x80000000 /* Map mode, PSD 2 bit 0 */
|
||||
#define RETMBIT 0x00010000 /* Retain current maps, PSD 2 bit 15 */
|
||||
#define RETBBIT 0x00008000 /* Retain current blocking state, PSD 2 bit 16 */
|
||||
#define SETBBIT 0x00004000 /* Set blocked mode, PSD 2 bit 17 */
|
||||
|
||||
/* Trap Table Address in memory is pointed to by SPAD 0xF0 */
|
||||
#define POWERFAIL_TRAP 0x80 /* Power fail trap */
|
||||
#define POWERON_TRAP 0x84 /* Power-On trap */
|
||||
#define MEMPARITY_TRAP 0x88 /* Memory Parity Error trap */
|
||||
#define NONPRESMEM_TRAP 0x8C /* Non Present Memory trap */
|
||||
#define UNDEFINSTR_TRAP 0x90 /* Undefined Instruction Trap */
|
||||
#define PRIVVIOL_TRAP 0x94 /* Privlege Violation Trap */
|
||||
#define SVCCALL_TRAP 0x98 /* Supervisor Call Trap */
|
||||
#define MACHINECHK_TRAP 0x9C /* Machine Check Trap */
|
||||
#define SYSTEMCHK_TRAP 0xA0 /* System Check Trap */
|
||||
#define MAPFAULT_TRAP 0xA4 /* Map Fault Trap */
|
||||
#define IPUUNDEFI_TRAP 0xA8 /* IPU Undefined Instruction Trap */
|
||||
#define SIGNALIPU_TRAP 0xAC /* Signal IPU/CPU Trap */
|
||||
#define ADDRSPEC_TRAP 0xB0 /* Address Specification Trap */
|
||||
#define CONSOLEATN_TRAP 0xB4 /* Console Attention Trap */
|
||||
#define PRIVHALT_TRAP 0xB8 /* Privlege Mode Halt Trap */
|
||||
#define AEXPCEPT_TRAP 0xBC /* Arithmetic Exception Trap */
|
||||
#define CACHEERR_TRAP 0xC0 /* Cache Error Trap (V9 Only) */
|
||||
#define DEMANDPG_TRAP 0xC4 /* Demand Page Fault Trap (V6&V9 Only) */
|
||||
|
||||
/* Errors returned from various functions */
|
||||
#define ALLOK 0x0000 /* no error, all is OK */
|
||||
#define MAPFLT MAPFAULT_TRAP /* map fault error */
|
||||
#define NPMEM NONPRESMEM_TRAP /* non present memory */
|
||||
#define MPVIOL PRIVVIOL_TRAP /* memory protection violation */
|
||||
#define DMDPG DEMANDPG_TRAP /* Demand Page Fault Trap (V6&V9 Only) */
|
||||
|
||||
/* general instruction decode equates */
|
||||
#define IND 0x00100000 /* indirect bit in instruction, bit 11 */
|
||||
#define F_BIT 0x00080000 /* byte flag addressing bit 11 in instruction */
|
||||
#define C_BITS 0x00000003 /* byte number or hw, dw, dw flags bits 30 & 31 */
|
||||
#define BIT0 0x80000000 /* general use for bit 0 testing */
|
||||
#define BIT1 0x40000000 /* general use for bit 1 testing */
|
||||
#define BIT2 0x20000000 /* general use for bit 2 testing */
|
||||
#define BIT3 0x10000000 /* general use for bit 3 testing */
|
||||
#define BIT4 0x08000000 /* general use for bit 4 testing */
|
||||
#define BIT5 0x04000000 /* general use for bit 5 testing */
|
||||
#define BIT6 0x02000000 /* general use for bit 6 testing */
|
||||
#define BIT7 0x01000000 /* general use for bit 7 testing */
|
||||
#define BIT8 0x00800000 /* general use for bit 8 testing */
|
||||
#define BIT9 0x00400000 /* general use for bit 9 testing */
|
||||
#define BIT10 0x00200000 /* general use for bit 10 testing */
|
||||
#define BIT11 0x00100000 /* general use for bit 11 testing */
|
||||
#define BIT12 0x00080000 /* general use for bit 12 testing */
|
||||
#define BIT13 0x00040000 /* general use for bit 13 testing */
|
||||
#define BIT14 0x00020000 /* general use for bit 14 testing */
|
||||
#define BIT15 0x00010000 /* general use for bit 15 testing */
|
||||
#define BIT16 0x00008000 /* general use for bit 16 testing */
|
||||
#define BIT17 0x00004000 /* general use for bit 17 testing */
|
||||
#define BIT18 0x00002000 /* general use for bit 18 testing */
|
||||
#define BIT19 0x00001000 /* general use for bit 19 testing */
|
||||
#define BIT20 0x00000800 /* general use for bit 20 testing */
|
||||
#define BIT21 0x00000400 /* general use for bit 21 testing */
|
||||
#define BIT22 0x00000200 /* general use for bit 22 testing */
|
||||
#define BIT23 0x00000100 /* general use for bit 23 testing */
|
||||
#define BIT24 0x00000080 /* general use for bit 24 testing */
|
||||
#define BIT25 0x00000040 /* general use for bit 25 testing */
|
||||
#define BIT26 0x00000020 /* general use for bit 26 testing */
|
||||
#define BIT27 0x00000010 /* general use for bit 27 testing */
|
||||
#define BIT28 0x00000008 /* general use for bit 28 testing */
|
||||
#define BIT29 0x00000004 /* general use for bit 29 testing */
|
||||
#define BIT30 0x00000002 /* general use for bit 30 testing */
|
||||
#define BIT31 0x00000001 /* general use for bit 31 testing */
|
||||
#define MASK16 0x0000FFFF /* 16 bit address mask */
|
||||
#define MASK19 0x0007FFFF /* 19 bit address mask */
|
||||
#define MASK20 0x000FFFFF /* 20 bit address mask */
|
||||
#define MASK24 0x00FFFFFF /* 24 bit address mask */
|
||||
#define MASK32 0xFFFFFFFF /* 32 bit address mask */
|
||||
|
||||
/* SPAD int entry equates, entries accessed by interrupt level number */
|
||||
#define SINT_RAML 0x80000000 /* ram loaded (n/u) */
|
||||
#define SINT_EWCS 0x40000000 /* Enabled channel WCS executed (XIO) */
|
||||
#define SINT_ACT 0x20000000 /* Interrupt active when set (copy is in INTS */
|
||||
#define SINT_ENAB 0x10000000 /* Interrupt enabled when set (copy is in INTS */
|
||||
#define SINT_EXTL 0x00800000 /* IOP/RTOM ext interrupt if set, I/O if not set (copy in INTS) */
|
||||
|
||||
/* INTS int entry equates, entries accessed by interrupt level number */
|
||||
#define INTS_NU1 0x80000000 /* Not used */
|
||||
#define INTS_REQ 0x40000000 /* Interrupt is requesting (use bit 1) */
|
||||
#define INTS_ACT 0x20000000 /* Interrupt active when set (copy is of SPAD */
|
||||
#define INTS_ENAB 0x10000000 /* Interrupt enabled when set (copy is of SPAD */
|
||||
#define INTS_EXTL 0x00800000 /* IOP/RTOM ext interrupt if set, I/O if not set (copy of SPAD) */
|
||||
|
||||
/* ReadAddr memory access requested */
|
||||
#define MEM_RD 0x0 /* read memory */
|
||||
#define MEM_WR 0x1 /* write memory */
|
||||
#define MEM_EX 0x2 /* execute memory */
|
||||
|
||||
/* Rename of global PC variable to avoid namespace conflicts on some platforms */
|
||||
#define PC PC_Global
|
||||
|
||||
/* memory access macros */
|
||||
/* The RMW and WMW macros are used to read/write memory words */
|
||||
/* RMW(addr) or WMW(addr, data) where addr is a byte alligned word address */
|
||||
|
||||
#define RMB(a) ((M[(a)>>2]>>(8*(3-(a&3))))&0xff) /* read memory addressed byte */
|
||||
#define RMH(a) ((a)&2?(M[(a)>>2]&RMASK):(M[(a)>>2]>>16)&RMASK) /* read memory addressed halfword */
|
||||
#define RMW(a) (M[((a)&MASK24)>>2]) /* read memory addressed word */
|
||||
#define WMW(a,d) (M[((a)&MASK24)>>2]=d) /* write memory addressed word */
|
||||
/* write halfword to memory address */
|
||||
#define WMH(a,d) ((a)&2?(M[(a)>>2]=(M[(a)>>2]&LMASK)|((d)&RMASK)):(M[(a)>>2]=(M[(a)>>2]&RMASK)|((d)<<16)))
|
||||
/* write byte to memory */
|
||||
#define WMB(a,d) (M[(a)>>2]=(((M[(a)>>2])&(~(0xff<<(8*(3-(a&3))))))|((d&0xff)<<(8*(3-(a&3))))))
|
||||
|
||||
/* map register access macros */
|
||||
/* The RMR and WMR macros are used to read/write the MAPC cache registers */
|
||||
/* RMR(addr) or WMR(addr, data) where addr is a half word alligned address */
|
||||
/* read map register halfword from cache address */
|
||||
#define RMR(a) ((a)&2?(MAPC[(a)>>2]&RMASK):(MAPC[(a)>>2]>>16)&RMASK)
|
||||
/* write halfword map register to MAP cache address */
|
||||
#define WMR(a,d) ((a)&2?(MAPC[(a)>>2]=(MAPC[(a)>>2]&LMASK)|((d)&RMASK)):(MAPC[(a)>>2]=(MAPC[(a)>>2]&RMASK)|((d)<<16)))
|
||||
|
||||
/* Definitions for commonly used functions */
|
||||
extern t_stat set_dev_addr(UNIT *uptr, int32 val, CONST char *cptr, void *desc);
|
||||
extern t_stat show_dev_addr(FILE * st, UNIT *uptr, int32 v, CONST void *desc);
|
||||
extern void chan_end(uint16 chan, uint16 flags);
|
||||
extern int chan_read_byte(uint16 chsa, uint8 *data);
|
||||
extern int chan_write_byte(uint16 chsa, uint8 *data);
|
||||
extern void set_devattn(uint16 addr, uint16 flags);
|
||||
extern void set_devwake(uint16 chsa, uint16 flags);
|
||||
extern t_stat chan_boot(uint16 addr, DEVICE *dptr);
|
||||
extern int test_write_byte_end(uint16 chsa);
|
||||
extern DEVICE *get_dev(UNIT *uptr);
|
||||
extern t_stat set_inch(UNIT *uptr, uint32 inch_addr, uint32 num_inch); /* set inch addr */
|
||||
extern CHANP *find_chanp_ptr(uint16 chsa); /* find chanp pointer */
|
||||
|
||||
extern uint32 M[]; /* our memory */
|
||||
extern uint32 SPAD[]; /* cpu SPAD memory */
|
||||
extern uint32 attention_trap;
|
||||
extern uint32 RDYQ[]; /* ready queue */
|
||||
extern uint32 RDYQIN; /* input index */
|
||||
extern uint32 RDYQOUT; /* output index */
|
||||
#define RDYQ_SIZE 128
|
||||
extern int32 RDYQ_Put(uint32 entry);
|
||||
extern int32 RDYQ_Get(uint32 *old);
|
||||
extern int32 RDYQ_Num(void);
|
||||
|
||||
extern char *dump_mem(uint32 mp, int cnt);
|
||||
extern char *dump_buf(uint8 *mp, int32 off, int cnt);
|
||||
|
||||
#define get_chan(chsa) ((chsa>>8)&0x7f) /* get channel number from ch/sa */
|
||||
|
||||
3482
SEL32/sel32_disk.c
Normal file
3482
SEL32/sel32_disk.c
Normal file
File diff suppressed because it is too large
Load diff
1909
SEL32/sel32_ec.c
Normal file
1909
SEL32/sel32_ec.c
Normal file
File diff suppressed because it is too large
Load diff
1637
SEL32/sel32_fltpt.c
Normal file
1637
SEL32/sel32_fltpt.c
Normal file
File diff suppressed because it is too large
Load diff
3790
SEL32/sel32_hsdp.c
Normal file
3790
SEL32/sel32_hsdp.c
Normal file
File diff suppressed because it is too large
Load diff
301
SEL32/sel32_iop.c
Normal file
301
SEL32/sel32_iop.c
Normal file
|
|
@ -0,0 +1,301 @@
|
|||
/* sel32_iop.c: SEL-32 Model 8000/8001/8002 IOP processor controller
|
||||
|
||||
Copyright (c) 2018-2022, James C. Bevier
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
to deal in the Software without restriction, including without limitation
|
||||
the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
and/or sell copies of the Software, and to permit persons to whom the
|
||||
Software is furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in
|
||||
all copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
JAMES C. BEVIER BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
|
||||
This channel is the interrupt fielder for all of the IOP sub channels. It's
|
||||
channel address is 7E00. This code handles the INCH command for the IOP
|
||||
devices and controls the status FIFO for the iop devices on interrupts and
|
||||
TIO instructions..
|
||||
|
||||
Possible devices:
|
||||
The f8iop communication controller (TY7EA0), (TY7EB0), (TY7EC0)
|
||||
The ctiop console communications controller (CT7EFC & CT7EFD)
|
||||
The lpiop line printer controller (LP7EF8), (LP7EF9)
|
||||
|
||||
*/
|
||||
|
||||
#include "sel32_defs.h"
|
||||
|
||||
#if NUM_DEVS_IOP > 0
|
||||
|
||||
#define UNIT_IOP UNIT_IDLE | UNIT_DISABLE
|
||||
|
||||
/* forward definitions */
|
||||
t_stat iop_preio(UNIT *uptr, uint16 chan);
|
||||
t_stat iop_startcmd(UNIT *uptr, uint16 chan, uint8 cmd);
|
||||
void iop_ini(UNIT *uptr, t_bool f);
|
||||
t_stat iop_rschnlio(UNIT *uptr);
|
||||
t_stat iop_srv(UNIT *uptr);
|
||||
t_stat iop_reset(DEVICE *dptr);
|
||||
t_stat iop_help(FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr);
|
||||
const char *iop_desc(DEVICE *dptr);
|
||||
|
||||
/* Held in u3 is the device command and status */
|
||||
#define IOP_INCH 0x00 /* Initialize channel command */
|
||||
#define IOP_INCH2 0xf0 /* Initialize channel command after start */
|
||||
#define IOP_NOP 0x03 /* NOP command */
|
||||
#define IOP_MSK 0xff /* Command mask */
|
||||
|
||||
/* Status held in u3 */
|
||||
/* controller/unit address in upper 16 bits */
|
||||
#define CON_INPUT 0x100 /* Input ready for unit */
|
||||
#define CON_CR 0x200 /* Output at beginning of line */
|
||||
#define CON_REQ 0x400 /* Request key pressed */
|
||||
#define CON_EKO 0x800 /* Echo input character */
|
||||
#define CON_OUTPUT 0x1000 /* Output ready for unit */
|
||||
#define CON_READ 0x2000 /* Read mode selected */
|
||||
|
||||
/* not used u4 */
|
||||
|
||||
/* in u5 packs sense byte 0,1 and 3 */
|
||||
/* Sense byte 0 */
|
||||
#define SNS_CMDREJ 0x80000000 /* Command reject */
|
||||
#define SNS_INTVENT 0x40000000 /* Unit intervention required */
|
||||
/* sense byte 3 */
|
||||
#define SNS_RDY 0x80 /* device ready */
|
||||
#define SNS_ONLN 0x40 /* device online */
|
||||
|
||||
/* std devices. data structures
|
||||
iop_dev Console device descriptor
|
||||
iop_unit Console unit descriptor
|
||||
iop_reg Console register list
|
||||
iop_mod Console modifiers list
|
||||
*/
|
||||
|
||||
struct _iop_data
|
||||
{
|
||||
uint8 ibuff[145]; /* Input line buffer */
|
||||
uint8 incnt; /* char count */
|
||||
}
|
||||
iop_data[NUM_UNITS_IOP];
|
||||
|
||||
/* channel program information */
|
||||
CHANP iop_chp[NUM_UNITS_IOP] = {0};
|
||||
|
||||
MTAB iop_mod[] = {
|
||||
{MTAB_XTD | MTAB_VUN | MTAB_VALR, 0, "DEV", "DEV",
|
||||
&set_dev_addr, &show_dev_addr, NULL, "Controller Channel address"},
|
||||
{0}
|
||||
};
|
||||
|
||||
UNIT iop_unit[] = {
|
||||
{UDATA(&iop_srv, UNIT_IOP, 0), 0, UNIT_ADDR(0x7E00)}, /* Channel controller */
|
||||
};
|
||||
|
||||
DIB iop_dib = {
|
||||
iop_preio, /* t_stat (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
|
||||
iop_startcmd, /* t_stat (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command SIO */
|
||||
NULL, /* t_stat (*halt_io)(UNIT *uptr) */ /* Halt I/O HIO */
|
||||
NULL, /* t_stat (*stop_io)(UNIT *uptr) */ /* Stop I/O HIO */
|
||||
NULL, /* t_stat (*test_io)(UNIT *uptr) */ /* Test I/O TIO */
|
||||
NULL, /* t_stat (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
|
||||
iop_rschnlio, /* t_stat (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
|
||||
NULL, /* t_stat (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
|
||||
iop_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
|
||||
iop_unit, /* UNIT* units */ /* Pointer to units structure */
|
||||
iop_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
|
||||
NULL, /* IOCLQ *ioclq_ptr */ /* IOCL entries, 1 per UNIT */
|
||||
NUM_UNITS_IOP, /* uint8 numunits */ /* number of units defined */
|
||||
0xff, /* uint8 mask */ /* 16 devices - device mask */
|
||||
0x7e00, /* uint16 chan_addr */ /* parent channel address */
|
||||
0, /* uint32 chan_fifo_in */ /* fifo input index */
|
||||
0, /* uint32 chan_fifo_out */ /* fifo output index */
|
||||
{0} /* uint32 chan_fifo[FIFO_SIZE] */ /* interrupt status fifo for channel */
|
||||
};
|
||||
|
||||
DEVICE iop_dev = {
|
||||
"IOP", iop_unit, NULL, iop_mod,
|
||||
NUM_UNITS_IOP, 8, 15, 1, 8, 8,
|
||||
NULL, NULL, &iop_reset, /* examine, deposit, reset */
|
||||
NULL, NULL, NULL, /* boot, attach, detach */
|
||||
/* dib ptr, dev flags, debug flags, debug */
|
||||
&iop_dib, DEV_CHAN|DEV_DIS|DEV_DISABLE|DEV_DEBUG, 0, dev_debug,
|
||||
};
|
||||
|
||||
/* IOP controller routines */
|
||||
/* initialize the console chan/unit */
|
||||
void iop_ini(UNIT *uptr, t_bool f)
|
||||
{
|
||||
int unit = (uptr - iop_unit); /* unit 0 */
|
||||
DEVICE *dptr = &iop_dev; /* one and only dummy device */
|
||||
|
||||
iop_data[unit].incnt = 0; /* no input data */
|
||||
uptr->u5 = SNS_RDY|SNS_ONLN; /* status is online & ready */
|
||||
sim_cancel(uptr); /* stop any timers */
|
||||
sim_debug(DEBUG_CMD, &iop_dev,
|
||||
"IOP init device %s controller/device %04x\n",
|
||||
dptr->name, GET_UADDR(uptr->u3));
|
||||
}
|
||||
|
||||
/* handle rschnlio cmds for iop */
|
||||
t_stat iop_rschnlio(UNIT *uptr) {
|
||||
DEVICE *dptr = get_dev(uptr);
|
||||
uint16 chsa = GET_UADDR(uptr->u3);
|
||||
int cmd = uptr->u3 & IOP_MSK;
|
||||
|
||||
sim_debug(DEBUG_EXP, dptr,
|
||||
"iop_rschnl chsa %04x cmd = %02x\n", chsa, cmd);
|
||||
iop_ini(uptr, 0); /* reset the unit */
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* start an iop operation */
|
||||
t_stat iop_preio(UNIT *uptr, uint16 chan) {
|
||||
DEVICE *dptr = get_dev(uptr);
|
||||
int unit = (uptr - dptr->units);
|
||||
uint16 chsa = GET_UADDR(uptr->u3);
|
||||
|
||||
sim_debug(DEBUG_CMD, dptr, "iop_preio CMD %08x unit %02x chsa %04x\n",
|
||||
uptr->u3, unit, chsa);
|
||||
|
||||
if ((uptr->u3 & IOP_MSK) != 0) { /* is unit busy */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"iop_preio unit %02x chsa %04x BUSY\n", unit, chsa);
|
||||
return SNS_BSY; /* yes, return busy */
|
||||
}
|
||||
|
||||
sim_debug(DEBUG_CMD, dptr, "iop_preio unit %02x chsa %04x OK\n", unit, chsa);
|
||||
return SCPE_OK; /* good to go */
|
||||
}
|
||||
|
||||
/* start an I/O operation */
|
||||
t_stat iop_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
|
||||
{
|
||||
sim_debug(DEBUG_CMD, &iop_dev,
|
||||
"IOP startcmd %02x controller/device %04x\n",
|
||||
cmd, GET_UADDR(uptr->u3));
|
||||
if ((uptr->u3 & IOP_MSK) != 0) /* is unit busy */
|
||||
return SNS_BSY; /* yes, return busy */
|
||||
|
||||
/* process the commands */
|
||||
switch (cmd & 0xFF) {
|
||||
/* UTX uses the INCH cmd to detect the IOP or MFP */
|
||||
/* IOP has INCH cmd of 0, while MFP uses 0x80 */
|
||||
case IOP_INCH: /* INCH command */
|
||||
uptr->u5 = SNS_RDY|SNS_ONLN; /* status is online & ready */
|
||||
uptr->u3 &= LMASK; /* leave only chsa */
|
||||
sim_debug(DEBUG_CMD, &iop_dev,
|
||||
"iop_startcmd %04x: Cmd INCH iptr %06x INCHa %06x\n",
|
||||
chan, iop_chp[0].ccw_addr, /* set inch buffer addr */
|
||||
iop_chp[0].chan_inch_addr); /* set inch buffer addr */
|
||||
|
||||
iop_chp[0].chan_inch_addr = iop_chp[0].ccw_addr; /* set inch buffer addr */
|
||||
iop_chp[0].base_inch_addr = iop_chp[0].ccw_addr; /* set inch buffer addr */
|
||||
iop_chp[0].max_inch_addr = iop_chp[0].ccw_addr + (128 * 8); /* set last inch buffer addr */
|
||||
|
||||
uptr->u3 |= IOP_INCH2; /* save INCH command as 0xf0 */
|
||||
sim_activate(uptr, 40); /* go on */
|
||||
return 0; /* no status change */
|
||||
break;
|
||||
|
||||
case IOP_NOP: /* NOP command */
|
||||
sim_debug(DEBUG_CMD, &iop_dev, "iop_startcmd %04x: Cmd NOP\n", chan);
|
||||
uptr->u5 = SNS_RDY|SNS_ONLN; /* status is online & ready */
|
||||
uptr->u3 &= LMASK; /* leave only chsa */
|
||||
uptr->u3 |= (cmd & IOP_MSK); /* save NOP command */
|
||||
sim_activate(uptr, 40); /* TRY 07-13-19 */
|
||||
return 0; /* no status change */
|
||||
break;
|
||||
|
||||
default: /* invalid command */
|
||||
uptr->u5 |= SNS_CMDREJ; /* command rejected */
|
||||
sim_debug(DEBUG_CMD, &iop_dev, "iop_startcmd %04x: Cmd Invalid %02x status %02x\n",
|
||||
chan, cmd, uptr->u5);
|
||||
uptr->u3 &= LMASK; /* leave only chsa */
|
||||
uptr->u3 |= (cmd & IOP_MSK); /* save command */
|
||||
sim_activate(uptr, 40); /* force interrupt */
|
||||
return 0; /* no status change */
|
||||
break;
|
||||
}
|
||||
|
||||
return SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK; /* not reachable for now */
|
||||
}
|
||||
|
||||
/* Handle transfers for other sub-channels on IOP */
|
||||
t_stat iop_srv(UNIT *uptr)
|
||||
{
|
||||
uint16 chsa = GET_UADDR(uptr->u3);
|
||||
int cmd = uptr->u3 & IOP_MSK;
|
||||
CHANP *chp = &iop_chp[0]; /* find the chanp pointer */
|
||||
uint32 mema = chp->ccw_addr; /* get inch or buffer addr */
|
||||
uint32 tstart;
|
||||
|
||||
/* test for NOP or INCH cmds */
|
||||
if ((cmd != IOP_NOP) && (cmd != IOP_INCH2)) { /* NOP or INCH */
|
||||
uptr->u3 &= LMASK; /* nothing left, command complete */
|
||||
sim_debug(DEBUG_CMD, &iop_dev,
|
||||
"iop_srv Unknown cmd %02x chan %02x: chnend|devend|unitexp\n", cmd, chsa);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITEXP); /* done */
|
||||
return SCPE_OK;
|
||||
} else
|
||||
|
||||
if (cmd == IOP_NOP) { /* NOP do nothing */
|
||||
uptr->u3 &= LMASK; /* nothing left, command complete */
|
||||
sim_debug(DEBUG_CMD, &iop_dev, "iop_srv INCH/NOP chan %02x: chnend|devend\n", chsa);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* done */
|
||||
return SCPE_OK;
|
||||
} else
|
||||
|
||||
/* test for INCH cmd */
|
||||
if (cmd == IOP_INCH2) { /* INCH */
|
||||
sim_debug(DEBUG_CMD, &iop_dev,
|
||||
"iop_srv starting INCH %06x cmd, chsa %04x MemBuf %06x cnt %04x\n",
|
||||
mema, chsa, chp->ccw_addr, chp->ccw_count);
|
||||
|
||||
/* now call set_inch() function to write and test inch buffer addresses */
|
||||
/* the chp->ccw_addr location contains the inch address */
|
||||
/* 1-256 wd buffer is provided for 128 status dbl words */
|
||||
tstart = set_inch(uptr, mema, 128); /* new address of 128 entries */
|
||||
if ((tstart == SCPE_MEM) || (tstart == SCPE_ARG)) { /* any error */
|
||||
/* we have error, bail out */
|
||||
uptr->u5 |= SNS_CMDREJ;
|
||||
uptr->u3 &= LMASK; /* nothing left, command complete */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
return SCPE_OK;
|
||||
}
|
||||
uptr->u3 &= LMASK; /* clear the cmd */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we are done dev|chan end */
|
||||
}
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
t_stat iop_reset(DEVICE *dptr)
|
||||
{
|
||||
/* add reset code here */
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* sho help iop */
|
||||
t_stat iop_help(FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, CONST char *cptr)
|
||||
{
|
||||
fprintf(st, "SEL-32 IOP Model 8000 Channel Controller at 0x7E00\r\n");
|
||||
fprintf(st, "The IOP fields all interrupts and status posting\r\n");
|
||||
fprintf(st, "for each of the controllers on the system.\r\n");
|
||||
fprintf(st, "Nothing can be configured for this Channel.\r\n");
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
const char *iop_desc(DEVICE *dptr)
|
||||
{
|
||||
return("SEL-32 IOP Model 8000 Channel Controller @ 0x7E00");
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
677
SEL32/sel32_lpr.c
Normal file
677
SEL32/sel32_lpr.c
Normal file
|
|
@ -0,0 +1,677 @@
|
|||
/* sel32_lpr.c: SEL32 922x & 924x High Speed Line Printer
|
||||
|
||||
Copyright (c) 2018-2022, James C. Bevier
|
||||
Portions provided by Richard Cornwell and other SIMH contributers
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
to deal in the Software without restriction, including without limitation
|
||||
the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
and/or sell copies of the Software, and to permit persons to whom the
|
||||
Software is furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in
|
||||
all copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
JAMES C. BEVIER BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
|
||||
This is the standard line printer.
|
||||
|
||||
These units each buffer one record in local memory and signal
|
||||
ready when the buffer is full or empty. The channel must be
|
||||
ready to recieve/transmit data when they are activated since
|
||||
they will transfer their block during chan_cmd. All data is
|
||||
transmitted as BCD characters.
|
||||
*/
|
||||
|
||||
#include "sel32_defs.h"
|
||||
#include <ctype.h>
|
||||
|
||||
/**** COMMANDS TO PRINT BUFFER THEN DO FORMS CONTROL */
|
||||
/*
|
||||
LP.CMD1 DATAW X'01000000' PRINT ONLY - NO FORMS CONTROL
|
||||
LP.CMD2 DATAW X'05000000' PRINT BUFFER, <CR>
|
||||
LP.CMD3 DATAW X'15000000' PRINT BUFFER, <LF>
|
||||
LP.CMD4 DATAW X'25000000' PRINT BUFFER, <LF> <LF>
|
||||
LP.CMD5 DATAW X'35000000' PRINT BUFFER, <LF> <LF> <LF>
|
||||
LP.CMD6 DATAW X'45000000' PRINT BUFFER, <FF>
|
||||
LP.CMD7 DATAW X'85000000' PRINT BUFFER, <CR>, THEN CLEAR BUFFER
|
||||
*
|
||||
**** COMMANDS TO DO FORMS CONTROL AND THEN PRINT BUFFER.
|
||||
**** NOTE: THESE COMMANDS ARE ARRANGED SO THAT BY USING THE INDEX
|
||||
**** OF THE FORMS CONTROL TABLE AND A OFFSET INTO THIS TABLE
|
||||
**** YOU CAN GET THE APPROPRIATE COMMAND FOR THE FC CHAR.
|
||||
*
|
||||
LP.CMD8 DATAW X'0D000000' <CR>, PRINT BUFFER, <CR>
|
||||
LP.CMD9 DATAW X'4D000000' <FF>, PRINT BUFFER, <CR>
|
||||
DATAW X'4D000000' <FF>, PRINT BUFFER, <CR>
|
||||
LP.CMD10 DATAW X'2D000000' <LF> <LF>, PRINT BUFFER <CR>
|
||||
LP.CMD11 DATAW X'1D000000' <LF>, PRINT BUFFER, <CR>
|
||||
LP.CMD12 DATAW X'3D000000' <LF> <LF> <LF>, PRINT, <CR> (SPARE)
|
||||
*
|
||||
**** COMMANDS THAT DO ONLY FORMS CONTROL (NO PRINTING)
|
||||
*
|
||||
LP.CMD13 DATAW X'03000000' <CR>
|
||||
LP.CMD14 DATAW X'47000000' <FF>
|
||||
DATAW X'47000000' <FF>
|
||||
LP.CMD15 DATAW X'27000000' <LF> <LF>
|
||||
LP.CMD16 DATAW X'17000000' <LF>
|
||||
LP.CMD17 DATAW X'37000000' <LF> <LF> <LF> (SPARE)
|
||||
*
|
||||
** LINE PRINTER FORMS CONTROL TABLE
|
||||
*
|
||||
LPFCTBL EQU $
|
||||
2B DATAB C'+' 0x2b FORMS CONTROL FOR CR THEN PRINT
|
||||
31 DATAB C'1' 0x31 FORMS CONTROL FOR FF THEN PRINT
|
||||
2D DATAB C'-' 0x2d FORMS CONTROL FOR FF THEN PRINT
|
||||
30 DATAB C'0' 0x30 FORMS CONTROL FOR 2 LF'S THEN PRINT
|
||||
20 DATAB C' ' 0x20 FORMS CONTROL FOR LF THEN PRINT
|
||||
*/
|
||||
|
||||
#if NUM_DEVS_LPR > 0
|
||||
|
||||
#define UNIT_LPR UNIT_ATTABLE | UNIT_IDLE | UNIT_DISABLE | UNIT_SEQ
|
||||
|
||||
#define CMD u3
|
||||
/* u3 holds command and status information */
|
||||
|
||||
#define LPR_INCH 0x00 /* INCH command */
|
||||
/* print buffer then CC commands */
|
||||
#define LPR_PBNCC 0x01 /* print only, no forms control */
|
||||
#define LPR_PBC 0x05 /* print buffer, then <CR> */
|
||||
#define LPR_PBL 0x15 /* print buffer, then <LF> */
|
||||
#define LPR_PBLL 0x25 /* print buffer, then <LF> <LF> */
|
||||
#define LPR_PBLLL 0x35 /* print buffer, then <LF> <LF> <LF> */
|
||||
#define LPR_PBF 0x45 /* print buffer, then <FF> */
|
||||
#define LPR_PBCCB 0x85 /* print buffer, then <CR> <CLEAR BUFFER> */
|
||||
/* Do CC then print commands then CC */
|
||||
#define LPR_CPBC 0x0d /* <CR> print buffer <CR> */
|
||||
#define LPR_LPBC 0x1d /* <LF> print buffer <CR> */
|
||||
#define LPR_LLPBC 0x2d /* <LF> <LF> print buffer <CR> */
|
||||
#define LPR_LLLPBC 0x3d /* <LF> <LF> <LF> print buffer <CR> */
|
||||
#define LPR_FPBC 0x4d /* <FF> print buffer <CR> */
|
||||
/* Do CC only, no print */
|
||||
#define LPR_NPC 0x03 /* <CR> */
|
||||
#define LPR_NPL 0x17 /* <LF> */
|
||||
#define LPR_NPLL 0x27 /* <LF> <LF> */
|
||||
#define LPR_NPLLL 0x37 /* <LF> <LF> <LF> */
|
||||
#define LPR_NPF 0x47 /* <FF> */
|
||||
|
||||
#define LPR_SNS 0x04 /* Sense command */
|
||||
#define LPR_CMDMSK 0xff /* Mask command part. */
|
||||
#define LPR_FULL 0x100 /* Buffer full (BOF) */
|
||||
#define LPR_PRE 0x200 /* Apply pre CC */
|
||||
#define LPR_POST 0x400 /* Apply post CC */
|
||||
|
||||
#define CNT u4
|
||||
/* u4 holds current line count */
|
||||
|
||||
/* channel status bits 13-15 */
|
||||
/* 0x0c - normal completion - OK & carriage is not at bottom of form */
|
||||
/* 0x0e - Unit check - Sense error present with SNS_PRINTF status */
|
||||
/* 0x0d - Unit exception - OK & carriage is at bottom of form */
|
||||
|
||||
#define SNS u5
|
||||
/* in u5 packs sense byte 0,1 and 3 */
|
||||
/* Sense byte 0 */
|
||||
#define SNS_CMDREJ 0x80000000 /* Command reject + Unit check */
|
||||
#define SNS_OPRINTR 0x40000000 /* Operator intervention required */
|
||||
/* reason code is in status byte 1 */
|
||||
#define SNS_BUSCHK 0x20000000 /* Parity error on bus */
|
||||
/* bits 3-7 are unused */
|
||||
#define SNS_NU3 0x10000000 /* Not used */
|
||||
#define SNS_NU4 0x08000000 /* Not used */
|
||||
#define SNS_NU5 0x04000000 /* Not used */
|
||||
#define SNS_NU6 0x02000000 /* Not used */
|
||||
#define SNS_NU7 0x01000000 /* Not used */
|
||||
#define SNS_BOF 0x01000000 /* Not used, temp setting for paper at BOT */
|
||||
/* Sense byte 1 */
|
||||
#define SNS_DEVVFY 0x00800000 /* Device Verify Interface Cable Disconnected */
|
||||
/* plus SNS_OPRINTR */
|
||||
#define SNS_DEVPWR 0x00400000 /* Device Powered Off + SNS_OPRINTR */
|
||||
#define SNS_DEVCHK 0x00200000 /* Device Check - Not Ready + SNS_OPRINTR */
|
||||
#define SNS_OFFLINE 0x00100000 /* Off Line + SNS_OPRINTR */
|
||||
#define SNS_NU2 0x00080000 /* Not used */
|
||||
#define SNS_NU1 0x00040000 /* Not used */
|
||||
#define SNS_BEGOF 0x00020000 /* Beginning of form */
|
||||
#define SNS_TOF 0x00010000 /* Top of form on printer */
|
||||
/* Sense byte 2-3 have remaining channel cnt of zero */
|
||||
|
||||
#define CBP u6
|
||||
/* u6 hold buffer position */
|
||||
|
||||
/* std devices. data structures
|
||||
lpr_dev Line Printer device descriptor
|
||||
lpr_unit Line Printer unit descriptor
|
||||
lpr_reg Line Printer register list
|
||||
lpr_mod Line Printer modifiers list
|
||||
*/
|
||||
|
||||
struct _lpr_data
|
||||
{
|
||||
uint8 lbuff[160]; /* Output line buffer */
|
||||
};
|
||||
|
||||
struct _lpr_data lpr_data[NUM_DEVS_LPR];
|
||||
|
||||
/* forward definitions */
|
||||
t_stat lpr_preio(UNIT *uptr, uint16 chan);
|
||||
t_stat lpr_startcmd(UNIT *, uint16, uint8);
|
||||
void lpr_ini(UNIT *, t_bool);
|
||||
t_stat lpr_haltio(UNIT *uptr);
|
||||
t_stat lpr_rschnlio(UNIT *uptr);
|
||||
t_stat lpr_srv(UNIT *);
|
||||
t_stat lpr_reset(DEVICE *);
|
||||
t_stat lpr_attach(UNIT *, CONST char *);
|
||||
t_stat lpr_detach(UNIT *);
|
||||
t_stat lpr_setlpp(UNIT *, int32, CONST char *, void *);
|
||||
t_stat lpr_getlpp(FILE *, UNIT *, int32, CONST void *);
|
||||
t_stat lpr_help(FILE *, DEVICE *, UNIT *, int32, const char *);
|
||||
const char *lpr_description (DEVICE *dptr);
|
||||
|
||||
/* channel program information */
|
||||
CHANP lpr_chp[NUM_DEVS_LPR] = {0};
|
||||
|
||||
MTAB lpr_mod[] = {
|
||||
{MTAB_XTD|MTAB_VUN|MTAB_VALR, 0, "LINESPERPAGE", "LINESPERPAGE",
|
||||
&lpr_setlpp, &lpr_getlpp, NULL, "Number of lines per page"},
|
||||
{MTAB_XTD|MTAB_VUN|MTAB_VALR, 0, "DEV", "DEV", &set_dev_addr,
|
||||
&show_dev_addr, NULL},
|
||||
{0}
|
||||
};
|
||||
|
||||
UNIT lpr_unit[] = {
|
||||
{UDATA(&lpr_srv, UNIT_LPR, 66), 300, UNIT_ADDR(0x7EF8)}, /* A */
|
||||
#if NUM_DEVS_LPR > 1
|
||||
{UDATA(&lpr_srv, UNIT_LPR, 66), 300, UNIT_ADDR(0x7EF9)}, /* B */
|
||||
#endif
|
||||
};
|
||||
|
||||
/* Device Information Block */
|
||||
DIB lpr_dib = {
|
||||
lpr_preio, /* t_stat (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
|
||||
lpr_startcmd, /* t_stat (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
|
||||
lpr_haltio, /* t_stat (*halt_io)(UNIT *uptr) */ /* Halt I/O */
|
||||
NULL, /* t_stat (*stop_io)(UNIT *uptr) */ /* Stop I/O */
|
||||
NULL, /* t_stat (*test_io)(UNIT *uptr) */ /* Test I/O */
|
||||
NULL, /* t_stat (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
|
||||
lpr_rschnlio, /* t_stat (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
|
||||
NULL, /* t_stat (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
|
||||
lpr_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
|
||||
lpr_unit, /* UNIT* units */ /* Pointer to units structure */
|
||||
lpr_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
|
||||
NULL, /* IOCLQ *ioclq_ptr */ /* IOCL entries, 1 per UNIT */
|
||||
NUM_DEVS_LPR, /* uint8 numunits */ /* number of units defined */
|
||||
0x01, /* uint8 mask */ /* 2 devices - device mask */
|
||||
0x7e00, /* uint16 chan_addr */ /* parent channel address */
|
||||
0, /* uint32 chan_fifo_in */ /* fifo input index */
|
||||
0, /* uint32 chan_fifo_out */ /* fifo output index */
|
||||
{0} /* uint32 chan_fifo[FIFO_SIZE] */ /* interrupt status fifo for channel */
|
||||
};
|
||||
|
||||
DEVICE lpr_dev = {
|
||||
"LPR", lpr_unit, NULL, lpr_mod,
|
||||
NUM_DEVS_LPR, 8, 15, 1, 8, 8,
|
||||
NULL, NULL, NULL, NULL, &lpr_attach, &lpr_detach,
|
||||
/* ctxt is the DIB pointer */
|
||||
&lpr_dib, DEV_DISABLE|DEV_DEBUG, 0, dev_debug,
|
||||
// &lpr_dib, DEV_DISABLE|DEV_DEBUG|DEV_DIS, 0, dev_debug,
|
||||
NULL, NULL, &lpr_help, NULL, NULL, &lpr_description,
|
||||
};
|
||||
|
||||
/* initialize the line printer */
|
||||
void lpr_ini(UNIT *uptr, t_bool f) {
|
||||
uptr->CMD &= ~(LPR_CMDMSK); /* zero cmd */
|
||||
sim_cancel(uptr); /* stop any timers */
|
||||
uptr->SNS = 0; /* no status */
|
||||
uptr->CBP = 0; /* start of buffer */
|
||||
uptr->CNT = 0; /* restart line count */
|
||||
}
|
||||
|
||||
/* handle rschnlio cmds for lpr */
|
||||
t_stat lpr_rschnlio(UNIT *uptr) {
|
||||
DEVICE *dptr = get_dev(uptr); /* get device pointer */
|
||||
uint16 chsa = GET_UADDR(uptr->CMD);
|
||||
int cmd = uptr->CMD & LPR_CMDMSK;
|
||||
|
||||
sim_debug(DEBUG_EXP, dptr,
|
||||
"lpr_rschnl chsa %04x cmd = %02x\n", chsa, cmd);
|
||||
lpr_ini(uptr, 0); /* reset the unit */
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* start a line printer operation */
|
||||
t_stat lpr_preio(UNIT *uptr, uint16 chan) {
|
||||
DEVICE *dptr = get_dev(uptr);
|
||||
int unit = (uptr - dptr->units);
|
||||
uint16 chsa = GET_UADDR(uptr->CMD);
|
||||
|
||||
sim_debug(DEBUG_CMD, dptr, "lpr_preio CMD %08x unit %02x chsa %04x\n",
|
||||
uptr->CMD, unit, chsa);
|
||||
if ((uptr->CMD & LPR_CMDMSK) != 0) { /* just return if busy */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"lpr_preio unit %02x chsa %04x BUSY\n", unit, chsa);
|
||||
return SNS_BSY;
|
||||
}
|
||||
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"lpr_preio unit %02x chsa %04x OK\n", unit, chsa);
|
||||
return SCPE_OK; /* good to go */
|
||||
}
|
||||
|
||||
/* start an I/O operation */
|
||||
t_stat lpr_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
|
||||
{
|
||||
DEVICE *dptr = get_dev(uptr); /* get device pointer */
|
||||
|
||||
if ((uptr->CMD & LPR_CMDMSK) != 0) { /* unit busy */
|
||||
return SNS_BSY; /* yes, busy (already tested) */
|
||||
}
|
||||
|
||||
uptr->CMD &= ~(LPR_POST|LPR_PRE); /* set no CC */
|
||||
if (((cmd & 0x03) == 0x03) || (cmd & 0x0f) == 0x0d) {
|
||||
uptr->CMD |= LPR_PRE; /* apply pre CC */
|
||||
}
|
||||
if (((cmd & 0x0f) == 0x05) || (cmd & 0x0f) == 0x0d) {
|
||||
uptr->CMD |= LPR_POST; /* apply post CC */
|
||||
}
|
||||
sim_debug(DEBUG_CMD, dptr, "lpr_startcmd Cmd %02x\n", cmd);
|
||||
|
||||
/* process the command */
|
||||
switch (cmd & LPR_CMDMSK) {
|
||||
case 0x00: /* INCH command */
|
||||
/* the IOP should already have the inch buffer set, so ignore */
|
||||
sim_debug(DEBUG_CMD, dptr, "lpr_startcmd %04x: Cmd INCH\n", chan);
|
||||
return SNS_CHNEND|SNS_DEVEND; /* all is well */
|
||||
break;
|
||||
|
||||
/* No CC */
|
||||
case 0x01: /* print only, no forms control */
|
||||
/* print buffer then CC commands */
|
||||
case 0x05: /* print buffer, then <CR> */
|
||||
case 0x15: /* print buffer, then <LF> */
|
||||
case 0x25: /* print buffer, then <LF> <LF> */
|
||||
case 0x35: /* print buffer, then <LF> <LF> <LF> */
|
||||
case 0x45: /* print buffer, then <FF> */
|
||||
case 0x85: /* print buffer, then <CR> <CLEAR BUFFER> */
|
||||
/* Do CC then print commands then CC */
|
||||
case 0x0d: /* <CR> print buffer <CR> */
|
||||
case 0x1d: /* <LF> print buffer <CR> */
|
||||
case 0x2d: /* <LF> <LF> print buffer <CR> */
|
||||
case 0x3d: /* <LF> <LF> <LF> print buffer <CR> */
|
||||
case 0x4d: /* <FF> print buffer <CR> */
|
||||
/* Do CC only, no print */
|
||||
case 0x03: /* <CR> */
|
||||
case 0x17: /* <LF> */
|
||||
case 0x27: /* <LF> <LF> */
|
||||
case 0x37: /* <LF> <LF> <LF> */
|
||||
case 0x47: /* <FF> */
|
||||
|
||||
/* process the command */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"lpr_startcmd %04x: Cmd %02x print\n", chan, cmd&LPR_CMDMSK);
|
||||
uptr->CMD &= ~(LPR_CMDMSK); /* zero cmd */
|
||||
uptr->CMD |= (cmd & LPR_CMDMSK); /* save new command in CMD */
|
||||
sim_activate(uptr, 100); /* Start unit off */
|
||||
return 0; /* we are good to go */
|
||||
|
||||
case 0x4: /* Sense Status */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"lpr_startcmd %04x: Cmd %02x sense\n", chan, cmd&LPR_CMDMSK);
|
||||
uptr->CMD &= ~(LPR_CMDMSK); /* zero cmd */
|
||||
uptr->CMD |= (cmd & LPR_CMDMSK); /* save new command in CMD */
|
||||
sim_activate(uptr, 100); /* Start unit off */
|
||||
return 0; /* we are good to go */
|
||||
|
||||
default: /* invalid command */
|
||||
sim_debug(DEBUG_EXP, dptr,
|
||||
"lpr_startcmd %04x: Cmd %02x INVALID\n", chan, cmd&LPR_CMDMSK);
|
||||
uptr->SNS |= SNS_CMDREJ;
|
||||
break;
|
||||
}
|
||||
if (uptr->SNS & 0xff)
|
||||
return SNS_CHNEND|SNS_DEVEND|STATUS_PCHK;
|
||||
return SNS_CHNEND|SNS_DEVEND;
|
||||
}
|
||||
|
||||
/* Handle transfer of data for printer */
|
||||
t_stat lpr_srv(UNIT *uptr) {
|
||||
int chsa = GET_UADDR(uptr->CMD);
|
||||
int u = (uptr - lpr_unit);
|
||||
int cmd = (uptr->CMD & 0xff);
|
||||
CHANP *chp = find_chanp_ptr(chsa); /* find the chanp pointer */
|
||||
DEVICE *dptr = get_dev(uptr); /* get device pointer */
|
||||
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"lpr_srv called chsa %04x cmd %02x CMD %08x addr %06x cnt %04x\n",
|
||||
chsa, cmd, uptr->CMD, chp->ccw_addr, chp->ccw_count);
|
||||
|
||||
/* using IOP lp status bit assignments */
|
||||
if (cmd == 0x04) { /* sense? */
|
||||
uint8 ch; /* get current status */
|
||||
ch = (uptr->SNS >> 24) & 0xff; /* Get status */
|
||||
ch &= ~SNS_BOF; /* remove BOF flag */
|
||||
if (chan_write_byte(chsa, &ch)) { /* write byte 0 status to memory */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"lpr_srv write1 error CMD %08x read %02x SNS %02x ccw_count %02x\n",
|
||||
uptr->CMD, ch, uptr->SNS, chp->ccw_count);
|
||||
uptr->CMD &= ~(LPR_CMDMSK); /* clear command */
|
||||
uptr->SNS = 0; /* no status */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|STATUS_PCHK); /* 4 byte req'd */
|
||||
return SCPE_OK;
|
||||
}
|
||||
ch = (uptr->SNS >> 16) & 0xff; /* Get status */
|
||||
if (chan_write_byte(chsa, &ch)) { /* write the status to memory */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"lpr_srv write2 error CMD %08x read %02x SNS %02x ccw_count %02x\n",
|
||||
uptr->CMD, ch, uptr->SNS, chp->ccw_count);
|
||||
uptr->CMD &= ~(LPR_CMDMSK); /* clear command */
|
||||
uptr->SNS = 0; /* no status */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|STATUS_PCHK); /* 4 byte req'd */
|
||||
return SCPE_OK;
|
||||
}
|
||||
#ifdef MPX_WANTS_ONLY_2_BYTES
|
||||
ch = 0; /* byte 2 is always zero */
|
||||
if (chan_write_byte(chsa, &ch)) { /* write the status to memory */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"lpr_srv write3 error CMD %08x read %02x SNS %02x ccw_count %02x\n",
|
||||
uptr->CMD, ch, uptr->SNS, chp->ccw_count);
|
||||
uptr->CMD &= ~(LPR_CMDMSK); /* clear command */
|
||||
uptr->SNS = 0; /* no status */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|STATUS_PCHK); /* 4 byte req'd */
|
||||
return SCPE_OK;
|
||||
}
|
||||
ch = 0; /* byte 3 is always zero */
|
||||
if (chan_write_byte(chsa, &ch)) { /* write the status to memory */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"lpr_srv write4 error CMD %08x read %02x SNS %02x ccw_count %02x\n",
|
||||
uptr->CMD, ch, uptr->SNS, chp->ccw_count);
|
||||
uptr->CMD &= ~(LPR_CMDMSK); /* clear command */
|
||||
uptr->SNS = 0; /* no status */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|STATUS_PCHK); /* 4 byte req'd */
|
||||
return SCPE_OK;
|
||||
}
|
||||
#endif
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"lpr_srv sense write CMD %08x read %02x SNS %02x ccw_count %02x\n",
|
||||
uptr->CMD, ch, uptr->SNS, chp->ccw_count);
|
||||
uptr->CMD &= LMASK; /* make non-busy */
|
||||
uptr->SNS = 0; /* no status */
|
||||
chan_end(chsa, SNS_DEVEND|SNS_CHNEND); /* we are done */
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* NEW_02092022 */
|
||||
/* make sure we have a file attached, else give error */
|
||||
if ((uptr->flags & UNIT_ATT) == 0) {
|
||||
uptr->CMD &= LMASK; /* make non-busy */
|
||||
// uptr->SNS |= SNS_DEVPWR; /* show powered off */
|
||||
uptr->SNS |= SNS_DEVCHK; /* show device check */
|
||||
// uptr->SNS |= SNS_OFFLINE; /* show printer offline */
|
||||
uptr->SNS |= SNS_OPRINTR; /* operator intervention required */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"lpr_startcmd Cmd %02x LPR not attached SNS %08x\n", cmd, uptr->SNS);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|STATUS_CHECK);
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* process any CC before printing buffer */
|
||||
if ((uptr->CMD & LPR_PRE) && (((cmd & 0x03) == 0x03) ||
|
||||
(cmd & 0x0f) == 0x0d)) {
|
||||
uptr->CMD &= ~LPR_PRE; /* remove pre flag */
|
||||
/* we have CC to do */
|
||||
switch ((cmd & 0xf0) >> 4) {
|
||||
case 0: /* <CR> (0x0d) */
|
||||
lpr_data[u].lbuff[uptr->CBP++] = 0x0d;
|
||||
break;
|
||||
case 3: /* <LF> <LF> <LF> */
|
||||
lpr_data[u].lbuff[uptr->CBP++] = 0x0a;
|
||||
uptr->CNT++; /* increment the line count */
|
||||
/* drop thru */
|
||||
case 2: /* <LF> <LF> */
|
||||
lpr_data[u].lbuff[uptr->CBP++] = 0x0a;
|
||||
uptr->CNT++; /* increment the line count */
|
||||
/* drop thru */
|
||||
case 1: /* <LF> (0x0a) */
|
||||
lpr_data[u].lbuff[uptr->CBP++] = 0x0a;
|
||||
uptr->CNT++; /* increment the line count */
|
||||
break;
|
||||
case 4: /* <FF> (0x0c) */
|
||||
lpr_data[u].lbuff[uptr->CBP++] = 0x0d; /* add C/R */
|
||||
lpr_data[u].lbuff[uptr->CBP++] = 0x0a; /* add L/F */
|
||||
lpr_data[u].lbuff[uptr->CBP++] = 0x0c; /* add FF */
|
||||
uptr->CNT = 0; /* restart line count */
|
||||
/* set beginning of form and top of form */
|
||||
uptr->SNS |= (SNS_TOF|SNS_BEGOF);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* Copy next byte from users buffer */
|
||||
while ((uptr->CMD & LPR_FULL) == 0) { /* copy in a char if not full */
|
||||
if(chan_read_byte(chsa, &lpr_data[u].lbuff[uptr->CBP])) {
|
||||
uptr->CMD |= LPR_FULL; /* end of buffer or error */
|
||||
break; /* done reading */
|
||||
} else {
|
||||
/* remove nulls */
|
||||
if (lpr_data[u].lbuff[uptr->CBP] == '\0') {
|
||||
lpr_data[u].lbuff[uptr->CBP] = ' ';
|
||||
}
|
||||
/* remove backspace */
|
||||
if (lpr_data[u].lbuff[uptr->CBP] == 0x8) {
|
||||
lpr_data[u].lbuff[uptr->CBP] = ' ';
|
||||
}
|
||||
uptr->CBP++; /* next buffer loc */
|
||||
}
|
||||
}
|
||||
|
||||
/* remove trailing blanks before we apply trailing carriage control */
|
||||
while (uptr->CBP > 0) {
|
||||
if ((lpr_data[u].lbuff[uptr->CBP-1] == ' ') ||
|
||||
(lpr_data[u].lbuff[uptr->CBP-1] == '\0')) {
|
||||
uptr->CBP--;
|
||||
continue;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
/* process any CC after printing buffer */
|
||||
if ((uptr->CMD & LPR_FULL) && (uptr->CMD & LPR_POST) &&
|
||||
((cmd & 0x0f) == 0x0d)) {
|
||||
/* we have CC to do */
|
||||
uptr->CMD &= ~LPR_POST; /* remove post flag */
|
||||
lpr_data[u].lbuff[uptr->CBP++] = 0x0d; /* just a <CR> */
|
||||
}
|
||||
|
||||
/* process any CC after printing buffer */
|
||||
if ((uptr->CMD & LPR_FULL) && (uptr->CMD & LPR_POST) &&
|
||||
((cmd & 0x0f) == 0x05)) {
|
||||
/* we have CC to do */
|
||||
uptr->CMD &= ~LPR_POST; /* remove post flag */
|
||||
switch ((cmd & 0xf0) >> 4) {
|
||||
case 0: /* <CR> (0x0d) */
|
||||
lpr_data[u].lbuff[uptr->CBP++] = 0x0d;
|
||||
break;
|
||||
case 3: /* <LF> <LF> <LF> */
|
||||
lpr_data[u].lbuff[uptr->CBP++] = 0x0a;
|
||||
uptr->CNT++; /* increment the line count */
|
||||
/* drop thru */
|
||||
case 2: /* <LF> <LF> */
|
||||
lpr_data[u].lbuff[uptr->CBP++] = 0x0a;
|
||||
uptr->CNT++; /* increment the line count */
|
||||
/* drop thru */
|
||||
case 1: /* <LF> (0x0a) */
|
||||
lpr_data[u].lbuff[uptr->CBP++] = 0x0a;
|
||||
uptr->CNT++; /* increment the line count */
|
||||
break;
|
||||
case 4: /* <FF> (0x0c) */
|
||||
lpr_data[u].lbuff[uptr->CBP++] = 0x0d; /* add C/R */
|
||||
lpr_data[u].lbuff[uptr->CBP++] = 0x0a; /* add L/F */
|
||||
lpr_data[u].lbuff[uptr->CBP++] = 0x0c; /* add FF */
|
||||
uptr->CNT = 0; /* restart line count */
|
||||
/* set beginning of form and top of form */
|
||||
uptr->SNS |= (SNS_TOF|SNS_BEGOF);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* print the line if buffer is full */
|
||||
if (uptr->CMD & LPR_FULL || uptr->CBP >= 156) {
|
||||
lpr_data[u].lbuff[uptr->CBP] = 0x00; /* NULL terminate */
|
||||
sim_fwrite(&lpr_data[u].lbuff, 1, uptr->CBP, uptr->fileref); /* Print our buffer */
|
||||
sim_debug(DEBUG_DETAIL, dptr, "LPR %d %s\n", uptr->CNT, (char*)&lpr_data[u].lbuff);
|
||||
uptr->CMD &= ~(LPR_FULL|LPR_CMDMSK); /* clear old status */
|
||||
uptr->CBP = 0; /* start at beginning of buffer */
|
||||
if ((uint32)uptr->CNT > uptr->capac) { /* see if at max lines/page */
|
||||
uptr->CNT = 0; /* yes, restart count */
|
||||
uptr->SNS |= SNS_BOF; /* set BOF for SENSE */
|
||||
sim_debug(DEBUG_CMD, dptr, "lpr_srv Got BOF\n");
|
||||
/* IOP spec says to give unit exception if at BOF */
|
||||
chan_end(chsa, SNS_DEVEND|SNS_CHNEND|SNS_UNITEXP); /* we are done */
|
||||
} else {
|
||||
uptr->SNS &= ~SNS_BOF; /* reset BOF for SENSE */
|
||||
if (uptr->CNT == 0) {
|
||||
/* set beginning of form and top of form */
|
||||
uptr->SNS |= (SNS_TOF|SNS_BEGOF);
|
||||
}
|
||||
chan_end(chsa, SNS_DEVEND|SNS_CHNEND); /* we are done */
|
||||
}
|
||||
/* done, so no time out */
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* should not get here */
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* Handle haltio transfers for printer */
|
||||
t_stat lpr_haltio(UNIT *uptr) {
|
||||
uint16 chsa = GET_UADDR(uptr->CMD);
|
||||
int cmd = uptr->CMD & LPR_CMDMSK;
|
||||
CHANP *chp = find_chanp_ptr(chsa); /* find the chanp pointer */
|
||||
|
||||
sim_debug(DEBUG_EXP, &lpr_dev,
|
||||
"lpr_haltio enter chsa %04x cmd = %02x\n", chsa, cmd);
|
||||
|
||||
/* terminate any input command */
|
||||
/* UTX wants SLI bit, but no unit exception */
|
||||
/* status must not have an error bit set */
|
||||
/* otherwise, UTX will panic with "bad status" */
|
||||
if ((uptr->CMD & LPR_CMDMSK) != 0) { /* is unit busy */
|
||||
sim_debug(DEBUG_CMD, &con_dev,
|
||||
"lpr_haltio HIO chsa %04x cmd = %02x ccw_count %02x\n",
|
||||
chsa, cmd, chp->ccw_count);
|
||||
sim_cancel(uptr); /* stop timer */
|
||||
} else {
|
||||
sim_debug(DEBUG_CMD, &con_dev,
|
||||
"lpr_haltio HIO not busy chsa %04x cmd = %02x ccw_count %02x\n",
|
||||
chsa, cmd, chp->ccw_count);
|
||||
}
|
||||
/* stop any I/O and post status and return error status */
|
||||
chp->ccw_count = 0; /* zero the count */
|
||||
chp->ccw_flags &= ~(FLAG_DC|FLAG_CC); /* reset chaining bits */
|
||||
uptr->CMD &= LMASK; /* make non-busy */
|
||||
uptr->SNS = 0; /* no status */
|
||||
uptr->CBP = 0; /* start of buffer */
|
||||
sim_debug(DEBUG_CMD, &con_dev,
|
||||
"lpr_haltio HIO I/O stop chsa %04x cmd = %02x\n", chsa, cmd);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* force end */
|
||||
return SCPE_IOERR; /* tell chan code to post status */
|
||||
}
|
||||
|
||||
/* Set the number of lines per page on printer */
|
||||
t_stat lpr_setlpp(UNIT *uptr, int32 val, CONST char *cptr, void *desc)
|
||||
{
|
||||
int i;
|
||||
if (cptr == NULL)
|
||||
return SCPE_ARG;
|
||||
if (uptr == NULL)
|
||||
return SCPE_IERR;
|
||||
i = 0;
|
||||
while(*cptr != '\0') {
|
||||
if (*cptr < '0' || *cptr > '9')
|
||||
return SCPE_ARG;
|
||||
i = (i * 10) + (*cptr++) - '0';
|
||||
}
|
||||
if (i < 20 || i > 100)
|
||||
return SCPE_ARG;
|
||||
uptr->capac = i;
|
||||
uptr->CNT = 0;
|
||||
/* set beginning of form and top of form */
|
||||
uptr->SNS |= (SNS_TOF|SNS_BEGOF);
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* display the number of lines per page */
|
||||
t_stat lpr_getlpp(FILE *st, UNIT *uptr, int32 v, CONST void *desc)
|
||||
{
|
||||
if (uptr == NULL)
|
||||
return SCPE_IERR;
|
||||
fprintf(st, "linesperpage=%02d", uptr->capac);
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* attach a file to the line printer device */
|
||||
t_stat lpr_attach(UNIT *uptr, CONST char *file)
|
||||
{
|
||||
t_stat r;
|
||||
uint16 chsa = GET_UADDR(uptr->CMD); /* get address of lpr device */
|
||||
CHANP *chp = find_chanp_ptr(chsa); /* get channel prog pointer */
|
||||
DEVICE *dptr = get_dev(uptr); /* get device pointer */
|
||||
DIB *dibp = 0;
|
||||
|
||||
if ((r = attach_unit(uptr, file)) != SCPE_OK)
|
||||
return r;
|
||||
uptr->CMD &= ~(LPR_FULL|LPR_CMDMSK);
|
||||
uptr->CNT = 0;
|
||||
uptr->SNS = 0;
|
||||
/* set beginning of form and top of form */
|
||||
uptr->SNS |= (SNS_TOF|SNS_BEGOF);
|
||||
uptr->capac = 66;
|
||||
|
||||
/* check for valid configured lpr */
|
||||
/* must have valid DIB and Channel Program pointer */
|
||||
dibp = (DIB *)dptr->ctxt; /* get the DIB pointer */
|
||||
if ((dib_unit[chsa] == NULL) || (dibp == NULL) || (chp == NULL)) {
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"ERROR===ERROR\nLPR device %s not configured on system, aborting\n",
|
||||
dptr->name);
|
||||
printf("ERROR===ERROR\nLPR device %s not configured on system, aborting\r\n",
|
||||
dptr->name);
|
||||
detach_unit(uptr); /* detach if error */
|
||||
return SCPE_UNATT; /* error */
|
||||
}
|
||||
set_devattn(chsa, SNS_DEVEND); /* ready int???? */
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* help information for lpr */
|
||||
t_stat lpr_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr)
|
||||
{
|
||||
fprintf (st, "SEL32 924x High Speed Line Printer\n");
|
||||
fprintf (st, "The Line printer can be configured to any number of\n");
|
||||
fprintf (st, "lines per page with the:\n");
|
||||
fprintf (st, "sim> SET LPRn LINESPERPAGE=n\n\n");
|
||||
fprintf (st, "The default is 66 lines per page.\n");
|
||||
fprint_set_help(st, dptr);
|
||||
fprint_show_help(st, dptr);
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* detach a file from the line printer */
|
||||
t_stat lpr_detach(UNIT * uptr)
|
||||
{
|
||||
return detach_unit(uptr);
|
||||
}
|
||||
|
||||
const char *lpr_description (DEVICE *dptr)
|
||||
{
|
||||
return "SEL32 924x High Speed Line Printer";
|
||||
}
|
||||
|
||||
#endif
|
||||
357
SEL32/sel32_mfp.c
Normal file
357
SEL32/sel32_mfp.c
Normal file
|
|
@ -0,0 +1,357 @@
|
|||
/* sel32_mfp.c: SEL-32 Model 8002 MFP processor controller
|
||||
|
||||
Copyright (c) 2018-2022, James C. Bevier
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
to deal in the Software without restriction, including without limitation
|
||||
the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
and/or sell copies of the Software, and to permit persons to whom the
|
||||
Software is furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in
|
||||
all copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
JAMES C. BEVIER BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
|
||||
This channel is the interrupt fielder for all of the MFP sub channels. It's
|
||||
channel address is 7600. This code handles the INCH command for the MFP
|
||||
devices and controls the status FIFO for the mfp devices on interrupts and
|
||||
TIO instructions..
|
||||
|
||||
Possible devices:
|
||||
The f8iop communication controller (TY76A0), (TY76B0), (TY76C0)
|
||||
The ctiop console communications controller (CT76FC & CT76FD)
|
||||
The lpiop line printer controller (LP76F8), (LP76F9)
|
||||
The scsi SCSI disk controller (DM7600), (DM7640)
|
||||
|
||||
*/
|
||||
|
||||
#include "sel32_defs.h"
|
||||
|
||||
#if NUM_DEVS_MFP > 0
|
||||
|
||||
#define UNIT_MFP UNIT_IDLE | UNIT_DISABLE
|
||||
|
||||
/* forward definitions */
|
||||
t_stat mfp_preio(UNIT *uptr, uint16 chan);
|
||||
t_stat mfp_startcmd(UNIT *uptr, uint16 chan, uint8 cmd);
|
||||
void mfp_ini(UNIT *uptr, t_bool f);
|
||||
t_stat mfp_rschnlio(UNIT *uptr);
|
||||
t_stat mfp_srv(UNIT *uptr);
|
||||
t_stat mfp_reset(DEVICE *dptr);
|
||||
t_stat mfp_help(FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr);
|
||||
const char *mfp_desc(DEVICE *dptr);
|
||||
|
||||
/* Held in u3 is the device command and status */
|
||||
#define MFP_INCH 0x00 /* Initialize channel command */
|
||||
#define MFP_INCH2 0xf0 /* Initialize channel command after start */
|
||||
#define MFP_NOP 0x03 /* NOP command */
|
||||
#define MFP_SID 0x80 /* MFP status command */
|
||||
#define MFP_MSK 0xff /* Command mask */
|
||||
|
||||
/* Status held in u3 */
|
||||
/* controller/unit address in upper 16 bits */
|
||||
#define CON_INPUT 0x100 /* Input ready for unit */
|
||||
#define CON_CR 0x200 /* Output at beginning of line */
|
||||
#define CON_REQ 0x400 /* Request key pressed */
|
||||
#define CON_EKO 0x800 /* Echo input character */
|
||||
#define CON_OUTPUT 0x1000 /* Output ready for unit */
|
||||
#define CON_READ 0x2000 /* Read mode selected */
|
||||
|
||||
/* not used u4 */
|
||||
|
||||
/* in u5 packs sense byte 0,1 and 3 */
|
||||
/* Sense byte 0 */
|
||||
#define SNS_CMDREJ 0x80000000 /* Command reject */
|
||||
#define SNS_INTVENT 0x40000000 /* Unit intervention required */
|
||||
/* sense byte 3 */
|
||||
#define SNS_RDY 0x80 /* device ready */
|
||||
#define SNS_ONLN 0x40 /* device online */
|
||||
|
||||
/* std devices. data structures
|
||||
|
||||
mfp_dev Console device descriptor
|
||||
mfp_unit Console unit descriptor
|
||||
mfp_reg Console register list
|
||||
mfp_mod Console modifiers list
|
||||
*/
|
||||
|
||||
struct _mfp_data
|
||||
{
|
||||
uint8 ibuff[145]; /* Input line buffer */
|
||||
uint8 incnt; /* char count */
|
||||
}
|
||||
mfp_data[NUM_UNITS_MFP];
|
||||
|
||||
/* channel program information */
|
||||
CHANP mfp_chp[NUM_UNITS_MFP] = {0};
|
||||
|
||||
MTAB mfp_mod[] = {
|
||||
{MTAB_XTD | MTAB_VUN | MTAB_VALR, 0, "DEV", "DEV",
|
||||
&set_dev_addr, &show_dev_addr, NULL, "Controller Channel address"},
|
||||
{0}
|
||||
};
|
||||
|
||||
UNIT mfp_unit[] = {
|
||||
{UDATA(&mfp_srv, UNIT_MFP, 0), 0, UNIT_ADDR(0x7600)}, /* Channel controller */
|
||||
};
|
||||
|
||||
//DIB mfp_dib = {NULL, mfp_startcmd, NULL, NULL, NULL, mfp_ini, mfp_unit, mfp_chp, NUM_UNITS_MFP, 0xff, 0x7600,0,0,0};
|
||||
DIB mfp_dib = {
|
||||
mfp_preio, /* t_stat (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
|
||||
mfp_startcmd, /* t_stat (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
|
||||
NULL, /* t_stat (*halt_io)(UNIT *uptr) */ /* Halt I/O HIO */
|
||||
NULL, /* t_stat (*stop_io)(UNIT *uptr) */ /* Stop I/O HIO */
|
||||
NULL, /* t_stat (*test_io)(UNIT *uptr) */ /* Test I/O TIO */
|
||||
NULL, /* t_stat (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
|
||||
mfp_rschnlio, /* t_stat (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
|
||||
NULL, /* t_stat (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
|
||||
mfp_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
|
||||
mfp_unit, /* UNIT* units */ /* Pointer to units structure */
|
||||
mfp_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
|
||||
NULL, /* IOCLQ *ioclq_ptr */ /* IOCL entries, 1 per UNIT */
|
||||
NUM_UNITS_MFP, /* uint8 numunits */ /* number of units defined */
|
||||
0xff, /* uint8 mask */ /* 16 devices - device mask */
|
||||
0x7600, /* uint16 chan_addr */ /* parent channel address */
|
||||
0, /* uint32 chan_fifo_in */ /* fifo input index */
|
||||
0, /* uint32 chan_fifo_out */ /* fifo output index */
|
||||
{0} /* uint32 chan_fifo[FIFO_SIZE] */ /* interrupt status fifo for channel */
|
||||
};
|
||||
|
||||
DEVICE mfp_dev = {
|
||||
"MFP", mfp_unit, NULL, mfp_mod,
|
||||
NUM_UNITS_MFP, 8, 15, 1, 8, 8,
|
||||
NULL, NULL, &mfp_reset, /* examine, deposit, reset */
|
||||
NULL, NULL, NULL, /* boot, attach, detach */
|
||||
/* dib ptr, dev flags, debug flags, debug */
|
||||
&mfp_dib, DEV_CHAN|DEV_DIS|DEV_DISABLE|DEV_DEBUG, 0, dev_debug,
|
||||
};
|
||||
|
||||
/* MFP controller routines */
|
||||
/* initialize the console chan/unit */
|
||||
void mfp_ini(UNIT *uptr, t_bool f)
|
||||
{
|
||||
int unit = (uptr - mfp_unit); /* unit 0 */
|
||||
DEVICE *dptr = &mfp_dev; /* one and only dummy device */
|
||||
|
||||
mfp_data[unit].incnt = 0; /* no input data */
|
||||
uptr->u5 = SNS_RDY|SNS_ONLN; /* status is online & ready */
|
||||
sim_cancel(uptr); /* stop any timers */
|
||||
sim_debug(DEBUG_CMD, &mfp_dev,
|
||||
"MFP init device %s controller/device %04x SNS %08x\n",
|
||||
dptr->name, GET_UADDR(uptr->u3), uptr->u5);
|
||||
}
|
||||
|
||||
/* handle rschnlio cmds for disk */
|
||||
t_stat mfp_rschnlio(UNIT *uptr) {
|
||||
DEVICE *dptr = get_dev(uptr);
|
||||
uint16 chsa = GET_UADDR(uptr->u3);
|
||||
int cmd = uptr->u3 & MFP_MSK;
|
||||
|
||||
sim_debug(DEBUG_EXP, dptr,
|
||||
"mfp_rschnl chsa %04x cmd = %02x\n", chsa, cmd);
|
||||
mfp_ini(uptr, 0); /* reset the unit */
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* start an mfp operation */
|
||||
t_stat mfp_preio(UNIT *uptr, uint16 chan) {
|
||||
DEVICE *dptr = get_dev(uptr);
|
||||
int unit = (uptr - dptr->units);
|
||||
uint16 chsa = GET_UADDR(uptr->u3);
|
||||
|
||||
sim_debug(DEBUG_CMD, dptr, "mfp_preio CMD %08x unit %02x chsa %04x\n",
|
||||
uptr->u3, unit, chsa);
|
||||
|
||||
if ((uptr->u3 & MFP_MSK) != 0) { /* is unit busy */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"mfp_preio unit %02x chsa %04x BUSY\n", unit, chsa);
|
||||
return SNS_BSY; /* yes, return busy */
|
||||
}
|
||||
|
||||
sim_debug(DEBUG_CMD, dptr, "mfp_preio unit %02x chsa %04x OK\n", unit, chsa);
|
||||
return SCPE_OK; /* good to go */
|
||||
}
|
||||
|
||||
/* start an I/O operation */
|
||||
t_stat mfp_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
|
||||
{
|
||||
sim_debug(DEBUG_CMD, &mfp_dev,
|
||||
"MFP startcmd %02x controller/device %04x\n",
|
||||
cmd, GET_UADDR(uptr->u3));
|
||||
if ((uptr->u3 & MFP_MSK) != 0) /* is unit busy */
|
||||
return SNS_BSY; /* yes, return busy */
|
||||
|
||||
/* process the commands */
|
||||
switch (cmd & 0xFF) {
|
||||
/* UTX uses the INCH cmd to detect the MFP or MFP */
|
||||
/* MFP has INCH cmd of 0, while MFP uses 0x80 */
|
||||
case MFP_INCH: /* INCH command */
|
||||
uptr->u5 = SNS_RDY|SNS_ONLN; /* status is online & ready */
|
||||
uptr->u3 &= LMASK; /* leave only chsa */
|
||||
sim_debug(DEBUG_CMD, &mfp_dev,
|
||||
"mfp_startcmd %04x: Cmd INCH iptr %06x INCHa %06x\n",
|
||||
chan, mfp_chp[0].ccw_addr, /* set inch buffer addr */
|
||||
mfp_chp[0].chan_inch_addr); /* set inch buffer addr */
|
||||
|
||||
mfp_chp[0].chan_inch_addr = mfp_chp[0].ccw_addr; /* set inch buffer addr */
|
||||
mfp_chp[0].base_inch_addr = mfp_chp[0].ccw_addr; /* set inch buffer addr */
|
||||
mfp_chp[0].max_inch_addr = mfp_chp[0].ccw_addr + (128 * 8); /* set last inch buffer addr */
|
||||
|
||||
uptr->u3 |= MFP_INCH2; /* save INCH command as 0xf0 */
|
||||
sim_activate(uptr, 40); /* go on */
|
||||
return 0; /* no status change */
|
||||
break;
|
||||
|
||||
case MFP_NOP: /* NOP command */
|
||||
sim_debug(DEBUG_CMD, &mfp_dev, "mfp_startcmd %04x: Cmd NOP\n", chan);
|
||||
uptr->u5 = SNS_RDY|SNS_ONLN; /* status is online & ready */
|
||||
uptr->u3 &= LMASK; /* leave only chsa */
|
||||
uptr->u3 |= (cmd & MFP_MSK); /* save NOP command */
|
||||
sim_activate(uptr, 40); /* TRY 07-13-19 */
|
||||
return 0; /* no status change */
|
||||
break;
|
||||
|
||||
case MFP_SID: /* status ID command */
|
||||
sim_debug(DEBUG_CMD, &mfp_dev, "mfp_startcmd %04x: Cmd SID\n", chan);
|
||||
uptr->u5 = SNS_RDY|SNS_ONLN; /* status is online & ready */
|
||||
uptr->u3 &= LMASK; /* leave only chsa */
|
||||
uptr->u3 |= (cmd & MFP_MSK); /* save SID command */
|
||||
sim_activate(uptr, 40); /* TRY 07-13-19 */
|
||||
return 0; /* no status change */
|
||||
break;
|
||||
|
||||
default: /* invalid command */
|
||||
uptr->u5 |= SNS_CMDREJ; /* command rejected */
|
||||
sim_debug(DEBUG_CMD, &mfp_dev, "mfp_startcmd %04x: Cmd Invalid %02x status %02x\n",
|
||||
chan, cmd, uptr->u5);
|
||||
uptr->u3 &= LMASK; /* leave only chsa */
|
||||
uptr->u3 |= (cmd & MFP_MSK); /* save command */
|
||||
sim_activate(uptr, 40); /* force interrupt */
|
||||
return 0; /* no status change */
|
||||
break;
|
||||
}
|
||||
|
||||
return SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK; /* not reachable for now */
|
||||
}
|
||||
|
||||
/* Handle transfers for other sub-channels on MFP */
|
||||
t_stat mfp_srv(UNIT *uptr)
|
||||
{
|
||||
uint16 chsa = GET_UADDR(uptr->u3);
|
||||
int cmd = uptr->u3 & MFP_MSK;
|
||||
CHANP *chp = &mfp_chp[0]; /* find the chanp pointer */
|
||||
uint32 mema = chp->ccw_addr; /* get inch or buffer addr */
|
||||
uint32 tstart;
|
||||
|
||||
/* test for NOP or INCH cmds */
|
||||
if ((cmd != MFP_NOP) && (cmd != MFP_INCH2) && (cmd != MFP_SID)) { /* NOP, SID or INCH */
|
||||
uptr->u3 &= LMASK; /* nothing left, command complete */
|
||||
sim_debug(DEBUG_CMD, &mfp_dev,
|
||||
"mfp_srv Unknown cmd %02x chan %02x: chnend|devend|unitexp\n", cmd, chsa);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITEXP); /* done */
|
||||
return SCPE_OK;
|
||||
} else
|
||||
|
||||
if (cmd == MFP_NOP) { /* NOP do nothing */
|
||||
uptr->u3 &= LMASK; /* nothing left, command complete */
|
||||
sim_debug(DEBUG_CMD, &mfp_dev, "mfp_srv NOP chan %02x: chnend|devend\n", chsa);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* done */
|
||||
return SCPE_OK;
|
||||
} else
|
||||
|
||||
/* 3 status wds are to be returned */
|
||||
/* Wd 1 MMXXXXXX board model # assume 00 00 08 02*/
|
||||
/* Wd 2 MMXXXXXX board firmware model # assume 00 00 08 02*/
|
||||
/* Wd 3 MMXXXXXX board firmware revision # assume 00 00 00 14*/
|
||||
if (cmd == MFP_SID) { /* send 12 byte Status ID data */
|
||||
uint8 ch;
|
||||
|
||||
/* Word 0 */ /* board mod 4324724 = 0x0041fd74 */
|
||||
ch = 0x00;
|
||||
chan_write_byte(chsa, &ch); /* write byte 0 */
|
||||
ch = 0x00;
|
||||
chan_write_byte(chsa, &ch); /* write byte 1 */
|
||||
ch = 0x81;
|
||||
chan_write_byte(chsa, &ch); /* write byte 2 */
|
||||
ch = 0x02;
|
||||
chan_write_byte(chsa, &ch); /* write byte 3 */
|
||||
|
||||
/* Word 1 */ /* firmware 4407519 = 0x004340df */
|
||||
ch = 0x00;
|
||||
chan_write_byte(chsa, &ch); /* write byte 4 */
|
||||
ch = 0x00;
|
||||
chan_write_byte(chsa, &ch); /* write byte 5 */
|
||||
ch = 0x80;
|
||||
chan_write_byte(chsa, &ch); /* write byte 6 */
|
||||
ch = 0x02;
|
||||
chan_write_byte(chsa, &ch); /* write byte 7 */
|
||||
|
||||
/* Word 2 */ /* firmware rev 4259588 = 0x0040ff04 */
|
||||
ch = 0x00;
|
||||
chan_write_byte(chsa, &ch); /* write byte 8 */
|
||||
ch = 0x00;
|
||||
chan_write_byte(chsa, &ch); /* write byte 9 */
|
||||
ch = 0x00;
|
||||
chan_write_byte(chsa, &ch); /* write byte 10 */
|
||||
ch = 0x14;
|
||||
chan_write_byte(chsa, &ch); /* write byte 11 */
|
||||
|
||||
uptr->u3 &= LMASK; /* nothing left, command complete */
|
||||
sim_debug(DEBUG_CMD, &mfp_dev, "mfp_srv SID chan %02x: chnend|devend\n", chsa);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* done */
|
||||
return SCPE_OK;
|
||||
} else
|
||||
|
||||
/* test for INCH cmd */
|
||||
if (cmd == MFP_INCH2) { /* INCH */
|
||||
sim_debug(DEBUG_CMD, &mfp_dev,
|
||||
"mfp_srv starting INCH %06x cmd, chsa %04x MemBuf %06x cnt %04x\n",
|
||||
mema, chsa, chp->ccw_addr, chp->ccw_count);
|
||||
|
||||
/* now call set_inch() function to write and test inch buffer addresses */
|
||||
/* the chp->ccw_addr location contains the inch address */
|
||||
/* 1-256 wd buffer is provided for 128 status dbl words */
|
||||
tstart = set_inch(uptr, mema, 128); /* new address of 128 entries */
|
||||
if ((tstart == SCPE_MEM) || (tstart == SCPE_ARG)) { /* any error */
|
||||
/* we have error, bail out */
|
||||
uptr->u5 |= SNS_CMDREJ;
|
||||
uptr->u3 &= LMASK; /* nothing left, command complete */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
return SCPE_OK;
|
||||
}
|
||||
uptr->u3 &= LMASK; /* clear the cmd */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we are done dev|chan end */
|
||||
}
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
t_stat mfp_reset(DEVICE *dptr)
|
||||
{
|
||||
/* add reset code here */
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* sho help mfp */
|
||||
t_stat mfp_help(FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, CONST char *cptr)
|
||||
{
|
||||
fprintf(st, "SEL-32 MFP Model 8002 Channel Controller at 0x7600\r\n");
|
||||
fprintf(st, "The MFP fields all interrupts and status posting\r\n");
|
||||
fprintf(st, "for each of the controllers on the system.\r\n");
|
||||
fprintf(st, "Nothing can be configured for this Channel.\r\n");
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
const char *mfp_desc(DEVICE *dptr)
|
||||
{
|
||||
return("SEL-32 MFP Model 8002 Channel Controller @ 0x7600");
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
1645
SEL32/sel32_mt.c
Normal file
1645
SEL32/sel32_mt.c
Normal file
File diff suppressed because it is too large
Load diff
1997
SEL32/sel32_scfi.c
Normal file
1997
SEL32/sel32_scfi.c
Normal file
File diff suppressed because it is too large
Load diff
2068
SEL32/sel32_scsi.c
Normal file
2068
SEL32/sel32_scsi.c
Normal file
File diff suppressed because it is too large
Load diff
1722
SEL32/sel32_sys.c
Normal file
1722
SEL32/sel32_sys.c
Normal file
File diff suppressed because it is too large
Load diff
635
SEL32/tests/SetupNet
Executable file
635
SEL32/tests/SetupNet
Executable file
|
|
@ -0,0 +1,635 @@
|
|||
#!/bin/sh
|
||||
|
||||
# Copyright (c) 2020, Geert Rolf
|
||||
#
|
||||
# Permission is hereby granted, free of charge, to any person obtaining a
|
||||
# copy of this software and associated documentation files (the "Software"),
|
||||
# to deal in the Software without restriction, including without limitation
|
||||
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
# and/or sell copies of the Software, and to permit persons to whom the
|
||||
# Software is furnished to do so, subject to the following conditions:
|
||||
#
|
||||
# The above copyright notice and this permission notice shall be included in
|
||||
# all copies or substantial portions of the Software.
|
||||
#
|
||||
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
# GEERT ROLF BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
#
|
||||
|
||||
# Test platforms:
|
||||
#
|
||||
# Debian 10 (Buster)
|
||||
# Raspbian Buster
|
||||
# FreeBSD 12.1
|
||||
# OpenBSD 6.7
|
||||
# NetBSD 9.1
|
||||
|
||||
# CHANGE HISTORY
|
||||
# 2021/4/8 avoid setting PATH in scripts for root
|
||||
# 2021/5/31 whereis used without -b in OpenBSD and NetBSD
|
||||
# Corrected: bridge create and fwdelay done twice for NetBSD
|
||||
# FreeBSD: tapX opened by userland program not by ifconfig
|
||||
# 2021/11/17 check for existance of br0 done too lousy. Done better.
|
||||
#
|
||||
|
||||
# uncomment next line if you need more than one tap = run multiple SIMHs...
|
||||
#OPSMODE="expert"
|
||||
# ... by editting the saved params file followed by rerun of this script
|
||||
|
||||
OS=`uname -s`
|
||||
case $OS in
|
||||
"FreeBSD" | "OpenBSD" | "NetBSD")
|
||||
# List of Utils
|
||||
LOU="ifconfig brconfig sysctl chown netstat"
|
||||
|
||||
# set $util to path of util for all in $LOU
|
||||
for U in $LOU
|
||||
do
|
||||
# whereis -b in only FreeBSD as in Linux
|
||||
if test $OS = "FreeBSD"
|
||||
then
|
||||
eval ${U}="`whereis -b $U |
|
||||
awk '{ if($2 != "")
|
||||
print $2;
|
||||
else
|
||||
print "void";
|
||||
}'`"
|
||||
else
|
||||
eval ${U}="`whereis $U |
|
||||
awk '{ if($1 != "")
|
||||
print $1;
|
||||
else
|
||||
print "void";
|
||||
}'`"
|
||||
fi
|
||||
done
|
||||
|
||||
# make list of all interfaces ignoring lo
|
||||
AVL_IF=`$ifconfig -a |
|
||||
grep -v '^[ ]' |
|
||||
awk -F: '{ print $1 }' |
|
||||
grep -v 'lo' |
|
||||
sed '1,$s/^ //'`
|
||||
|
||||
## echo $AVL_IF
|
||||
|
||||
# found bridge0 in active interfaces?
|
||||
L=`echo $AVL_IF | grep bridge0 | wc -l`
|
||||
if test $L -ne 0
|
||||
then
|
||||
echo "$0: bridge0 already configured."
|
||||
echo "-- if you configured bridge0 statically don't use this script"
|
||||
echo "-- otherwise if you do not want permanent settings"
|
||||
echo "-- and want bridge0 configured differently reboot first"
|
||||
exit 1
|
||||
fi
|
||||
|
||||
;;
|
||||
"Linux")
|
||||
# List of Utils
|
||||
LOU="ip brctl tunctl netstat"
|
||||
|
||||
# set $util to path of util for all in $LOU
|
||||
for U in $LOU
|
||||
do
|
||||
eval ${U}="`whereis -b $U |
|
||||
awk '{ if($2 != "")
|
||||
print $2;
|
||||
else
|
||||
print "void";
|
||||
}'`"
|
||||
done
|
||||
|
||||
ERR=0
|
||||
# check brctl to exist
|
||||
if test $brctl = "void"
|
||||
then
|
||||
echo 'No brctl program -- please install package bridge-utils'
|
||||
ERR=1
|
||||
fi
|
||||
|
||||
# check tunctl to exist
|
||||
if test $tunctl = "void"
|
||||
then
|
||||
echo 'No tunctl program -- please install package uml-utilities'
|
||||
ERR=1
|
||||
fi
|
||||
|
||||
# quit when either not installed
|
||||
if test $ERR -eq 1
|
||||
then
|
||||
exit 1
|
||||
fi
|
||||
|
||||
# make list of all interfaces ignoring lo
|
||||
AVL_IF=`$ip link show |
|
||||
grep '^[0-9]' |
|
||||
awk -F: '{ print $2 }' |
|
||||
grep -v 'lo' |
|
||||
sed '1,$s/^ //'`
|
||||
|
||||
# found br0 in active interfaces?
|
||||
L=`echo $AVL_IF | tr ' ' '\012' | grep '^br0$' | wc -l`
|
||||
if test $L -ne 0
|
||||
then
|
||||
echo "$0: br0 already configured."
|
||||
echo "-- if you configured br0 statically don't use this script"
|
||||
echo "-- otherwise if you do not want permanent settings"
|
||||
echo "-- and want br0 configured differently reboot first"
|
||||
exit 1
|
||||
fi
|
||||
|
||||
;;
|
||||
esac
|
||||
|
||||
# let user chose the interface he/she wants to use
|
||||
echo " Available networkinterfaces"
|
||||
N=0
|
||||
for I in $AVL_IF
|
||||
do
|
||||
N=`expr $N + 1`
|
||||
case $OS in
|
||||
"FreeBSD" | "OpenBSD" | "NetBSD")
|
||||
IPCMD="$ifconfig $I "
|
||||
;;
|
||||
"Linux")
|
||||
IPCMD="$ip addr show $I "
|
||||
;;
|
||||
esac
|
||||
|
||||
L=`$IPCMD |
|
||||
grep 'inet' |
|
||||
grep -v 'inet6' |
|
||||
wc -l`
|
||||
if test $L -eq 0
|
||||
then
|
||||
M="not configured"
|
||||
else
|
||||
M=`$IPCMD |
|
||||
grep 'inet' |
|
||||
grep -v 'inet6' |
|
||||
awk '{ print $2 }' `
|
||||
fi
|
||||
|
||||
# did we see wlan? alas...
|
||||
L=`echo $I | grep wlan | wc -l`
|
||||
if test $L -gt 0
|
||||
then
|
||||
M="$M (wlan not supported)"
|
||||
echo "-: $I $M"
|
||||
N=`expr $N - 1`
|
||||
else
|
||||
if test -r SnetSaved.$I
|
||||
then
|
||||
echo "$N: $I $M (saved params available)"
|
||||
else
|
||||
echo "$N: $I $M"
|
||||
fi
|
||||
fi
|
||||
done
|
||||
# take wlan out
|
||||
AVL_IF=`echo $AVL_IF | sed 's/wlan.//'`
|
||||
|
||||
if test $N -gt 1
|
||||
then
|
||||
ANSWER=0
|
||||
while test $ANSWER -lt 1 -o $ANSWER -gt $N
|
||||
do
|
||||
echo -n "Which interface do you want to use? "
|
||||
read ANSWER
|
||||
done
|
||||
else
|
||||
ANSWER=1
|
||||
fi
|
||||
|
||||
N=0
|
||||
for I in $AVL_IF
|
||||
do
|
||||
N=`expr $N + 1`
|
||||
if test $N -eq $ANSWER
|
||||
then
|
||||
ACT_IF=$I
|
||||
fi
|
||||
done
|
||||
|
||||
# see if there are saved params for this interface
|
||||
if test -r SnetSaved.$ACT_IF
|
||||
then
|
||||
. ./SnetSaved.$ACT_IF
|
||||
echo "Saved params loaded from SnetSaved.$ACT_IF"
|
||||
fi
|
||||
|
||||
echo ""
|
||||
echo "Interface to use for SIMH......... " $ACT_IF
|
||||
|
||||
if test "x$IPNR" = "x"
|
||||
then
|
||||
case $OS in
|
||||
"FreeBSD" | "OpenBSD" | "NetBSD")
|
||||
IPCMD="$ifconfig $ACT_IF "
|
||||
;;
|
||||
"Linux")
|
||||
IPCMD="$ip addr show dev $ACT_IF "
|
||||
;;
|
||||
esac
|
||||
|
||||
L=`$IPCMD |
|
||||
grep inet |
|
||||
grep -v inet6 |
|
||||
wc -l`
|
||||
if test $L -eq 0
|
||||
then
|
||||
IPNR="not configured"
|
||||
else
|
||||
IPNR=`$IPCMD |
|
||||
grep inet |
|
||||
grep -v inet6 |
|
||||
awk '{ print $2 }' `
|
||||
fi
|
||||
fi
|
||||
echo "IPnumber on this interface........ " $IPNR
|
||||
|
||||
if test "x$IPBRO" = "x"
|
||||
then
|
||||
case $OS in
|
||||
"FreeBSD" | "OpenBSD" | "NetBSD")
|
||||
IPCMD="$ifconfig $ACT_IF "
|
||||
SEDBRO='1s/^.*broadcast //'
|
||||
;;
|
||||
"Linux")
|
||||
IPCMD="$ip addr show dev $ACT_IF "
|
||||
SEDBRO='1s/^.*brd //'
|
||||
;;
|
||||
esac
|
||||
|
||||
IPBRO=`$IPCMD |
|
||||
grep inet |
|
||||
grep -v inet6 |
|
||||
sed "$SEDBRO" |
|
||||
sed '1s/[ ].*$//'`
|
||||
fi
|
||||
echo "IP Broadcast on this interface.... " $IPBRO
|
||||
|
||||
if test "x$DEFRT" = "x"
|
||||
then
|
||||
case $OS in
|
||||
"FreeBSD" | "OpenBSD" | "NetBSD")
|
||||
DEFRT=`$netstat -rn |
|
||||
grep $ACT_IF |
|
||||
grep 'default' |
|
||||
awk '{ print $2 }'`
|
||||
;;
|
||||
"Linux")
|
||||
DEFRT=`$netstat -rn |
|
||||
grep $ACT_IF |
|
||||
grep '^0\.' |
|
||||
uniq |
|
||||
awk '{ print $2 }'`
|
||||
;;
|
||||
esac
|
||||
fi
|
||||
if test "x$DEFRT" = "x"
|
||||
then
|
||||
echo "Default Route set to Gateway...... " none
|
||||
else
|
||||
echo "Default Route set to Gateway...... " $DEFRT
|
||||
fi
|
||||
|
||||
if test "x$OS" = "xLinux"
|
||||
then
|
||||
if test "x$IPFWD" = "x"
|
||||
then
|
||||
IPFWD=`cat /proc/sys/net/ipv4/ip_forward`
|
||||
fi
|
||||
if test $IPFWD -eq 1
|
||||
then
|
||||
echo "IP forwarding is active........... " YES
|
||||
else
|
||||
echo "IP forwarding is active........... " NO
|
||||
fi
|
||||
fi
|
||||
|
||||
# nr of taps the user wants or 1 for default
|
||||
if test "x${NrTaps}" = "x"
|
||||
then
|
||||
NrTaps=1
|
||||
fi
|
||||
echo "Number of taps to create.......... " $NrTaps
|
||||
|
||||
|
||||
# the user who needs access to the tap
|
||||
if test "x$SimhUser" = "x"
|
||||
then
|
||||
case $OS in
|
||||
"FreeBSD" | "OpenBSD" | "NetBSD")
|
||||
SimhUser="root"
|
||||
;;
|
||||
"Linux")
|
||||
if test "x${SUDO_USER}" != "x"
|
||||
then
|
||||
SimhUser=${SUDO_USER}
|
||||
else
|
||||
SimhUser=${USER}
|
||||
fi
|
||||
;;
|
||||
esac
|
||||
fi
|
||||
echo "User who runs SIMH on the taps.... " $SimhUser
|
||||
|
||||
# only save params when in expert OPSMODE
|
||||
if test "X$OPSMODE" = "Xexpert"
|
||||
then
|
||||
if test ! -r SnetSaved.$ACT_IF
|
||||
then
|
||||
cat - > SnetSaved.$ACT_IF <<EOF
|
||||
#
|
||||
# expert users: edit your params and rerun the SetupNet script
|
||||
#
|
||||
|
||||
# ipnr including mask
|
||||
IPNR=$IPNR
|
||||
# do we forward between interfaces 0=no 1=yes
|
||||
IPFWD=$IPFWD
|
||||
# default gateway
|
||||
DEFRT=$DEFRT
|
||||
# nr of SIMH emulators you want in parallel that use network
|
||||
NrTaps=$NrTaps
|
||||
# username of the user running the SIMH emulators
|
||||
SimhUser=$SimhUser
|
||||
EOF
|
||||
|
||||
L=`ls -l SnetSaved.$ACT_IF | grep root | wc -l`
|
||||
if test $L -eq 1
|
||||
then
|
||||
chown $SimhUser SnetSaved.$ACT_IF
|
||||
fi
|
||||
fi
|
||||
fi
|
||||
|
||||
JOBFILE="/tmp/SNjob.$$"
|
||||
TMPFILE="/tmp/SNtmp.$$"
|
||||
|
||||
cat - > $JOBFILE <<\EOF
|
||||
#!/bin/sh
|
||||
|
||||
# This script should be run under root permission
|
||||
|
||||
EOF
|
||||
|
||||
cat - > $TMPFILE <<\EOF
|
||||
echo ${CMD}
|
||||
${CMD}
|
||||
if test $? -ne 0
|
||||
then
|
||||
echo '*** FAIL:' ${CMD}
|
||||
exit 1
|
||||
fi
|
||||
|
||||
EOF
|
||||
|
||||
case $OS in
|
||||
"Linux")
|
||||
echo "CMD=\"$brctl addbr br0\"" >> $JOBFILE
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
|
||||
N=0
|
||||
while test $N -lt $NrTaps
|
||||
do
|
||||
echo "CMD=\"$tunctl -t tap${N} -u ${SimhUser}\"" >> $JOBFILE
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
|
||||
N=`expr $N + 1`
|
||||
done
|
||||
|
||||
echo "CMD=\"$brctl addif br0 ${ACT_IF}\"" >> $JOBFILE
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
|
||||
echo "CMD=\"$brctl setfd br0 0\"" >> $JOBFILE
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
|
||||
echo "CMD=\"$ip link set ${ACT_IF} down\"" >> $JOBFILE
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
|
||||
if ! test "$IPNR" = "not configured"
|
||||
then
|
||||
echo "CMD=\"$ip addr add ${IPNR} dev br0\"" >> $JOBFILE
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
fi
|
||||
|
||||
if ! test "$IPNR" = "not configured"
|
||||
then
|
||||
## if test ! "x$DEFRT" = "x"
|
||||
## then
|
||||
## echo "CMD=\"$ip route del default via ${DEFRT} dev ${ACT_IF}\"" >> $JOBFILE
|
||||
## cat $TMPFILE >> $JOBFILE
|
||||
## fi
|
||||
echo "CMD=\"$ip addr del ${IPNR} dev ${ACT_IF}\"" >> $JOBFILE
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
fi
|
||||
|
||||
echo "CMD=\"$ip link set ${ACT_IF} up\"" >> $JOBFILE
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
|
||||
echo "CMD=\"$ip link set br0 up\"" >> $JOBFILE
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
|
||||
|
||||
if test ! "x$DEFRT" = "x"
|
||||
then
|
||||
echo "CMD=\"$ip route add default via ${DEFRT} dev br0\"" >> $JOBFILE
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
fi
|
||||
|
||||
ipfwd=`cat /proc/sys/net/ipv4/ip_forward`
|
||||
if test $IPFWD -ne $ipfwd
|
||||
then
|
||||
echo "CMD=\"echo ${IPFWD} > /proc/sys/net/ipv4/ip_forward\"" >> $JOBFILE
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
fi
|
||||
|
||||
N=0
|
||||
while test $N -lt $NrTaps
|
||||
do
|
||||
echo "CMD=\"$brctl addif br0 tap${N}\"" >> $JOBFILE
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
|
||||
echo "CMD=\"$ip link set tap${N} up\"" >> $JOBFILE
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
|
||||
N=`expr $N + 1`
|
||||
done
|
||||
BRIDGE="br0"
|
||||
EXAMPLE="tap:tap0"
|
||||
|
||||
;;
|
||||
"FreeBSD")
|
||||
N=0
|
||||
while test $N -lt $NrTaps
|
||||
do
|
||||
echo "CMD=\"$ifconfig tap${N} create\"" >> $JOBFILE
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
|
||||
N=`expr $N + 1`
|
||||
done
|
||||
|
||||
echo "CMD=\"$sysctl net.link.tap.up_on_open=1\"" >> $JOBFILE
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
|
||||
echo "CMD=\"$ifconfig bridge0 create\"" >> $JOBFILE
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
|
||||
case $NrTaps in
|
||||
1 )
|
||||
echo "CMD=\"$ifconfig bridge0 addm ${ACT_IF} addm tap0\"" >> $JOBFILE
|
||||
;;
|
||||
2 )
|
||||
echo "CMD=\"$ifconfig bridge0 addm ${ACT_IF} addm tap0 addm tap1\"" >> $JOBFILE
|
||||
;;
|
||||
3 )
|
||||
echo "CMD=\"$ifconfig bridge0 addm ${ACT_IF} addm tap0 addm tap1 addm tap2\"" >> $JOBFILE
|
||||
;;
|
||||
4 )
|
||||
echo "CMD=\"$ifconfig bridge0 addm ${ACT_IF} addm tap0 addm tap1 addm tap2 addm tap3\"" >> $JOBFILE
|
||||
;;
|
||||
* )
|
||||
echo "Sorry too many taps..."
|
||||
exit
|
||||
esac
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
|
||||
echo "CMD=\"$ifconfig bridge0 up\"" >> $JOBFILE
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
BRIDGE="bridge0"
|
||||
EXAMPLE="tap:tap0"
|
||||
;;
|
||||
"OpenBSD")
|
||||
N=0
|
||||
while test $N -lt $NrTaps
|
||||
do
|
||||
echo "CMD=\"$ifconfig tap${N} create\"" >> $JOBFILE
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
|
||||
echo "CMD=\"$ifconfig tap${N} up\"" >> $JOBFILE
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
|
||||
N=`expr $N + 1`
|
||||
done
|
||||
|
||||
echo "CMD=\"$ifconfig bridge0 create\"" >> $JOBFILE
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
|
||||
echo "CMD=\"$ifconfig bridge0 fwddelay 4\"" >> $JOBFILE
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
|
||||
case $NrTaps in
|
||||
1 )
|
||||
echo "CMD=\"$ifconfig bridge0 add ${ACT_IF} add tap0\"" >> $JOBFILE
|
||||
;;
|
||||
2 )
|
||||
echo "CMD=\"$ifconfig bridge0 add ${ACT_IF} add tap0 add tap1\"" >> $JOBFILE
|
||||
;;
|
||||
3 )
|
||||
echo "CMD=\"$ifconfig bridge0 add ${ACT_IF} add tap0 add tap1 add tap2\"" >> $JOBFILE
|
||||
;;
|
||||
4 )
|
||||
echo "CMD=\"$ifconfig bridge0 add ${ACT_IF} add tap0 add tap1 add tap2 add tap3\"" >> $JOBFILE
|
||||
;;
|
||||
* )
|
||||
echo "Sorry too many taps..."
|
||||
exit
|
||||
esac
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
|
||||
echo "CMD=\"$ifconfig bridge0 up\"" >> $JOBFILE
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
BRIDGE="bridge0"
|
||||
EXAMPLE="tap:tap0"
|
||||
;;
|
||||
"NetBSD")
|
||||
N=0
|
||||
while test $N -lt $NrTaps
|
||||
do
|
||||
echo "CMD=\"$ifconfig tap${N} create\"" >> $JOBFILE
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
|
||||
echo "CMD=\"$ifconfig tap${N} up\"" >> $JOBFILE
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
|
||||
N=`expr $N + 1`
|
||||
done
|
||||
|
||||
echo "CMD=\"$ifconfig bridge0 create\"" >> $JOBFILE
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
|
||||
echo "CMD=\"$brconfig bridge0 fwddelay 1\"" >> $JOBFILE
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
|
||||
case $NrTaps in
|
||||
1 )
|
||||
echo "CMD=\"$brconfig bridge0 add ${ACT_IF} add tap0\"" >> $JOBFILE
|
||||
;;
|
||||
2 )
|
||||
echo "CMD=\"$brconfig bridge0 add ${ACT_IF} add tap0 add tap1\"" >> $JOBFILE
|
||||
;;
|
||||
3 )
|
||||
echo "CMD=\"$brconfig bridge0 add ${ACT_IF} add tap0 add tap1 add tap2\"" >> $JOBFILE
|
||||
;;
|
||||
4 )
|
||||
echo "CMD=\"$brconfig bridge0 add ${ACT_IF} add tap0 add tap1 add tap2 add tap3\"" >> $JOBFILE
|
||||
;;
|
||||
* )
|
||||
echo "Sorry too many taps..."
|
||||
exit
|
||||
esac
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
|
||||
echo "CMD=\"$brconfig bridge0 up\"" >> $JOBFILE
|
||||
cat $TMPFILE >> $JOBFILE
|
||||
|
||||
BRIDGE="bridge0"
|
||||
EXAMPLE="tap:tap0"
|
||||
;;
|
||||
esac
|
||||
|
||||
cat - >> $JOBFILE <<EOF
|
||||
echo ""
|
||||
echo 'Network reconfigured for use by SIMH simulators'
|
||||
echo "Bridge ${BRIDGE} with accesspoint wired into interface ${ACT_IF}"
|
||||
echo "Attach ethernet interface to ${EXAMPLE} in SIMH ini file."
|
||||
echo ""
|
||||
echo 'Use unique IPnrs on your SIMH hosts within the'
|
||||
echo 'same network and set a default route if needed'
|
||||
|
||||
rm -f $JOBFILE
|
||||
EOF
|
||||
|
||||
if test "X$OPSMODE" = "Xexpert"
|
||||
then
|
||||
echo ""
|
||||
echo "-- To change the params above edit SnetSaved.$ACT_IF"
|
||||
echo "-- and rerun this script before executing the job"
|
||||
fi
|
||||
|
||||
L=`ls -l $JOBFILE | grep root | wc -l`
|
||||
if test $L -gt 0
|
||||
then
|
||||
echo "Executing $JOBFILE ..."
|
||||
echo -n "Proceed...? (y)/n "
|
||||
read ANSWER
|
||||
if test "x$ANSWER" = "xn"
|
||||
then
|
||||
echo "-- To execute: sh $JOBFILE"
|
||||
exit 0
|
||||
fi
|
||||
sh ${JOBFILE}
|
||||
else
|
||||
echo ""
|
||||
echo "-- Executing $JOBFILE requires root permission"
|
||||
echo "-- Either use sudo or su to execute: sh $JOBFILE"
|
||||
fi
|
||||
|
||||
rm -f $TMPFILE
|
||||
114
SEL32/tests/cpu.icl
Normal file
114
SEL32/tests/cpu.icl
Normal file
|
|
@ -0,0 +1,114 @@
|
|||
*COM CONCEPT/VIRTUAL ICL FILE #111039-003C 27JUN88 HEADER CVICL800
|
||||
*DEV04=0F040400
|
||||
*DEV08=0F050800
|
||||
*DEV0C=0F060C00
|
||||
*DEV10=0F071000
|
||||
*DEV14=0F081400,4
|
||||
*DEV18=0F091800
|
||||
*DEV20=0E0A2000,10
|
||||
*DEV30=0E0B3000,10
|
||||
*DEV40=0E0C4000,10
|
||||
*DEV50=0E0D5000,4
|
||||
*DEV56=0F0E5600
|
||||
*DEV57=036B5704
|
||||
*DEV5E=0F0F5E00
|
||||
*DEV5F=035B5F04
|
||||
*DEV66=0F106600
|
||||
*DEV67=034B6704
|
||||
*DEV6E=0F116E00
|
||||
*DEV6F=033B6F04
|
||||
*DEV76=0F127600
|
||||
*DEV77=032B7704
|
||||
*DEV7E=0F137E00
|
||||
*DEV7F=031B7F04
|
||||
*INT00=7F0F
|
||||
*INT01=7F0E
|
||||
*INT02=7F0D
|
||||
*INT03=7F0C
|
||||
*INT14=7F0B
|
||||
*INT15=7F0A
|
||||
*INT16=7F09
|
||||
*INT17=7F08
|
||||
*INT18=7F06
|
||||
*INT19=7F07
|
||||
*INT1A=7F05
|
||||
*INT1C=7F03
|
||||
*INT1D=7F02
|
||||
*INT1E=7F01
|
||||
*INT1F=7F00
|
||||
*INT20=770F
|
||||
*INT21=770E
|
||||
*INT22=770D
|
||||
*INT23=770C
|
||||
*INT24=770B
|
||||
*INT25=770A
|
||||
*INT26=7709
|
||||
*INT27=7708
|
||||
*INT28=7707
|
||||
*INT29=7706
|
||||
*INT2A=7705
|
||||
*INT2C=7703
|
||||
*INT2D=7702
|
||||
*INT2E=7701
|
||||
*INT2F=7700
|
||||
*INT30=6F0F
|
||||
*INT31=6F0E
|
||||
*INT32=6F0D
|
||||
*INT33=6F0C
|
||||
*INT34=6F0B
|
||||
*INT35=6F0A
|
||||
*INT36=6F09
|
||||
*INT37=6F08
|
||||
*INT38=6F07
|
||||
*INT39=6F06
|
||||
*INT3A=6F05
|
||||
*INT3C=6F03
|
||||
*INT3D=6F02
|
||||
*INT3E=6F01
|
||||
*INT3F=6F00
|
||||
*INT40=670F
|
||||
*INT41=670E
|
||||
*INT42=670D
|
||||
*INT43=670C
|
||||
*INT44=670B
|
||||
*INT45=670A
|
||||
*INT46=6709
|
||||
*INT47=6708
|
||||
*INT48=6707
|
||||
*INT49=6706
|
||||
*INT4A=6705
|
||||
*INT4C=6703
|
||||
*INT4D=6702
|
||||
*INT4E=6701
|
||||
*INT4F=6700
|
||||
*INT50=5F0F
|
||||
*INT51=5F0E
|
||||
*INT52=5F0D
|
||||
*INT53=5F0C
|
||||
*INT54=5F0B
|
||||
*INT55=5F0A
|
||||
*INT56=5F09
|
||||
*INT57=5F08
|
||||
*INT58=5F07
|
||||
*INT59=5F06
|
||||
*INT5A=5F05
|
||||
*INT5C=5F03
|
||||
*INT5D=5F02
|
||||
*INT5E=5F01
|
||||
*INT5F=5F00
|
||||
*INT60=570F
|
||||
*INT61=570E
|
||||
*INT62=570D
|
||||
*INT63=570C
|
||||
*INT64=570B
|
||||
*INT65=570A
|
||||
*INT66=5709
|
||||
*INT67=5708
|
||||
*INT68=5707
|
||||
*INT69=5706
|
||||
*INT6A=5705
|
||||
*INT6C=5703
|
||||
*INT6D=5702
|
||||
*INT6E=5701
|
||||
*INT6F=5700
|
||||
*END
|
||||
226
SEL32/tests/diag.ini
Normal file
226
SEL32/tests/diag.ini
Normal file
|
|
@ -0,0 +1,226 @@
|
|||
cd %~p0
|
||||
;======================================================
|
||||
; SEL32 System Engineering Labs 32 bit computer
|
||||
; MPX/UTX CPU diagnostic hardware configuration
|
||||
; CPU - 32/67 4M Sel32 Concept/32
|
||||
; IOP - 7e00 Model 8001 IOP Processor Controller
|
||||
; DMA - 0800 2311/2314 Disk Processor II (N/U)
|
||||
; dma0 - N/U
|
||||
; dma0 <-> detached
|
||||
; LPR - 7ef8/7ef9 Model 924X High Speed Line Printer
|
||||
; COM - 7ec0 8512 8-line async communications (N/U)
|
||||
; CON - 7efc/7efd Console Terminal
|
||||
; RTC - 7f06 60 HZ Real-Time clock
|
||||
; ITM - 7f04 38.4MS Interval timer
|
||||
; MT - 1000 8051 Buffered Tape Processor
|
||||
; mta0 <- diag.tap
|
||||
; EC - 0e00 Model 8516 Ethernet (not supported)
|
||||
;======================================================
|
||||
; Set hostname
|
||||
set env HOST=sel32
|
||||
; Set local IP address
|
||||
; set env IP=192.168.1.5 (N/U)
|
||||
;======================================================
|
||||
;
|
||||
; Set run limit of 2 minutes
|
||||
set runlimit 2 minutes
|
||||
set on
|
||||
on error ignore
|
||||
on runtime echof "\r\n*** FAILED - SEL32 Test Runtime Limit %SIM_RUNLIMIT% %SIM_RUNLIMIT_UNITS% Exceeded ***\n"; exit 1
|
||||
;
|
||||
if not exist "diag.tap" echo "\n*** FAILURE diag.tap file missing ***\n"; exit 1
|
||||
;
|
||||
; Set debug output
|
||||
;set debug -n sel.log
|
||||
;set debug stderr
|
||||
;
|
||||
; CPU type and memory
|
||||
;set CPU 32/27 2M
|
||||
;set CPU 32/27 4M
|
||||
;set CPU 32/87 4M
|
||||
set CPU 32/67 4M
|
||||
;set CPU 32/97 4M
|
||||
;set CPU V6 4M
|
||||
;set CPU V6 8M
|
||||
;set CPU V9 4M
|
||||
;set CPU V9 8M
|
||||
;
|
||||
; CPU debug options
|
||||
;set cpu debug=cmd;exp;inst;detail;trap;xio;irq
|
||||
; Set instruction trace history size
|
||||
;;set cpu history=10000
|
||||
; useful options
|
||||
;set cpu debug=exp
|
||||
;set cpu debug=cmd;exp;irq;trap;xio
|
||||
;set cpu debug=cmd;irq;trap;exp
|
||||
;set cpu debug=irq;trap;exp;xio
|
||||
;set cpu debug=irq;xio
|
||||
;set cpu debug=irq;exp;trap
|
||||
;
|
||||
; RTC realtime clock
|
||||
set RTC 50
|
||||
;set RTC 60
|
||||
set RTC enable
|
||||
; RTC debug options
|
||||
;set RTC debug=cmd
|
||||
;
|
||||
; ITM interval timer
|
||||
;set ITM debug=cmd
|
||||
;
|
||||
; IOP at channel 7e00
|
||||
; useful options
|
||||
;set iop debug=cmd;exp
|
||||
;set iop debug=cmd
|
||||
; make iop online
|
||||
set iop enable
|
||||
; set iop channel address
|
||||
set iop0 dev=7e00
|
||||
;
|
||||
; MFP at channel 7e00
|
||||
; useful options
|
||||
;set mfp debug=cmd;exp
|
||||
; make mfp online
|
||||
;set mfp enable
|
||||
; set mfp channel address
|
||||
;set mfp0 dev=7e00
|
||||
;set mfp0 dev=7600
|
||||
;
|
||||
; COM 8-Line
|
||||
;set com debug=cmd;
|
||||
;set coml0 enable
|
||||
;set coml1 enable
|
||||
;set coml2 enable
|
||||
;set coml3 enable
|
||||
;set coml4 enable
|
||||
;set coml5 enable
|
||||
;set coml6 enable
|
||||
;set coml7 enable
|
||||
;
|
||||
; Enable telnet sessions on port 4747
|
||||
;set comc enable
|
||||
;at comc 4747
|
||||
;
|
||||
; LPR
|
||||
;set lpr debug=cmd;detail
|
||||
;set lpr enable
|
||||
; LPR output file
|
||||
;at lpr lprout
|
||||
;
|
||||
; CON Console
|
||||
;set con debug=cmd;exp;detail
|
||||
; useful options
|
||||
; enable console
|
||||
set con enable
|
||||
; set console address
|
||||
; set con0 enable
|
||||
set con0 dev=7efc
|
||||
; set con1 enable
|
||||
set con1 dev=7efd
|
||||
;set con debug=cmd;exp
|
||||
;
|
||||
; MTA Buffered tape processor
|
||||
;set mta debug=cmd;exp;detail;data
|
||||
; useful options
|
||||
;
|
||||
; enable MTA to change channel
|
||||
set mta enable
|
||||
; set mta channel
|
||||
set mta0 dev=1000
|
||||
;
|
||||
; Attach in/out tape files
|
||||
set mta0 locked
|
||||
at mta0 diag.tap
|
||||
;at mta1 temptape.tap
|
||||
;at mta2 output.tap
|
||||
;
|
||||
; DMA disk processor II/UDP
|
||||
; enable DMA to change channel
|
||||
;set dma enable
|
||||
; set disk chan to 0800
|
||||
;set dma0 dev=800
|
||||
; set disk type to MPX MH300
|
||||
;set dma0 type=MH300
|
||||
; set disk type to UTX 9346
|
||||
;set dma0 type=9346
|
||||
;set dma0 type=8155
|
||||
;set dma0 type=8887
|
||||
;set dma0 type=8148
|
||||
;
|
||||
; Attach diskfile
|
||||
;at dma0 utx0disk
|
||||
;at dma0 utx1disk
|
||||
;at dma0 sim32disk
|
||||
;at dma debug=cmd;exp;detail;data
|
||||
;at dma0 diagdisk
|
||||
; useful options
|
||||
;set dma debug=cmd;exp
|
||||
;set dma debug=exp;cmd;detail
|
||||
;
|
||||
; SDA SCFI disk processor
|
||||
;set sda debug=cmd;exp;data;detail
|
||||
; Attach diskfiles
|
||||
;at sda0 diskfile4
|
||||
;at sda1 diskfile5
|
||||
;
|
||||
; DPA high speed disk processor
|
||||
; enable the HSDP to change channel
|
||||
;set dpa enable
|
||||
; set channel addr
|
||||
;set dpa dev=800
|
||||
; set disk type to UTX 8887
|
||||
;set dpa0 type=8887
|
||||
;
|
||||
; Attach diskfiles
|
||||
;at utxdsk.dsk
|
||||
;at dpa0 utx0hsdp
|
||||
;at dpa1 utx1hsdp
|
||||
;
|
||||
;set dpa debug=cmd;detail;exp
|
||||
; useful options
|
||||
;set dpa debug=cmd;exp
|
||||
;
|
||||
; set console switches
|
||||
deposit CSW 0
|
||||
;
|
||||
;UTX boot tape options
|
||||
;set GPR 7 to 0x00 to boot in multi-user mode
|
||||
;set GPR 7 to 0x01 to prompt for unix filename
|
||||
;set GPR 7 to 0x02 to boot in single user mode
|
||||
;set GPR 7 to 0x10 to disable swapping and paging
|
||||
;set GPR 7 to 0x20 to boot from device specified in GPR6
|
||||
;set GPR 7 to 0x40 to allow progress messages on boot
|
||||
;deposit BOOTR[7] 40
|
||||
;deposit BOOTR[7] 52
|
||||
;deposit BOOTR[7] 42
|
||||
;deposit BOOTR[7] 2
|
||||
;deposit BOOTR[6] 800
|
||||
;deposit BOOTR[0] ffffffff
|
||||
;
|
||||
; Set register content at boot for SEL diagnostics
|
||||
; uncomment next line to get diag loader prompt
|
||||
;deposit bootr[0] ffffffff
|
||||
deposit bootr[1] 0
|
||||
deposit bootr[2] 0
|
||||
;
|
||||
; allow cpu idle
|
||||
set cpu idle
|
||||
; Set expect script for auto time entry on MPX at OPCOM prompt
|
||||
;expect haltafter=20000
|
||||
; wait for expected output from simulator, then enter this text
|
||||
;expect "??" send " %DATE_MM%/%DATE_DD%/%DATE_YY%,%TIME_HH%:%TIME_MM%:%TIME_SS%\r"; GO
|
||||
;
|
||||
; Boot from disk
|
||||
;bo dpa0
|
||||
;bo dma0
|
||||
;
|
||||
; Go to simh on completion of script
|
||||
expect "DOL>" echof "\r\n*** PASSED - SEL32 Autobatch Diagnostic Successfully Completed\n"; exit 0
|
||||
; Boot from mag tape
|
||||
bo mta0
|
||||
;det all
|
||||
;rm temptape.tap
|
||||
;rm output.tap
|
||||
expect "[][]" echof "\r\n*** FAILED - SEL32 Autobatch Diagnostic Failed to Complete\n"; exit 1
|
||||
echof "\r\n*** FAILED - SEL32 Autobatch Diagnostic Failed to Complete\n"
|
||||
exit 1
|
||||
;quit
|
||||
BIN
SEL32/tests/diag.tap
Normal file
BIN
SEL32/tests/diag.tap
Normal file
Binary file not shown.
226
SEL32/tests/sel32_test.ini
Normal file
226
SEL32/tests/sel32_test.ini
Normal file
|
|
@ -0,0 +1,226 @@
|
|||
cd %~p0
|
||||
;======================================================
|
||||
; SEL32 System Engineering Labs 32 bit computer
|
||||
; MPX/UTX CPU diagnostic hardware configuration
|
||||
; CPU - 32/67 4M Sel32 Concept/32
|
||||
; IOP - 7e00 Model 8001 IOP Processor Controller
|
||||
; DMA - 0800 2311/2314 Disk Processor II (N/U)
|
||||
; dma0 - N/U
|
||||
; dma0 <-> detached
|
||||
; LPR - 7ef8/7ef9 Model 924X High Speed Line Printer
|
||||
; COM - 7ec0 8512 8-line async communications (N/U)
|
||||
; CON - 7efc/7efd Console Terminal
|
||||
; RTC - 7f06 60 HZ Real-Time clock
|
||||
; ITM - 7f04 38.4MS Interval timer
|
||||
; MT - 1000 8051 Buffered Tape Processor
|
||||
; mta0 <- diag.tap
|
||||
; EC - 0e00 Model 8516 Ethernet (not supported)
|
||||
;======================================================
|
||||
; Set hostname
|
||||
set env HOST=sel32
|
||||
; Set local IP address
|
||||
; set env IP=192.168.1.5 (N/U)
|
||||
;======================================================
|
||||
;
|
||||
; Set run limit of 2 minutes
|
||||
set runlimit 2 minutes
|
||||
set on
|
||||
on error ignore
|
||||
on runtime echof "\r\n*** FAILED - SEL32 Test Runtime Limit %SIM_RUNLIMIT% %SIM_RUNLIMIT_UNITS% Exceeded ***\n"; exit 1
|
||||
;
|
||||
if not exist "diag.tap" echo "\n*** FAILURE diag.tap file missing ***\n"; exit 1
|
||||
;
|
||||
; Set debug output
|
||||
;set debug -n sel.log
|
||||
;set debug stderr
|
||||
;
|
||||
; CPU type and memory
|
||||
;set CPU 32/27 2M
|
||||
;set CPU 32/27 4M
|
||||
;set CPU 32/87 4M
|
||||
set CPU 32/67 4M
|
||||
;set CPU 32/97 4M
|
||||
;set CPU V6 4M
|
||||
;set CPU V6 8M
|
||||
;set CPU V9 4M
|
||||
;set CPU V9 8M
|
||||
;
|
||||
; CPU debug options
|
||||
;set cpu debug=cmd;exp;inst;detail;trap;xio;irq
|
||||
; Set instruction trace history size
|
||||
;;set cpu history=10000
|
||||
; useful options
|
||||
;set cpu debug=exp
|
||||
;set cpu debug=cmd;exp;irq;trap;xio
|
||||
;set cpu debug=cmd;irq;trap;exp
|
||||
;set cpu debug=irq;trap;exp;xio
|
||||
;set cpu debug=irq;xio
|
||||
;set cpu debug=irq;exp;trap
|
||||
;
|
||||
; RTC realtime clock
|
||||
set RTC 50
|
||||
;set RTC 60
|
||||
set RTC enable
|
||||
; RTC debug options
|
||||
;set RTC debug=cmd
|
||||
;
|
||||
; ITM interval timer
|
||||
;set ITM debug=cmd
|
||||
;
|
||||
; IOP at channel 7e00
|
||||
; useful options
|
||||
;set iop debug=cmd;exp
|
||||
;set iop debug=cmd
|
||||
; make iop online
|
||||
set iop enable
|
||||
; set iop channel address
|
||||
set iop0 dev=7e00
|
||||
;
|
||||
; MFP at channel 7e00
|
||||
; useful options
|
||||
;set mfp debug=cmd;exp
|
||||
; make mfp online
|
||||
;set mfp enable
|
||||
; set mfp channel address
|
||||
;set mfp0 dev=7e00
|
||||
;set mfp0 dev=7600
|
||||
;
|
||||
; COM 8-Line
|
||||
;set com debug=cmd;
|
||||
;set coml0 enable
|
||||
;set coml1 enable
|
||||
;set coml2 enable
|
||||
;set coml3 enable
|
||||
;set coml4 enable
|
||||
;set coml5 enable
|
||||
;set coml6 enable
|
||||
;set coml7 enable
|
||||
;
|
||||
; Enable telnet sessions on port 4747
|
||||
;set comc enable
|
||||
;at comc 4747
|
||||
;
|
||||
; LPR
|
||||
;set lpr debug=cmd;detail
|
||||
;set lpr enable
|
||||
; LPR output file
|
||||
;at lpr lprout
|
||||
;
|
||||
; CON Console
|
||||
;set con debug=cmd;exp;detail
|
||||
; useful options
|
||||
; enable console
|
||||
set con enable
|
||||
; set console address
|
||||
; set con0 enable
|
||||
set con0 dev=7efc
|
||||
; set con1 enable
|
||||
set con1 dev=7efd
|
||||
;set con debug=cmd;exp
|
||||
;
|
||||
; MTA Buffered tape processor
|
||||
;set mta debug=cmd;exp;detail;data
|
||||
; useful options
|
||||
;
|
||||
; enable MTA to change channel
|
||||
set mta enable
|
||||
; set mta channel
|
||||
set mta0 dev=1000
|
||||
;
|
||||
; Attach in/out tape files
|
||||
set mta0 locked
|
||||
at mta0 diag.tap
|
||||
;at mta1 temptape.tap
|
||||
;at mta2 output.tap
|
||||
;
|
||||
; DMA disk processor II/UDP
|
||||
; enable DMA to change channel
|
||||
;set dma enable
|
||||
; set disk chan to 0800
|
||||
;set dma0 dev=800
|
||||
; set disk type to MPX MH300
|
||||
;set dma0 type=MH300
|
||||
; set disk type to UTX 9346
|
||||
;set dma0 type=9346
|
||||
;set dma0 type=8155
|
||||
;set dma0 type=8887
|
||||
;set dma0 type=8148
|
||||
;
|
||||
; Attach diskfile
|
||||
;at dma0 utx0disk
|
||||
;at dma0 utx1disk
|
||||
;at dma0 sim32disk
|
||||
;at dma debug=cmd;exp;detail;data
|
||||
;at dma0 diagdisk
|
||||
; useful options
|
||||
;set dma debug=cmd;exp
|
||||
;set dma debug=exp;cmd;detail
|
||||
;
|
||||
; SDA SCFI disk processor
|
||||
;set sda debug=cmd;exp;data;detail
|
||||
; Attach diskfiles
|
||||
;at sda0 diskfile4
|
||||
;at sda1 diskfile5
|
||||
;
|
||||
; DPA high speed disk processor
|
||||
; enable the HSDP to change channel
|
||||
;set dpa enable
|
||||
; set channel addr
|
||||
;set dpa dev=800
|
||||
; set disk type to UTX 8887
|
||||
;set dpa0 type=8887
|
||||
;
|
||||
; Attach diskfiles
|
||||
;at utxdsk.dsk
|
||||
;at dpa0 utx0hsdp
|
||||
;at dpa1 utx1hsdp
|
||||
;
|
||||
;set dpa debug=cmd;detail;exp
|
||||
; useful options
|
||||
;set dpa debug=cmd;exp
|
||||
;
|
||||
; set console switches
|
||||
deposit CSW 0
|
||||
;
|
||||
;UTX boot tape options
|
||||
;set GPR 7 to 0x00 to boot in multi-user mode
|
||||
;set GPR 7 to 0x01 to prompt for unix filename
|
||||
;set GPR 7 to 0x02 to boot in single user mode
|
||||
;set GPR 7 to 0x10 to disable swapping and paging
|
||||
;set GPR 7 to 0x20 to boot from device specified in GPR6
|
||||
;set GPR 7 to 0x40 to allow progress messages on boot
|
||||
;deposit BOOTR[7] 40
|
||||
;deposit BOOTR[7] 52
|
||||
;deposit BOOTR[7] 42
|
||||
;deposit BOOTR[7] 2
|
||||
;deposit BOOTR[6] 800
|
||||
;deposit BOOTR[0] ffffffff
|
||||
;
|
||||
; Set register content at boot for SEL diagnostics
|
||||
; uncomment next line to get diag loader prompt
|
||||
;deposit bootr[0] ffffffff
|
||||
deposit bootr[1] 0
|
||||
deposit bootr[2] 0
|
||||
;
|
||||
; allow cpu idle
|
||||
set cpu idle
|
||||
; Set expect script for auto time entry on MPX at OPCOM prompt
|
||||
;expect haltafter=20000
|
||||
; wait for expected output from simulator, then enter this text
|
||||
;expect "??" send " %DATE_MM%/%DATE_DD%/%DATE_YY%,%TIME_HH%:%TIME_MM%:%TIME_SS%\r"; GO
|
||||
;
|
||||
; Boot from disk
|
||||
;bo dpa0
|
||||
;bo dma0
|
||||
;
|
||||
; Go to simh on completion of script
|
||||
expect "DOL>" echof "\r\n*** PASSED - SEL32 Autobatch Diagnostic Successfully Completed\n"; exit 0
|
||||
; Boot from mag tape
|
||||
bo mta0
|
||||
;det all
|
||||
;rm temptape.tap
|
||||
;rm output.tap
|
||||
expect "[][]" echof "\r\n*** FAILED - SEL32 Autobatch Diagnostic Failed to Complete\n"; exit 1
|
||||
echof "\r\n*** FAILED - SEL32 Autobatch Diagnostic Failed to Complete\n"
|
||||
exit 1
|
||||
;quit
|
||||
565
Visual Studio Projects/SEL32.vcproj
Executable file
565
Visual Studio Projects/SEL32.vcproj
Executable file
|
|
@ -0,0 +1,565 @@
|
|||
<?xml version="1.0" encoding="Windows-1252"?>
|
||||
<VisualStudioProject
|
||||
ProjectType="Visual C++"
|
||||
Version="9.00"
|
||||
Name="SEL32"
|
||||
ProjectGUID="{9B214A06-3727-44D4-99B7-2C3E44B86B32}"
|
||||
RootNamespace="SEL32"
|
||||
Keyword="Win32Proj"
|
||||
TargetFrameworkVersion="131072"
|
||||
>
|
||||
<Platforms>
|
||||
<Platform
|
||||
Name="Win32"
|
||||
/>
|
||||
</Platforms>
|
||||
<ToolFiles>
|
||||
</ToolFiles>
|
||||
<Configurations>
|
||||
<Configuration
|
||||
Name="Debug|Win32"
|
||||
OutputDirectory="..\BIN\NT\$(PlatformName)-$(ConfigurationName)"
|
||||
IntermediateDirectory="..\BIN\NT\Project\simh\$(ProjectName)\$(PlatformName)-$(ConfigurationName)"
|
||||
ConfigurationType="1"
|
||||
CharacterSet="0"
|
||||
>
|
||||
<Tool
|
||||
Name="VCPreBuildEventTool"
|
||||
Description="Check for required build dependencies & git commit id"
|
||||
CommandLine="Pre-Build-Event.cmd "$(TargetDir)$(TargetName).exe" LIBPCRE BUILD LIBSDL"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCCustomBuildTool"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCXMLDataGeneratorTool"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCMIDLTool"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCCLCompilerTool"
|
||||
Optimization="0"
|
||||
AdditionalIncludeDirectories="./SEL32;../../windows-build/PCRE/include;./;../;../slirp;../slirp_glue;../slirp_glue/qemu;../slirp_glue/qemu/win32/include;../../windows-build/include;;../../windows-build/include/SDL2"
|
||||
PreprocessorDefinitions="USE_SHARED;SIM_BUILD_TOOL=simh-Visual-Studio-Project;_CRT_NONSTDC_NO_WARNINGS;_CRT_SECURE_NO_WARNINGS;_WINSOCK_DEPRECATED_NO_WARNINGS;PTW32_STATIC_LIB;USE_READER_THREAD;USE_SIM_VIDEO;HAVE_LIBSDL;HAVE_LIBPNG;SIM_ASYNCH_IO;SIM_NEED_GIT_COMMIT_ID;HAVE_PCRE_H;PCRE_STATIC;HAVE_SLIRP_NETWORK;USE_SIMH_SLIRP_DEBUG"
|
||||
KeepComments="false"
|
||||
BasicRuntimeChecks="0"
|
||||
RuntimeLibrary="1"
|
||||
UsePrecompiledHeader="0"
|
||||
WarningLevel="3"
|
||||
DebugInformationFormat="3"
|
||||
CompileAs="1"
|
||||
ShowIncludes="false"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCManagedResourceCompilerTool"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCResourceCompilerTool"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCPreLinkEventTool"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCLinkerTool"
|
||||
AdditionalOptions="/fixed:no"
|
||||
AdditionalDependencies="libcmtd.lib wsock32.lib winmm.lib Iphlpapi.lib pcrestaticd.lib SDL2-StaticD.lib SDL2_ttf-StaticD.lib freetype2412MT_D.lib libpng16.lib zlib.lib dxguid.lib Imm32.lib Version.lib Setupapi.lib"
|
||||
LinkIncremental="1"
|
||||
AdditionalLibraryDirectories="../../windows-build/lib/Debug/"
|
||||
GenerateDebugInformation="true"
|
||||
SubSystem="1"
|
||||
StackReserveSize="10485760"
|
||||
StackCommitSize="10485760"
|
||||
RandomizedBaseAddress="1"
|
||||
DataExecutionPrevention="0"
|
||||
TargetMachine="1"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCALinkTool"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCManifestTool"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCXDCMakeTool"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCBscMakeTool"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCFxCopTool"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCAppVerifierTool"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCPostBuildEventTool"
|
||||
Description="Running Available Tests"
|
||||
CommandLine="Post-Build-Event.cmd SEL32 "$(TargetDir)$(TargetName).exe""
|
||||
/>
|
||||
</Configuration>
|
||||
<Configuration
|
||||
Name="Release|Win32"
|
||||
OutputDirectory="..\BIN\NT\$(PlatformName)-$(ConfigurationName)"
|
||||
IntermediateDirectory="..\BIN\NT\Project\simh\$(ProjectName)\$(PlatformName)-$(ConfigurationName)"
|
||||
ConfigurationType="1"
|
||||
CharacterSet="0"
|
||||
>
|
||||
<Tool
|
||||
Name="VCPreBuildEventTool"
|
||||
Description="Check for required build dependencies & git commit id"
|
||||
CommandLine="Pre-Build-Event.cmd "$(TargetDir)$(TargetName).exe" LIBPCRE BUILD LIBSDL"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCCustomBuildTool"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCXMLDataGeneratorTool"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCMIDLTool"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCCLCompilerTool"
|
||||
Optimization="2"
|
||||
InlineFunctionExpansion="2"
|
||||
EnableIntrinsicFunctions="true"
|
||||
FavorSizeOrSpeed="1"
|
||||
OmitFramePointers="true"
|
||||
WholeProgramOptimization="true"
|
||||
AdditionalIncludeDirectories="./SEL32;../../windows-build/PCRE/include;./;../;../slirp;../slirp_glue;../slirp_glue/qemu;../slirp_glue/qemu/win32/include;../../windows-build/include;;../../windows-build/include/SDL2"
|
||||
PreprocessorDefinitions="USE_SHARED;SIM_BUILD_TOOL=simh-Visual-Studio-Project;_CRT_NONSTDC_NO_WARNINGS;_CRT_SECURE_NO_WARNINGS;_WINSOCK_DEPRECATED_NO_WARNINGS;PTW32_STATIC_LIB;USE_READER_THREAD;USE_SIM_VIDEO;HAVE_LIBSDL;HAVE_LIBPNG;SIM_ASYNCH_IO;SIM_NEED_GIT_COMMIT_ID;HAVE_PCRE_H;PCRE_STATIC;HAVE_SLIRP_NETWORK;USE_SIMH_SLIRP_DEBUG"
|
||||
KeepComments="false"
|
||||
StringPooling="true"
|
||||
RuntimeLibrary="0"
|
||||
EnableFunctionLevelLinking="true"
|
||||
UsePrecompiledHeader="0"
|
||||
WarningLevel="3"
|
||||
DebugInformationFormat="3"
|
||||
CompileAs="1"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCManagedResourceCompilerTool"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCResourceCompilerTool"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCPreLinkEventTool"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCLinkerTool"
|
||||
AdditionalOptions="/fixed:no"
|
||||
AdditionalDependencies="libcmt.lib wsock32.lib winmm.lib Iphlpapi.lib pcrestatic.lib SDL2-Static.lib SDL2_ttf-Static.lib freetype2412MT.lib libpng16.lib zlib.lib dxguid.lib Imm32.lib Version.lib Setupapi.lib"
|
||||
LinkIncremental="1"
|
||||
AdditionalLibraryDirectories="../../windows-build/lib/Release/"
|
||||
GenerateDebugInformation="false"
|
||||
SubSystem="1"
|
||||
StackReserveSize="10485760"
|
||||
StackCommitSize="10485760"
|
||||
OptimizeReferences="2"
|
||||
EnableCOMDATFolding="2"
|
||||
LinkTimeCodeGeneration="1"
|
||||
RandomizedBaseAddress="1"
|
||||
DataExecutionPrevention="0"
|
||||
TargetMachine="1"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCALinkTool"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCManifestTool"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCXDCMakeTool"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCBscMakeTool"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCFxCopTool"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCAppVerifierTool"
|
||||
/>
|
||||
<Tool
|
||||
Name="VCPostBuildEventTool"
|
||||
Description="Running Available Tests"
|
||||
CommandLine="Post-Build-Event.cmd SEL32 "$(TargetDir)$(TargetName).exe""
|
||||
/>
|
||||
</Configuration>
|
||||
</Configurations>
|
||||
<References>
|
||||
</References>
|
||||
<Files>
|
||||
<Filter
|
||||
Name="Source Files"
|
||||
Filter="cpp;c;cxx;def;odl;idl;hpj;bat;asm"
|
||||
>
|
||||
<File
|
||||
RelativePath="..\scp.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\SEL32\sel32_chan.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\SEL32\sel32_clk.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\SEL32\sel32_com.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\SEL32\sel32_con.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\SEL32\sel32_cpu.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\SEL32\sel32_disk.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\SEL32\sel32_ec.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\SEL32\sel32_fltpt.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\SEL32\sel32_hsdp.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\SEL32\sel32_iop.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\SEL32\sel32_lpr.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\SEL32\sel32_mfp.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\SEL32\sel32_mt.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\SEL32\sel32_scfi.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\SEL32\sel32_scsi.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\SEL32\sel32_sys.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\..\windows-build\pthreads\pthread.c"
|
||||
>
|
||||
<FileConfiguration
|
||||
Name="Debug|Win32"
|
||||
>
|
||||
<Tool
|
||||
Name="VCCLCompilerTool"
|
||||
PreprocessorDefinitions="HAVE_CONFIG_H;PTW32_BUILD_INLINED;PTW32_STATIC_LIB;__CLEANUP_C;$(NOINHERIT)"
|
||||
CompileAs="1"
|
||||
/>
|
||||
</FileConfiguration>
|
||||
<FileConfiguration
|
||||
Name="Release|Win32"
|
||||
>
|
||||
<Tool
|
||||
Name="VCCLCompilerTool"
|
||||
WholeProgramOptimization="false"
|
||||
PreprocessorDefinitions="HAVE_CONFIG_H;PTW32_BUILD_INLINED;PTW32_STATIC_LIB;__CLEANUP_C;$(NOINHERIT)"
|
||||
CompileAs="1"
|
||||
/>
|
||||
</FileConfiguration>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\sim_console.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\sim_disk.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\sim_ether.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\sim_fio.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\sim_serial.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\sim_sock.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\sim_tape.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\sim_timer.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\sim_tmxr.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\sim_video.c"
|
||||
>
|
||||
</File>
|
||||
<Filter
|
||||
Name="slirp"
|
||||
>
|
||||
<File
|
||||
RelativePath="..\slirp\arp_table.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\bootp.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\bootp.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\cksum.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\debug.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\dnssearch.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp_glue\glib_qemu_stubs.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\if.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\if.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\ip.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\ip_icmp.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\ip_icmp.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\ip_input.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\ip_output.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\libslirp.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\main.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\mbuf.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\mbuf.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\misc.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\misc.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\sbuf.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\sbuf.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp_glue\sim_slirp.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\slirp.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\slirp.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\slirp_config.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\socket.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\socket.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\tcp.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\tcp_input.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\tcp_output.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\tcp_subr.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\tcp_timer.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\tcp_timer.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\tcp_var.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\tcpip.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\tftp.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\tftp.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\udp.c"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\slirp\udp.h"
|
||||
>
|
||||
</File>
|
||||
</Filter>
|
||||
</Filter>
|
||||
<Filter
|
||||
Name="Header Files"
|
||||
Filter="h;hpp;hxx;hm;inl;inc"
|
||||
>
|
||||
<File
|
||||
RelativePath="..\scp.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\SEL32\sel32_defs.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\sim_console.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\sim_defs.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\sim_disk.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\sim_ether.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\sim_fio.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\sim_rev.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\sim_serial.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\sim_sock.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\sim_tape.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\sim_timer.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\sim_tmxr.h"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\sim_video.h"
|
||||
>
|
||||
</File>
|
||||
</Filter>
|
||||
<Filter
|
||||
Name="Resource Files"
|
||||
Filter="rc;ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe"
|
||||
>
|
||||
</Filter>
|
||||
</Files>
|
||||
<Globals>
|
||||
</Globals>
|
||||
</VisualStudioProject>
|
||||
|
||||
9
Visual Studio Projects/Simh.sln
Normal file → Executable file
9
Visual Studio Projects/Simh.sln
Normal file → Executable file
|
|
@ -383,6 +383,11 @@ Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "PDP10-KS", "PDP10-KS.vcproj
|
|||
{D40F3AF1-EEE7-4432-9807-2AD287B490F8} = {D40F3AF1-EEE7-4432-9807-2AD287B490F8}
|
||||
EndProjectSection
|
||||
EndProject
|
||||
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "SEL32", "SEL32.vcproj", "{9B214A06-3727-44D4-99B7-2C3E44B86B32}"
|
||||
ProjectSection(ProjectDependencies) = postProject
|
||||
{D40F3AF1-EEE7-4432-9807-2AD287B490F8} = {D40F3AF1-EEE7-4432-9807-2AD287B490F8}
|
||||
EndProjectSection
|
||||
EndProject
|
||||
Global
|
||||
GlobalSection(SolutionConfigurationPlatforms) = preSolution
|
||||
Debug|Win32 = Debug|Win32
|
||||
|
|
@ -697,6 +702,10 @@ Global
|
|||
{7F4EB115-2027-4582-A6EB-6A7DD9BA6F11}.Debug|Win32.Build.0 = Debug|Win32
|
||||
{7F4EB115-2027-4582-A6EB-6A7DD9BA6F11}.Release|Win32.ActiveCfg = Release|Win32
|
||||
{7F4EB115-2027-4582-A6EB-6A7DD9BA6F11}.Release|Win32.Build.0 = Release|Win32
|
||||
{9B214A06-3727-44D4-99B7-2C3E44B86B32}.Debug|Win32.ActiveCfg = Debug|Win32
|
||||
{9B214A06-3727-44D4-99B7-2C3E44B86B32}.Debug|Win32.Build.0 = Debug|Win32
|
||||
{9B214A06-3727-44D4-99B7-2C3E44B86B32}.Release|Win32.ActiveCfg = Release|Win32
|
||||
{9B214A06-3727-44D4-99B7-2C3E44B86B32}.Release|Win32.Build.0 = Release|Win32
|
||||
EndGlobalSection
|
||||
GlobalSection(SolutionProperties) = preSolution
|
||||
HideSolutionNode = FALSE
|
||||
|
|
|
|||
BIN
doc/sel32_doc.doc
Normal file
BIN
doc/sel32_doc.doc
Normal file
Binary file not shown.
26
makefile
26
makefile
|
|
@ -126,6 +126,10 @@ ifneq (3,${SIM_MAJOR})
|
|||
VIDEO_USEFUL = true
|
||||
endif
|
||||
endif
|
||||
# building the SEL32 networking can be used
|
||||
ifneq (,$(findstring sel32,${MAKECMDGOALS}))
|
||||
NETWORK_USEFUL = true
|
||||
endif
|
||||
# building the PDP-7 needs video support
|
||||
ifneq (,$(findstring pdp7,${MAKECMDGOALS}))
|
||||
VIDEO_USEFUL = true
|
||||
|
|
@ -2075,9 +2079,18 @@ SIGMA = ${SIGMAD}/sigma_cpu.c ${SIGMAD}/sigma_sys.c ${SIGMAD}/sigma_cis.c \
|
|||
${SIGMAD}/sigma_coc.c ${SIGMAD}/sigma_dk.c ${SIGMAD}/sigma_dp.c \
|
||||
${SIGMAD}/sigma_fp.c ${SIGMAD}/sigma_io.c ${SIGMAD}/sigma_lp.c \
|
||||
${SIGMAD}/sigma_map.c ${SIGMAD}/sigma_mt.c ${SIGMAD}/sigma_pt.c \
|
||||
${SIGMAD}/sigma_rad.c ${SIGMAD}/sigma_rtc.c ${SIGMAD}/sigma_tt.c
|
||||
${SIGMAD}/sigma_rad.c ${SIGMAD}/sigma_rtc.c ${SIGMAD}/sigma_tt.c
|
||||
SIGMA_OPT = -I ${SIGMAD}
|
||||
|
||||
SEL32D = ${SIMHD}/SEL32
|
||||
SEL32 = ${SEL32D}/sel32_cpu.c ${SEL32D}/sel32_sys.c ${SEL32D}/sel32_chan.c \
|
||||
${SEL32D}/sel32_iop.c ${SEL32D}/sel32_com.c ${SEL32D}/sel32_con.c \
|
||||
${SEL32D}/sel32_clk.c ${SEL32D}/sel32_mt.c ${SEL32D}/sel32_lpr.c \
|
||||
${SEL32D}/sel32_scfi.c ${SEL32D}/sel32_fltpt.c ${SEL32D}/sel32_disk.c \
|
||||
${SEL32D}/sel32_hsdp.c ${SEL32D}/sel32_mfp.c ${SEL32D}/sel32_scsi.c \
|
||||
${SEL32D}/sel32_ec.c ${SEL32D}/sel32_defs.h
|
||||
SEL32_OPT = -I $(SEL32D) -DUSE_INT32 -DSEL32 ${NETWORK_OPT}
|
||||
|
||||
###
|
||||
### Experimental simulators
|
||||
###
|
||||
|
|
@ -2131,7 +2144,7 @@ ALL = pdp1 pdp4 pdp7 pdp8 pdp9 pdp15 pdp11 pdp10 \
|
|||
i7094 ibm1130 id16 id32 sds lgp h316 cdc1700 \
|
||||
swtp6800mp-a swtp6800mp-a2 tx-0 ssem b5500 intel-mds \
|
||||
scelbi 3b2 i701 i704 i7010 i7070 i7080 i7090 \
|
||||
sigma uc15 pdp10-ka pdp10-ki pdp10-kl pdp10-ks pdp6 i650
|
||||
sigma uc15 pdp10-ka pdp10-ki pdp10-kl pdp10-ks pdp6 i650 sel32
|
||||
|
||||
all : ${ALL}
|
||||
|
||||
|
|
@ -2561,6 +2574,15 @@ ifneq (,$(call find_test,${S3D},s3))
|
|||
$@ $(call find_test,${S3D},s3) ${TEST_ARG}
|
||||
endif
|
||||
|
||||
sel32: $(BIN)sel32$(EXE)
|
||||
|
||||
${BIN}sel32${EXE}: ${SEL32} ${SIM}
|
||||
${MKDIRBIN}
|
||||
${CC} ${SEL32} ${SIM} ${SEL32_OPT} $(CC_OUTSPEC) ${LDFLAGS}
|
||||
ifneq (,$(call find_test,${SEL32D},sel32))
|
||||
$@ $(call find_test,${SEL32D},sel32) $(TEST_ARG)
|
||||
endif
|
||||
|
||||
altair : ${BIN}altair${EXE}
|
||||
|
||||
${BIN}altair${EXE} : ${ALTAIR} ${SIM}
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue