AltairZ80: Correct spelling, formatting and years

This commit is contained in:
Peter Schorn 2023-06-30 14:31:06 +02:00
parent 09f67aa06c
commit 4c1aee0887
42 changed files with 286 additions and 288 deletions

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@ -1,6 +1,6 @@
/* altairz80_cpu.c: MITS Altair CPU (8080 and Z80)
Copyright (c) 2002-2014, Peter Schorn
Copyright (c) 2002-2023, Peter Schorn
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@ -451,7 +451,7 @@ REG cpu_reg[] = {
}, /* 65 M68K, PREF_ADDR */
{ HRDATAD (M68K_PREF_DATA, m68k_registers[M68K_REG_PREF_DATA], 32, "M68K Last Prefetch Data register"),
}, /* 66 M68K, PREF_DATA */
{ HRDATAD (M68K_PPC, m68k_registers[M68K_REG_PPC], 32, "M68K Previous Proram Counter register"),
{ HRDATAD (M68K_PPC, m68k_registers[M68K_REG_PPC], 32, "M68K Previous Program Counter register"),
}, /* 67 M68K, PPC */
{ HRDATAD (M68K_IR, m68k_registers[M68K_REG_IR], 32, "M68K Instruction Register"),
}, /* 68 M68K, IR */
@ -6384,7 +6384,7 @@ static t_stat sim_instr_mmu (void) {
/*
* This sequence of instructions is a mix that mimics
* a resonable instruction set that is a close estimate
* a reasonable instruction set that is a close estimate
* to the calibrated result.
*/

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@ -1,6 +1,6 @@
/* altairz80_cpu_opt.c: MITS Altair CPU (8080 and Z80)
Copyright (c) 2002-2014, Peter Schorn
Copyright (c) 2002-2023, Peter Schorn
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),

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@ -1,6 +1,6 @@
/* altairz80_defs.h: MITS Altair simulator definitions
Copyright (c) 2002-2014, Peter Schorn
Copyright (c) 2002-2023, Peter Schorn
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),

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@ -1,6 +1,6 @@
/* altairz80_dsk.c: MITS Altair 88-DISK Simulator
Copyright (c) 2002-2014, Peter Schorn
Copyright (c) 2002-2023, Peter Schorn
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@ -109,12 +109,12 @@
----------------------------------------------------------
5/22/2014 - Updated by Mike Douglas to support the Altair Minidisk.
This disk uses 35 (vs 70) tracks of 16 (vs 32) sectors
This disk uses 35 (vs 70) tracks of 16 (vs 32) sectors
of 137 bytes each.
6/30/2014 - When the disk is an Altair Minidisk, load the head as
6/30/2014 - When the disk is an Altair Minidisk, load the head as
soon as the disk is enabled, and ignore the head
unload command (both like the real hardware).
unload command (both like the real hardware).
7/13/2014 - This code previously returned zero when the sector position
register was read with the head not loaded. This zero looks
@ -125,9 +125,9 @@
7/13/2014 Some software for the Altair skips a sector by verifying
that "Sector True" goes false. Previously, this code
returned "Sector True" every time the sector register
returned "Sector True" every time the sector register
was read. Now the flag alternates true and false on
subsequent reads of the sector register.
subsequent reads of the sector register.
*/
#include "altairz80_defs.h"
@ -555,7 +555,7 @@ int32 dsk10(const int32 port, const int32 io, const int32 data) {
if (current_track[current_disk] == 0) /* track 0? */
current_flag[current_disk] |= 0x40; /* yes, set track 0 true as well */
if (sectors_per_track[current_disk] == MINI_DISK_SECT) /* drive enable loads head for Minidisk */
current_flag[current_disk] |= 0x84;
current_flag[current_disk] |= 0x84;
}
}
return 0; /* ignored since OUT */

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@ -1,6 +1,6 @@
/* altairz80_hdsk.c: simulated hard disk device to increase capacity
Copyright (c) 2002-2014, Peter Schorn
Copyright (c) 2002-2023, Peter Schorn
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@ -419,7 +419,7 @@ static DISK_INFO* hdsk_imd[HDSK_NUMBER];
static REG hdsk_reg[] = {
{ DRDATAD (HDCMD, hdskLastCommand, 32, "Last command"),
REG_RO },
{ DRDATAD (HDPOS, hdskCommandPosition, 32, "Commmand position"),
{ DRDATAD (HDPOS, hdskCommandPosition, 32, "Command position"),
REG_RO },
{ DRDATAD (HDDSK, selectedDisk, 32, "Selected disk"),
REG_RO },
@ -605,7 +605,7 @@ static t_stat hdsk_attach(UNIT *uptr, CONST char *cptr) {
}
ASSURE((uptr -> HDSK_SECTORS_PER_TRACK) && (uptr -> HDSK_SECTOR_SIZE) && (uptr -> HDSK_FORMAT_TYPE >= 0));
/* Step 4: Number of tracks is smallest number to accomodate capacity */
/* Step 4: Number of tracks is smallest number to accommodate capacity */
uptr -> HDSK_NUMBER_OF_TRACKS = (uptr -> capac + uptr -> HDSK_SECTORS_PER_TRACK *
uptr -> HDSK_SECTOR_SIZE - 1) / (uptr -> HDSK_SECTORS_PER_TRACK * uptr -> HDSK_SECTOR_SIZE);
ASSURE( ( (t_addr) ((uptr -> HDSK_NUMBER_OF_TRACKS - 1) * uptr -> HDSK_SECTORS_PER_TRACK *

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@ -1,6 +1,6 @@
/* altairz80_mhdsk.c: MITS 88-HDSK Hard Disk simulator
Copyright (c) 2002-2014, Peter Schorn
Copyright (c) 2002-2023, Peter Schorn
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),

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@ -1,6 +1,6 @@
/* altairz80_net.c: networking capability
Copyright (c) 2002-2014, Peter Schorn
Copyright (c) 2002-2023, Peter Schorn
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@ -295,7 +295,7 @@ int32 netData(const int32 port, const int32 io, const int32 data) {
}
sim_debug(IN_MSG, &net_dev, "NET: " ADDRESS_FORMAT " IN(%i)=%03xh (%c)\n", PCX, port, (result & 0xff), (32 <= (result & 0xff)) && ((result & 0xff) <= 127) ? (result & 0xff) : '?');
return result;
} else { /* OUT */
} else { /* OUT */
if (serviceDescriptor[i].outputSize == BUFFER_LENGTH) {
sim_printf("over-write %i to %i\n", data, port);
serviceDescriptor[i].outputBuffer[serviceDescriptor[i].outputPosWrite > 0 ?

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@ -1,6 +1,6 @@
/* altairz80_sio.c: MITS Altair serial I/O card
Copyright (c) 2002-2014, Peter Schorn
Copyright (c) 2002-2023, Peter Schorn
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),

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@ -1,6 +1,6 @@
/* altairz80_sys.c: MITS Altair system interface
Copyright (c) 2002-2014, Peter Schorn
Copyright (c) 2002-2023, Peter Schorn
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),

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@ -35,7 +35,7 @@
EAX & 0xff === AL
EAX & 0xffff == AX
etc. The result is that alot of the calculations can then be
etc. The result is that a lot of the calculations can then be
done using the native instruction set fully.
*/
@ -196,7 +196,7 @@ struct pc_env
struct i386_general_regs Gn_regs;
struct i386_special_regs Sp_regs;
struct i386_segment_regs Sg_regs;
/* our flags structrure. This contains information on
/* our flags structure. This contains information on
REPE prefix 2 bits repe,repne
SEGMENT overrides 5 bits normal,DS,SS,CS,ES
Delayed flag set 3 bits (zero, signed, parity)

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@ -77,7 +77,7 @@ void cpu8086_intr(uint8 intrnum);
/* this file includes subroutines which do:
stuff involving decoding instruction formats.
stuff involving accessess of immediate data via IP.
stuff involving accesses of immediate data via IP.
etc.
*/
@ -675,7 +675,7 @@ uint8 fetch_data_byte(PC_ENV *m, uint16 offset)
refer to addresses relative to the SS. So, at the minimum,
all decodings of addressing modes would have to set/clear
a bit describing whether the access is relative to DS or SS.
That is the function of the cpu-state-varible m->sysmode.
That is the function of the cpu-state-variable m->sysmode.
There are several potential states:
repe prefix seen (handled elsewhere)
repne prefix seen (ditto)
@ -683,7 +683,7 @@ uint8 fetch_data_byte(PC_ENV *m, uint16 offset)
ds segment override
es segment override
ss segment override
ds/ss select (in absense of override)
ds/ss select (in absence of override)
Each of the above 7 items are handled with a bit in the sysmode
field.
The latter 5 can be implemented as a simple state machine:

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@ -78,7 +78,7 @@ extern uint32 in(const uint32 Port);
to the 256 byte-"opcodes" found on the 8086. The table which
dispatches this is found in the files optab.[ch].
Each opcode proc has a comment preceeding it which gives it's table
Each opcode proc has a comment preceding it which gives it's table
address. Several opcodes are missing (undefined) in the table.
Each proc includes information for decoding (DECODE_PRINTF and
@ -3100,7 +3100,7 @@ static void i86op_movs_byte(PC_ENV *m)
inc = 1;
if (m->sysmode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE))
{
/* dont care whether REPE or REPNE */
/* don't care whether REPE or REPNE */
/* move them until CX is ZERO. */
while (m->R_CX != 0)
{
@ -3133,7 +3133,7 @@ static void i86op_movs_word(PC_ENV *m)
inc = 2;
if (m->sysmode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE))
{
/* dont care whether REPE or REPNE */
/* don't care whether REPE or REPNE */
/* move them until CX is ZERO. */
while (m->R_CX != 0)
{
@ -3291,7 +3291,7 @@ static void i86op_stos_byte(PC_ENV *m)
inc = 1;
if (m->sysmode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE))
{
/* dont care whether REPE or REPNE */
/* don't care whether REPE or REPNE */
/* move them until CX is ZERO. */
while (m->R_CX != 0)
{
@ -3319,7 +3319,7 @@ static void i86op_stos_word(PC_ENV *m)
inc = 2;
if (m->sysmode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE))
{
/* dont care whether REPE or REPNE */
/* don't care whether REPE or REPNE */
/* move them until CX is ZERO. */
while (m->R_CX != 0)
{
@ -3347,7 +3347,7 @@ static void i86op_lods_byte(PC_ENV *m)
inc = 1;
if (m->sysmode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE))
{
/* dont care whether REPE or REPNE */
/* don't care whether REPE or REPNE */
/* move them until CX is ZERO. */
while (m->R_CX != 0)
{
@ -3375,7 +3375,7 @@ static void i86op_lods_word(PC_ENV *m)
inc = 2;
if (m->sysmode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE))
{
/* dont care whether REPE or REPNE */
/* don't care whether REPE or REPNE */
/* move them until CX is ZERO. */
while (m->R_CX != 0)
{

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@ -186,7 +186,7 @@ uint8 xor_0x3_tab[] = { 0, 1, 1, 0 };
By inspection, one gets: cc = ab + r'(a + b)
That represents alot of operations, but NO CHOICE....
That represents a lot of operations, but NO CHOICE....
BORROW CHAIN CALCULATION.
The following table represents the
@ -498,7 +498,7 @@ uint8 neg_byte(PC_ENV *m, uint8 s)
CONDITIONAL_SET_FLAG(res & 0x80, m, F_SF);
CONDITIONAL_SET_FLAG(parity_tab[res], m, F_PF);
/* calculate the borrow chain --- modified such that d=0.
substitutiing d=0 into bc= res&(~d|s)|(~d&s);
substituting d=0 into bc= res&(~d|s)|(~d&s);
(the one used for sub) and simplifying, since ~d=0xff...,
~d|s == 0xffff..., and res&0xfff... == res. Similarly
~d&s == s. So the simplified result is:*/
@ -518,7 +518,7 @@ uint16 neg_word(PC_ENV *m, uint16 s)
CONDITIONAL_SET_FLAG(res & 0x8000, m, F_SF);
CONDITIONAL_SET_FLAG(parity_tab[res&0xff], m, F_PF);
/* calculate the borrow chain --- modified such that d=0.
substitutiing d=0 into bc= res&(~d|s)|(~d&s);
substituting d=0 into bc= res&(~d|s)|(~d&s);
(the one used for sub) and simplifying, since ~d=0xff...,
~d|s == 0xffff..., and res&0xfff... == res. Similarly
~d&s == s. So the simplified result is:*/
@ -793,7 +793,7 @@ uint16 rcr_word(PC_ENV *m, uint16 d, uint16 s)
if (cnt==1)
{
cf = d & 0x1;
/* see note above on teh byte version */
/* see note above on the byte version */
ocf = ACCESS_FLAG(m,F_CF) != 0;
}
else
@ -1310,7 +1310,7 @@ void test_byte(PC_ENV *m, uint8 d, uint8 s)
CONDITIONAL_SET_FLAG(res&0x80, m, F_SF);
CONDITIONAL_SET_FLAG(res==0, m, F_ZF);
CONDITIONAL_SET_FLAG(parity_tab[res&0xff], m, F_PF);
/* AF == dont care*/
/* AF == don't care*/
CLEAR_FLAG(m, F_CF);
}
@ -1322,7 +1322,7 @@ void test_word(PC_ENV *m, uint16 d, uint16 s)
CONDITIONAL_SET_FLAG(res&0x8000, m, F_SF);
CONDITIONAL_SET_FLAG(res==0, m, F_ZF);
CONDITIONAL_SET_FLAG(parity_tab[res&0xff], m, F_PF);
/* AF == dont care*/
/* AF == don't care*/
CLEAR_FLAG(m, F_CF);
}

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@ -142,10 +142,10 @@ static const char* ibc_description(DEVICE *dptr);
/* IBC Middi Cadet I/O Ports */
#define IBC_SIO 0x04 /* 0x04-0x13: UARTs (using AltairZ80 SIO.) UARTS 0x00-0x03 are using 2sio. */
#define IBC_FDC_DATA 0x28 /* FDC Data Regster */
#define IBC_PARAM 0x2a /* FDC PARAM register */
#define IBC_FDC_DATA 0x28 /* FDC Data Register */
#define IBC_PARAM 0x2a /* FDC PARAM Register */
#define IBC_DIPSWE 0x3c /* CPU Board DIP Switch E */
#define IBC_BANKSEL 0x38 /* Bank Select register */
#define IBC_BANKSEL 0x38 /* Bank Select Register */
#define IBC_FIFO_CTRL 0x3e /* FDC FIFO Control */
#define IBC_ROM_CTRL 0x3f /* ROM Control Register */
#define IBC_SCC_BANKSEL 0x58 /* Bank Select register */
@ -252,7 +252,7 @@ static DEBTAB ibc_dt[] = {
{ "SBD", SBD_MSG, "System Board messages" },
{ "UART", UART_MSG, "UART messages" },
{ "CACHE", CACHE_MSG, "CACHE messages" },
{ "UIO", UNHANDLED_IO_MSG, "Unsuported I/O Ports" },
{ "UIO", UNHANDLED_IO_MSG, "Unsupported I/O Ports" },
{ "FIFO", FIFO_MSG, "FDC FIFO messages" },
{ "DIPSW", DIPSW_MSG, "DIP Switch messages" },
{ NULL, 0, NULL }
@ -1817,7 +1817,7 @@ static int32 ibc_banksel(const int32 port, const int32 io, const int32 data)
* 0xff: Boot from floppy (All off.)
* Switch 1 - 0xfe: Boot into ROM monitor (Switch 1 on.)
* Switch 2 - 0xfd: Boot from hard disk (Switch 2 on.)
* Switch 7 - 0xbe: OFF = Use FDC Interupts, ON = Poll FDC instead.
* Switch 7 - 0xbe: OFF = Use FDC Interrupts, ON = Poll FDC instead.
*/
result = ibc_info->dipsw_E;

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@ -240,7 +240,7 @@ static t_stat ibc_hdc_attach(UNIT *uptr, CONST char *cptr)
/* Defaults for the Quantum 2020 Drive */
pDrive->ready = 0;
if (pDrive->ncyls == 0) {
/* If geometry was not specified, default to Quantun 2020 */
/* If geometry was not specified, default to Quantum 2020 */
pDrive->ncyls = 512;
pDrive->nheads = 4;
pDrive->nsectors = 32;

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@ -232,7 +232,7 @@ static t_stat ibc_smd_attach(UNIT *uptr, CONST char *cptr)
/* Defaults for the Quantum 2020 Drive */
pDrive->ready = 0;
if (pDrive->ncyls == 0) {
/* If geometry was not specified, default to Quantun 2020 */
/* If geometry was not specified, default to Quantum 2020 */
pDrive->ncyls = 512;
pDrive->nheads = 4;
pDrive->nsectors = 16;

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@ -379,7 +379,7 @@ void m68k_set_reg(m68k_register_t reg, unsigned int value);
/* Check if an instruction is valid for the specified CPU type */
unsigned int m68k_is_valid_instruction(unsigned int instruction, unsigned int cpu_type);
/* Disassemble 1 instruction using the epecified CPU type at pc. Stores
/* Disassemble 1 instruction using the specified CPU type at pc. Stores
* disassembly in str_buff and returns the size of the instruction in bytes.
*/
unsigned int m68k_disassemble(char* str_buff, unsigned int pc, unsigned int cpu_type);

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@ -140,7 +140,7 @@
* the exception occurs normally.
* The callback looks like int callback(int opcode)
* You should put OPT_SPECIFY_HANDLER here if you cant to use it, otherwise it will
* use a dummy default handler and you'll have to call m68k_set_illg_instr_callback explicitely
* use a dummy default handler and you'll have to call m68k_set_illg_instr_callback explicitly
*/
#define M68K_ILLG_HAS_CALLBACK OPT_OFF
#define M68K_ILLG_CALLBACK(opcode) op_illg(opcode)
@ -199,7 +199,7 @@
*/
/* If ON, the enulation core will use 64-bit integers to speed up some
/* If ON, the emulation core will use 64-bit integers to speed up some
* operations.
*/
#define M68K_USE_64_BIT OPT_ON

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@ -973,7 +973,7 @@ int m68k_execute(int num_cycles)
do
{
int i;
/* Set tracing accodring to T1. (T0 is done inside instruction) */
/* Set tracing according to T1. (T0 is done inside instruction) */
m68ki_trace_t1(); /* auto-disable (see m68kcpu.h) */
/* Set the address space for reads */
@ -1037,7 +1037,7 @@ void m68k_end_timeslice(void)
/* ASG: rewrote so that the int_level is a mask of the IPL0/IPL1/IPL2 bits */
/* KS: Modified so that IPL* bits match with mask positions in the SR
* and cleaned out remenants of the interrupt controller.
* and cleaned out remnants of the interrupt controller.
*/
void m68k_set_irq(unsigned int int_level)
{

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@ -398,7 +398,7 @@ typedef uint32 uint64;
/* ----------------------------- Configuration ---------------------------- */
/* These defines are dependant on the configuration defines in m68kconf.h */
/* These defines are dependent on the configuration defines in m68kconf.h */
/* Disable certain comparisons if we're not using all CPU types */
#if M68K_EMULATE_040
@ -2015,7 +2015,7 @@ static inline void m68ki_exception_illegal(void)
USE_CYCLES(CYC_EXCEPTION[EXCEPTION_ILLEGAL_INSTRUCTION_M68K] - CYC_INSTRUCTION[REG_IR]);
}
/* Exception for format errror in RTE */
/* Exception for format error in RTE */
static inline void m68ki_exception_format_error(void)
{
uint sr = m68ki_init_exception();
@ -2052,7 +2052,7 @@ static inline void m68ki_exception_address_error(void)
/* Use up some clock cycles. Note that we don't need to undo the
instruction's cycles here as we've longjmp:ed directly from the
instruction handler without passing the part of the excecute loop
instruction handler without passing the part of the execute loop
that deducts instruction cycles */
USE_CYCLES(CYC_EXCEPTION[EXCEPTION_ADDRESS_ERROR]);
}

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@ -156,7 +156,7 @@ uint read_imm_8(void);
uint read_imm_16(void);
uint read_imm_32(void);
/* Read data at the PC but don't imcrement the PC */
/* Read data at the PC but don't increment the PC */
uint peek_imm_8(void);
uint peek_imm_16(void);
uint peek_imm_32(void);
@ -3721,7 +3721,7 @@ static void build_opcode_table(void)
/* ================================= API ================================== */
/* ======================================================================== */
/* Disasemble one instruction at pc and store in str_buff */
/* Disassemble one instruction at pc and store in str_buff */
unsigned int m68k_disassemble(char* str_buff, unsigned int pc, unsigned int cpu_type)
{
if(!g_initialized)

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@ -1,6 +1,6 @@
/* m68kcpmsim.c: CP/M for Motorola 68000 definitions
Copyright (c) 2014, Peter Schorn
Copyright (c) 2014 - 2023, Peter Schorn
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@ -48,7 +48,7 @@
sector number to the sector register. This write triggers the requested
operation. The status of the operation can be determined by reading the
status register.
A zero indicates that no error occured.
A zero indicates that no error occurred.
Note that these operations invoke read() and write() system calls directly
so that they will alter the image on the hard disk. KEEP BACKUPS!
@ -98,7 +98,7 @@
/* Memory-mapped IO ports */
/* 6850 serial port like thing. Implements a reduced set of functionallity. */
/* 6850 serial port like thing. Implements a reduced set of functionality. */
#define MC6850_STAT 0xff1000L // command/status register
#define MC6850_DATA 0xff1002L // receive/transmit data register
@ -335,7 +335,7 @@ static int MC6850_device_ack(void) {
static void MC6850_data_write(uint32 value) {
sim_putchar(value);
if ((m68k_MC6850_control & 0x60) == 0x20) { // transmit interupt enabled?
if ((m68k_MC6850_control & 0x60) == 0x20) { // transmit interrupt enabled?
int_controller_clear(IRQ_MC6850);
int_controller_set(IRQ_MC6850);
}

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@ -1,6 +1,6 @@
/* m68kcpmsim.h: CP/M for Motorola 68000 definitions
Copyright (c) 2014, Peter Schorn
Copyright (c) 2014 - 2023, Peter Schorn
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),

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@ -11,8 +11,6 @@
#ifndef NASM_NASM_H
#define NASM_NASM_H
#include <stdio.h>
#ifndef NULL
#define NULL 0
#endif

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@ -65,7 +65,7 @@
We get many calls on how to interface terminals to the 2SIO. The
problem is that the Asynchronous Communications Interface Adapter's
(ACIA) handshaking signals make interfacing with the 2SIO a
somewhat complicated matter. An explaination of the signals and
somewhat complicated matter. An explanation of the signals and
their function should make the job easier. The three handshaking
signals--Data Carrier Detect (DCD), Request to Send (RTS) and
Clear to Send (CTS)--permit limited control of a modem or
@ -79,8 +79,8 @@
section is inhibited and no data can be received by the ACIA.
Information from the two input signals, CTS and DCD, is present in
the ACIA status register. Bit 2 represents *DCD, and bit 3 repre-
sents *CTS. When bit 2 is high, DCD is inactive. When bit 3 is high,
the ACIA status register. Bit 2 represents *DCD, and bit 3
represents *CTS. When bit 2 is high, DCD is inactive. When bit 3 is high,
CTS is inactive. When bit 2 goes low, valid data is sent to the ACIA.
When bit 3 goes low, data can be transmitted.
@ -395,7 +395,7 @@ static t_stat m2sio_reset(DEVICE *dptr, int32 (*routine)(const int32, const int3
c = getClockFrequency() / 5;
dptr->units[0].wait = (c && c < 1000) ? c : 1000;
/* Enable TMXR modem control passthru */
/* Enable TMXR modem control passthrough */
tmxr_set_modem_control_passthru(xptr->tmxr);
/* Reset status registers */
@ -665,7 +665,7 @@ static t_stat m2sio_config_line(UNIT *uptr)
** to run irrelevant, old software, that use TMXR and
** rely on some semblance of timing (Remote CP/M, BYE,
** RBBS, PCGET/PUT, Xmodem, MEX, Modem7, or most
** other communications software), on contemprary
** other communications software), on contemporary
** hardware.
**
** Serial ports are self-limiting and sockets will run

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@ -258,7 +258,7 @@ DEVICE cromfdc_dev = {
};
/* This is the CROMFDC RDOS-II ROM.
* The CROMFDC has a single 8K ROM; however ths simulation includes
* The CROMFDC has a single 8K ROM; however this simulation includes
* two different versions of RDOS:
* RDOS 2.52 and RDOS 3.12
* RDOS 2.52 is the default, but RDOS 3.12 can be

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@ -313,7 +313,7 @@ static uint8 adcs6_rom[2][ADCS6_ROM_SIZE] = {
*
* MONITOR COMMANDS :
* B = Load disk boot loader
* C = Load disk boot loader from cartriage
* C = Load disk boot loader from cartridge
* DSSSS,QQQQ = Dump memory in hex from S to Q
* FSSSS,QQQQ,BB = Fill memory from S to Q with B
* GAAAA = Go to address A

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@ -78,8 +78,8 @@ typedef struct {
uint8 sel_drive; /* Currently selected drive */
uint8 head_sel; /* Head select (signals to drive itself) */
uint8 head; /* Head set by write to the HEAD register */
uint8 cyl; /* Cyl that the current operation is targetting */
uint8 sector; /* Sector the current READ/WRITE operation is targetting */
uint8 cyl; /* Cyl that the current operation is targeting */
uint8 sector; /* Sector the current READ/WRITE operation is targeting */
uint8 hdr_sector; /* Current sector for WRITE_HEADER */
uint8 ctl_attn;
uint8 ctl_run;
@ -152,11 +152,11 @@ static REG disk2_reg[] = {
{ HRDATAD (SEL_DRIVE, disk2_info_data.sel_drive, 3,
"Currently selected drive"), },
{ HRDATAD (CYL, disk2_info_data.cyl, 8,
"Cylinder that the current operation is targetting"), },
"Cylinder that the current operation is targeting"), },
{ HRDATAD (HEAD, disk2_info_data.head, 8,
"Head that the current operation is targetting"), },
"Head that the current operation is targeting"), },
{ HRDATAD (SECTOR, disk2_info_data.sector, 8,
"Sector that the current operation is targetting"), },
"Sector that the current operation is targeting"), },
{ NULL }
};
@ -575,7 +575,7 @@ static uint8 DISK2_Write(const uint32 Addr, uint8 cData)
" READ_HEADER: sim_fseek error.\n", PCX);
}
selchan_dma(sdata.raw, 3);
break;
default:
sim_printf("DISK2: " ADDRESS_FORMAT " Unknown CMD=%d\n", PCX, disk2_info->ctl_op);

View file

@ -973,7 +973,7 @@ static DEBTAB dj2d_dt[] = {
{ "WRITE", WR_DATA_MSG, "Write messages" },
{ "STATUS", STATUS_MSG, "Status messages" },
{ "RDDETAIL", RD_DATA_DETAIL_MSG, "Read detail messages" },
{ "WRDETAIL", WR_DATA_DETAIL_MSG, "Write detail messags" },
{ "WRDETAIL", WR_DATA_DETAIL_MSG, "Write detail messages" },
{ "VERBOSE", VERBOSE_MSG, "Verbose messages" },
{ "DEBUG", DEBUG_MSG, "Debug messages" },
{ NULL, 0 }
@ -2075,7 +2075,7 @@ static uint32 DJ2D_WriteSector(UNIT *uptr, uint8 track, uint8 sector, uint8 *buf
}
rtn = sim_fwrite(buffer, 1, len, uptr->fileref);
sim_debug(WR_DATA_MSG, &dj2d_dev, DJ2D_SNAME ": WRITESEC track %03d sector %03d at offset %08llX len %d rtn=%d\n", track, sector, sec_offset, len, rtn);
return rtn;

View file

@ -529,7 +529,7 @@ static uint8 DJHDC_Write(const uint32 Addr, uint8 cData)
/* Point IOPB to new link */
djhdc_info->link_addr = next_link;
/* Read remaineder of IOPB */
/* Read remainder of IOPB */
for(i = 0; i < DJHDC_IOPB_LEN-3; i++) {
djhdc_info->iopb[i] = GetByteDMA((djhdc_info->link_addr) + i);
}

View file

@ -2,7 +2,7 @@
IMSAI FIF Disk Controller by Ernie Price
Based on altairz80_dsk.c, Copyright (c) 2002-2014, Peter Schorn
Based on altairz80_dsk.c, Copyright (c) 2002-2023, Peter Schorn
Plug-n-Play added by Howard M. Harte

View file

@ -27,7 +27,7 @@
This device emulates D.C. Hayes 80-103A and Micromodem 100 communications
adapters.
To provide any useful funcationality, this device need to be attached to
To provide any useful functionality, this device need to be attached to
a socket or serial port. Enter "HELP HAYES" at the "simh>" prompt for
additional information.
*/
@ -199,32 +199,32 @@ static REG hayes_reg[] = {
};
DEVICE hayes_dev = {
HAYES_SNAME, /* name */
hayes_unit, /* unit */
hayes_reg, /* registers */
hayes_mod, /* modifiers */
1, /* # units */
10, /* address radix */
31, /* address width */
1, /* address increment */
8, /* data radix */
8, /* data width */
NULL, /* examine routine */
NULL, /* deposit routine */
HAYES_SNAME, /* name */
hayes_unit, /* unit */
hayes_reg, /* registers */
hayes_mod, /* modifiers */
1, /* # units */
10, /* address radix */
31, /* address width */
1, /* address increment */
8, /* data radix */
8, /* data width */
NULL, /* examine routine */
NULL, /* deposit routine */
&hayes_reset, /* reset routine */
NULL, /* boot routine */
&hayes_attach, /* attach routine */
&hayes_detach, /* detach routine */
&hayes_ctx, /* context */
(DEV_DISABLE | DEV_DIS | DEV_DEBUG | DEV_MUX), /* flags */
0, /* debug control */
hayes_dt, /* debug flags */
NULL, /* mem size routine */
NULL, /* logical name */
NULL, /* help */
NULL, /* attach help */
NULL, /* context for help */
&hayes_description /* description */
NULL, /* boot routine */
&hayes_attach, /* attach routine */
&hayes_detach, /* detach routine */
&hayes_ctx, /* context */
(DEV_DISABLE | DEV_DIS | DEV_DEBUG | DEV_MUX), /* flags */
0, /* debug control */
hayes_dt, /* debug flags */
NULL, /* mem size routine */
NULL, /* logical name */
NULL, /* help */
NULL, /* attach help */
NULL, /* context for help */
&hayes_description /* description */
};
static const char* hayes_description(DEVICE *dptr)
@ -243,7 +243,7 @@ static t_stat hayes_reset(DEVICE *dptr)
/* Set DEVICE for this UNIT */
dptr->units[0].dptr = dptr;
/* Enable TMXR modem control passthru */
/* Enable TMXR modem control passthrough */
tmxr_set_modem_control_passthru(hayes_ctx.tmxr);
/* Reset status registers */
@ -505,7 +505,7 @@ static t_stat hayes_config_line(UNIT *uptr)
** to run irrelevant, old software, that use TMXR and
** rely on some semblance of timing (Remote CP/M, BYE,
** RBBS, PCGET/PUT, Xmodem, MEX, Modem7, or most
** other communications software), on contemprary
** other communications software), on contemporary
** hardware.
**
** Serial ports are self-limiting and sockets will run

View file

@ -261,7 +261,7 @@ static t_stat hdc1001_attach(UNIT *uptr, CONST char *cptr)
/* Defaults for the Quantum 2020 Drive */
pDrive->ready = 0;
if (pDrive->ncyls == 0) {
/* If geometry was not specified, default to Quantun 2020 */
/* If geometry was not specified, default to Quantum 2020 */
pDrive->ncyls = 512;
pDrive->nheads = 4;
pDrive->nsectors = 16;
@ -448,7 +448,7 @@ static uint8 HDC1001_Write(const uint32 Addr, uint8 cData)
break;
case 2:
sim_debug(ERROR_MSG, &hdc1001_dev,DEV_NAME "%d: " ADDRESS_FORMAT
" Invalid sector size specified in SDH registrer.\n", hdc1001_info->sel_drive, PCX);
" Invalid sector size specified in SDH register.\n", hdc1001_info->sel_drive, PCX);
pDrive->cur_sectsize = 512;
break;
case 3:
@ -458,7 +458,7 @@ static uint8 HDC1001_Write(const uint32 Addr, uint8 cData)
if (pDrive->sectsize != pDrive->cur_sectsize) {
sim_debug(ERROR_MSG, &hdc1001_dev,DEV_NAME "%d: " ADDRESS_FORMAT
" Sector size specified in SDH registrer (0x%x) does not match disk geometry (0x%x.)\n",
" Sector size specified in SDH register (0x%x) does not match disk geometry (0x%x.)\n",
hdc1001_info->sel_drive, PCX, pDrive->cur_sectsize, pDrive->sectsize);
}
/* fall through */

View file

@ -1,7 +1,7 @@
/* s100_icom.c: iCOM FD3712/FD3812 Flexible Disk System
Created by Patrick Linstruth (patrick@deltecent.com)
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
@ -116,7 +116,7 @@
32K: B = 32K - 16K = 16K = 04000H
48K: B = 48K = 16K = 32K = 08000H
62K: B = 62K = 16K = 46K = 0B800H
64K: B = 64K = 16K = 48K = 0C000H
64K: B = 64K = 16K = 48K = 0C000H
+----------------------------------------------------------------------+
| |
@ -200,134 +200,134 @@ static uint8 icom_mem[ICOM_MEM_SIZE];
/* iCOM PROMs are 1024 bytes */
static uint8 icom_3712_prom[ICOM_PROM_SIZE] = {
0xc3, 0x73, 0xf0, 0x20, 0x41, 0x4c, 0x54, 0x41,
0x49, 0x52, 0x43, 0x20, 0xc3, 0x85, 0xf0, 0x15,
0xc3, 0xa6, 0xf0, 0xc3, 0xc7, 0xf0, 0xc3, 0x06,
0xf4, 0xc3, 0x09, 0xf4, 0xc3, 0x0c, 0xf4, 0xc3,
0x0f, 0xf4, 0xc3, 0x12, 0xf4, 0xc3, 0x15, 0xf4,
0xc3, 0x6b, 0xf1, 0xc3, 0x73, 0xf1, 0xc3, 0x6e,
0xf1, 0xc3, 0x7d, 0xf1, 0xc3, 0x82, 0xf1, 0xc3,
0x88, 0xf1, 0xc3, 0xc5, 0xf1, 0xc9, 0x00, 0x00,
0xc3, 0x64, 0xf1, 0xc3, 0x5a, 0xf2, 0x20, 0x33,
0x37, 0x31, 0x32, 0x2d, 0x56, 0x32, 0x31, 0x20,
0x28, 0x43, 0x29, 0x20, 0x4c, 0x49, 0x46, 0x45,
0x42, 0x4f, 0x41, 0x54, 0x20, 0x41, 0x53, 0x53,
0x4f, 0x43, 0x49, 0x41, 0x54, 0x45, 0x53, 0x20,
0x31, 0x39, 0x37, 0x39, 0x20, 0x21, 0xe0, 0xf3,
0xc3, 0x7f, 0xf0, 0x21, 0xf0, 0xf3, 0xc3, 0x7f,
0xf0, 0x21, 0x68, 0xf3, 0xc3, 0x7f, 0xf0, 0x31,
0x80, 0x00, 0xcd, 0x8f, 0xf2, 0x31, 0x80, 0x00,
0xcd, 0x5a, 0xf2, 0x0e, 0x00, 0xcd, 0x6e, 0xf1,
0x01, 0x80, 0x00, 0xcd, 0x82, 0xf1, 0xcd, 0x88,
0xf1, 0xc2, 0x88, 0xf0, 0x21, 0x00, 0xf4, 0xeb,
0x21, 0x10, 0xf0, 0xc3, 0x80, 0x00, 0x22, 0x40,
0xf4, 0x11, 0xf0, 0xff, 0x19, 0x11, 0x20, 0xf4,
0x06, 0x10, 0xcd, 0x86, 0xf2, 0x11, 0x80, 0xff,
0x19, 0xaf, 0x32, 0x48, 0xf4, 0xcd, 0x4f, 0xf1,
0xaf, 0x32, 0x04, 0x00, 0xc3, 0x28, 0xf1, 0x31,
0x00, 0x01, 0xcd, 0x5a, 0xf2, 0x0e, 0x00, 0xcd,
0x6e, 0xf1, 0x2a, 0x40, 0xf4, 0x11, 0x00, 0xeb,
0x19, 0x24, 0x3e, 0x04, 0xcd, 0xf7, 0xf0, 0x0e,
0x01, 0xcd, 0x6e, 0xf1, 0x2a, 0x40, 0xf4, 0x11,
0x00, 0xeb, 0x19, 0x11, 0x80, 0x0c, 0x19, 0x3e,
0x01, 0xcd, 0xf7, 0xf0, 0xc3, 0x28, 0xf1, 0x32,
0x32, 0xf4, 0x22, 0x33, 0xf4, 0x3a, 0x41, 0xf4,
0x3d, 0xbc, 0xda, 0x0b, 0xf1, 0xcd, 0x88, 0xf1,
0xc2, 0xc7, 0xf0, 0x2a, 0x33, 0xf4, 0x11, 0x80,
0x01, 0x19, 0x3a, 0x32, 0xf4, 0xc6, 0x03, 0xfe,
0x1b, 0xda, 0xf7, 0xf0, 0xd6, 0x1a, 0x11, 0x00,
0xf3, 0x19, 0xfe, 0x01, 0xc2, 0xf7, 0xf0, 0xc9,
0x01, 0x80, 0x00, 0xcd, 0x82, 0xf1, 0x3e, 0xc3,
0x32, 0x00, 0x00, 0x32, 0x05, 0x00, 0x2a, 0x40,
0xf4, 0x23, 0x23, 0x23, 0x22, 0x01, 0x00, 0x11,
0x03, 0xf3, 0x19, 0x22, 0x06, 0x00, 0x3a, 0x04,
0x00, 0x4f, 0x11, 0xfa, 0xf7, 0x19, 0xe9, 0x7e,
0xb7, 0xc8, 0x4e, 0x23, 0xe5, 0xcd, 0x5c, 0xf1,
0xe1, 0xc3, 0x4f, 0xf1, 0x2a, 0x40, 0xf4, 0x11,
0x0c, 0x00, 0x19, 0xe9, 0x21, 0x00, 0xf4, 0x06,
0x00, 0x09, 0xc9, 0xc3, 0x67, 0xf2, 0x79, 0x32,
0x31, 0xf4, 0xc9, 0x79, 0x32, 0x30, 0xf4, 0x3e,
0xff, 0x32, 0x27, 0xf4, 0xc9, 0x79, 0x32, 0x32,
0xf4, 0xc9, 0x60, 0x69, 0x22, 0x33, 0xf4, 0xc9,
0xcd, 0x0a, 0xf2, 0xc2, 0x06, 0xf2, 0x0e, 0x0a,
0x3e, 0x03, 0xcd, 0x71, 0xf2, 0xe6, 0x28, 0xca,
0xa4, 0xf1, 0xcd, 0x7e, 0xf2, 0x0d, 0xc2, 0x90,
0xf1, 0xc3, 0x06, 0xf2, 0x2a, 0x33, 0xf4, 0x0e,
0x80, 0x3e, 0x40, 0xd3, 0xc0, 0xdb, 0xc0, 0x77,
0x23, 0xaf, 0xd3, 0xc0, 0x0d, 0x3e, 0x41, 0xd3,
0xc0, 0xdb, 0xc0, 0x77, 0x23, 0xaf, 0xd3, 0xc0,
0x0d, 0xc2, 0xb5, 0xf1, 0xc9, 0xcd, 0x0a, 0xf2,
0xc2, 0x06, 0xf2, 0x2a, 0x33, 0xf4, 0x0e, 0x80,
0x7e, 0xd3, 0xc1, 0x3e, 0x31, 0xd3, 0xc0, 0xaf,
0xd3, 0xc0, 0x23, 0x0d, 0xc2, 0xd0, 0xf1, 0x0e,
0x0a, 0x3e, 0x05, 0xcd, 0x71, 0xf2, 0xe6, 0x20,
0xca, 0xf1, 0xf1, 0xcd, 0x7e, 0xf2, 0xc3, 0x06,
0xf2, 0x3a, 0x2f, 0xf4, 0xe6, 0x40, 0xc8, 0x3e,
0x07, 0xcd, 0x71, 0xf2, 0xe6, 0x28, 0xc8, 0xcd,
0x7e, 0xf2, 0x0d, 0xc2, 0xe1, 0xf1, 0x3e, 0x01,
0xb7, 0xc9, 0xaf, 0xd3, 0xc1, 0x3e, 0x15, 0xcd,
0x80, 0xf2, 0xcd, 0x19, 0xf2, 0xcd, 0x2d, 0xf2,
0xc9, 0x3a, 0x30, 0xf4, 0xe6, 0x03, 0x0f, 0x0f,
0x4f, 0x3a, 0x32, 0xf4, 0xb1, 0xd3, 0xc1, 0x3e,
0x21, 0xcd, 0x80, 0xf2, 0xc9, 0x0e, 0x02, 0x3a,
0x31, 0xf4, 0x21, 0x27, 0xf4, 0xbe, 0xc8, 0x77,
0x3a, 0x31, 0xf4, 0xd3, 0xc1, 0x3e, 0x11, 0xcd,
0x80, 0xf2, 0x3e, 0x09, 0xcd, 0x71, 0xf2, 0xe6,
0x28, 0xc8, 0xcd, 0x7e, 0xf2, 0x36, 0xff, 0x0d,
0xc2, 0x2d, 0xf2, 0xcd, 0x62, 0xf2, 0x3e, 0x02,
0xb7, 0xc9, 0xaf, 0x32, 0x30, 0xf4, 0x3c, 0x32,
0x32, 0xf4, 0x3e, 0x81, 0xcd, 0x80, 0xf2, 0xcd,
0x19, 0xf2, 0x3e, 0xff, 0x32, 0x27, 0xf4, 0x3e,
0x0d, 0xcd, 0x80, 0xf2, 0xdb, 0xc0, 0xe6, 0x01,
0xc2, 0x74, 0xf2, 0xdb, 0xc0, 0xc9, 0x3e, 0x0b,
0xd3, 0xc0, 0xaf, 0xd3, 0xc0, 0xc9, 0x7e, 0x12,
0x23, 0x13, 0x05, 0xc2, 0x86, 0xf2, 0xc9, 0x11,
0x00, 0xf4, 0x06, 0x08, 0x3e, 0xc3, 0x12, 0x13,
0x7e, 0x12, 0x23, 0x13, 0x7e, 0x12, 0x23, 0x13,
0x05, 0xc2, 0x94, 0xf2, 0xc9, 0x3e, 0x03, 0xd3,
0x10, 0x3e, 0x11, 0xd3, 0x10, 0xc9, 0xdb, 0x10,
0xe6, 0x01, 0x3e, 0x00, 0xc8, 0x2f, 0xc9, 0xdb,
0x10, 0xe6, 0x01, 0xca, 0xb7, 0xf2, 0xdb, 0x11,
0xe6, 0x7f, 0xca, 0xb7, 0xf2, 0xc9, 0xdb, 0x10,
0xe6, 0x02, 0xca, 0xc6, 0xf2, 0x79, 0xd3, 0x11,
0xc9, 0xc9, 0xc9, 0xdb, 0x00, 0xe6, 0x01, 0x3e,
0x00, 0xc0, 0x2f, 0xc9, 0xdb, 0x00, 0xe6, 0x01,
0xc2, 0xdc, 0xf2, 0xdb, 0x01, 0xe6, 0x7f, 0xca,
0xdc, 0xf2, 0xc9, 0xdb, 0x00, 0xe6, 0x80, 0xc2,
0xeb, 0xf2, 0x79, 0xd3, 0x01, 0xc9, 0x3a, 0x48,
0xf4, 0xb7, 0xc2, 0x0c, 0xf3, 0x3e, 0x11, 0xd3,
0x03, 0xaf, 0xd3, 0x02, 0x32, 0x47, 0xf4, 0x3e,
0x84, 0x32, 0x48, 0xf4, 0x79, 0xfe, 0x0a, 0xc2,
0x1a, 0xf3, 0x32, 0x49, 0xf4, 0x3a, 0x47, 0xf4,
0xb7, 0xc8, 0x79, 0xfe, 0x08, 0xca, 0x4f, 0xf3,
0xfe, 0x09, 0xca, 0x5a, 0xf3, 0xfe, 0x0d, 0xca,
0x38, 0xf3, 0xd8, 0x3a, 0x47, 0xf4, 0x3c, 0xe5,
0x21, 0x48, 0xf4, 0xbe, 0xe1, 0xc2, 0x48, 0xf3,
0x3a, 0x47, 0xf4, 0xb7, 0xc2, 0x47, 0xf3, 0x3a,
0x49, 0xf4, 0xfe, 0x0d, 0xc8, 0x0e, 0x0a, 0xaf,
0x32, 0x47, 0xf4, 0x79, 0x32, 0x49, 0xf4, 0xdb,
0x02, 0xe6, 0x11, 0xca, 0x4f, 0xf3, 0x79, 0xd3,
0x03, 0xc9, 0x0e, 0x20, 0xcd, 0x0c, 0xf3, 0x3a,
0x47, 0xf4, 0xe6, 0x07, 0xc2, 0x5a, 0xf3, 0xc9,
0xa8, 0xf3, 0xd2, 0xf2, 0xa1, 0xf3, 0x78, 0xf3,
0x8e, 0xf3, 0xf6, 0xf2, 0x8e, 0xf3, 0x78, 0xf3,
0xcd, 0x84, 0xf3, 0xca, 0x78, 0xf3, 0x7e, 0xe6,
0x7f, 0x36, 0x00, 0xc9, 0x21, 0x4b, 0xf4, 0x7e,
0xb7, 0xcc, 0x1f, 0xc0, 0x77, 0xc9, 0x3a, 0x4a,
0xf4, 0xfe, 0x0d, 0xc2, 0x98, 0xf3, 0xb9, 0xc8,
0x79, 0x32, 0x4a, 0xf4, 0x41, 0xcd, 0x19, 0xc0,
0xc9, 0xcd, 0x84, 0xf3, 0xc8, 0x3e, 0xff, 0xc9,
0x21, 0x00, 0x00, 0x22, 0x4a, 0xf4, 0xc9, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xd1, 0xf2, 0xd2, 0xf2, 0xd3, 0xf2, 0xdc, 0xf2,
0xeb, 0xf2, 0xf6, 0xf2, 0xeb, 0xf2, 0xdc, 0xf2,
0xa5, 0xf2, 0xd2, 0xf2, 0xae, 0xf2, 0xb7, 0xf2,
0xc6, 0xf2, 0xf6, 0xf2, 0xc6, 0xf2, 0xb7, 0xf2,
0xc3, 0x73, 0xf0, 0x20, 0x41, 0x4c, 0x54, 0x41,
0x49, 0x52, 0x43, 0x20, 0xc3, 0x85, 0xf0, 0x15,
0xc3, 0xa6, 0xf0, 0xc3, 0xc7, 0xf0, 0xc3, 0x06,
0xf4, 0xc3, 0x09, 0xf4, 0xc3, 0x0c, 0xf4, 0xc3,
0x0f, 0xf4, 0xc3, 0x12, 0xf4, 0xc3, 0x15, 0xf4,
0xc3, 0x6b, 0xf1, 0xc3, 0x73, 0xf1, 0xc3, 0x6e,
0xf1, 0xc3, 0x7d, 0xf1, 0xc3, 0x82, 0xf1, 0xc3,
0x88, 0xf1, 0xc3, 0xc5, 0xf1, 0xc9, 0x00, 0x00,
0xc3, 0x64, 0xf1, 0xc3, 0x5a, 0xf2, 0x20, 0x33,
0x37, 0x31, 0x32, 0x2d, 0x56, 0x32, 0x31, 0x20,
0x28, 0x43, 0x29, 0x20, 0x4c, 0x49, 0x46, 0x45,
0x42, 0x4f, 0x41, 0x54, 0x20, 0x41, 0x53, 0x53,
0x4f, 0x43, 0x49, 0x41, 0x54, 0x45, 0x53, 0x20,
0x31, 0x39, 0x37, 0x39, 0x20, 0x21, 0xe0, 0xf3,
0xc3, 0x7f, 0xf0, 0x21, 0xf0, 0xf3, 0xc3, 0x7f,
0xf0, 0x21, 0x68, 0xf3, 0xc3, 0x7f, 0xf0, 0x31,
0x80, 0x00, 0xcd, 0x8f, 0xf2, 0x31, 0x80, 0x00,
0xcd, 0x5a, 0xf2, 0x0e, 0x00, 0xcd, 0x6e, 0xf1,
0x01, 0x80, 0x00, 0xcd, 0x82, 0xf1, 0xcd, 0x88,
0xf1, 0xc2, 0x88, 0xf0, 0x21, 0x00, 0xf4, 0xeb,
0x21, 0x10, 0xf0, 0xc3, 0x80, 0x00, 0x22, 0x40,
0xf4, 0x11, 0xf0, 0xff, 0x19, 0x11, 0x20, 0xf4,
0x06, 0x10, 0xcd, 0x86, 0xf2, 0x11, 0x80, 0xff,
0x19, 0xaf, 0x32, 0x48, 0xf4, 0xcd, 0x4f, 0xf1,
0xaf, 0x32, 0x04, 0x00, 0xc3, 0x28, 0xf1, 0x31,
0x00, 0x01, 0xcd, 0x5a, 0xf2, 0x0e, 0x00, 0xcd,
0x6e, 0xf1, 0x2a, 0x40, 0xf4, 0x11, 0x00, 0xeb,
0x19, 0x24, 0x3e, 0x04, 0xcd, 0xf7, 0xf0, 0x0e,
0x01, 0xcd, 0x6e, 0xf1, 0x2a, 0x40, 0xf4, 0x11,
0x00, 0xeb, 0x19, 0x11, 0x80, 0x0c, 0x19, 0x3e,
0x01, 0xcd, 0xf7, 0xf0, 0xc3, 0x28, 0xf1, 0x32,
0x32, 0xf4, 0x22, 0x33, 0xf4, 0x3a, 0x41, 0xf4,
0x3d, 0xbc, 0xda, 0x0b, 0xf1, 0xcd, 0x88, 0xf1,
0xc2, 0xc7, 0xf0, 0x2a, 0x33, 0xf4, 0x11, 0x80,
0x01, 0x19, 0x3a, 0x32, 0xf4, 0xc6, 0x03, 0xfe,
0x1b, 0xda, 0xf7, 0xf0, 0xd6, 0x1a, 0x11, 0x00,
0xf3, 0x19, 0xfe, 0x01, 0xc2, 0xf7, 0xf0, 0xc9,
0x01, 0x80, 0x00, 0xcd, 0x82, 0xf1, 0x3e, 0xc3,
0x32, 0x00, 0x00, 0x32, 0x05, 0x00, 0x2a, 0x40,
0xf4, 0x23, 0x23, 0x23, 0x22, 0x01, 0x00, 0x11,
0x03, 0xf3, 0x19, 0x22, 0x06, 0x00, 0x3a, 0x04,
0x00, 0x4f, 0x11, 0xfa, 0xf7, 0x19, 0xe9, 0x7e,
0xb7, 0xc8, 0x4e, 0x23, 0xe5, 0xcd, 0x5c, 0xf1,
0xe1, 0xc3, 0x4f, 0xf1, 0x2a, 0x40, 0xf4, 0x11,
0x0c, 0x00, 0x19, 0xe9, 0x21, 0x00, 0xf4, 0x06,
0x00, 0x09, 0xc9, 0xc3, 0x67, 0xf2, 0x79, 0x32,
0x31, 0xf4, 0xc9, 0x79, 0x32, 0x30, 0xf4, 0x3e,
0xff, 0x32, 0x27, 0xf4, 0xc9, 0x79, 0x32, 0x32,
0xf4, 0xc9, 0x60, 0x69, 0x22, 0x33, 0xf4, 0xc9,
0xcd, 0x0a, 0xf2, 0xc2, 0x06, 0xf2, 0x0e, 0x0a,
0x3e, 0x03, 0xcd, 0x71, 0xf2, 0xe6, 0x28, 0xca,
0xa4, 0xf1, 0xcd, 0x7e, 0xf2, 0x0d, 0xc2, 0x90,
0xf1, 0xc3, 0x06, 0xf2, 0x2a, 0x33, 0xf4, 0x0e,
0x80, 0x3e, 0x40, 0xd3, 0xc0, 0xdb, 0xc0, 0x77,
0x23, 0xaf, 0xd3, 0xc0, 0x0d, 0x3e, 0x41, 0xd3,
0xc0, 0xdb, 0xc0, 0x77, 0x23, 0xaf, 0xd3, 0xc0,
0x0d, 0xc2, 0xb5, 0xf1, 0xc9, 0xcd, 0x0a, 0xf2,
0xc2, 0x06, 0xf2, 0x2a, 0x33, 0xf4, 0x0e, 0x80,
0x7e, 0xd3, 0xc1, 0x3e, 0x31, 0xd3, 0xc0, 0xaf,
0xd3, 0xc0, 0x23, 0x0d, 0xc2, 0xd0, 0xf1, 0x0e,
0x0a, 0x3e, 0x05, 0xcd, 0x71, 0xf2, 0xe6, 0x20,
0xca, 0xf1, 0xf1, 0xcd, 0x7e, 0xf2, 0xc3, 0x06,
0xf2, 0x3a, 0x2f, 0xf4, 0xe6, 0x40, 0xc8, 0x3e,
0x07, 0xcd, 0x71, 0xf2, 0xe6, 0x28, 0xc8, 0xcd,
0x7e, 0xf2, 0x0d, 0xc2, 0xe1, 0xf1, 0x3e, 0x01,
0xb7, 0xc9, 0xaf, 0xd3, 0xc1, 0x3e, 0x15, 0xcd,
0x80, 0xf2, 0xcd, 0x19, 0xf2, 0xcd, 0x2d, 0xf2,
0xc9, 0x3a, 0x30, 0xf4, 0xe6, 0x03, 0x0f, 0x0f,
0x4f, 0x3a, 0x32, 0xf4, 0xb1, 0xd3, 0xc1, 0x3e,
0x21, 0xcd, 0x80, 0xf2, 0xc9, 0x0e, 0x02, 0x3a,
0x31, 0xf4, 0x21, 0x27, 0xf4, 0xbe, 0xc8, 0x77,
0x3a, 0x31, 0xf4, 0xd3, 0xc1, 0x3e, 0x11, 0xcd,
0x80, 0xf2, 0x3e, 0x09, 0xcd, 0x71, 0xf2, 0xe6,
0x28, 0xc8, 0xcd, 0x7e, 0xf2, 0x36, 0xff, 0x0d,
0xc2, 0x2d, 0xf2, 0xcd, 0x62, 0xf2, 0x3e, 0x02,
0xb7, 0xc9, 0xaf, 0x32, 0x30, 0xf4, 0x3c, 0x32,
0x32, 0xf4, 0x3e, 0x81, 0xcd, 0x80, 0xf2, 0xcd,
0x19, 0xf2, 0x3e, 0xff, 0x32, 0x27, 0xf4, 0x3e,
0x0d, 0xcd, 0x80, 0xf2, 0xdb, 0xc0, 0xe6, 0x01,
0xc2, 0x74, 0xf2, 0xdb, 0xc0, 0xc9, 0x3e, 0x0b,
0xd3, 0xc0, 0xaf, 0xd3, 0xc0, 0xc9, 0x7e, 0x12,
0x23, 0x13, 0x05, 0xc2, 0x86, 0xf2, 0xc9, 0x11,
0x00, 0xf4, 0x06, 0x08, 0x3e, 0xc3, 0x12, 0x13,
0x7e, 0x12, 0x23, 0x13, 0x7e, 0x12, 0x23, 0x13,
0x05, 0xc2, 0x94, 0xf2, 0xc9, 0x3e, 0x03, 0xd3,
0x10, 0x3e, 0x11, 0xd3, 0x10, 0xc9, 0xdb, 0x10,
0xe6, 0x01, 0x3e, 0x00, 0xc8, 0x2f, 0xc9, 0xdb,
0x10, 0xe6, 0x01, 0xca, 0xb7, 0xf2, 0xdb, 0x11,
0xe6, 0x7f, 0xca, 0xb7, 0xf2, 0xc9, 0xdb, 0x10,
0xe6, 0x02, 0xca, 0xc6, 0xf2, 0x79, 0xd3, 0x11,
0xc9, 0xc9, 0xc9, 0xdb, 0x00, 0xe6, 0x01, 0x3e,
0x00, 0xc0, 0x2f, 0xc9, 0xdb, 0x00, 0xe6, 0x01,
0xc2, 0xdc, 0xf2, 0xdb, 0x01, 0xe6, 0x7f, 0xca,
0xdc, 0xf2, 0xc9, 0xdb, 0x00, 0xe6, 0x80, 0xc2,
0xeb, 0xf2, 0x79, 0xd3, 0x01, 0xc9, 0x3a, 0x48,
0xf4, 0xb7, 0xc2, 0x0c, 0xf3, 0x3e, 0x11, 0xd3,
0x03, 0xaf, 0xd3, 0x02, 0x32, 0x47, 0xf4, 0x3e,
0x84, 0x32, 0x48, 0xf4, 0x79, 0xfe, 0x0a, 0xc2,
0x1a, 0xf3, 0x32, 0x49, 0xf4, 0x3a, 0x47, 0xf4,
0xb7, 0xc8, 0x79, 0xfe, 0x08, 0xca, 0x4f, 0xf3,
0xfe, 0x09, 0xca, 0x5a, 0xf3, 0xfe, 0x0d, 0xca,
0x38, 0xf3, 0xd8, 0x3a, 0x47, 0xf4, 0x3c, 0xe5,
0x21, 0x48, 0xf4, 0xbe, 0xe1, 0xc2, 0x48, 0xf3,
0x3a, 0x47, 0xf4, 0xb7, 0xc2, 0x47, 0xf3, 0x3a,
0x49, 0xf4, 0xfe, 0x0d, 0xc8, 0x0e, 0x0a, 0xaf,
0x32, 0x47, 0xf4, 0x79, 0x32, 0x49, 0xf4, 0xdb,
0x02, 0xe6, 0x11, 0xca, 0x4f, 0xf3, 0x79, 0xd3,
0x03, 0xc9, 0x0e, 0x20, 0xcd, 0x0c, 0xf3, 0x3a,
0x47, 0xf4, 0xe6, 0x07, 0xc2, 0x5a, 0xf3, 0xc9,
0xa8, 0xf3, 0xd2, 0xf2, 0xa1, 0xf3, 0x78, 0xf3,
0x8e, 0xf3, 0xf6, 0xf2, 0x8e, 0xf3, 0x78, 0xf3,
0xcd, 0x84, 0xf3, 0xca, 0x78, 0xf3, 0x7e, 0xe6,
0x7f, 0x36, 0x00, 0xc9, 0x21, 0x4b, 0xf4, 0x7e,
0xb7, 0xcc, 0x1f, 0xc0, 0x77, 0xc9, 0x3a, 0x4a,
0xf4, 0xfe, 0x0d, 0xc2, 0x98, 0xf3, 0xb9, 0xc8,
0x79, 0x32, 0x4a, 0xf4, 0x41, 0xcd, 0x19, 0xc0,
0xc9, 0xcd, 0x84, 0xf3, 0xc8, 0x3e, 0xff, 0xc9,
0x21, 0x00, 0x00, 0x22, 0x4a, 0xf4, 0xc9, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xd1, 0xf2, 0xd2, 0xf2, 0xd3, 0xf2, 0xdc, 0xf2,
0xeb, 0xf2, 0xf6, 0xf2, 0xeb, 0xf2, 0xdc, 0xf2,
0xa5, 0xf2, 0xd2, 0xf2, 0xae, 0xf2, 0xb7, 0xf2,
0xc6, 0xf2, 0xf6, 0xf2, 0xc6, 0xf2, 0xb7, 0xf2,
};
static uint8 icom_3812_prom[ICOM_PROM_SIZE] = {
@ -458,7 +458,7 @@ static uint8 icom_3812_prom[ICOM_PROM_SIZE] = {
0xb7, 0xc8, 0x4e, 0xe5, 0xcd, 0xec, 0xf3, 0xe1,
0x23, 0xc3, 0xdf, 0xf3, 0x2a, 0x40, 0xf4, 0x2e,
0x0c, 0xe9, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
};
static uint8 *icom_prom = icom_3812_prom; /* default is 3812 */
@ -655,7 +655,7 @@ static DEBTAB icom_dt[] = {
{ "WRITE", WR_DATA_MSG, "Write messages" },
{ "STATUS", STATUS_MSG, "Status messages" },
{ "RDDETAIL", RD_DATA_DETAIL_MSG, "Read detail messages" },
{ "WRDETAIL", WR_DATA_DETAIL_MSG, "Write detail messags" },
{ "WRDETAIL", WR_DATA_DETAIL_MSG, "Write detail messages" },
{ NULL, 0 }
};
@ -678,7 +678,7 @@ DEVICE icom_dev = {
&icom_detach, /* detach routine */
&icom_info_data, /* context */
(DEV_DISABLE | DEV_DIS | DEV_DEBUG), /* flags */
ERROR_MSG, /* debug control */
ERROR_MSG, /* debug control */
icom_dt, /* debug flags */
NULL, /* mem size routine */
NULL, /* logical name */
@ -785,7 +785,7 @@ static t_stat icom_attach(UNIT *uptr, CONST char *cptr)
/* Default for new file is DSK */
uptr->u3 = IMAGE_TYPE_DSK;
sim_debug(VERBOSE_MSG, uptr->dptr, "unit %d, attached to '%s' size=%d interface=%s\n",
sim_debug(VERBOSE_MSG, uptr->dptr, "unit %d, attached to '%s' size=%d interface=%s\n",
i, cptr, uptr->capac, (icom_info->boardType == ICOM_TYPE_3712) ? "FD3712" : "FD3812");
return SCPE_OK;

View file

@ -1,8 +1,8 @@
/* s100_jadedd.c: Jade Double D Disk Controller
Created by Patrick Linstruth (patrick@deltecent.com)
Based on s100_mdsa.c written by Mike Douglas
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
@ -31,7 +31,7 @@
and memory address space.
While the Double D is capable to loading many different operating systems,
this emulator is centered around Digital Reasearch's CP/M 2 operating
this emulator is centered around Digital Research's CP/M 2 operating
system as it was released by Jade.
The process of booting CP/M with the DD is a bit more complicated than
@ -60,9 +60,9 @@
When the DDBOOT PROM sees that the DD has halted, it checks for errors
and then moves BIOS from memory bank 1 to the address stored in the
Command Block. DDBOOT PROM then jumps to the BIOS cold start address.
** NOTE **
This emulator does not actually execute Z80 code injected on the DD. The
functionality of the code is only emulated. Changing the DD modules on the
attached disk image, such as running DCMGEN, will not change the functionality
@ -301,7 +301,7 @@ static uint8 jade_prom[JADE_PROM_SIZE] = {
0xdb,0x80,0xdb,0x07,0xa9,0x77,0x23,0x1b,0x7a,0xb3,0xc2,0x8a,0x00,0xdb,0x04,0xa9,
0xe6,0x9c,0xc2,0xaa,0x00,0xcd,0x50,0x00,0xc3,0x03,0x04,0x3e,0x02,0xc3,0xb1,0x00,
0x3e,0x04,0xc3,0xb1,0x00,0x3e,0x01,0x32,0x76,0x03,0xaf,0xd3,0x00,0xdb,0x10,0x76,
0x3e,0xdc,0x3d,0x00,0xc2,0xbc,0x00,0x1b,0x7a,0xb3,0xc2,0xba,0x00,0xc9
0x3e,0xdc,0x3d,0x00,0xc2,0xbc,0x00,0x1b,0x7a,0xb3,0xc2,0xba,0x00,0xc9
};
#define JADE_STAT_HLT_MSK 0x01
@ -312,7 +312,7 @@ static uint8 jade_prom[JADE_PROM_SIZE] = {
#define CMD_MD0 0x01 /* Select DD bank 0 */
#define CMD_MD1 0x03 /* Select DD bank 1 */
#define CMD_SOT 0x00 /* Switch DD mem out of system */
#define CMD_INT 0x02 /* Isssue DD Z80A interrupt */
#define CMD_INT 0x02 /* Issue DD Z80A interrupt */
#define CMD_BGN 0x80 /* Reset Z80 and execute */
#define DC_LOG 0x00 /* Log on diskette */
@ -494,7 +494,7 @@ static DEBTAB jade_dt[] = {
{ "WRITE", WR_DATA_MSG, "Write messages" },
{ "STATUS", STATUS_MSG, "Status messages" },
{ "RDDETAIL", RD_DATA_DETAIL_MSG, "Read detail messages" },
{ "WRDETAIL", WR_DATA_DETAIL_MSG, "Write detail messags" },
{ "WRDETAIL", WR_DATA_DETAIL_MSG, "Write detail messages" },
{ NULL, 0 }
};
@ -901,7 +901,7 @@ static uint8 JADE_Out(uint32 Addr, int32 Data)
case CMD_BGN: /* Reset and Execute */
/*
** Card has been reset and the host boot PROM
** Card has been reset and the host boot PROM
** has loaded the DCM injector module onto the DD.
** This modules reads the DCM from track 0 starting
** at sector 13 into memory bank 1. After the DCM
@ -1200,7 +1200,7 @@ static uint8 DCM_Format(uint8 drive, uint8 track)
memset(sbuf, 0xe5, sizeof(sbuf));
jade_info->dt[drive].flg = 0;
/*
** Are we formatting double density?
*/

View file

@ -190,7 +190,7 @@ static DEBTAB mdsa_dt[] = {
{ "WRITE", WR_DATA_MSG, "Write messages" },
{ "STATUS", STATUS_MSG, "Status messages" },
{ "RDDETAIL", RD_DATA_DETAIL_MSG, "Read detail messages" },
{ "WRDETAIL", WR_DATA_DETAIL_MSG, "Write detail messags" },
{ "WRDETAIL", WR_DATA_DETAIL_MSG, "Write detail messages" },
{ NULL, 0 }
};

View file

@ -111,7 +111,7 @@ typedef struct {
typedef struct {
uint8 dd; /* Controls density on write DD=1 for double density and DD=0 for single density. */
uint8 ss; /* Specifies the side of a double-sided diskette. The bottom side (and only side of a single-sided diskette) is selected when SS=0. The second (top) side is selected when SS=1. */
uint8 dp; /* has shared use. During stepping operations, DP=O specifies a step out and DP=1 specifies a step in. During write operations, write procompensation is invoked if and only if DP=1. */
uint8 dp; /* has shared use. During stepping operations, DP=O specifies a step out and DP=1 specifies a step in. During write operations, write precompensation is invoked if and only if DP=1. */
uint8 st; /* controls the level of the head step signal to the disk drives. */
uint8 pst; /* value of step signal (st) on previous order */
uint8 ds; /* is the drive select field, encoded as follows: */
@ -270,7 +270,7 @@ static DEBTAB mdsad_dt[] = {
{ "STATUS", STATUS_MSG, "Status messages" },
{ "ORDERS", ORDERS_MSG, "Orders messages" },
{ "RDDETAIL", RD_DATA_DETAIL_MSG, "Read detail messages" },
{ "WRDETAIL", WR_DATA_DETAIL_MSG, "Write detail messags" },
{ "WRDETAIL", WR_DATA_DETAIL_MSG, "Write detail messages" },
{ NULL, 0 }
};

View file

@ -33,11 +33,11 @@
The MM-103 uses the Motorola MC6860L digital modem chip. This device does
not have the ability to emulate the modulation and demodulation functions
or the ability to connect to a phone line. All modem features, such as
switch hook, dialtone detection, and dialing, are emulated in such a way
switch hook, dial tone detection, and dialing, are emulated in such a way
that most software written for the MM-103 should function in some useful
fashion.
To provide any useful funcationality, this device need to be attached to
To provide any useful functionality, this device need to be attached to
a socket or serial port. Enter "HELP PMMI" at the "simh>" prompt for
additional information.
*/
@ -222,10 +222,10 @@ static REG pmmi_reg[] = {
};
DEVICE pmmi_dev = {
PMMI_SNAME, /* name */
pmmi_unit, /* unit */
pmmi_reg, /* registers */
pmmi_mod, /* modifiers */
PMMI_SNAME, /* name */
pmmi_unit, /* unit */
pmmi_reg, /* registers */
pmmi_mod, /* modifiers */
1, /* # units */
10, /* address radix */
31, /* address width */
@ -236,18 +236,18 @@ DEVICE pmmi_dev = {
NULL, /* deposit routine */
&pmmi_reset, /* reset routine */
NULL, /* boot routine */
&pmmi_attach, /* attach routine */
&pmmi_detach, /* detach routine */
&pmmi_ctx, /* context */
(DEV_DISABLE | DEV_DIS | DEV_DEBUG | DEV_MUX), /* flags */
0, /* debug control */
pmmi_dt, /* debug flags */
NULL, /* mem size routine */
NULL, /* logical name */
NULL, /* help */
NULL, /* attach help */
NULL, /* context for help */
&pmmi_description /* description */
&pmmi_attach, /* attach routine */
&pmmi_detach, /* detach routine */
&pmmi_ctx, /* context */
(DEV_DISABLE | DEV_DIS | DEV_DEBUG | DEV_MUX), /* flags */
0, /* debug control */
pmmi_dt, /* debug flags */
NULL, /* mem size routine */
NULL, /* logical name */
NULL, /* help */
NULL, /* attach help */
NULL, /* context for help */
&pmmi_description /* description */
};
static const char* pmmi_description(DEVICE *dptr)
@ -266,7 +266,7 @@ static t_stat pmmi_reset(DEVICE *dptr)
/* Set DEVICE for this UNIT */
dptr->units[0].dptr = dptr;
/* Enable TMXR modem control passthru */
/* Enable TMXR modem control passthrough */
tmxr_set_modem_control_passthru(pmmi_ctx.tmxr);
/* Reset status registers */
@ -571,7 +571,7 @@ static t_stat pmmi_config_line(UNIT *uptr)
** to run irrelevant, old software, that use TMXR and
** rely on some semblance of timing (Remote CP/M, BYE,
** RBBS, PCGET/PUT, Xmodem, MEX, Modem7, or most
** other communications software), on contemprary
** other communications software), on contemporary
** hardware.
**
** Serial ports are self-limiting and sockets will run
@ -626,8 +626,8 @@ static int32 pmmi_reg0(int32 io, int32 data)
} else { pmmi_ctx.oreg0 = data; /* Set UART configuration */
pmmi_config_line(&pmmi_dev.units[0]);
if (data & PMMI_SH) { /* If off-hook, clear dialtone bit (active low) */
pmmi_ctx.dtimer = sim_os_msec() + 500; /* Dialtone in 500ms */
if (data & PMMI_SH) { /* If off-hook, clear dial tone bit (active low) */
pmmi_ctx.dtimer = sim_os_msec() + 500; /* Dial tone in 500ms */
if (pmmi_ctx.oreg0 & PMMI_SH) {
pmmi_ctx.ireg2 &= ~PMMI_AP; /* Answer Phone Bit (active low) */
}

View file

@ -190,7 +190,7 @@ static REG scp300f_reg[] = {
{ HRDATAD(SPIC_OCW2, scp300f_pic[SLAVE_PIC].OCW2, 8, "Slave OCW2 register"), },
{ HRDATAD(SPIC_OCW3, scp300f_pic[SLAVE_PIC].OCW3, 8, "Slave OCW3 register"), },
{ HRDATAD(9513_HUND, data9513[0], 8, "9513 Hundreths"), },
{ HRDATAD(9513_HUND, data9513[0], 8, "9513 Hundredths"), },
{ HRDATAD(9513_SS, data9513[1], 8, "9513 Seconds"), },
{ HRDATAD(9513_MM, data9513[2], 8, "9513 Minutes"), },
{ HRDATAD(9513_HH, data9513[3], 8, "9513 Hours"), },
@ -709,7 +709,7 @@ static uint8 SCP300F_Write(const uint32 Addr, uint8 cData)
switch(Addr & SCP300F_IO_MASK) {
case SCP300F_SPIC_0:
sel_pic = SLAVE_PIC; /* intentional falltrough */
sel_pic = SLAVE_PIC; /* intentional fallthrough */
case SCP300F_MPIC_0:
if (cData & 0x10) {
sim_debug(PIC_MSG, &scp300f_dev, "SCP300F: " ADDRESS_FORMAT

View file

@ -483,7 +483,7 @@ static uint8 SS1_Write(const uint32 Addr, uint8 cData)
switch(Addr & 0x0F) {
case SS1_S8259_L:
sel_pic = SLAVE_PIC; /* intentional falltrough */
sel_pic = SLAVE_PIC; /* intentional fallthrough */
case SS1_M8259_L:
if(cData & 0x10) {
sim_debug(PIC_MSG, &ss1_dev, "SS1: " ADDRESS_FORMAT

View file

@ -1,7 +1,7 @@
/* s100_tarbell.c: Tarbell 1011/2022 Disk Controller
Created by Patrick Linstruth (patrick@deltecent.com)
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
@ -332,7 +332,7 @@ static DEBTAB tarbell_dt[] = {
{ "WRITE", WR_DATA_MSG, "Write messages" },
{ "STATUS", STATUS_MSG, "Status messages" },
{ "RDDETAIL", RD_DATA_DETAIL_MSG, "Read detail messages" },
{ "WRDETAIL", WR_DATA_DETAIL_MSG, "Write detail messags" },
{ "WRDETAIL", WR_DATA_DETAIL_MSG, "Write detail messages" },
{ NULL, 0 }
};
@ -672,7 +672,7 @@ static void showdata(int32 isRead) {
sim_debug(isRead ? RD_DATA_DETAIL_MSG : WR_DATA_DETAIL_MSG, &tarbell_dev, "\n\t");
}
}
sim_debug(RD_DATA_DETAIL_MSG|WR_DATA_DETAIL_MSG, &tarbell_dev, "\n");
sim_debug(RD_DATA_DETAIL_MSG|WR_DATA_DETAIL_MSG, &tarbell_dev, "\n");
}
static uint32 secs_per_track(uint8 track)

View file

@ -1091,7 +1091,7 @@ static uint8 Do1793Command(uint8 cCommand)
sdata.raw[wd179x_info->fdc_dataindex] = wd179x_info->fdc_data;
if (wd179x_info->external_fifo_len) {
/* For external FIFO, write the sector immediately, as the sofware pre-fills a FIFO, which is then read out into the FDC using DRQ */
/* For external FIFO, write the sector immediately, as the software pre-fills a FIFO, which is then read out into the FDC using DRQ */
wd179x_info->fdc_status &= ~(WD179X_STAT_DRQ | WD179X_STAT_BUSY); /* Clear DRQ, BUSY */
wd179x_info->drq = 0;
wd179x_info->intrq = 1;