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PDP11, VAX: Add detailed receive descriptor list usage debug information.

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This commit is contained in:
Mark Pizzolato 2016-02-24 09:02:17 -08:00
parent 49d3ec8ff7
commit 4dfbb98946
2 changed files with 21 additions and 0 deletions
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12
PDP11/pdp11_xu.c
View file

@ -1219,6 +1219,9 @@ void xu_process_receive(CTLR* xu)
if (!(xu->var->rxhdr[2] & RXR_OWN)) {
/* tell the host there are no more buffers */
/* xu->var->pcsr0 |= PCSR0_RCBI; */ /* I don't think this is correct 08-dec-2005 dth */
sim_debug(DBG_TRC, xu->dev, "Stopping input processing - Not Owned receive descriptor=0x%X, slen=0x%04X(%d), segb=0x%04X, ", ba, slen, slen, segb);
sim_debug_bits(DBG_TRC, xu->dev, xu_rdes_w2, xu->var->rxhdr[2], xu->var->rxhdr[2], 0);
sim_debug_bits(DBG_TRC, xu->dev, xu_rdes_w3, xu->var->rxhdr[3], xu->var->rxhdr[3], 1);
break;
}
@ -1265,6 +1268,11 @@ void xu_process_receive(CTLR* xu)
if (wlen > slen)
wlen = slen;
sim_debug(DBG_TRC, xu->dev, "Using receive descriptor=0x%X, slen=0x%04X(%d), segb=0x%04X, ", ba, slen, slen, segb);
sim_debug_bits(DBG_TRC, xu->dev, xu_rdes_w2, xu->var->rxhdr[2], xu->var->rxhdr[2], 0);
sim_debug_bits(DBG_TRC, xu->dev, xu_rdes_w3, xu->var->rxhdr[3], xu->var->rxhdr[3], 0);
sim_debug(DBG_TRC, xu->dev, ", pktlen=0x%X(%d), used=0x%X, wlen=0x%X\n", item->packet.len, item->packet.len, item->packet.used, wlen);
/* transfer chained packet to host buffer */
wstatus = Map_WriteB (segb, wlen, &item->packet.msg[item->packet.used]);
if (wstatus) {
@ -1327,6 +1335,10 @@ void xu_process_receive(CTLR* xu)
/* give buffer back to host */
xu->var->rxhdr[2] &= ~RXR_OWN; /* clear ownership flag */
sim_debug(DBG_TRC, xu->dev, "Updating receive descriptor=0x%X, slen=0x%04X, segb=0x%04X, ", ba, slen, segb);
sim_debug_bits(DBG_TRC, xu->dev, xu_rdes_w2, xu->var->rxhdr[2], xu->var->rxhdr[2], 0);
sim_debug_bits(DBG_TRC, xu->dev, xu_rdes_w3, xu->var->rxhdr[3], xu->var->rxhdr[3], 1);
/* update the ring entry in host memory. */
wstatus = Map_WriteW (ba, 8, xu->var->rxhdr);
if (wstatus) {

9
PDP11/pdp11_xu.h
View file

@ -303,6 +303,15 @@ typedef struct xu_controller CTLR;
#define RXR_OVRN 0010000 /* <12> Overrun Error [DELUA only] */
#define RXR_MLEN 0007777 /* <11:0> Message Length */
BITFIELD xu_rdes_w2[] = {
BITNCF(8), BIT(ENP), BIT(STP), BITNC, BIT(CRC), BIT(OFLO), BIT(FRAM), BIT(ERRS), BIT(OWN),
ENDBITS
};
BITFIELD xu_rdes_w3[] = {
BITFFMT(mlen,12,"0x%X"), BITNC, BIT(NCHN), BIT(UBTO), BIT(BUFL),
ENDBITS
};
/* debugging bitmaps */
#define DBG_TRC 0x0001 /* trace routine calls */
#define DBG_REG 0x0002 /* trace read/write registers */