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VAX: Fix decode of octaword instructions

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EXAMINE -M now properly displays instruction arguments for octaword
instructions.
This commit is contained in:
Mark Pizzolato 2016-05-27 15:09:40 -07:00
parent 8e5d0b0a40
commit 4e7fada26c
2 changed files with 3 additions and 1 deletions
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2
VAX/vax_cpu.c
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@ -2533,6 +2533,7 @@ for ( ;; ) {
temp = op_ffs (r, op1); /* find first 1 */ temp = op_ffs (r, op1); /* find first 1 */
WRITE_L (op0 + temp); /* store result */ WRITE_L (op0 + temp); /* store result */
cc = r? 0: CC_Z; /* set cc's */ cc = r? 0: CC_Z; /* set cc's */
r = op0 + temp;
if ((cc == CC_Z) && /* No set bits found? */ if ((cc == CC_Z) && /* No set bits found? */
(cpu_idle_mask & VAX_IDLE_ULT1X) && /* running Ultrix 1.X" */ (cpu_idle_mask & VAX_IDLE_ULT1X) && /* running Ultrix 1.X" */
(PSL_GETIPL (PSL) == 0x0) && /* at IPL 0? */ (PSL_GETIPL (PSL) == 0x0) && /* at IPL 0? */
@ -2547,6 +2548,7 @@ for ( ;; ) {
temp = op_ffs (r, op1); /* find first 1 */ temp = op_ffs (r, op1); /* find first 1 */
WRITE_L (op0 + temp); /* store result */ WRITE_L (op0 + temp); /* store result */
cc = r? 0: CC_Z; /* set cc's */ cc = r? 0: CC_Z; /* set cc's */
r = op0 + temp;
break; break;
/* Insert field instruction - insv src.rl,pos.rb,size.rl,base.wb /* Insert field instruction - insv src.rl,pos.rb,size.rl,base.wb

2
VAX/vax_defs.h
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@ -381,7 +381,7 @@ extern jmp_buf save_env;
#define DR_V_USPMASK 4 #define DR_V_USPMASK 4
#define DR_M_USPMASK 0x70 /* #spec, sym_ */ #define DR_M_USPMASK 0x70 /* #spec, sym_ */
#define DR_GETNSP(x) ((x) & DR_NSPMASK) #define DR_GETNSP(x) ((x) & DR_NSPMASK)
#define DR_GETUSP(x) (((x) >> DR_V_USPMASK) & DR_M_USPMASK) #define DR_GETUSP(x) (((x) & DR_M_USPMASK) >> DR_V_USPMASK)
/* Extra bits in the opcode flag word of the Decode ROM array only for history results */ /* Extra bits in the opcode flag word of the Decode ROM array only for history results */