From 4fbf8f36db91ee9ac3c4a769e904548dfaba6b1a Mon Sep 17 00:00:00 2001
From: Mark Pizzolato <mark@infocomm.com>
Date: Mon, 19 Jan 2015 16:36:19 -0800
Subject: [PATCH] SCP: Fix timer initialization logic when CAS intrinsic
 instructions aren't available for Lock Free queue insertion

---
 sim_defs.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/sim_defs.h b/sim_defs.h
index bd6ea0e4..d13e0a67 100644
--- a/sim_defs.h
+++ b/sim_defs.h
@@ -1229,6 +1229,7 @@ extern int32 sim_asynch_inst_latency;
 #define AIO_QUEUE_MODE "Lock based asynchronous event queue access"
 #define AIO_INIT                                                  \
     if (1) {                                                      \
+      int tmr;                                                    \
       pthread_mutexattr_t attr;                                   \
                                                                   \
       pthread_mutexattr_init (&attr);                             \
@@ -1242,7 +1243,8 @@ extern int32 sim_asynch_inst_latency;
       sim_asynch_queue = QUEUE_LIST_END;                          \
       sim_wallclock_queue = QUEUE_LIST_END;                       \
       sim_wallclock_entry = NULL;                                 \
-      sim_clock_cosched_queue = QUEUE_LIST_END;                   \
+      for (tmr=0; tmr<SIM_NTIMERS; tmr++)                         \
+          sim_clock_cosched_queue[tmr] = QUEUE_LIST_END;          \
       }                                                           \
     else                                                          \
       (void)0