PDP18B: Add RB disk to PDP7 and DRM drum to PDP9 and -u, -p examine/deposit switches in PDP7, PDP9 and PDP15
This merges the latest PDP18B changes from Bob Supnik: - It adds the RB disk to the PDP-7 and the drum (DRM) to the PDP-9, per the discoveries in the 18b services listing. - It tweaks the switches for examine and deposit to support Unix v0 and (eventually) the Unichannel.
This commit is contained in:
parent
253f8a8dcf
commit
51aad45cdc
13 changed files with 181 additions and 39 deletions
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@ -433,7 +433,7 @@ static const int32 api_ffo[256] = {
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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};
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};
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static const int32 api_vec[API_HLVL][32] = {
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int32 api_vec[API_HLVL][32] = {
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{ ACH_PWRFL }, /* API 0 */
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{ ACH_PWRFL }, /* API 0 */
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{ ACH_DTA, ACH_MTA, ACH_DRM, ACH_RF, ACH_RP, ACH_RB }, /* API 1 */
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{ ACH_DTA, ACH_MTA, ACH_DRM, ACH_RF, ACH_RP, ACH_RB }, /* API 1 */
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{ ACH_PTR, ACH_LPT, ACH_LPT }, /* API 2 */
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{ ACH_PTR, ACH_LPT, ACH_LPT }, /* API 2 */
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@ -1,6 +1,6 @@
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/* pdp18b_defs.h: 18b PDP simulator definitions
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/* pdp18b_defs.h: 18b PDP simulator definitions
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Copyright (c) 1993-2012, Robert M Supnik
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Copyright (c) 1993-2016, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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copy of this software and associated documentation files (the "Software"),
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@ -23,6 +23,8 @@
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used in advertising or otherwise to promote the sale, use or other dealings
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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in this Software without prior written authorization from Robert M Supnik.
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26-Feb-16 RMS Added RB09 to PDP-7 for Unix "v0" and RM09 to PDP-9
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13-Sep-15 RMS Added DR15C
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18-Apr-12 RMS Added clk_cosched prototype
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18-Apr-12 RMS Added clk_cosched prototype
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22-May-10 RMS Added check for 64b definitions
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22-May-10 RMS Added check for 64b definitions
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30-Oct-06 RMS Added infinite loop stop
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30-Oct-06 RMS Added infinite loop stop
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@ -82,6 +84,7 @@
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Type 647B line printer (sixbit)
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Type 647B line printer (sixbit)
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Type 550/555 DECtape
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Type 550/555 DECtape
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Type 24 serial drum
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Type 24 serial drum
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RB09 fixed head disk (Unix V0 only)
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PDP9 32K KE09A EAE KSR-33 Teletype
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PDP9 32K KE09A EAE KSR-33 Teletype
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KF09A auto pri intr PC09A paper tape reader and punch
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KF09A auto pri intr PC09A paper tape reader and punch
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@ -90,6 +93,7 @@
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KX09A mem protection LP09 line printer (ASCII)
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KX09A mem protection LP09 line printer (ASCII)
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RF09/RS09 fixed head disk
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RF09/RS09 fixed head disk
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RB09 fixed head disk
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RB09 fixed head disk
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RM09 drum
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TC59 magnetic tape
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TC59 magnetic tape
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TC02/TU55 DECtape
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TC02/TU55 DECtape
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LT09A additional Teletypes
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LT09A additional Teletypes
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@ -139,12 +143,14 @@
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#define TYPE647 0 /* sixbit printer */
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#define TYPE647 0 /* sixbit printer */
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#define TYPE550 0 /* DECtape */
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#define TYPE550 0 /* DECtape */
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#define DRM 0 /* drum */
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#define DRM 0 /* drum */
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#define RB 0 /* fixed head disk */
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#elif defined (PDP9)
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#elif defined (PDP9)
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#define ADDRSIZE 15
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#define ADDRSIZE 15
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#define TYPE647 0 /* sixbit printer */
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#define TYPE647 0 /* sixbit printer */
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#define LP09 0 /* ASCII printer */
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#define LP09 0 /* ASCII printer */
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#define RB 0 /* fixed head disk */
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#define RB 0 /* fixed head disk */
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#define RF 0 /* fixed head disk */
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#define RF 0 /* fixed head disk */
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#define DRM 0 /* drum */
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#define MTA 0 /* magtape */
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#define MTA 0 /* magtape */
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#define TC02 0 /* DECtape */
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#define TC02 0 /* DECtape */
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#define TTY1 4 /* second Teletype(s) */
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#define TTY1 4 /* second Teletype(s) */
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@ -158,6 +164,7 @@
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#define MTA 0 /* magtape */
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#define MTA 0 /* magtape */
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#define TC02 0 /* DECtape */
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#define TC02 0 /* DECtape */
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#define TTY1 16 /* second Teletype(s) */
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#define TTY1 16 /* second Teletype(s) */
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#define DR 0 /* DR15C */
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#define BRMASK 0377400 /* bounds mask */
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#define BRMASK 0377400 /* bounds mask */
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#define BRMASK_XVM 0777400 /* bounds mask, XVM */
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#define BRMASK_XVM 0777400 /* bounds mask, XVM */
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#endif
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#endif
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@ -275,6 +282,7 @@ typedef struct {
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#define DEV_TTI1 041 /* extra terminals */
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#define DEV_TTI1 041 /* extra terminals */
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#define DEV_TTO1 040
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#define DEV_TTO1 040
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#define DEV_DRM 060 /* drum */
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#define DEV_DRM 060 /* drum */
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#define DEV_DR 060 /* DR15 */
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#define DEV_RP 063 /* RP15 */
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#define DEV_RP 063 /* RP15 */
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#define DEV_LPT 065 /* line printer */
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#define DEV_LPT 065 /* line printer */
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#define DEV_RF 070 /* RF09 */
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#define DEV_RF 070 /* RF09 */
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@ -324,6 +332,8 @@ typedef struct {
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36 -
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36 -
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37 -
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37 -
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The DR15C uses four API channels that are assigned by software.
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On the PDP-9, any API level active masks PI, and PI does not mask API.
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On the PDP-9, any API level active masks PI, and PI does not mask API.
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On the PDP-15, only the hardware API levels active mask PI, and PI masks
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On the PDP-15, only the hardware API levels active mask PI, and PI masks
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the API software levels. */
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the API software levels. */
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@ -441,6 +451,17 @@ typedef struct {
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#define CLR_INT(dv) int_hwre[API_##dv] = int_hwre[API_##dv] & ~INT_##dv
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#define CLR_INT(dv) int_hwre[API_##dv] = int_hwre[API_##dv] & ~INT_##dv
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#define TST_INT(dv) (int_hwre[API_##dv] & INT_##dv)
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#define TST_INT(dv) (int_hwre[API_##dv] & INT_##dv)
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/* The DR15C uses the same relative bit position in all four interrupt levels.
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This allows software to have a single definition for the interrupt bit position,
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regardless of level. The standard macros cannot be used. */
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#define INT_V_DR 7 /* to left of all */
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#define INT_DR (1 << INT_V_DR)
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#define API_DR0 0
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#define API_DR1 1
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#define API_DR2 2
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#define API_DR3 3
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/* I/O status flags for the IORS instruction
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/* I/O status flags for the IORS instruction
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bit PDP-4 PDP-7 PDP-9 PDP-15
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bit PDP-4 PDP-7 PDP-9 PDP-15
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@ -1,6 +1,6 @@
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/* pdp18b_drm.c: drum/fixed head disk simulator
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/* pdp18b_drm.c: drum head disk simulator
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Copyright (c) 1993-2013, Robert M Supnik
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Copyright (c) 1993-2016, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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copy of this software and associated documentation files (the "Software"),
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@ -23,8 +23,9 @@
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used in advertising or otherwise to promote the sale, use or other dealings
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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in this Software without prior written authorization from Robert M Supnik.
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drm (PDP-4,PDP-7) Type 24 serial drum
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drm (PDP-4,PDP-7) Type 24 serial drum; (PDP-9) RM09 drum
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26-Feb-16 RMS Added PDP-9 support; set default state to disabled
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03-Sep-13 RMS Added explicit void * cast
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03-Sep-13 RMS Added explicit void * cast
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14-Jan-04 RMS Revised IO device call interface
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14-Jan-04 RMS Revised IO device call interface
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26-Oct-03 RMS Cleaned up buffer copy code
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26-Oct-03 RMS Cleaned up buffer copy code
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@ -37,6 +38,8 @@
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10-Jun-01 RMS Cleaned up IOT decoding to reflect hardware
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10-Jun-01 RMS Cleaned up IOT decoding to reflect hardware
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26-Apr-01 RMS Added device enable/disable support
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26-Apr-01 RMS Added device enable/disable support
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14-Apr-99 RMS Changed t_addr to unsigned
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14-Apr-99 RMS Changed t_addr to unsigned
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Variable drum sizes are not supported.
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*/
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*/
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#include "pdp18b_defs.h"
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#include "pdp18b_defs.h"
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@ -118,7 +121,7 @@ DEVICE drm_dev = {
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1, 8, 20, 1, 8, 18,
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1, 8, 20, 1, 8, 18,
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NULL, NULL, &drm_reset,
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NULL, NULL, &drm_reset,
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&drm_boot, NULL, NULL,
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&drm_boot, NULL, NULL,
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&drm_dib, DEV_DISABLE
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&drm_dib, DEV_DISABLE + DEV_DIS
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};
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};
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/* IOT routines */
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/* IOT routines */
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@ -1,6 +1,6 @@
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/* pdp18b_dt.c: 18b DECtape simulator
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/* pdp18b_dt.c: 18b DECtape simulator
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Copyright (c) 1993-2008, Robert M Supnik
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Copyright (c) 1993-2015, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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copy of this software and associated documentation files (the "Software"),
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@ -27,6 +27,8 @@
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(PDP-9) TC02/TU55 DECtape
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(PDP-9) TC02/TU55 DECtape
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(PDP-15) TC15/TU56 DECtape
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(PDP-15) TC15/TU56 DECtape
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13-Mar-15 RMS Added APIVEC register
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28-Mar-15 RMS Revised to use sim_printf
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23-Jun-06 RMS Fixed switch conflict in ATTACH
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23-Jun-06 RMS Fixed switch conflict in ATTACH
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Revised Type 550 header based on DECTOG formatter
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Revised Type 550 header based on DECTOG formatter
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13-Jun-06 RMS Fixed checksum calculation bug in Type 550
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13-Jun-06 RMS Fixed checksum calculation bug in Type 550
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@ -327,6 +329,7 @@
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extern int32 M[];
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extern int32 M[];
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extern int32 int_hwre[API_HLVL+1];
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extern int32 int_hwre[API_HLVL+1];
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extern int32 api_vec[API_HLVL][32];
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extern UNIT cpu_unit;
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extern UNIT cpu_unit;
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int32 dtsa = 0; /* status A */
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int32 dtsa = 0; /* status A */
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@ -419,6 +422,9 @@ REG dt_reg[] = {
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DT_NUMDR, REG_HRO) },
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DT_NUMDR, REG_HRO) },
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{ ORDATA (DEVNO, dt_dib.dev, 6), REG_HRO },
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{ ORDATA (DEVNO, dt_dib.dev, 6), REG_HRO },
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{ FLDATA (STOP_OFFR, dt_stopoffr, 0) },
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{ FLDATA (STOP_OFFR, dt_stopoffr, 0) },
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#if defined (TC02)
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{ ORDATA (APIVEC, api_vec[API_DTA][INT_V_DTA], 6), REG_HRO },
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#endif
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{ NULL }
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{ NULL }
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};
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};
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@ -1,6 +1,6 @@
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/* pdp18b_lp.c: 18b PDP's line printer simulator
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/* pdp18b_lp.c: 18b PDP's line printer simulator
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Copyright (c) 1993-2008, Robert M Supnik
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Copyright (c) 1993-2015, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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copy of this software and associated documentation files (the "Software"),
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@ -28,6 +28,7 @@
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lp09 (PDP-9,15) LP09 line printer
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lp09 (PDP-9,15) LP09 line printer
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lp15 (PDP-15) LP15 line printer
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lp15 (PDP-15) LP15 line printer
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13-Sep-15 RMS Added APIVEC register
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19-Jan-07 RMS Added UNIT_TEXT flag
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19-Jan-07 RMS Added UNIT_TEXT flag
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11-Jun-06 RMS Made character translation table global scope
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11-Jun-06 RMS Made character translation table global scope
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14-Jan-04 RMS Revised IO device call interface
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14-Jan-04 RMS Revised IO device call interface
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@ -47,7 +48,10 @@
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*/
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*/
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#include "pdp18b_defs.h"
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#include "pdp18b_defs.h"
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extern int32 int_hwre[API_HLVL+1];
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extern int32 int_hwre[API_HLVL+1];
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extern int32 api_vec[API_HLVL][32];
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const char fio_to_asc[64] = {
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const char fio_to_asc[64] = {
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' ','1','2','3','4','5','6','7','8','9','\'','~','#','V','^','<',
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' ','1','2','3','4','5','6','7','8','9','\'','~','#','V','^','<',
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'0','/','S','T','U','V','W','X','Y','Z','"',',','>','^','-','?',
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'0','/','S','T','U','V','W','X','Y','Z','"',',','>','^','-','?',
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{ DRDATA (TIME, lp09_unit.wait, 24), PV_LEFT },
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{ DRDATA (TIME, lp09_unit.wait, 24), PV_LEFT },
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{ FLDATA (STOP_IOE, lp09_stopioe, 0) },
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{ FLDATA (STOP_IOE, lp09_stopioe, 0) },
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{ ORDATA (DEVNO, lp09_dib.dev, 6), REG_HRO },
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{ ORDATA (DEVNO, lp09_dib.dev, 6), REG_HRO },
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{ ORDATA (APIVEC, api_vec[API_LPT][INT_V_LPT], 6), REG_HRO },
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{ NULL }
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{ NULL }
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};
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};
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{ FLDATA (STOP_IOE, lp15_stopioe, 0) },
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{ FLDATA (STOP_IOE, lp15_stopioe, 0) },
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{ BRDATA (LBUF, lp15_buf, 8, 8, LP15_BSIZE) },
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{ BRDATA (LBUF, lp15_buf, 8, 8, LP15_BSIZE) },
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{ ORDATA (DEVNO, lp15_dib.dev, 6), REG_HRO },
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{ ORDATA (DEVNO, lp15_dib.dev, 6), REG_HRO },
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{ ORDATA (APIVEC, api_vec[API_LPT][INT_V_LPT], 6), REG_HRO },
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{ NULL }
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{ NULL }
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};
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};
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/* pdp18b_mt.c: 18b PDP magnetic tape simulator
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/* pdp18b_mt.c: 18b PDP magnetic tape simulator
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Copyright (c) 1993-2008, Robert M Supnik
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Copyright (c) 1993-2015, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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copy of this software and associated documentation files (the "Software"),
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@ -26,6 +26,7 @@
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mt (PDP-9) TC59 magtape
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mt (PDP-9) TC59 magtape
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(PDP-15) TC59D magtape
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(PDP-15) TC59D magtape
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13-Sep-15 RMS Added APIVEC register
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14-Nov-08 RMS Replaced mt_log with standard debug facility
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14-Nov-08 RMS Replaced mt_log with standard debug facility
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16-Feb-06 RMS Added tape capacity checking
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16-Feb-06 RMS Added tape capacity checking
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16-Aug-05 RMS Fixed C++ declaration and cast problems
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16-Aug-05 RMS Fixed C++ declaration and cast problems
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extern int32 M[];
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extern int32 M[];
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extern int32 int_hwre[API_HLVL+1];
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extern int32 int_hwre[API_HLVL+1];
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extern int32 api_vec[API_HLVL][32];
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extern UNIT cpu_unit;
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extern UNIT cpu_unit;
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int32 mt_cu = 0; /* command/unit */
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int32 mt_cu = 0; /* command/unit */
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@ -178,6 +180,7 @@ REG mt_reg[] = {
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{ URDATA (POS, mt_unit[0].pos, 10, T_ADDR_W, 0,
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{ URDATA (POS, mt_unit[0].pos, 10, T_ADDR_W, 0,
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MT_NUMDR, PV_LEFT | REG_RO) },
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MT_NUMDR, PV_LEFT | REG_RO) },
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{ ORDATA (DEVNO, mt_dib.dev, 6), REG_HRO },
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{ ORDATA (DEVNO, mt_dib.dev, 6), REG_HRO },
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{ ORDATA (APIVEC, api_vec[API_MTA][INT_V_MTA], 6), REG_HRO },
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{ NULL }
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{ NULL }
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};
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};
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/* pdp18b_rf.c: fixed head disk simulator
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/* pdp18b_rf.c: fixed head disk simulator
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Copyright (c) 1993-2013, Robert M Supnik
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Copyright (c) 1993-2015, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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Permission is hereby granted, free of charge, to any person obtaining a
|
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copy of this software and associated documentation files (the "Software"),
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copy of this software and associated documentation files (the "Software"),
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@ -26,6 +26,7 @@
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rf (PDP-9) RF09/RF09
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rf (PDP-9) RF09/RF09
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(PDP-15) RF15/RS09
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(PDP-15) RF15/RS09
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13-Sep-15 RMS Added APIVEC register
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03-Sep-13 RMS Added explicit void * cast
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03-Sep-13 RMS Added explicit void * cast
|
||||||
04-Oct-06 RMS Fixed bug, DSCD does not clear function register
|
04-Oct-06 RMS Fixed bug, DSCD does not clear function register
|
||||||
15-May-06 RMS Fixed bug in autosize attach (David Gesswein)
|
15-May-06 RMS Fixed bug in autosize attach (David Gesswein)
|
||||||
|
@ -110,6 +111,7 @@
|
||||||
|
|
||||||
extern int32 M[];
|
extern int32 M[];
|
||||||
extern int32 int_hwre[API_HLVL+1];
|
extern int32 int_hwre[API_HLVL+1];
|
||||||
|
extern int32 api_vec[API_HLVL][32];
|
||||||
extern UNIT cpu_unit;
|
extern UNIT cpu_unit;
|
||||||
|
|
||||||
int32 rf_sta = 0; /* status register */
|
int32 rf_sta = 0; /* status register */
|
||||||
|
@ -157,6 +159,7 @@ REG rf_reg[] = {
|
||||||
{ FLDATA (STOP_IOE, rf_stopioe, 0) },
|
{ FLDATA (STOP_IOE, rf_stopioe, 0) },
|
||||||
{ DRDATA (CAPAC, rf_unit.capac, 31), PV_LEFT + REG_HRO },
|
{ DRDATA (CAPAC, rf_unit.capac, 31), PV_LEFT + REG_HRO },
|
||||||
{ ORDATA (DEVNO, rf_dib.dev, 6), REG_HRO },
|
{ ORDATA (DEVNO, rf_dib.dev, 6), REG_HRO },
|
||||||
|
{ ORDATA (APIVEC, api_vec[API_RF][INT_V_RF], 6), REG_HRO },
|
||||||
{ NULL }
|
{ NULL }
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -1,6 +1,6 @@
|
||||||
/* pdp18b_rp.c: RP15/RP02 disk pack simulator
|
/* pdp18b_rp.c: RP15/RP02 disk pack simulator
|
||||||
|
|
||||||
Copyright (c) 1993-2008, Robert M Supnik
|
Copyright (c) 1993-2015, Robert M Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
@ -25,6 +25,7 @@
|
||||||
|
|
||||||
rp RP15/RP02 disk pack
|
rp RP15/RP02 disk pack
|
||||||
|
|
||||||
|
13-Sep-15 RMS Added APIVEC register
|
||||||
14-Jan-04 RMS Revised IO device call interface
|
14-Jan-04 RMS Revised IO device call interface
|
||||||
06-Feb-03 RMS Revised IOT decoding, fixed bug in initiation
|
06-Feb-03 RMS Revised IOT decoding, fixed bug in initiation
|
||||||
05-Oct-02 RMS Added DIB, device number support
|
05-Oct-02 RMS Added DIB, device number support
|
||||||
|
@ -133,6 +134,7 @@
|
||||||
|
|
||||||
extern int32 M[];
|
extern int32 M[];
|
||||||
extern int32 int_hwre[API_HLVL+1], nexm;
|
extern int32 int_hwre[API_HLVL+1], nexm;
|
||||||
|
extern int32 api_vec[API_HLVL][32];
|
||||||
extern UNIT cpu_unit;
|
extern UNIT cpu_unit;
|
||||||
|
|
||||||
int32 rp_sta = 0; /* status A */
|
int32 rp_sta = 0; /* status A */
|
||||||
|
@ -188,6 +190,7 @@ REG rp_reg[] = {
|
||||||
{ DRDATA (STIME, rp_swait, 24), PV_LEFT },
|
{ DRDATA (STIME, rp_swait, 24), PV_LEFT },
|
||||||
{ DRDATA (RTIME, rp_rwait, 24), PV_LEFT },
|
{ DRDATA (RTIME, rp_rwait, 24), PV_LEFT },
|
||||||
{ ORDATA (DEVNO, rp_dib.dev, 6), REG_HRO },
|
{ ORDATA (DEVNO, rp_dib.dev, 6), REG_HRO },
|
||||||
|
{ ORDATA (APIVEC, api_vec[API_RP][INT_V_RP], 6), REG_HRO },
|
||||||
{ NULL }
|
{ NULL }
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -1,6 +1,6 @@
|
||||||
/* pdp18b_stddev.c: 18b PDP's standard devices
|
/* pdp18b_stddev.c: 18b PDP's standard devices
|
||||||
|
|
||||||
Copyright (c) 1993-2012, Robert M Supnik
|
Copyright (c) 1993-2015, Robert M Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
@ -29,6 +29,8 @@
|
||||||
tto teleprinter
|
tto teleprinter
|
||||||
clk clock
|
clk clock
|
||||||
|
|
||||||
|
13-Sep-15 RMS Added APIVEC register to PTR, CLK only
|
||||||
|
28-Mar-15 RMS Revised to use sim_printf
|
||||||
18-Apr-12 RMS Added clk_cosched routine
|
18-Apr-12 RMS Added clk_cosched routine
|
||||||
Revised clk and tti scheduling
|
Revised clk and tti scheduling
|
||||||
18-Jun-07 RMS Added UNIT_IDLE to console input, clock
|
18-Jun-07 RMS Added UNIT_IDLE to console input, clock
|
||||||
|
@ -86,6 +88,7 @@
|
||||||
|
|
||||||
extern int32 M[];
|
extern int32 M[];
|
||||||
extern int32 int_hwre[API_HLVL+1], PC, ASW;
|
extern int32 int_hwre[API_HLVL+1], PC, ASW;
|
||||||
|
extern int32 api_vec[API_HLVL][32];
|
||||||
extern UNIT cpu_unit;
|
extern UNIT cpu_unit;
|
||||||
|
|
||||||
int32 clk_state = 0;
|
int32 clk_state = 0;
|
||||||
|
@ -181,6 +184,7 @@ REG clk_reg[] = {
|
||||||
#endif
|
#endif
|
||||||
{ DRDATA (TIME, clk_unit.wait, 24), REG_NZ + PV_LEFT },
|
{ DRDATA (TIME, clk_unit.wait, 24), REG_NZ + PV_LEFT },
|
||||||
{ DRDATA (TPS, clk_tps, 8), PV_LEFT + REG_HRO },
|
{ DRDATA (TPS, clk_tps, 8), PV_LEFT + REG_HRO },
|
||||||
|
{ ORDATA (APIVEC, api_vec[API_CLK][INT_V_CLK], 6), REG_HRO },
|
||||||
{ NULL }
|
{ NULL }
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -228,6 +232,7 @@ REG ptr_reg[] = {
|
||||||
{ DRDATA (POS, ptr_unit.pos, T_ADDR_W), PV_LEFT },
|
{ DRDATA (POS, ptr_unit.pos, T_ADDR_W), PV_LEFT },
|
||||||
{ DRDATA (TIME, ptr_unit.wait, 24), PV_LEFT },
|
{ DRDATA (TIME, ptr_unit.wait, 24), PV_LEFT },
|
||||||
{ FLDATA (STOP_IOE, ptr_stopioe, 0) },
|
{ FLDATA (STOP_IOE, ptr_stopioe, 0) },
|
||||||
|
{ ORDATA (APIVEC, api_vec[API_PTR][INT_V_PTR], 6), REG_HRO },
|
||||||
{ NULL }
|
{ NULL }
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -1,6 +1,6 @@
|
||||||
/* pdp18b_sys.c: 18b PDP's simulator interface
|
/* pdp18b_sys.c: 18b PDP's simulator interface
|
||||||
|
|
||||||
Copyright (c) 1993-2008, Robert M Supnik
|
Copyright (c) 1993-2016, Robert M Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
@ -23,6 +23,8 @@
|
||||||
used in advertising or otherwise to promote the sale, use or other dealings
|
used in advertising or otherwise to promote the sale, use or other dealings
|
||||||
in this Software without prior written authorization from Robert M Supnik.
|
in this Software without prior written authorization from Robert M Supnik.
|
||||||
|
|
||||||
|
26-Feb-15 RMS Added support for -u modifier (UC15 and Unix v0)
|
||||||
|
13-Sep-15 RMS Added DR15C instructions
|
||||||
30-Oct-06 RMS Added infinite loop stop
|
30-Oct-06 RMS Added infinite loop stop
|
||||||
18-Oct-06 RMS Re-ordered device list
|
18-Oct-06 RMS Re-ordered device list
|
||||||
02-Oct-06 RMS Added RDCLK instruction
|
02-Oct-06 RMS Added RDCLK instruction
|
||||||
|
@ -103,6 +105,8 @@ extern int32 PC;
|
||||||
extern const char asc_to_baud[128];
|
extern const char asc_to_baud[128];
|
||||||
extern const char baud_to_asc[64];
|
extern const char baud_to_asc[64];
|
||||||
extern const char fio_to_asc[64];
|
extern const char fio_to_asc[64];
|
||||||
|
extern t_stat fprint_sym_cm_w (FILE *of, t_addr addr, t_value *val, int32 sw);
|
||||||
|
extern t_stat parse_sym_cm_w (char *cptr, t_addr addr, t_value *val, int32 sw);
|
||||||
|
|
||||||
/* SCP data structures and interface routines
|
/* SCP data structures and interface routines
|
||||||
|
|
||||||
|
@ -126,7 +130,7 @@ char sim_name[] = "PDP-15";
|
||||||
|
|
||||||
REG *sim_PC = &cpu_reg[0];
|
REG *sim_PC = &cpu_reg[0];
|
||||||
|
|
||||||
int32 sim_emax = 2;
|
int32 sim_emax = 3;
|
||||||
|
|
||||||
DEVICE *sim_devices[] = {
|
DEVICE *sim_devices[] = {
|
||||||
&cpu_dev,
|
&cpu_dev,
|
||||||
|
@ -501,6 +505,12 @@ static const char *opcode[] = {
|
||||||
"DTCA", "DTRA", "DTXA", "DTLA",
|
"DTCA", "DTRA", "DTXA", "DTLA",
|
||||||
"DTEF", "DTRB", "DTDF",
|
"DTEF", "DTRB", "DTDF",
|
||||||
#endif
|
#endif
|
||||||
|
#if defined (DR) /* DR15C */
|
||||||
|
"SIOA", "CIOD", "LIOR",
|
||||||
|
"RDRS", "LDRS",
|
||||||
|
"SAPI0", "SAPI1", "SAPI2", "SAPI3",
|
||||||
|
"CAPI0", "CAPI1", "CAPI2", "CAPI3",
|
||||||
|
#endif
|
||||||
#if defined (TTY1)
|
#if defined (TTY1)
|
||||||
"KSF1", "KRB1",
|
"KSF1", "KRB1",
|
||||||
"TSF1", "TCF1", "TLS1", "TCF1!TLS1",
|
"TSF1", "TCF1", "TLS1", "TCF1!TLS1",
|
||||||
|
@ -738,6 +748,12 @@ static const int32 opc_val[] = {
|
||||||
0704101+I_NPI, 0704112+I_NPN,
|
0704101+I_NPI, 0704112+I_NPN,
|
||||||
0704001+I_NPI, 0704002+I_NPI, 0704004+I_NPI, 0704006+I_NPI,
|
0704001+I_NPI, 0704002+I_NPI, 0704004+I_NPI, 0704006+I_NPI,
|
||||||
#endif
|
#endif
|
||||||
|
#if defined (DR)
|
||||||
|
0706001+I_NPI, 0706002+I_NPI, 0706006+I_NPI,
|
||||||
|
0706112+I_NPI, 0706122+I_NPI,
|
||||||
|
0706101+I_NPI, 0706121+I_NPI, 0706141+I_NPI, 0706161+I_NPI,
|
||||||
|
0706104+I_NPI, 0706124+I_NPI, 0706144+I_NPI, 0706164+I_NPI,
|
||||||
|
#endif
|
||||||
#if defined (PDP7)
|
#if defined (PDP7)
|
||||||
0703201+I_NPI, 0703301+I_NPI, 0703341+I_NPI, 0703302+I_NPI,
|
0703201+I_NPI, 0703301+I_NPI, 0703341+I_NPI, 0703302+I_NPI,
|
||||||
0707701+I_NPI, 0707702+I_NPI, 0707742+I_NPI, 0707704+I_NPI,
|
0707701+I_NPI, 0707702+I_NPI, 0707742+I_NPI, 0707704+I_NPI,
|
||||||
|
@ -885,13 +901,13 @@ static const int32 opc_val[] = {
|
||||||
#define fputs(_s,f) Fprintf(f,"%s",_s)
|
#define fputs(_s,f) Fprintf(f,"%s",_s)
|
||||||
#define fputc(_c,f) Fprintf(f,"%c",_c)
|
#define fputc(_c,f) Fprintf(f,"%c",_c)
|
||||||
|
|
||||||
int32 fprint_opr (FILE *of, int32 inst, int32 class, int32 sp)
|
int32 fprint_opr (FILE *of, int32 inst, int32 clss, int32 sp)
|
||||||
{
|
{
|
||||||
int32 i, j;
|
int32 i, j;
|
||||||
|
|
||||||
for (i = 0; opc_val[i] >= 0; i++) { /* loop thru ops */
|
for (i = 0; opc_val[i] >= 0; i++) { /* loop thru ops */
|
||||||
j = (opc_val[i] >> I_V_FL) & I_M_FL; /* get class */
|
j = (opc_val[i] >> I_V_FL) & I_M_FL; /* get class */
|
||||||
if ((j == class) && (opc_val[i] & inst)) { /* same class? */
|
if ((j == clss) && (opc_val[i] & inst)) { /* same class? */
|
||||||
inst = inst & ~opc_val[i]; /* mask bit set? */
|
inst = inst & ~opc_val[i]; /* mask bit set? */
|
||||||
fprintf (of, (sp? " %s": "%s"), opcode[i]);
|
fprintf (of, (sp? " %s": "%s"), opcode[i]);
|
||||||
sp = 1;
|
sp = 1;
|
||||||
|
@ -924,52 +940,78 @@ return (c >> 1) | (c << 5);
|
||||||
t_stat fprint_sym (FILE *of, t_addr addr, t_value *val,
|
t_stat fprint_sym (FILE *of, t_addr addr, t_value *val,
|
||||||
UNIT *uptr, int32 sw)
|
UNIT *uptr, int32 sw)
|
||||||
{
|
{
|
||||||
int32 cflag, i, j, k, sp, inst, disp, ma;
|
int32 i, j, k, sp, inst, disp, ma;
|
||||||
|
t_bool cflag;
|
||||||
|
DEVICE *dptr;
|
||||||
|
|
||||||
|
if (uptr == NULL)
|
||||||
|
uptr = &cpu_unit;
|
||||||
|
dptr = find_dev_from_unit (uptr);
|
||||||
|
if (dptr == NULL)
|
||||||
|
return SCPE_IERR;
|
||||||
|
|
||||||
inst = val[0];
|
inst = val[0];
|
||||||
cflag = (uptr == NULL) || (uptr == &cpu_unit);
|
if ((sw & SWMASK ('A')) != 0) { /* ASCII? */
|
||||||
if (sw & SWMASK ('A')) { /* ASCII? */
|
|
||||||
if (inst > 0377)
|
if (inst > 0377)
|
||||||
return SCPE_ARG;
|
return SCPE_ARG;
|
||||||
fprintf (of, FMTASC (inst & 0177));
|
fprintf (of, FMTASC (inst & 0177));
|
||||||
return SCPE_OK;
|
return SCPE_OK;
|
||||||
}
|
}
|
||||||
if (sw & SWMASK ('C')) { /* character? */
|
#if defined (UC15)
|
||||||
|
if (dptr->dwidth == 16) /* 16b device? */
|
||||||
|
return fprint_sym_cm_w (of, addr, val, sw);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
if (dptr->dwidth < 18) /* 18b device? */
|
||||||
|
return SCPE_ARG;
|
||||||
|
|
||||||
|
if ((sw & SWMASK ('C')) != 0) { /* character? */
|
||||||
fprintf (of, "%c", SIXTOASC ((inst >> 12) & 077));
|
fprintf (of, "%c", SIXTOASC ((inst >> 12) & 077));
|
||||||
fprintf (of, "%c", SIXTOASC ((inst >> 6) & 077));
|
fprintf (of, "%c", SIXTOASC ((inst >> 6) & 077));
|
||||||
fprintf (of, "%c", SIXTOASC (inst & 077));
|
fprintf (of, "%c", SIXTOASC (inst & 077));
|
||||||
return SCPE_OK;
|
return SCPE_OK;
|
||||||
}
|
}
|
||||||
#if defined (PDP4) || defined (PDP7)
|
if ((sw & SWMASK ('F')) != 0) { /* FIODEC? */
|
||||||
if (sw & SWMASK ('F')) { /* FIODEC? */
|
|
||||||
fprintf (of, "%c", fio_to_asc[(inst >> 12) & 077]);
|
fprintf (of, "%c", fio_to_asc[(inst >> 12) & 077]);
|
||||||
fprintf (of, "%c", fio_to_asc[(inst >> 6) & 077]);
|
fprintf (of, "%c", fio_to_asc[(inst >> 6) & 077]);
|
||||||
fprintf (of, "%c", fio_to_asc[inst & 077]);
|
fprintf (of, "%c", fio_to_asc[inst & 077]);
|
||||||
return SCPE_OK;
|
return SCPE_OK;
|
||||||
}
|
}
|
||||||
if (sw & SWMASK ('B')) { /* Baudot? */
|
if ((sw & SWMASK ('B')) != 0) { /* Baudot? */
|
||||||
fprintf (of, "%c", baud_to_asc[rar (inst >> 12) & 077]);
|
fprintf (of, "%c", baud_to_asc[rar (inst >> 12) & 077]);
|
||||||
fprintf (of, "%c", baud_to_asc[rar (inst >> 6) & 077]);
|
fprintf (of, "%c", baud_to_asc[rar (inst >> 6) & 077]);
|
||||||
fprintf (of, "%c", baud_to_asc[rar (inst) & 077]);
|
fprintf (of, "%c", baud_to_asc[rar (inst) & 077]);
|
||||||
return SCPE_OK;
|
return SCPE_OK;
|
||||||
}
|
}
|
||||||
#endif
|
#if defined (PDP7) || defined (PDP9)
|
||||||
#if defined (PDP15)
|
if ((sw & SWMASK ('U')) != 0) { /* Unix v0 ASCII? */
|
||||||
if (sw & SWMASK ('P')) { /* packed ASCII? */
|
fprintf (of, FMTASC ((inst >> 9) & 0177));
|
||||||
i = val[1];
|
fprintf (of, FMTASC (inst & 0177));
|
||||||
|
return SCPE_OK;
|
||||||
|
}
|
||||||
|
#elif defined (PDP15)
|
||||||
|
if ((sw & SWMASK ('P')) != 0) { /* packed ASCII? */
|
||||||
|
int32 t = val[1];
|
||||||
fprintf (of, FMTASC ((inst >> 11) & 0177));
|
fprintf (of, FMTASC ((inst >> 11) & 0177));
|
||||||
fprintf (of, FMTASC ((inst >> 4) & 0177));
|
fprintf (of, FMTASC ((inst >> 4) & 0177));
|
||||||
fprintf (of, FMTASC (((inst << 3) | (i >> 15)) & 0177));
|
fprintf (of, FMTASC (((inst << 3) | (t >> 15)) & 0177));
|
||||||
fprintf (of, FMTASC ((i >> 8) & 0177));
|
fprintf (of, FMTASC ((t >> 8) & 0177));
|
||||||
fprintf (of, FMTASC ((i >> 1) & 0177));
|
fprintf (of, FMTASC ((t >> 1) & 0177));
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
|
if ((sw & SWMASK ('U')) != 0) { /* Unibus ASCII? */
|
||||||
|
fprintf (of, FMTASC (inst & 0177));
|
||||||
|
fprintf (of, FMTASC ((inst >> 8) & 0177));
|
||||||
|
return SCPE_OK;
|
||||||
|
}
|
||||||
#endif
|
#endif
|
||||||
if (!(sw & SWMASK ('M')))
|
if ((sw & SWMASK ('M')) == 0) /* symbolic? */
|
||||||
return SCPE_ARG;
|
return SCPE_ARG;
|
||||||
|
|
||||||
/* Instruction decode */
|
/* Instruction decode */
|
||||||
|
|
||||||
|
cflag = (uptr == &cpu_unit);
|
||||||
|
inst = val[0];
|
||||||
for (i = 0; opc_val[i] >= 0; i++) { /* loop thru ops */
|
for (i = 0; opc_val[i] >= 0; i++) { /* loop thru ops */
|
||||||
j = (opc_val[i] >> I_V_FL) & I_M_FL; /* get class */
|
j = (opc_val[i] >> I_V_FL) & I_M_FL; /* get class */
|
||||||
if ((opc_val[i] & DMASK) == (inst & masks[j])) { /* match? */
|
if ((opc_val[i] & DMASK) == (inst & masks[j])) { /* match? */
|
||||||
|
@ -1099,15 +1141,22 @@ return get_uint (cptr, 8, 0777777, status);
|
||||||
Outputs:
|
Outputs:
|
||||||
status = error status
|
status = error status
|
||||||
*/
|
*/
|
||||||
|
|
||||||
t_stat parse_sym (char *cptr, t_addr addr, UNIT *uptr, t_value *val, int32 sw)
|
t_stat parse_sym (char *cptr, t_addr addr, UNIT *uptr, t_value *val, int32 sw)
|
||||||
{
|
{
|
||||||
int32 cflag, d, i, j, k, sign, damask, epcmask;
|
int32 d, i, j, k, sign, damask, epcmask;
|
||||||
t_stat r, sta = SCPE_OK;
|
t_stat r, sta = SCPE_OK;
|
||||||
char gbuf[CBUFSIZE];
|
char gbuf[CBUFSIZE];
|
||||||
|
t_bool cflag;
|
||||||
|
DEVICE *dptr;
|
||||||
|
|
||||||
cflag = (uptr == NULL) || (uptr == &cpu_unit);
|
if (uptr == NULL)
|
||||||
while (isspace (*cptr)) cptr++;
|
uptr = &cpu_unit;
|
||||||
|
dptr = find_dev_from_unit (uptr);
|
||||||
|
if (dptr == NULL)
|
||||||
|
return SCPE_IERR;
|
||||||
|
|
||||||
|
while (isspace (*cptr))
|
||||||
|
cptr++;
|
||||||
for (i = 1; (i < 5) && (cptr[i] != 0); i++) {
|
for (i = 1; (i < 5) && (cptr[i] != 0); i++) {
|
||||||
if (cptr[i] == 0) {
|
if (cptr[i] == 0) {
|
||||||
for (j = i + 1; j <= 5; j++)
|
for (j = i + 1; j <= 5; j++)
|
||||||
|
@ -1120,6 +1169,21 @@ if ((sw & SWMASK ('A')) || ((*cptr == '\'') && cptr++)) { /* ASCII char? */
|
||||||
val[0] = (t_value) cptr[0] | 0200;
|
val[0] = (t_value) cptr[0] | 0200;
|
||||||
return SCPE_OK;
|
return SCPE_OK;
|
||||||
}
|
}
|
||||||
|
#if defined (UC15)
|
||||||
|
if (dptr->dwidth == 16) { /* 16b decode? */
|
||||||
|
if ((sw & SWMASK ('C')) || ((*cptr == '"') && cptr++)) { /* char string? */
|
||||||
|
if (cptr[0] == 0) /* must have 1 char */
|
||||||
|
return SCPE_ARG;
|
||||||
|
val[0] = (((t_value) cptr[1] & 0377) << 8) |
|
||||||
|
((t_value) cptr[0] & 0377);
|
||||||
|
return SCPE_OK;
|
||||||
|
}
|
||||||
|
return fparse_sym_cm_w (of, addr, val, uptr, sw);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
if (dptr->dwidth < 18) /* 18b decode? */
|
||||||
|
return SCPE_ARG; /* no, fail */
|
||||||
|
|
||||||
if ((sw & SWMASK ('C')) || ((*cptr == '"') && cptr++)) { /* sixbit string? */
|
if ((sw & SWMASK ('C')) || ((*cptr == '"') && cptr++)) { /* sixbit string? */
|
||||||
if (cptr[0] == 0) /* must have 1 char */
|
if (cptr[0] == 0) /* must have 1 char */
|
||||||
return SCPE_ARG;
|
return SCPE_ARG;
|
||||||
|
@ -1128,8 +1192,16 @@ if ((sw & SWMASK ('C')) || ((*cptr == '"') && cptr++)) { /* sixbit string? */
|
||||||
((t_value) cptr[2] & 077);
|
((t_value) cptr[2] & 077);
|
||||||
return SCPE_OK;
|
return SCPE_OK;
|
||||||
}
|
}
|
||||||
#if defined (PDP15)
|
#if defined (PDP7) || defined (PDP9)
|
||||||
if ((sw & SWMASK ('P')) || ((*cptr == '#') && cptr++)) { /* packed string? */
|
if (sw & SWMASK ('U')) { /* Unix v0 ASCII? */
|
||||||
|
if (cptr[0] == 0) /* must have 1 char */
|
||||||
|
return SCPE_ARG;
|
||||||
|
val[0] = (((t_value) cptr[0] & 0177) << 9) |
|
||||||
|
((t_value) cptr[1] & 0177);
|
||||||
|
return SCPE_OK;
|
||||||
|
}
|
||||||
|
#elif defined (PDP15)
|
||||||
|
if (sw & SWMASK ('P')) { /* packed string? */
|
||||||
if (cptr[0] == 0) /* must have 1 char */
|
if (cptr[0] == 0) /* must have 1 char */
|
||||||
return SCPE_ARG;
|
return SCPE_ARG;
|
||||||
val[0] = (((t_value) cptr[0] & 0177) << 11) |
|
val[0] = (((t_value) cptr[0] & 0177) << 11) |
|
||||||
|
@ -1140,6 +1212,13 @@ if ((sw & SWMASK ('P')) || ((*cptr == '#') && cptr++)) { /* packed string? */
|
||||||
(((t_value) cptr[4] & 0177) << 1);
|
(((t_value) cptr[4] & 0177) << 1);
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
|
if (sw & SWMASK ('U')) { /* Unibus ASCII? */
|
||||||
|
if (cptr[0] == 0) /* must have 1 char */
|
||||||
|
return SCPE_ARG;
|
||||||
|
val[0] = (((t_value) cptr[1] & 0377) << 8) |
|
||||||
|
((t_value) cptr[0] & 0377);
|
||||||
|
return SCPE_OK;
|
||||||
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
cptr = get_glyph (cptr, gbuf, 0); /* get opcode */
|
cptr = get_glyph (cptr, gbuf, 0); /* get opcode */
|
||||||
|
@ -1149,6 +1228,7 @@ if (opcode[i] == NULL)
|
||||||
val[0] = opc_val[i] & DMASK; /* get value */
|
val[0] = opc_val[i] & DMASK; /* get value */
|
||||||
j = (opc_val[i] >> I_V_FL) & I_M_FL; /* get class */
|
j = (opc_val[i] >> I_V_FL) & I_M_FL; /* get class */
|
||||||
|
|
||||||
|
cflag = (uptr == &cpu_unit);
|
||||||
switch (j) { /* case on class */
|
switch (j) { /* case on class */
|
||||||
|
|
||||||
case I_V_XR: /* index */
|
case I_V_XR: /* index */
|
||||||
|
|
|
@ -1,6 +1,6 @@
|
||||||
/* pdp18b_ttx.c: PDP-9/15 additional terminals simulator
|
/* pdp18b_ttx.c: PDP-9/15 additional terminals simulator
|
||||||
|
|
||||||
Copyright (c) 1993-2013, Robert M Supnik
|
Copyright (c) 1993-2015, Robert M Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
@ -25,6 +25,7 @@
|
||||||
|
|
||||||
ttix,ttox LT15/LT19 terminal input/output
|
ttix,ttox LT15/LT19 terminal input/output
|
||||||
|
|
||||||
|
13-Sep-15 RMS Added APIVEC register
|
||||||
11-Oct-13 RMS Poll TTIX immediately to pick up initial connect
|
11-Oct-13 RMS Poll TTIX immediately to pick up initial connect
|
||||||
18-Apr-12 RMS Revised to use clock coscheduling
|
18-Apr-12 RMS Revised to use clock coscheduling
|
||||||
19-Nov-08 RMS Revised for common TMXR show routines
|
19-Nov-08 RMS Revised for common TMXR show routines
|
||||||
|
@ -63,6 +64,7 @@ TMXR ttx_desc = { 1, 0, 0, ttx_ldsc }; /* mux descriptor */
|
||||||
#define ttx_lines ttx_desc.lines /* current number of lines */
|
#define ttx_lines ttx_desc.lines /* current number of lines */
|
||||||
|
|
||||||
extern int32 int_hwre[API_HLVL+1];
|
extern int32 int_hwre[API_HLVL+1];
|
||||||
|
extern int32 api_vec[API_HLVL][32];
|
||||||
extern int32 tmxr_poll;
|
extern int32 tmxr_poll;
|
||||||
extern int32 stop_inst;
|
extern int32 stop_inst;
|
||||||
|
|
||||||
|
@ -105,6 +107,9 @@ REG ttix_reg[] = {
|
||||||
{ FLDATA (INT, int_hwre[API_TTI1], INT_V_TTI1) },
|
{ FLDATA (INT, int_hwre[API_TTI1], INT_V_TTI1) },
|
||||||
{ DRDATA (TIME, ttix_unit.wait, 24), REG_NZ + PV_LEFT },
|
{ DRDATA (TIME, ttix_unit.wait, 24), REG_NZ + PV_LEFT },
|
||||||
{ ORDATA (DEVNUM, ttix_dib.dev, 6), REG_HRO },
|
{ ORDATA (DEVNUM, ttix_dib.dev, 6), REG_HRO },
|
||||||
|
#if defined (PDP15)
|
||||||
|
{ ORDATA (APIVEC, api_vec[API_TTI1][INT_V_TTI1], 6), REG_HRO },
|
||||||
|
#endif
|
||||||
{ NULL }
|
{ NULL }
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -164,6 +169,9 @@ REG ttox_reg[] = {
|
||||||
{ FLDATA (INT, int_hwre[API_TTO1], INT_V_TTO1) },
|
{ FLDATA (INT, int_hwre[API_TTO1], INT_V_TTO1) },
|
||||||
{ URDATA (TIME, ttox_unit[0].wait, 10, 24, 0,
|
{ URDATA (TIME, ttox_unit[0].wait, 10, 24, 0,
|
||||||
TTX_MAXL, PV_LEFT) },
|
TTX_MAXL, PV_LEFT) },
|
||||||
|
#if defined (PDP15)
|
||||||
|
{ ORDATA (APIVEC, api_vec[API_TTO1][INT_V_TTO1], 6), REG_HRO },
|
||||||
|
#endif
|
||||||
{ NULL }
|
{ NULL }
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -212,6 +212,10 @@
|
||||||
RelativePath="..\PDP18B\pdp18b_mt.c"
|
RelativePath="..\PDP18B\pdp18b_mt.c"
|
||||||
>
|
>
|
||||||
</File>
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\PDP18B\pdp18b_rb.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
<File
|
<File
|
||||||
RelativePath="..\PDP18B\pdp18b_rf.c"
|
RelativePath="..\PDP18B\pdp18b_rf.c"
|
||||||
>
|
>
|
||||||
|
|
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Add table
Reference in a new issue