I1620, I1401: Add max value to address registers

This commit is contained in:
Bob Supnik 2022-06-16 16:13:46 -07:00 committed by Mark Pizzolato
parent 07ea411d3e
commit 5543e137f8
5 changed files with 19 additions and 12 deletions

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@ -1,6 +1,6 @@
/* i1401_cpu.c: IBM 1401 CPU simulator /* i1401_cpu.c: IBM 1401 CPU simulator
Copyright (c) 1993-2017, Robert M. Supnik Copyright (c) 1993-2021, Robert M. Supnik
Permission is hereby granted, free of charge, to any person obtaining a Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"), copy of this software and associated documentation files (the "Software"),
@ -23,6 +23,7 @@
used in advertising or otherwise to promote the sale, use or other dealings used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik. in this Software without prior written authorization from Robert M Supnik.
08-Jun-21 RMS Added max value to address registers
13-Mar-17 RMS Fixed MTF length checking (COVERITY) 13-Mar-17 RMS Fixed MTF length checking (COVERITY)
30-Jan-15 RMS Fixed treatment of overflow (Ken Shirriff) 30-Jan-15 RMS Fixed treatment of overflow (Ken Shirriff)
08-Oct-12 RMS Clear storage and branch preserves B register (Van Snyder) 08-Oct-12 RMS Clear storage and branch preserves B register (Van Snyder)
@ -249,9 +250,9 @@ UNIT cpu_unit = {
}; };
REG cpu_reg[] = { REG cpu_reg[] = {
{ DRDATA (IS, saved_IS, 14), PV_LEFT }, { DRDATA (IS, saved_IS, 14), PV_LEFT, MAXADDR },
{ DRDATA (AS, AS, 14), PV_LEFT }, { DRDATA (AS, AS, 14), PV_LEFT, MAXADDR },
{ DRDATA (BS, BS, 14), PV_LEFT }, { DRDATA (BS, BS, 14), PV_LEFT, MAXADDR },
{ FLDATA (ASERR, as_err, 0) }, { FLDATA (ASERR, as_err, 0) },
{ FLDATA (BSERR, bs_err, 0) }, { FLDATA (BSERR, bs_err, 0) },
{ ORDATA (D, D, 7) }, { ORDATA (D, D, 7) },

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@ -1,6 +1,6 @@
/* i1401_defs.h: IBM 1401 simulator definitions /* i1401_defs.h: IBM 1401 simulator definitions
Copyright (c) 1993-2010, Robert M. Supnik Copyright (c) 1993-2021, Robert M. Supnik
Permission is hereby granted, free of charge, to any person obtaining a Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"), copy of this software and associated documentation files (the "Software"),
@ -23,6 +23,7 @@
used in advertising or otherwise to promote the sale, use or other dealings used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik. in this Software without prior written authorization from Robert M Supnik.
08-Jun-21 RMS Added max memory address
06-JUl-10 RMS Added overlap indicator definitions 06-JUl-10 RMS Added overlap indicator definitions
22-May-10 RMS Added check for 64b definitions 22-May-10 RMS Added check for 64b definitions
11-Jul-08 RMS Added IO mode flag for boot (from Bob Abeles) 11-Jul-08 RMS Added IO mode flag for boot (from Bob Abeles)
@ -81,6 +82,7 @@
/* Memory and devices */ /* Memory and devices */
#define MAXMEMSIZE 16000 /* max memory */ #define MAXMEMSIZE 16000 /* max memory */
#define MAXADDR (MAXMEMSIZE - 1) /* max memory address */
#define MEMSIZE (cpu_unit.capac) /* current memory */ #define MEMSIZE (cpu_unit.capac) /* current memory */
#define CDR_BUF 1 /* card rdr buffer */ #define CDR_BUF 1 /* card rdr buffer */
#define CDR_WIDTH 80 /* card rdr width */ #define CDR_WIDTH 80 /* card rdr width */

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@ -1,6 +1,6 @@
/* i1620_cpu.c: IBM 1620 CPU simulator /* i1620_cpu.c: IBM 1620 CPU simulator
Copyright (c) 2002-2018, Robert M. Supnik Copyright (c) 2002-2021, Robert M. Supnik
Permission is hereby granted, free of charge, to any person obtaining a Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"), copy of this software and associated documentation files (the "Software"),
@ -26,6 +26,7 @@
This CPU module incorporates code and comments from the 1620 simulator by This CPU module incorporates code and comments from the 1620 simulator by
Geoff Kuenning, with his permission. Geoff Kuenning, with his permission.
01-Feb-21 RMS Added max value to address registers
05-Jun-18 RMS Fixed bug in select index A (COVERITY) 05-Jun-18 RMS Fixed bug in select index A (COVERITY)
23-Jun-17 RMS BS should not enable indexing unless configured 23-Jun-17 RMS BS should not enable indexing unless configured
15-Jun-17 RMS Added more information to IO in progress message 15-Jun-17 RMS Added more information to IO in progress message
@ -234,10 +235,10 @@ extern t_stat fp_fsr (uint32 d, uint32 s);
UNIT cpu_unit = { UDATA (NULL, UNIT_FIX+UNIT_BCD+MI_STD, MAXMEMSIZE) }; UNIT cpu_unit = { UDATA (NULL, UNIT_FIX+UNIT_BCD+MI_STD, MAXMEMSIZE) };
REG cpu_reg[] = { REG cpu_reg[] = {
{ DRDATA (PC, saved_PC, 16), PV_LEFT }, { DRDATA (PC, saved_PC, 16), PV_LEFT, MAXADDR },
{ DRDATA (APC, actual_PC, 16), PV_LEFT + REG_HRO }, { DRDATA (APC, actual_PC, 16), PV_LEFT + REG_HRO, MAXADDR },
{ DRDATAD (IR2, IR2, 16, "instruction storage address register (PC)"), PV_LEFT }, { DRDATAD (IR2, IR2, 16, "instruction storage address register (PC)"), PV_LEFT, MAXADDR },
{ DRDATAD (PR1, PR1, 16, "processor register 1"), PV_LEFT }, { DRDATAD (PR1, PR1, 16, "processor register 1"), PV_LEFT, MAXADDR },
{ DRDATAD (PAR, PAR, 16, "P address register (OR2)"), PV_LEFT + REG_RO }, { DRDATAD (PAR, PAR, 16, "P address register (OR2)"), PV_LEFT + REG_RO },
{ DRDATAD (QAR, QAR, 16, "Q address register (OR1)"), PV_LEFT + REG_RO }, { DRDATAD (QAR, QAR, 16, "Q address register (OR1)"), PV_LEFT + REG_RO },
{ FLDATAD (SW1, ind[IN_SW1], 0, "sense switch 1" ) }, { FLDATAD (SW1, ind[IN_SW1], 0, "sense switch 1" ) },

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@ -1,6 +1,6 @@
/* i1620_defs.h: IBM 1620 simulator definitions /* i1620_defs.h: IBM 1620 simulator definitions
Copyright (c) 2002-2017, Robert M. Supnik Copyright (c) 2002-2021, Robert M. Supnik
Permission is hereby granted, free of charge, to any person obtaining a Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"), copy of this software and associated documentation files (the "Software"),
@ -27,6 +27,7 @@
I am grateful to Al Kossow, the Computer History Museum, and the IBM Corporate I am grateful to Al Kossow, the Computer History Museum, and the IBM Corporate
Archives for their help in gathering documentation about the IBM 1620. Archives for their help in gathering documentation about the IBM 1620.
01-Feb-21 RMS Added MAXADDR for register contents
23-May-17 RMS MARCHK is indicator 8, not 18 (Dave Wise) 23-May-17 RMS MARCHK is indicator 8, not 18 (Dave Wise)
19-May-17 RMS Added option for Model I diagnostic mode (Dave Wise) 19-May-17 RMS Added option for Model I diagnostic mode (Dave Wise)
05-Feb-15 TFM Added definitions for flagged RM, GM, NB 05-Feb-15 TFM Added definitions for flagged RM, GM, NB
@ -88,6 +89,7 @@
/* Memory */ /* Memory */
#define MAXMEMSIZE 60000 /* max mem size */ #define MAXMEMSIZE 60000 /* max mem size */
#define MAXADDR (MAXMEMSIZE - 1) /* max address */
#define MEMSIZE (cpu_unit.capac) /* act memory size */ #define MEMSIZE (cpu_unit.capac) /* act memory size */
/* Processor parameters */ /* Processor parameters */

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@ -698,8 +698,9 @@ struct REG {
size_t obj_size; /* sizeof(*loc) */ size_t obj_size; /* sizeof(*loc) */
size_t ele_size; /* sizeof(**loc) or sizeof(*loc) if depth == 1 */ size_t ele_size; /* sizeof(**loc) or sizeof(*loc) if depth == 1 */
const char *macro; /* Initializer Macro Name */ const char *macro; /* Initializer Macro Name */
/* NOTE: Flags MUST always be last since it is initialized outside of macro definitions */ /* NOTE: Flags and maxval MUST always be last since they are initialized outside of macro definitions */
uint32 flags; /* flags */ uint32 flags; /* flags */
t_value maxval; /* maximum value */
}; };
/* Register flags */ /* Register flags */