I1620, I1401: Add max value to address registers
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07ea411d3e
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5 changed files with 19 additions and 12 deletions
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@ -1,6 +1,6 @@
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/* i1401_cpu.c: IBM 1401 CPU simulator
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/* i1401_cpu.c: IBM 1401 CPU simulator
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Copyright (c) 1993-2017, Robert M. Supnik
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Copyright (c) 1993-2021, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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copy of this software and associated documentation files (the "Software"),
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@ -23,6 +23,7 @@
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used in advertising or otherwise to promote the sale, use or other dealings
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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in this Software without prior written authorization from Robert M Supnik.
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08-Jun-21 RMS Added max value to address registers
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13-Mar-17 RMS Fixed MTF length checking (COVERITY)
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13-Mar-17 RMS Fixed MTF length checking (COVERITY)
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30-Jan-15 RMS Fixed treatment of overflow (Ken Shirriff)
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30-Jan-15 RMS Fixed treatment of overflow (Ken Shirriff)
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08-Oct-12 RMS Clear storage and branch preserves B register (Van Snyder)
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08-Oct-12 RMS Clear storage and branch preserves B register (Van Snyder)
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@ -249,9 +250,9 @@ UNIT cpu_unit = {
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};
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};
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REG cpu_reg[] = {
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REG cpu_reg[] = {
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{ DRDATA (IS, saved_IS, 14), PV_LEFT },
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{ DRDATA (IS, saved_IS, 14), PV_LEFT, MAXADDR },
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{ DRDATA (AS, AS, 14), PV_LEFT },
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{ DRDATA (AS, AS, 14), PV_LEFT, MAXADDR },
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{ DRDATA (BS, BS, 14), PV_LEFT },
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{ DRDATA (BS, BS, 14), PV_LEFT, MAXADDR },
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{ FLDATA (ASERR, as_err, 0) },
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{ FLDATA (ASERR, as_err, 0) },
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{ FLDATA (BSERR, bs_err, 0) },
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{ FLDATA (BSERR, bs_err, 0) },
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{ ORDATA (D, D, 7) },
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{ ORDATA (D, D, 7) },
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/* i1401_defs.h: IBM 1401 simulator definitions
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/* i1401_defs.h: IBM 1401 simulator definitions
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Copyright (c) 1993-2010, Robert M. Supnik
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Copyright (c) 1993-2021, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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copy of this software and associated documentation files (the "Software"),
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@ -23,6 +23,7 @@
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used in advertising or otherwise to promote the sale, use or other dealings
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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in this Software without prior written authorization from Robert M Supnik.
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08-Jun-21 RMS Added max memory address
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06-JUl-10 RMS Added overlap indicator definitions
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06-JUl-10 RMS Added overlap indicator definitions
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22-May-10 RMS Added check for 64b definitions
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22-May-10 RMS Added check for 64b definitions
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11-Jul-08 RMS Added IO mode flag for boot (from Bob Abeles)
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11-Jul-08 RMS Added IO mode flag for boot (from Bob Abeles)
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@ -81,6 +82,7 @@
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/* Memory and devices */
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/* Memory and devices */
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#define MAXMEMSIZE 16000 /* max memory */
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#define MAXMEMSIZE 16000 /* max memory */
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#define MAXADDR (MAXMEMSIZE - 1) /* max memory address */
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#define MEMSIZE (cpu_unit.capac) /* current memory */
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#define MEMSIZE (cpu_unit.capac) /* current memory */
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#define CDR_BUF 1 /* card rdr buffer */
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#define CDR_BUF 1 /* card rdr buffer */
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#define CDR_WIDTH 80 /* card rdr width */
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#define CDR_WIDTH 80 /* card rdr width */
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/* i1620_cpu.c: IBM 1620 CPU simulator
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/* i1620_cpu.c: IBM 1620 CPU simulator
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Copyright (c) 2002-2018, Robert M. Supnik
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Copyright (c) 2002-2021, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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copy of this software and associated documentation files (the "Software"),
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@ -26,6 +26,7 @@
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This CPU module incorporates code and comments from the 1620 simulator by
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This CPU module incorporates code and comments from the 1620 simulator by
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Geoff Kuenning, with his permission.
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Geoff Kuenning, with his permission.
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01-Feb-21 RMS Added max value to address registers
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05-Jun-18 RMS Fixed bug in select index A (COVERITY)
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05-Jun-18 RMS Fixed bug in select index A (COVERITY)
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23-Jun-17 RMS BS should not enable indexing unless configured
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23-Jun-17 RMS BS should not enable indexing unless configured
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15-Jun-17 RMS Added more information to IO in progress message
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15-Jun-17 RMS Added more information to IO in progress message
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@ -234,10 +235,10 @@ extern t_stat fp_fsr (uint32 d, uint32 s);
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UNIT cpu_unit = { UDATA (NULL, UNIT_FIX+UNIT_BCD+MI_STD, MAXMEMSIZE) };
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UNIT cpu_unit = { UDATA (NULL, UNIT_FIX+UNIT_BCD+MI_STD, MAXMEMSIZE) };
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REG cpu_reg[] = {
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REG cpu_reg[] = {
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{ DRDATA (PC, saved_PC, 16), PV_LEFT },
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{ DRDATA (PC, saved_PC, 16), PV_LEFT, MAXADDR },
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{ DRDATA (APC, actual_PC, 16), PV_LEFT + REG_HRO },
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{ DRDATA (APC, actual_PC, 16), PV_LEFT + REG_HRO, MAXADDR },
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{ DRDATAD (IR2, IR2, 16, "instruction storage address register (PC)"), PV_LEFT },
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{ DRDATAD (IR2, IR2, 16, "instruction storage address register (PC)"), PV_LEFT, MAXADDR },
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{ DRDATAD (PR1, PR1, 16, "processor register 1"), PV_LEFT },
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{ DRDATAD (PR1, PR1, 16, "processor register 1"), PV_LEFT, MAXADDR },
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{ DRDATAD (PAR, PAR, 16, "P address register (OR2)"), PV_LEFT + REG_RO },
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{ DRDATAD (PAR, PAR, 16, "P address register (OR2)"), PV_LEFT + REG_RO },
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{ DRDATAD (QAR, QAR, 16, "Q address register (OR1)"), PV_LEFT + REG_RO },
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{ DRDATAD (QAR, QAR, 16, "Q address register (OR1)"), PV_LEFT + REG_RO },
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{ FLDATAD (SW1, ind[IN_SW1], 0, "sense switch 1" ) },
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{ FLDATAD (SW1, ind[IN_SW1], 0, "sense switch 1" ) },
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@ -1,6 +1,6 @@
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/* i1620_defs.h: IBM 1620 simulator definitions
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/* i1620_defs.h: IBM 1620 simulator definitions
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Copyright (c) 2002-2017, Robert M. Supnik
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Copyright (c) 2002-2021, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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copy of this software and associated documentation files (the "Software"),
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@ -27,6 +27,7 @@
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I am grateful to Al Kossow, the Computer History Museum, and the IBM Corporate
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I am grateful to Al Kossow, the Computer History Museum, and the IBM Corporate
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Archives for their help in gathering documentation about the IBM 1620.
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Archives for their help in gathering documentation about the IBM 1620.
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01-Feb-21 RMS Added MAXADDR for register contents
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23-May-17 RMS MARCHK is indicator 8, not 18 (Dave Wise)
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23-May-17 RMS MARCHK is indicator 8, not 18 (Dave Wise)
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19-May-17 RMS Added option for Model I diagnostic mode (Dave Wise)
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19-May-17 RMS Added option for Model I diagnostic mode (Dave Wise)
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05-Feb-15 TFM Added definitions for flagged RM, GM, NB
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05-Feb-15 TFM Added definitions for flagged RM, GM, NB
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/* Memory */
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/* Memory */
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#define MAXMEMSIZE 60000 /* max mem size */
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#define MAXMEMSIZE 60000 /* max mem size */
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#define MAXADDR (MAXMEMSIZE - 1) /* max address */
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#define MEMSIZE (cpu_unit.capac) /* act memory size */
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#define MEMSIZE (cpu_unit.capac) /* act memory size */
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/* Processor parameters */
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/* Processor parameters */
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size_t obj_size; /* sizeof(*loc) */
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size_t obj_size; /* sizeof(*loc) */
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size_t ele_size; /* sizeof(**loc) or sizeof(*loc) if depth == 1 */
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size_t ele_size; /* sizeof(**loc) or sizeof(*loc) if depth == 1 */
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const char *macro; /* Initializer Macro Name */
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const char *macro; /* Initializer Macro Name */
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/* NOTE: Flags MUST always be last since it is initialized outside of macro definitions */
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/* NOTE: Flags and maxval MUST always be last since they are initialized outside of macro definitions */
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uint32 flags; /* flags */
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uint32 flags; /* flags */
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t_value maxval; /* maximum value */
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};
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};
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/* Register flags */
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/* Register flags */
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