Notes For V3.7
1. New Features 1.1 3.7-0 1.1.1 SCP - Added SET THROTTLE and SET NOTHROTTLE commands to regulate simulator execution rate and host resource utilization. - Added idle support (based on work by Mark Pizzolato). - Added -e to control error processing in nested DO commands (from Dave Bryan). 1.1.2 HP2100 - Added Double Integer instructions, 1000-F CPU, and Floating Point Processor (from Dave Bryan). - Added 2114 and 2115 CPUs, 12607B and 12578A DMA controllers, and 21xx binary loader protection (from Dave Bryan). 1.1.3 Interdata - Added SET IDLE and SET NOIDLE commands to idle the simulator in wait state. 1.1.4 PDP-11 - Added SET IDLE and SET NOIDLE commands to idle the simulator in wait state (WAIT instruction executed). - Added TA11/TU60 cassette support. 1.1.5 PDP-8 - Added SET IDLE and SET NOIDLE commands to idle the simulator in wait state (keyboard poll loop or jump-to-self). - Added TA8E/TU60 cassette support. 1.1.6 PDP-1 - Added support for 16-channel sequence break system. - Added support for PDP-1D extended features and timesharing clock. - Added support for Type 630 data communications subsystem. 1.1.6 PDP-4/7/9/15 - Added SET IDLE and SET NOIDLE commands to idle the simulator in wait state (keyboard poll loop or jump-to-self). 1.1.7 VAX, VAX780 - Added SET IDLE and SET NOIDLE commands to idle the simulator in wait state (more than 200 cycles at IPL's 0, 1, or 3 in kernel mode). 1.1.8 PDP-10 - Added SET IDLE and SET NOIDLE commands to idle the simulator in wait state (operating system dependent). - Added CD20 (CD11) support. 2. Bugs Fixed Please see the revision history on http://simh.trailing-edge.com or in the source module sim_rev.h.
This commit is contained in:
Bob Supnik
Mark Pizzolato
parent
6149cc7e06
commit
56a7d31770
46 changed files with 490 additions and 1124 deletions
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@ -171,7 +171,7 @@ static int32 getCommonPos = 0; /* determines state for sending
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/* Support for wild card expansion */
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/* Support for wild card expansion */
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#if UNIX_PLATFORM
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#if UNIX_PLATFORM
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static glob_t globS;
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static glob_t globS;
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static int32 globPosNameList = 0;
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static uint32 globPosNameList = 0;
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static int32 globPosName = 0;
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static int32 globPosName = 0;
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static int32 globValid = FALSE;
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static int32 globValid = FALSE;
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static int32 globError = 0;
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static int32 globError = 0;
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@ -339,7 +339,7 @@ DEVICE simh_device = {
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NULL, NULL, NULL
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NULL, NULL, NULL
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};
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};
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char messageBuffer[256] = {};
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char messageBuffer[256] = { 0 };
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void printMessage(void) {
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void printMessage(void) {
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printf(messageBuffer);
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printf(messageBuffer);
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@ -525,11 +525,12 @@ int32 sio0d(const int32 port, const int32 io, const int32 data) {
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return mapCharacter(sio_unit.buf); /* return previous character */
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return mapCharacter(sio_unit.buf); /* return previous character */
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} /* OUT follows */
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} /* OUT follows */
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ch = sio_unit.flags & UNIT_ANSI ? data & 0x7f : data; /* clear highest bit in ANSI mode */
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ch = sio_unit.flags & UNIT_ANSI ? data & 0x7f : data; /* clear highest bit in ANSI mode */
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if ((ch != CONTROLG_CHAR) || !(sio_unit.flags & UNIT_BELL))
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if ((ch != CONTROLG_CHAR) || !(sio_unit.flags & UNIT_BELL)) {
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if ((sio_unit.flags & UNIT_ATT) && (!sio_unit.u4)) /* attached to a port and not to a file */
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if ((sio_unit.flags & UNIT_ATT) && (!sio_unit.u4)) /* attached to a port and not to a file */
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tmxr_putc_ln(&TerminalLines[ti], ch); /* status ignored */
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tmxr_putc_ln(&TerminalLines[ti], ch); /* status ignored */
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else
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else
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sim_putchar(ch);
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sim_putchar(ch);
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}
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return 0x00; /* ignored since OUT */
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return 0x00; /* ignored since OUT */
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}
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}
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@ -811,7 +812,7 @@ static int32 simh_in(const int32 port) {
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case getHostFilenames:
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case getHostFilenames:
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#if UNIX_PLATFORM
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#if UNIX_PLATFORM
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if (globValid)
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if (globValid) {
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if (globPosNameList < globS.gl_pathc) {
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if (globPosNameList < globS.gl_pathc) {
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if (!(result = globS.gl_pathv[globPosNameList][globPosName++])) {
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if (!(result = globS.gl_pathv[globPosNameList][globPosName++])) {
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globPosNameList++;
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globPosNameList++;
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@ -823,6 +824,7 @@ static int32 simh_in(const int32 port) {
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lastCommand = 0;
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lastCommand = 0;
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globfree(&globS);
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globfree(&globS);
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}
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}
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}
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#elif defined (_WIN32)
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#elif defined (_WIN32)
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if (globValid) {
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if (globValid) {
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if (globFinished) {
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if (globFinished) {
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@ -1,970 +0,0 @@
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To: Users
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From: Peter Schorn
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Subj: AltairZ80 Simulator Usage
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Date: 05-Apr-2005
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COPYRIGHT NOTICE
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The following copyright notice applies to both the SIMH source and binary:
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Copyright (c) 2002-2005, Peter Schorn
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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PETER SCHORN BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Peter Schorn shall not
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Peter Schorn.
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Based on work by Charles E Owen (c) 1997
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This memorandum documents the Altair 8800 Simulator with Z80 support.
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1. Simulator Files
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sim/scp.h
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sim_console.h
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sim_defs.h
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sim_fio.h
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sim_rev.h
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sim_sock.h
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sim_timer.h
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sim_tmxr.h
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scp.c
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sim_console.c
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sim_fio.c
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sim_sock.c
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sim_timer.c
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sim_tmxr.c
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sim/AltairZ80/altairz80_defs.h
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altairz80_cpu.c
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altairz80_dsk.c
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altairz80_hdsk.c
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altairz80_sio.c
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altairz80_sys.c
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2. Revision History
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- 05-Apr-2005, removed bogus t-state stepping support
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- 24-Jul-2004, Peter Schorn (updated CP/M 2 and SPL packages)
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- 12-Apr-2004, Peter Schorn (added MAP/NOMAP capability to switch off
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key mapping)
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- 26-Jan-2004, Peter Schorn (added support for t-state stepping)
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- 25-Feb-2003, Peter Schorn (added support for real time simulation)
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- 9-Oct-2002, Peter Schorn (added support for simulated hard disk)
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- 28-Sep-2002, Peter Schorn (number of tracks per disk can be configured)
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- 19-Sep-2002, Peter Schorn (added WARNROM feature)
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- 31-Aug-2002, Peter Schorn (added extended ROM features suggested
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by Scott LaBombard)
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- 4-May-2002, Peter Schorn (added description of MP/M II sample software)
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- 28-Apr-2002, Peter Schorn (added periodic timer interrupts and three
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additional consoles)
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- 15-Apr-2002, Peter Schorn (added memory breakpoint)
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- 7-Apr-2002, Peter Schorn (added ROM / NOROM switch)
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Original version of this document written by Charles E Owen
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3. Background.
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The MITS (Micro Instrumentation and Telemetry Systems) Altair 8800 was
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announced on the January 1975 cover of Popular Electronics, which boasted
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you could buy and build this powerful computer kit for only $397. The kit
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consisted at that time of only the parts to build a case, power supply,
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card cage (18 slots), CPU card, and memory card with 256 *bytes* of memory.
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Still, thousands were ordered within the first few months after the
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announcement, starting the personal computer revolution as we know it
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today.
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Many laugh at the small size of the that first kit, noting there were no
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peripherals and the 256 byte memory size. But the computer was an open
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system, and by 1977 MITS and many other small startups had added many
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expansion cards to make the Altair quite a respectable little computer. The
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"Altair Bus" that made this possible was soon called the S-100 Bus, later
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adopted as an industry standard, and eventually became the IEE-696 Bus.
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4. Hardware
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We are simulating a fairly "loaded" Altair 8800 from about 1977, with the
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following configuration:
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device simulates
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name(s)
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CPU Altair 8800 with Intel 8080 CPU board, 62KB
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of RAM, 2K of EPROM with start boot ROM.
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SIO MITS 88-2SIO Dual Serial Interface Board. Port 1
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is assumed to be connected to a serial "glass
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TTY" that is your terminal running the Simulator.
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PTR Paper Tape Reader attached to port 2 of the 2SIO board.
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PTP Paper Tape Punch attached to port 2 of the
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2SIO board. This also doubles as a printer port.
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DSK MITS 88-DISK Floppy Disk controller with up
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to eight drives.
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4.1 CPU
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We have 2 CPU options that were not present on the original machine but
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are useful in the simulator. We also allow you to select memory sizes, but
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be aware that some sample software requires the full 64K (i.e. CP/M) and
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the MITS Disk Basic and Altair DOS require about a minimum of 24K.
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SET CPU 8080 Simulates the 8080 CPU (normal)
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SET CPU Z80 Simulates the Z80 CPU. Note that some software (e.g. most
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original Altair software such as 4K Basic) requires an 8080 CPU and
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will not or not properly run on a Z80. This is mainly due to the use
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of the parity flag on the 8080 which has not always the same
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semantics on the Z80.
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SET CPU ITRAP Causes the simulator to halt if an invalid opcode
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is detected (depending on the chosen CPU).
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SET CPU NOITRAP Does not stop on an invalid Opcode. This is
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how the real 8080 works. Note that some software such as 4K Basic
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apparently tries to execute nonexistent 8080 instructions. Therefore
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it is advisable in this case to SET CPU NOITRAP.
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SET CPU 4K
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SET CPU 8K
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SET CPU 12K
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SET CPU 16K
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...... (in 4K steps)
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SET CPU 64K All these set various CPU memory configurations.
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SET CPU BANKED Enables the banked memory support. The simulated memory
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has eight banks with address range 0..'common' (see registers below)
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and a common area from 'common' to 0xfff which is common to all
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banks. The currently active bank is determined by register 'bank'
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(see below). You can only switch to banked memory if the memory
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is set to 64K. The banked memory is used by CP/M 3.
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SET CPU NONBANKED Disables banked memory support.
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SET CPU ROM Enables the ROM from address 'ROMLOW' to 'ROMHIGH'
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(see below under CPU Registers) and prevents write access
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to these locations. This is the default setting.
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SET CPU NOROM Disables the ROM.
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SET CPU ALTAIRROM Enables the slightly modified but downwards compatible
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Altair boot ROM at addresses 0FF00 to 0FFFF. This is the default.
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SET CPU NOALTAIRROM Disables standard Altair ROM behavior.
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SET CPU WARNROM Enables warning messages to be printed when the CPU
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attempts to write into ROM or into non-existing memory. Also prints
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a warning message if the CPU attempts to read from non-existing
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memory.
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SET CPU NOWARNROM Suppresses all warning message of "WARNROM". Note that
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some software tries on purpose to write to ROM in order to detect
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the available RAM.
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The BOOT EPROM card starts at address 0FF00 if it has been enabled by
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'SET CPU ALTAIRROM'. Jumping to this address will boot drive 0 of the
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floppy controller (CPU must be set to ROM or equivalent code must be
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present). If no valid bootable software is present there the machine
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crashes. This is historically accurate behavior.
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The real 8080, on receiving a HLT (Halt) instruction, freezes the
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processor and only an interrupt or CPU hardware reset will restore it. The
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simulator is a lot nicer, it will halt but send you back to the simulator
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command line.
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CPU Registers include the following:
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Name Size Comment
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PC 16 The Program Counter
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AF 16 The accumulator and the flag register
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F = S Z - AC - P/V N C
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S = Sign flag.
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Z = Zero Flag.
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AC = Auxiliary Carry flag.
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P/V = Parity flag on 8080
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Parity / Overflow flag on Z80
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- = not used (undefined)
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N = Internal sign flag
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C = Carry flag.
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BC 16 The BC register pair.
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Register B is the high 8 bits, C is the lower 8 bits
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DE 16 The DE register pair.
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Register D is the high 8 bits, E is the lower 8 bits.
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HL 16 The HL register pair.
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Register H is the high 8 bits, L is the lower 8 bits.
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AF1 16 The alternate AF register (on Z80 only)
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BC1 16 The alternate BC register (on Z80 only)
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DE1 16 The alternate DE register (on Z80 only)
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HL1 16 The alternate HL register (on Z80 only)
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IX 16 The IX index register (on Z80 only)
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IY 16 The IY index register (on Z80 only)
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IFF 8 Interrupt flag (on Z80 only)
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INT 8 Interrupt register (on Z80 only)
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SR 16 The front panel switches (use D SR 8 for 4k Basic).
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WRU 8 The interrupt character. This starts as 5
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(ctrl-E) but some Altair software uses this
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keystroke so best to change this to something
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exotic such as 035 (which is Ctl-]).
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BANK 3 The currently active memory bank (if banked memory
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is activated - see memory options above)
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COMMON 16 The starting address of common memory. Originally set
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to 0xc000 (note this setting must agree with the
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value supplied to GENCPM for CP/M 3 system generation)
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ROMLOW 16 The starting address of the ROM. Default is 0FF00.
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ROMHIGH 16 The final address of the ROM. Default is 0FFFF.
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CLOCK 32 The clock speed of the simulated CPU in kHz or 0 to run
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at maximum speed. To set the clock speed for a typical
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4 MHz Z80 CPU, use D CLOCK 4000. The CP/M utility SPEED
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measures the clock speed of the simulated CPU.
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4.2 The Serial I/O Card (2SIO)
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This simple programmed I/O device provides 2 serial ports to the outside
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world, which could be hardware jumpered to support RS-232 plugs or a TTY
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current loop interface. The standard I/O addresses assigned by MITS was
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10-11 (hex) for the first port, and 12-13 (hex) for the second. We follow
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this standard in the Simulator.
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The simulator directs I/O to/from the first port to the screen. The
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second port reads from an attachable "tape reader" file on input, and
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writes to an attachable "punch file" on output. These files are considered
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a simple stream of 8-bit bytes.
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The SIO can be configured in SIMH with the following commands:
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SET SIO TTY Bit 8 is set to zero on console output
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SET SIO ANSI Bit 8 is not touched on console output
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SET SIO ALL Console input remain unchanged
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SET SIO UPPER Console input is transformed to upper case characters only
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(This feature is useful for most Altair software)
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SET SIO MAP must also have been executed for this
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option to take effect - otherwise no mapping occurs.
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SET SIO BS Map the delete character to backspace
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SET SIO MAP must also have been executed for this
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option to take effect - otherwise no mapping occurs.
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SET SIO DEL Map the backspace character to delete
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SET SIO MAP must also have been executed for this
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option to take effect - otherwise no mapping occurs.
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SET SIO QUIET Do not print warning messages
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SET SIO VERBOSE Print warning messages (useful for debugging)
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The register SIOWL determines how often the same warning
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is displayed. The default is 3.
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SET SIO MAP Enable mapping of characters
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(see also SET SIO ALL/UPPER/BS/DEL)
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SET SIO NOMAP Disable mapping of characters
|
|
||||||
(see also SET SIO ALL/UPPER/BS/DEL)
|
|
||||||
|
|
||||||
You can also attach the SIO to a port:
|
|
||||||
|
|
||||||
ATTACH SIO 23 Console IO goes via a Telnet connection on port 23
|
|
||||||
DETACH SIO Console IO goes via the regular SIMH console
|
|
||||||
|
|
||||||
|
|
||||||
4.3 The SIMH pseudo device
|
|
||||||
|
|
||||||
The SIMH pseudo device facilitates the communication between the
|
|
||||||
simulated ALTAIR and the simulator environment. This device defines a
|
|
||||||
number of (most R/O) registers (see source code) which are primarily useful
|
|
||||||
for debugging purposes.
|
|
||||||
|
|
||||||
The SIMH pseudo device can be configured with
|
|
||||||
|
|
||||||
SET SIMH QUIET Do not print warning messages
|
|
||||||
SET SIMH VERBOSE Print warning messages (useful for debugging)
|
|
||||||
|
|
||||||
SET SIMH TIMERON Start periodic timer interrupts
|
|
||||||
SET SIMH TIMEROFF Stop the periodic timer interrupts
|
|
||||||
|
|
||||||
The following variables determine the behavior of the timer:
|
|
||||||
|
|
||||||
TIMD This is the delay between consecutive interrupts in milliseconds.
|
|
||||||
Use D TIMD 20 for a 50 Hz clock.
|
|
||||||
TIMH This is the address of the interrupt handler to call for a
|
|
||||||
timer interrupt.
|
|
||||||
|
|
||||||
|
|
||||||
4.4 The 88-DISK controller.
|
|
||||||
|
|
||||||
The MITS 88-DISK is a simple programmed I/O interface to the MITS 8-inch
|
|
||||||
floppy drive, which was basically a Pertec FD-400 with a power supply and
|
|
||||||
buffer board built-in. The controller supports neither interrupts nor DMA,
|
|
||||||
so floppy access required the sustained attention of the CPU. The standard
|
|
||||||
I/O addresses were 8, 9, and 0A (hex), and we follow the standard. Details
|
|
||||||
on controlling this hardware are in the altairz80_dsk.c source file.
|
|
||||||
|
|
||||||
The only difference is that the simulated disks may be larger than the
|
|
||||||
original ones: The original disk had 77 tracks while the simulated disks
|
|
||||||
support up to 254 tracks (only relevant for CP/M). You can change the
|
|
||||||
number of tracks per disk by setting the appropriate value in TRACKS[..].
|
|
||||||
For example "D TRACKS[0] 77" sets the number of tracks for disk 0 to the
|
|
||||||
original number of 77. The command "D TRACKS[0-7] 77" changes the highest
|
|
||||||
track number for all disks to 77.
|
|
||||||
|
|
||||||
For debugging purposes you can set the trace level of some disk I/O
|
|
||||||
functions. To do so the following bits in TRACE (a register of the disk)
|
|
||||||
have been defined with the following meaning:
|
|
||||||
|
|
||||||
1 Trace all IN and OUT instructions on the disk ports 8 and 9
|
|
||||||
2 Trace all read and writes to full sectors on the disk
|
|
||||||
4 Print a message whenever an unnecessary step-in or step out of the
|
|
||||||
disk head occurs (often an indication of an infinite loop)
|
|
||||||
8 Print a message whenever the disk head appears to be waiting for a
|
|
||||||
sector which does not show up (often an indication of an infinite
|
|
||||||
loop)
|
|
||||||
|
|
||||||
For example the command "D TRACE 10" will trace options 2+8 from above.
|
|
||||||
|
|
||||||
The DSK device can be configured with
|
|
||||||
|
|
||||||
SET DSK<n> QUIET Do not print warning messages for disk <n>
|
|
||||||
SET DSK<n> VERBOSE Print warning messages for disk <n>
|
|
||||||
(useful for debugging)
|
|
||||||
The register DSKWL determines how often the
|
|
||||||
same warning is displayed. The default is 3.
|
|
||||||
|
|
||||||
SET DSK<n> WRITEENABLED Allow write operations for disk <n>
|
|
||||||
SET DSK<n> LOCKED Disk <n> is locked, i.e. no write operations
|
|
||||||
will be allowed.
|
|
||||||
|
|
||||||
|
|
||||||
4.5 The simulated hard disk
|
|
||||||
|
|
||||||
In order to increase the available storage capacity, the simulator
|
|
||||||
features 8 simulated hard disks with a capacity of 8MB (HDSK0 to HDSK7).
|
|
||||||
Currently only CP/M supports two hard disks as devices I: and J:.
|
|
||||||
|
|
||||||
For debugging purposes one can set the trace flag by executing the
|
|
||||||
command "D HDTRACE 1". The default for "HDTRACE" is 0 (no trace).
|
|
||||||
|
|
||||||
The HDSK device can be configured with
|
|
||||||
|
|
||||||
SET HDSK<n> QUIET Do not print warning messages for hard disk <n>
|
|
||||||
SET HDSK<n> VERBOSE Print warning messages for hard disk <n>
|
|
||||||
(useful for debugging)
|
|
||||||
|
|
||||||
SET HDSK<n> WRITEENABLED Allow write operations for hard disk <n>
|
|
||||||
SET HDSK<n> LOCKED Hard disk <n> is locked, i.e. no
|
|
||||||
write operations will be allowed.
|
|
||||||
|
|
||||||
|
|
||||||
5. Sample Software
|
|
||||||
|
|
||||||
Running an Altair in 1977 you would be running either MITS Disk Extended
|
|
||||||
BASIC, or the brand new and sexy CP/M Operating System from Digital
|
|
||||||
Research. Or possibly, you ordered Altair DOS back when it was promised in
|
|
||||||
1975, and are still waiting for it to be delivered in early 1977.
|
|
||||||
|
|
||||||
We have samples of all three for you to check out. We can't go into the
|
|
||||||
details of how they work, but we'll give you a few hints.
|
|
||||||
|
|
||||||
|
|
||||||
5.1 CP/M Version 2.2
|
|
||||||
|
|
||||||
This version is my own port of the standard CP/M to the Altair. There
|
|
||||||
were some "official" versions but I don't have them. None were endorsed or
|
|
||||||
sold by MITS to my knowledge, however.
|
|
||||||
|
|
||||||
To boot CP/M:
|
|
||||||
|
|
||||||
sim> attach dsk cpm2.dsk
|
|
||||||
sim> boot dsk
|
|
||||||
|
|
||||||
CP/M feels like DOS, sort of. DIR will work. I have included all the
|
|
||||||
standard CP/M utilities, plus a few common public-domain ones. I also
|
|
||||||
include the sources to the customized BIOS and some other small programs.
|
|
||||||
TYPE will print an ASCII file. DUMP will dump a binary one. LS is a
|
|
||||||
better DIR than DIR. ASM will assemble .ASM files to Hex, LOAD will "load"
|
|
||||||
them to binary format (.COM). ED is a simple editor, #A command will bring
|
|
||||||
the source file to the buffer, T command will "type" lines, L will move
|
|
||||||
lines, E exits the editor. 20L20T will move down 20 lines, and type 20.
|
|
||||||
Very DECish. DDT is the debugger, DO is a batch-type command processor. A
|
|
||||||
sample batch file that will assemble and write out the bootable CP/M image
|
|
||||||
(on drive A) is "SYSCPM2.SUB". To run it, type "DO SYSCPM2".
|
|
||||||
|
|
||||||
In order to efficiently transfer files into the CP/M environment use the
|
|
||||||
included program R <filename.ext>. If you have a file named foo.ext in the
|
|
||||||
current directory (i.e. the directory where SIMH is), executing R FOO.EXT
|
|
||||||
under CP/M will transfer the file onto the CP/M disk. Transferring a file
|
|
||||||
from the CP/M environment to the SIMH environment is accomplished by
|
|
||||||
W <filename.ext> for text files or by W <filename.ext> B for binary files.
|
|
||||||
The simplest way for transferring multiple files is to create a ".SUB"
|
|
||||||
batch file which contains the necessary R resp. W commands.
|
|
||||||
|
|
||||||
If you need more storage space you can use a simulated hard disk on
|
|
||||||
drives I: and J:. To use do "attach HDSK0 hdi.dsk" and issue the
|
|
||||||
"XFORMAT I:" resp. "XFORMAT J:" command from CP/M do initialize the disk
|
|
||||||
to an empty state.
|
|
||||||
|
|
||||||
The disk "cpm2.dsk" contains the following files:
|
|
||||||
Name Ext Size Comment
|
|
||||||
ASM .COM 8K ; CP/M assembler
|
|
||||||
BDOS .MAC 68K ; Basic Disk Operating System assembler source code
|
|
||||||
BOOT .COM 1K ; transfer control to boot ROM
|
|
||||||
BOOT .MAC 2K ; source for BOOT.COM
|
|
||||||
BOOTGEN .COM 2K ; put a program on the boot sectors
|
|
||||||
CBIOSX .MAC 48K ; CP/M 2 BIOS source for Altair
|
|
||||||
CCP .MAC 26K ; Console Command Processor assembler source code
|
|
||||||
COPY .COM 2K ; copy disks
|
|
||||||
CPMBOOT .COM 12K ; CP/M operating system
|
|
||||||
CPU .COM 2K ; get and set the CPU type (8080 or Z80)
|
|
||||||
CPU .MAC 2K ; source for CPU.COM
|
|
||||||
CREF80 .COM 4K ; cross reference utility
|
|
||||||
DDT .COM 6K ; 8080 debugger
|
|
||||||
DDTZ .COM 10K ; Z80 debugger
|
|
||||||
DIF .COM 4K ; determine differences between two files
|
|
||||||
DO .COM 2K ; batch processing
|
|
||||||
DSKBOOT .MAC 8K ; source for boot ROM
|
|
||||||
DUMP .COM 2K ; hex dump a file
|
|
||||||
ED .COM 8K ; line editor
|
|
||||||
ELIZA .BAS 10K ; Eliza game in Basic
|
|
||||||
EX8080 .COM 12K ; exercise 8080 instruction set
|
|
||||||
EXZ80DOC.COM 12K ; exercise Z80 instruction set, No undefined status bits
|
|
||||||
EXZ80ALL.COM 12K ; exercise Z80 instruction set, Undefined status bits
|
|
||||||
EX .MAC 54K ; source for EX8080.COM, EXZ80DOC.COM, EXZ80ALL.COM
|
|
||||||
EX .SUB 2K ; benchmark execution of EX8080.COM,EXZ80DOC.COM,EXZ80ALL.COM
|
|
||||||
FORMAT .COM 2K ; format disks
|
|
||||||
GO .COM 0K ; start the currently loaded program at 100H
|
|
||||||
HDSKBOOT.MAC 6K ; boot code for hard disk
|
|
||||||
L80 .COM 12K ; Microsoft linker
|
|
||||||
LADDER .COM 40K ; game
|
|
||||||
LADDER .DAT 2K ; high score file for LADDER.COM
|
|
||||||
LIB80 .COM 6K ; library utility
|
|
||||||
LOAD .COM 2K ; load hex files
|
|
||||||
LS .COM 4K ; directory utility
|
|
||||||
LU .COM 20K ; library utility
|
|
||||||
M80 .COM 20K ; Microsoft macro assembler
|
|
||||||
MBASIC .COM 24K ; Microsoft Basic interpreter
|
|
||||||
MC .SUB 2K ; assemble and link an assembler program
|
|
||||||
MCC .SUB 2K ; read, assemble and link an assembler program
|
|
||||||
MCCL .SUB 2K ; assemble, link and produce listing
|
|
||||||
MEMCFG .LIB 2K ; defines the memory configuration
|
|
||||||
MOVER .MAC 2K ; moves operating system in place
|
|
||||||
OTHELLO .COM 12K ; Othello (Reversi) game
|
|
||||||
PIP .COM 8K ; Peripheral Interchange Program
|
|
||||||
PRELIM .COM 2K ; preliminary CPU tests
|
|
||||||
PRELIM .MAC 6K ; source code for PRELIM.COM
|
|
||||||
R .COM 4K ; read files from SIMH environment
|
|
||||||
RSETSIMH.COM 2K ; reset SIMH interface
|
|
||||||
RSETSIMH.MAC 2K ; assembler source for RSETSIMH.COM
|
|
||||||
SHOWSEC .COM 3K ; show sectors on a disk
|
|
||||||
SID .COM 8K ; debugger for 8080
|
|
||||||
SPEED .COM 2K ; utility to measure the clock speed of the simulated CPU
|
|
||||||
STAT .COM 6K ; provide information about currently logged disks
|
|
||||||
SURVEY .COM 2K ; system survey
|
|
||||||
SURVEY .MAC 16K ; assembler source for SURVEY.COM
|
|
||||||
SYSCOPY .COM 2K ; copy system tracks between disks
|
|
||||||
SYSCPM2 .SUB 2K ; create CP/M 2 on drive A:
|
|
||||||
TIMER .COM 2K ; perform various timer operations
|
|
||||||
TIMER .MAC 2K ; source code for TIMER.COM
|
|
||||||
UNCR .COM 8K ; un-crunch utility
|
|
||||||
UNERA .COM 2K ; un-erase a file
|
|
||||||
UNERA .MAC 16K ; source for UNERA.COM
|
|
||||||
USQ .COM 2K ; un-squeeze utility
|
|
||||||
W .COM 4K ; write files to SIMH environment
|
|
||||||
WM .COM 12K ; word master screen editor
|
|
||||||
WM .HLP 3K ; help file for WM.COM
|
|
||||||
WORM .COM 4K ; worm game for VT100 terminal
|
|
||||||
XFORMAT .COM 2K ; initialize a drive (floppy or hard disk)
|
|
||||||
XSUB .COM 2K ; support for DO.COM
|
|
||||||
ZAP .COM 10K ; SuperZap 5.2 disk editor configured for VT100
|
|
||||||
ZSID .COM 10K ; debugger for Z80
|
|
||||||
ZTRAN4 .COM 4K ; translate 8080 mnemonics into Z80 equivalents
|
|
||||||
|
|
||||||
|
|
||||||
5.2 CP/M Version 3 with banked memory
|
|
||||||
|
|
||||||
CP/M 3 is the successor to CP/M 2.2. A customized BIOS (BIOS3.MAC) is
|
|
||||||
included to facilitate modification if so desired. The defaults supplied in
|
|
||||||
GENCPM.DAT for system generation can be used. BOOTGEN.COM is used to place
|
|
||||||
the CP/M loader (LDR.COM) on the boot tracks of a disk.
|
|
||||||
|
|
||||||
Running CP/M 3 with banked memory:
|
|
||||||
sim> attach dsk cpm3.dsk
|
|
||||||
sim> reset cpu
|
|
||||||
sim> set cpu banked
|
|
||||||
sim> set cpu itrap
|
|
||||||
sim> boot dsk
|
|
||||||
|
|
||||||
Executing "DO SYSCPM3" will re-generate the banked version of CP/M 3. You
|
|
||||||
can boot CP/M 3 with or without a Z80 CPU. The Z80 CPU is needed for both
|
|
||||||
sysgens due to the use of BOOTGEN.COM which requires it.
|
|
||||||
|
|
||||||
The disk "cpm3.dsk" contains the following files:
|
|
||||||
ASM .COM 8K ; CP/M assembler
|
|
||||||
ASSIGN .SYS 2K
|
|
||||||
BDOS3 .SPR 10K
|
|
||||||
BIOS3 .MAC 28K ; CP/M 3 BIOS source for Altair SIMH
|
|
||||||
BIOS3 .SPR 4K
|
|
||||||
BNKBDOS3.SPR 14K
|
|
||||||
BNKBIOS3.SPR 4K
|
|
||||||
BOOT .COM 2K ; transfer control to boot ROM
|
|
||||||
BOOTGEN .COM 2K ; put a program on the boot sectors
|
|
||||||
CCP .COM 4K
|
|
||||||
COPYSYS .COM 2K
|
|
||||||
CPM3 .SYS 18K
|
|
||||||
CPMLDR .MAC 38K ; CP/M 3 loader assembler source
|
|
||||||
DATE .COM 4K ; date utility
|
|
||||||
DDT .COM 6K ; 8080 debugger
|
|
||||||
DDTZ .COM 10K ; Z80 debugger
|
|
||||||
DEFS .LIB 2K ; include file for BIOS3.MAC to create banked CP/M 3
|
|
||||||
DEVICE .COM 8K
|
|
||||||
DIF .COM 4K ; determine differences between two files
|
|
||||||
DIR .COM 16K ; directory utility
|
|
||||||
DO .COM 6K ; batch processing
|
|
||||||
DUMP .COM 2K
|
|
||||||
ED .COM 10K
|
|
||||||
ERASE .COM 4K
|
|
||||||
GENCOM .COM 16K
|
|
||||||
GENCPM .COM 22K
|
|
||||||
GENCPM .DAT 4K ; CP/M generation information for banked version
|
|
||||||
GENCPMNB.DAT 4K ; CP/M generation information for non-banked version
|
|
||||||
GET .COM 8K
|
|
||||||
HELP .COM 8K ; help utility
|
|
||||||
HELP .HLP 62K ; help files
|
|
||||||
HEXCOM .CPM 2K
|
|
||||||
HIST .UTL 2K
|
|
||||||
INITDIR .COM 32K
|
|
||||||
L80 .COM 12K ; Microsoft linker
|
|
||||||
LDR .COM 4K ; CP/M loader with optimized loader BIOS
|
|
||||||
LDRBIOS3.MAC 14K ; optimized (for space) loader BIOS
|
|
||||||
LIB .COM 8K ; Digital Research librarian
|
|
||||||
LINK .COM 16K ; Digital Research linker
|
|
||||||
LOAD .COM 2K
|
|
||||||
M80 .COM 20K ; Microsoft macro assembler
|
|
||||||
MC .SUB 2K ; assemble and link an assembler program
|
|
||||||
MCC .SUB 2K ; read, assemble and link an assembler program
|
|
||||||
PATCH .COM 4K
|
|
||||||
PIP .COM 10K ; Peripheral Interchange Program
|
|
||||||
PROFILE .SUB 2K ; commands to be executed at start up
|
|
||||||
PUT .COM 8K
|
|
||||||
R .COM 4K ; read files from SIMH environment
|
|
||||||
RENAME .COM 4K
|
|
||||||
RESBDOS3.SPR 2K
|
|
||||||
RMAC .COM 14K ; Digital Research macro assembler
|
|
||||||
RSETSIMH.COM 2K ; reset SIMH interface
|
|
||||||
SAVE .COM 2K
|
|
||||||
SCB .MAC 2K
|
|
||||||
SET .COM 12K
|
|
||||||
SETDEF .COM 6K
|
|
||||||
SHOW .COM 10K
|
|
||||||
SHOWSEC .COM 4K ; show sectors on a disk
|
|
||||||
SID .COM 8K ; 8080 debugger
|
|
||||||
SYSCOPY .COM 2K ; copy system tracks between disks
|
|
||||||
SYSCPM3 .SUB 2K ; create banked CP/M 3 system
|
|
||||||
TRACE .UTL 2K
|
|
||||||
TSHOW .COM 2K ; show split time
|
|
||||||
TSTART .COM 2K ; create timer and start it
|
|
||||||
TSTOP .COM 2K ; show final time and stop timer
|
|
||||||
TYPE .COM 4K
|
|
||||||
UNERA .COM 2K ; un-erase a file
|
|
||||||
W .COM 4K ; write files to SIMH environment
|
|
||||||
XREF .COM 16K ; cross reference utility
|
|
||||||
ZSID .COM 10K ; Z80 debugger
|
|
||||||
|
|
||||||
|
|
||||||
5.3 MP/M II with banked memory
|
|
||||||
|
|
||||||
MP/M II is an acronym for MultiProgramming Monitor Control Program for
|
|
||||||
Microprocessors. It is a multiuser operating system for an eight bit
|
|
||||||
microcomputer. MP/M II supports multiprogramming at each terminal. This
|
|
||||||
version supports four terminals available via Telnet. To boot:
|
|
||||||
|
|
||||||
sim> attach dsk mpm.dsk
|
|
||||||
sim> set cpu itrap
|
|
||||||
sim> set cpu z80
|
|
||||||
sim> set cpu rom
|
|
||||||
sim> set cpu banked
|
|
||||||
sim> attach sio 23
|
|
||||||
sim> d common b000
|
|
||||||
sim> boot dsk
|
|
||||||
|
|
||||||
Now connect a Telnet session to the simulator and type "MPM" at the "A>"
|
|
||||||
prompt. Now you can connect up to three additional terminals via Telnet to
|
|
||||||
the Altair running MP/M II. To re-generate the system perform "DO SYSMPM"
|
|
||||||
in the CP/M environment (not possible under MP/M since XSUB is needed).
|
|
||||||
|
|
||||||
The disk "mpm.dsk" contains the following files:
|
|
||||||
Name Ext Size Comment
|
|
||||||
ABORT .PRL 2K ; abort a process
|
|
||||||
ABORT .RSP 2K
|
|
||||||
ASM .PRL 10K ; MP/M assembler
|
|
||||||
BNKBDOS .SPR 12K ; banked BDOS
|
|
||||||
BNKXDOS .SPR 2K ; banked XDOS
|
|
||||||
BNKXIOS .SPR 4K ; banked XIOS
|
|
||||||
BOOTGEN .COM 2K ; copy an executable to the boot section
|
|
||||||
CONSOLE .PRL 2K ; print console number
|
|
||||||
CPM .COM 2K ; return to CP/M
|
|
||||||
CPM .MAC 2K ; source for CPM.COM
|
|
||||||
DDT .COM 6K ; MP/M DDT
|
|
||||||
DDT2 .COM 6K ; CP/M DDT
|
|
||||||
DDTZ .COM 10K ; CP/M DDT with Z80 support
|
|
||||||
DIF .COM 4K ; difference between two files
|
|
||||||
DIR .PRL 2K ; directory command
|
|
||||||
DO .COM 2K ; CP/M submit
|
|
||||||
DSKRESET.PRL 2K ; disk reset command
|
|
||||||
DUMP .MAC 6K ; source for DUMP.PRL
|
|
||||||
DUMP .PRL 2K ; dump command
|
|
||||||
ED .PRL 10K ; MP/M line editor
|
|
||||||
ERA .PRL 2K ; erase command
|
|
||||||
ERAQ .PRL 4K ; erase command (verbose)
|
|
||||||
GENHEX .COM 2K
|
|
||||||
GENMOD .COM 2K
|
|
||||||
GENSYS .COM 10K
|
|
||||||
L80 .COM 12K ; Microsoft linker
|
|
||||||
LDRBIOS .MAC 14K ; loader BIOS
|
|
||||||
LIB .COM 8K ; library utility
|
|
||||||
LINK .COM 16K ; linker
|
|
||||||
LOAD .COM 2K ; loader
|
|
||||||
M80 .COM 20K ; Microsoft macro assembler
|
|
||||||
MC .SUB 2K ; assemble and link an assembler program
|
|
||||||
MCC .SUB 2K ; read, assemble and link an assembler program
|
|
||||||
MPM .COM 8K ; start MP/M II
|
|
||||||
MPM .SYS 26K ; MP/M system file
|
|
||||||
MPMD .LIB 2K ; define a banked system
|
|
||||||
MPMLDR .COM 6K ; MP/M loader without LDRBIOS
|
|
||||||
MPMSTAT .BRS 6K ; status of MP/M system
|
|
||||||
MPMSTAT .PRL 6K
|
|
||||||
MPMSTAT .RSP 2K
|
|
||||||
MPMXIOS .MAC 26K ; XIOS for MP/M
|
|
||||||
PIP .PRL 10K ; MP/M peripheral interchange program
|
|
||||||
PIP2 .COM 8K ; CP/M peripheral interchange program
|
|
||||||
PRINTER .PRL 2K
|
|
||||||
PRLCOM .PRL 4K
|
|
||||||
R .COM 4K ; read a file from the SIMH environment
|
|
||||||
RDT .PRL 8K ; debugger for page relocatable programs
|
|
||||||
REN .PRL 4K ; rename a file
|
|
||||||
RESBDOS .SPR 4K ; non-banked BDOS
|
|
||||||
RMAC .COM 14K ; Digital Research macro assembler
|
|
||||||
RSETSIMH.COM 2K ; reset SIMH interface
|
|
||||||
SCHED .BRS 2K ; schedule a job
|
|
||||||
SCHED .PRL 4K
|
|
||||||
SCHED .RSP 2K
|
|
||||||
SDIR .PRL 18K ; fancy directory command
|
|
||||||
SET .PRL 8K ; set parameters
|
|
||||||
SHOW .PRL 8K ; show status of disks
|
|
||||||
SPOOL .BRS 4K ; spool utility
|
|
||||||
SPOOL .PRL 4K
|
|
||||||
SPOOL .RSP 2K
|
|
||||||
STAT .COM 6K ; CP/M stat command
|
|
||||||
STAT .PRL 10K ; MP/M stat command
|
|
||||||
STOPSPLR.PRL 2K ; stop spooler
|
|
||||||
SUBMIT .PRL 6K ; MP/M submit
|
|
||||||
SYSCOPY .COM 2K ; copy system tracks
|
|
||||||
SYSMPM .SUB 2K ; do a system generation
|
|
||||||
SYSTEM .DAT 2K ; default values for system generation
|
|
||||||
TMP .SPR 2K
|
|
||||||
TOD .PRL 4K ; time of day
|
|
||||||
TSHOW .COM 2K ; show split time
|
|
||||||
TSTART .COM 2K ; create timer and start it
|
|
||||||
TSTOP .COM 2K ; show final time and stop timer
|
|
||||||
TYPE .PRL 2K ; type a file on the screen
|
|
||||||
USER .PRL 2K ; set user area
|
|
||||||
W .COM 4K ; write a file to SIMH environment
|
|
||||||
XDOS .SPR 10K ; XDOS
|
|
||||||
XREF .COM 16K ; cross reference utility
|
|
||||||
XSUB .COM 2K ; for CP/M DO
|
|
||||||
|
|
||||||
|
|
||||||
5.4 CP/M application software
|
|
||||||
|
|
||||||
There is also a small collection of sample application software
|
|
||||||
containing the following items:
|
|
||||||
|
|
||||||
- SPL: a Small Programming Language with a suite of sample programs
|
|
||||||
- PROLOGZ: a Prolog interpreter written in SPL with sources
|
|
||||||
- PASCFORM: a Pascal pretty printer written in Pascal
|
|
||||||
- Pascal MT+: Pascal language system needed to compile PASCFORM
|
|
||||||
|
|
||||||
The sample software comes on "app.dsk" and to use it do
|
|
||||||
|
|
||||||
sim> attach dsk1 app.dsk
|
|
||||||
|
|
||||||
before booting CP/M.
|
|
||||||
|
|
||||||
The disk "app.dsk" contains the following files:
|
|
||||||
Name Ext Size Comment
|
|
||||||
ACKER .SPL 4K ; compute the Ackermann function
|
|
||||||
ACKER .COM 2K ; compute the Ackermann function, SPL source
|
|
||||||
BOOTGEN .COM 2K
|
|
||||||
BOOTGEN .SPL 6K ; SPL source for BOOTGEN.COM
|
|
||||||
C .SUB 2K ; batch file for compiling an SPL source file
|
|
||||||
CALC .PRO 4K ; Prolog demo program: Calculator
|
|
||||||
DIF .COM 4K
|
|
||||||
DIF .SPL 10K ; SPL source for DIF.COM
|
|
||||||
FAC .COM 4K ; compute the factorial
|
|
||||||
FAC .SPL 4K ; compute the factorial, SPL source
|
|
||||||
FAMILY .PRO 4K ; Prolog demo program: Family relations
|
|
||||||
FORMEL .COM 4K ; calculator
|
|
||||||
FORMEL .SPL 6K ; calculator, SPL source
|
|
||||||
INTEGER .PRO 2K ; Prolog demo program: Integer arithmetic
|
|
||||||
KNAKE .PRO 2K ; Prolog demo program: Logic puzzle
|
|
||||||
LINKMT .COM 12K ; Pascal MT+ 5.5 linker
|
|
||||||
MOVE .MAC 4K ; helper functions for PROLOGZ in assembler
|
|
||||||
MTERRS .TXT 6K ; Pascal MT+ error messages
|
|
||||||
MTPLUS .000 14K ; Pascal MT+ 5.5 compiler file
|
|
||||||
MTPLUS .001 12K ; Pascal MT+ 5.5 compiler file
|
|
||||||
MTPLUS .002 8K ; Pascal MT+ 5.5 compiler file
|
|
||||||
MTPLUS .003 8K ; Pascal MT+ 5.5 compiler file
|
|
||||||
MTPLUS .004 18K ; Pascal MT+ 5.5 compiler file
|
|
||||||
MTPLUS .005 8K ; Pascal MT+ 5.5 compiler file
|
|
||||||
MTPLUS .006 6K ; Pascal MT+ 5.5 compiler file
|
|
||||||
MTPLUS .COM 36K ; Pascal MT+ 5.5 compiler
|
|
||||||
PASCFORM.COM 36K ; Pascal formatter
|
|
||||||
PASCFORM.PAS 54K ; Pascal formatter source code
|
|
||||||
PASCFORM.SUB 2K ; create Pascal formatter
|
|
||||||
PASLIB .ERL 24K ; Pascal MT+ 5.5 run time library
|
|
||||||
PINST .COM 4K ; terminal installation program for PROLOGZ
|
|
||||||
PINST .SPL 16K ; terminal installation program for PROLOGZ, SPL source
|
|
||||||
PRIM .COM 2K ; compute prime numbers
|
|
||||||
PRIM .SPL 2K ; compute prime numbers, SPL source
|
|
||||||
PROLOGZ .COM 18K ; PROLOGZ interpreter and screen editor
|
|
||||||
PROLOGZ .SPL 2K ; SPL source for PROLOGZ
|
|
||||||
PROLOGZ .TXT 40K ; PROLOGZ documentation in German
|
|
||||||
QUEEN .PRO 2K ; Prolog demo program: N-queens problem
|
|
||||||
READ .COM 4K
|
|
||||||
READ .SPL 10K ; SPL source for R.COM
|
|
||||||
RELDUMP .COM 4K ; dump a .REL file to the console
|
|
||||||
RELDUMP .SPL 10K ; dump a .REL file to the console, SPL source
|
|
||||||
SHOWSEC .COM 2K
|
|
||||||
SHOWSEC .SPL 6K ; SPL source for SHOWSEC.COM
|
|
||||||
SIEVE .COM 2K ; compute prime numbers with a sieve
|
|
||||||
SIEVE .SPL 6K ; compute prime numbers with a sieve, SPL source
|
|
||||||
SPEED .COM 2K ; utility to measure the clock speed of the simulated CPU
|
|
||||||
SPEED .SPL 4K ; SPL source for SPEED.COM
|
|
||||||
SPL .COM 28K ; the SPL compiler itself
|
|
||||||
SPL .TXT 50K ; SPL language and compiler documentation
|
|
||||||
SPLERROR.DAT 8K ; error messages of the compiler
|
|
||||||
SPLRTLB .REL 2K ; SPL runtime library
|
|
||||||
SYSCOPY .COM 2K
|
|
||||||
SYSCOPY .SPL 6K ; SPL source for SYSCOPY.COM
|
|
||||||
WC .COM 6K ; word count and query facility
|
|
||||||
WC .SPL 14K ; word count and query facility, SPL source
|
|
||||||
WRITE .COM 4K
|
|
||||||
WRITE .SPL 8K ; SPL source for W.COM
|
|
||||||
XFORMAT .COM 2K
|
|
||||||
XFORMAT .SPL 6K ; SPL source for XFORMAT.COM
|
|
||||||
|
|
||||||
|
|
||||||
5.5 MITS Disk Extended BASIC Version 4.1
|
|
||||||
|
|
||||||
This was the commonly used software for serious users of the Altair
|
|
||||||
computer. It is a powerful (but slow) BASIC with some extended commands to
|
|
||||||
allow it to access and manage the disk. There was no operating system it
|
|
||||||
ran under. To boot:
|
|
||||||
|
|
||||||
sim> set cpu 8080 ;Z80 will not work
|
|
||||||
sim> attach dsk mbasic.dsk
|
|
||||||
sim> set sio upper
|
|
||||||
sim> go ff00
|
|
||||||
|
|
||||||
MEMORY SIZE? [return]
|
|
||||||
LINEPRINTER? [C return]
|
|
||||||
HIGHEST DISK NUMBER? [0 return] (0 here = 1 drive system)
|
|
||||||
NUMBER OF FILES? [3 return]
|
|
||||||
NUMBER OF RANDOM FILES? [2 return]
|
|
||||||
|
|
||||||
44041 BYTES FREE
|
|
||||||
ALTAIR BASIC REV. 4.1
|
|
||||||
[DISK EXTENDED VERSION]
|
|
||||||
COPYRIGHT 1977 BY MITS INC.
|
|
||||||
OK
|
|
||||||
[MOUNT 0]
|
|
||||||
OK
|
|
||||||
[FILES]
|
|
||||||
|
|
||||||
|
|
||||||
5.6 Altair DOS Version 1.0
|
|
||||||
|
|
||||||
This was long promised but not delivered until it was almost irrelevant.
|
|
||||||
A short attempted tour will reveal it to be a dog, far inferior to CP/M. To
|
|
||||||
boot:
|
|
||||||
|
|
||||||
sim> d tracks[0-7] 77 ;set to Altair settings
|
|
||||||
sim> set cpu altairrom
|
|
||||||
sim> attach dsk altdos.dsk
|
|
||||||
sim> set sio upper
|
|
||||||
sim> go ff00
|
|
||||||
|
|
||||||
MEMORY SIZE? [return]
|
|
||||||
INTERRUPTS? N [return]
|
|
||||||
HIGHEST DISK NUMBER? [0 return] (3 here = 4 drive system)
|
|
||||||
HOW MANY DISK FILES? [3 return]
|
|
||||||
HOW MANY RANDOM FILES? [2 return]
|
|
||||||
|
|
||||||
056449 BYTES AVAILABLE
|
|
||||||
DOS MONITOR VER 1.0
|
|
||||||
COPYRIGHT 1977 BY MITS INC
|
|
||||||
.[MNT 0]
|
|
||||||
|
|
||||||
.[DIR 0]
|
|
||||||
|
|
||||||
|
|
||||||
5.7 Altair Basic 3.2 (4k)
|
|
||||||
|
|
||||||
In order to run the famous 4k Basic, use the following commands (the
|
|
||||||
trick is to get the Switch Register right).
|
|
||||||
|
|
||||||
sim> set cpu 8080 ;note 4k Basic will not run on a Z80 CPU
|
|
||||||
sim> set sio upper ;4k Basic does not like lower case letters as input
|
|
||||||
sim> set cpu noitrap ;4k Basic likes to execute non 8080 instructions-ignore
|
|
||||||
sim> set sio ansi ;4k Basic produces 8-bit output, strip to seven bits
|
|
||||||
sim> d sr 8 ;good setting for the Switch Register
|
|
||||||
sim> load 4kbas.bin 0 ;load it at 0
|
|
||||||
sim> go 0 ;and start it
|
|
||||||
MEMORY SIZE? [return]
|
|
||||||
TERMINAL WIDTH? [return]
|
|
||||||
WANT SIN? [Y]
|
|
||||||
|
|
||||||
61911 BYTES FREE
|
|
||||||
|
|
||||||
BASIC VERSION 3.2
|
|
||||||
[4K VERSION]
|
|
||||||
|
|
||||||
OK
|
|
||||||
|
|
||||||
|
|
||||||
5.8 Altair 8k Basic
|
|
||||||
Running 8k Basic follows the procedure for 4k Basic.
|
|
||||||
|
|
||||||
sim> set cpu 8080 ;note 8k Basic will not run on a Z80 CPU
|
|
||||||
sim> set sio upper ;8k Basic does not like lower case letters as input
|
|
||||||
sim> set sio ansi ;8k Basic produces 8-bit output, strip to seven bits
|
|
||||||
sim> d sr 8 ;good setting for the Switch Register
|
|
||||||
sim> load 8kbas.bin 0 ;load it at 0
|
|
||||||
sim> go 0 ;and start it
|
|
||||||
MEMORY SIZE? [A]
|
|
||||||
|
|
||||||
WRITTEN FOR ROYALTIES BY MICRO-SOFT
|
|
||||||
|
|
||||||
MEMORY SIZE? [return]
|
|
||||||
TERMINAL WIDTH? [return]
|
|
||||||
WANT SIN-COS-TAN-ATN? [Y]
|
|
||||||
|
|
||||||
58756 BYTES FREE
|
|
||||||
ALTAIR BASIC REV. 4.0
|
|
||||||
[EIGHT-K VERSION]
|
|
||||||
COPYRIGHT 1976 BY MITS INC.
|
|
||||||
OK
|
|
||||||
|
|
||||||
|
|
||||||
5.9 Altair Basic 4.0
|
|
||||||
|
|
||||||
Execute the following commands to run Altair Extended Basic:
|
|
||||||
|
|
||||||
sim> set sio upper ;Extended Basic requires upper case input
|
|
||||||
sim> set sio ansi ;Extended Basic produces 8-bit output, strip to 7 bits
|
|
||||||
sim> d sr 8 ;good setting for the Switch Register
|
|
||||||
sim> load exbas.bin 0 ;load it at 0
|
|
||||||
sim> go 0 ;and start it
|
|
||||||
16384 Bytes loaded at 0.
|
|
||||||
|
|
||||||
MEMORY SIZE? [return]
|
|
||||||
WANT SIN-COS-TAN-ATN? [Y]
|
|
||||||
|
|
||||||
50606 BYTES FREE
|
|
||||||
ALTAIR BASIC REV. 4.0
|
|
||||||
[EXTENDED VERSION]
|
|
||||||
COPYRIGHT 1977 BY MITS INC.
|
|
||||||
OK
|
|
||||||
|
|
||||||
|
|
||||||
5.10 Altair Disk Extended Basic Version 300-5-C
|
|
||||||
|
|
||||||
This version of Basic was provided by Scott LaBombard. To execute use the
|
|
||||||
following commands:
|
|
||||||
|
|
||||||
sim> d tracks[0-7] 77 ;set to Altair settings
|
|
||||||
sim> at dsk extbas5.dsk
|
|
||||||
sim> g 0
|
|
||||||
|
|
||||||
MEMORY SIZE? [return]
|
|
||||||
LINEPRINTER? [C]
|
|
||||||
HIGHEST DISK NUMBER? [0]
|
|
||||||
HOW MANY FILES? [3]
|
|
||||||
HOW MANY RANDOM FILES? [3]
|
|
||||||
|
|
||||||
42082 BYTES FREE
|
|
||||||
|
|
||||||
ALTAIR DISK EXTENDED BASIC
|
|
||||||
VERSION 300-5-C [01NOV78]
|
|
||||||
COPYRIGHT 1978 BY MITS INC.
|
|
||||||
|
|
||||||
OK
|
|
||||||
|
|
||||||
|
|
||||||
6. Special simulator feature: Memory access breakpoints
|
|
||||||
|
|
||||||
In addition to the regular SIMH features such as PC queue, breakpoints
|
|
||||||
etc., this simulator supports memory access breakpoints. A memory access
|
|
||||||
breakpoint is triggered when a pre-defined memory location is accessed
|
|
||||||
(read, write or update). To set a memory location breakpoint enter
|
|
||||||
|
|
||||||
sim> break -m <location>
|
|
||||||
|
|
||||||
Execution will stop whenever an operation accesses <location>. Note that
|
|
||||||
a memory access breakpoint is not triggered by fetching code from memory
|
|
||||||
(this is the job of regular breakpoints). This feature has been implemented
|
|
||||||
by using the typing facility of the SIMH breakpoints.
|
|
||||||
|
|
||||||
|
|
||||||
7. Brief summary of all major changes to the original Altair simulator
|
|
||||||
- Full support for Z80. CP/M software requiring a Z80 CPU now runs
|
|
||||||
properly. DDTZ and PROLOGZ are included for demonstration purposes.
|
|
||||||
- Added banked memory support.
|
|
||||||
- PC queue implemented.
|
|
||||||
- Full assembler and dis-assembler support for Z80 and 8080 mnemonics.
|
|
||||||
Depending on the current setting of the CPU, the appropriate mnemonics
|
|
||||||
are used.
|
|
||||||
- The BOOT ROM was changed to fully load the software from disk. The
|
|
||||||
original code basically loaded a copy of itself from the disk and
|
|
||||||
executed it.
|
|
||||||
- ROM and memory size settings are now fully honored. This means that you
|
|
||||||
cannot write into the ROM or outside the defined RAM (e.g. when the RAM size
|
|
||||||
was truncated with the SET CPU commands). This feature allows programs which
|
|
||||||
check for the size of available RAM to run properly (e.g. 4k Basic). In
|
|
||||||
addition one can enable and disable the ROM which is useful in special cases
|
|
||||||
(e.g. when testing a new version of the ROM).
|
|
||||||
- The console can also be used via Telnet. This is useful when a terminal is
|
|
||||||
needed which supports cursor control such as a VT100. PROLOGZ for example
|
|
||||||
has a built-in screen editor which works under Telnet.
|
|
||||||
- Simplified file exchange for CP/M. Using the READ program under CP/M one
|
|
||||||
can easily import files into CP/M from the regular file system. Note that PIP
|
|
||||||
does not work properly on non-text files on PTR.
|
|
||||||
- The WRITE program can be used to transfer files from the CP/M environment to
|
|
||||||
the regular environment (binary or ASCII transfer).
|
|
||||||
- The last character read from PTR is always Control-Z (the EOF character for
|
|
||||||
CP/M). This makes sure that PIP (Peripheral Interchange Program on CP/M) will
|
|
||||||
terminate properly.
|
|
||||||
- Fixed a bug in the BIOS warm boot routine which caused CP/M to crash.
|
|
||||||
- Modified the BIOS for CP/M to support 8 disks.
|
|
||||||
- Added CP/M 3 banked version as sample software
|
|
||||||
- Changed from octal to hex
|
|
||||||
- Made the DSK and SIO device more robust (previously malicious code could
|
|
||||||
crash the simulator)
|
|
||||||
- Added memory access break points
|
|
||||||
- Added periodic timer interrupts (useful for MP/M)
|
|
||||||
- Added additional consoles (useful for MP/M)
|
|
||||||
- Added MP/M II banked version as sample software
|
|
||||||
|
|
@ -157,7 +157,7 @@ DEVICE hdsk_dev = {
|
||||||
/* Attach routine */
|
/* Attach routine */
|
||||||
t_stat hdsk_attach(UNIT *uptr, char *cptr) {
|
t_stat hdsk_attach(UNIT *uptr, char *cptr) {
|
||||||
t_stat r;
|
t_stat r;
|
||||||
int32 i;
|
uint32 i;
|
||||||
char unitChar;
|
char unitChar;
|
||||||
|
|
||||||
r = attach_unit(uptr, cptr); /* attach unit */
|
r = attach_unit(uptr, cptr); /* attach unit */
|
||||||
|
|
@ -211,10 +211,10 @@ t_stat hdsk_attach(UNIT *uptr, char *cptr) {
|
||||||
/* Step 4: Number of tracks is smallest number to accomodate capacity */
|
/* Step 4: Number of tracks is smallest number to accomodate capacity */
|
||||||
uptr -> HDSK_NUMBER_OF_TRACKS = (uptr -> capac + uptr -> HDSK_SECTORS_PER_TRACK *
|
uptr -> HDSK_NUMBER_OF_TRACKS = (uptr -> capac + uptr -> HDSK_SECTORS_PER_TRACK *
|
||||||
uptr -> HDSK_SECTOR_SIZE - 1) / (uptr -> HDSK_SECTORS_PER_TRACK * uptr -> HDSK_SECTOR_SIZE);
|
uptr -> HDSK_SECTOR_SIZE - 1) / (uptr -> HDSK_SECTORS_PER_TRACK * uptr -> HDSK_SECTOR_SIZE);
|
||||||
assert( ((uptr -> HDSK_NUMBER_OF_TRACKS - 1) * uptr -> HDSK_SECTORS_PER_TRACK *
|
assert( ( (t_addr) ((uptr -> HDSK_NUMBER_OF_TRACKS - 1) * uptr -> HDSK_SECTORS_PER_TRACK *
|
||||||
uptr -> HDSK_SECTOR_SIZE < uptr -> capac) &&
|
uptr -> HDSK_SECTOR_SIZE) < uptr -> capac) &&
|
||||||
(uptr -> capac <= uptr -> HDSK_NUMBER_OF_TRACKS *
|
(uptr -> capac <= (t_addr) (uptr -> HDSK_NUMBER_OF_TRACKS *
|
||||||
uptr -> HDSK_SECTORS_PER_TRACK * uptr -> HDSK_SECTOR_SIZE ) );
|
uptr -> HDSK_SECTORS_PER_TRACK * uptr -> HDSK_SECTOR_SIZE) ) );
|
||||||
return SCPE_OK;
|
return SCPE_OK;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -457,7 +457,7 @@ static int32 doSeek(void) {
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8 hdskbuf[HDSK_MAX_SECTOR_SIZE] = {}; /* data buffer */
|
uint8 hdskbuf[HDSK_MAX_SECTOR_SIZE] = { 0 }; /* data buffer */
|
||||||
|
|
||||||
static int32 doRead(void) {
|
static int32 doRead(void) {
|
||||||
int32 i;
|
int32 i;
|
||||||
|
|
|
||||||
|
|
@ -252,7 +252,7 @@ int32 netData(const int32 port, const int32 io, const int32 data) {
|
||||||
char result;
|
char result;
|
||||||
net_svc(&net_unit);
|
net_svc(&net_unit);
|
||||||
for (i = 0; i <= MAX_CONNECTIONS; i++)
|
for (i = 0; i <= MAX_CONNECTIONS; i++)
|
||||||
if (serviceDescriptor[i].Z80DataPort == port)
|
if (serviceDescriptor[i].Z80DataPort == port) {
|
||||||
if (io == 0) { /* IN */
|
if (io == 0) { /* IN */
|
||||||
if (serviceDescriptor[i].inputSize == 0) {
|
if (serviceDescriptor[i].inputSize == 0) {
|
||||||
printf("re-read from %i\r\n", port);
|
printf("re-read from %i\r\n", port);
|
||||||
|
|
@ -288,5 +288,6 @@ int32 netData(const int32 port, const int32 io, const int32 data) {
|
||||||
#endif
|
#endif
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
}
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -25,6 +25,7 @@
|
||||||
|
|
||||||
lpt line printer
|
lpt line printer
|
||||||
|
|
||||||
|
09-Jun-07 RMS Fixed lost last print line (from Theo Engel)
|
||||||
19-Jan-06 RMS Added UNIT_TEXT flag
|
19-Jan-06 RMS Added UNIT_TEXT flag
|
||||||
03-Apr-06 RMS Fixed bug in blanks backscanning (from Theo Engel)
|
03-Apr-06 RMS Fixed bug in blanks backscanning (from Theo Engel)
|
||||||
01-Dec-04 RMS Fixed bug in DMA/DMC support
|
01-Dec-04 RMS Fixed bug in DMA/DMC support
|
||||||
|
|
@ -294,20 +295,23 @@ if (lpt_dma) { /* DMA/DMC? */
|
||||||
}
|
}
|
||||||
else lpt_rdy = 1; /* IO, continue scan */
|
else lpt_rdy = 1; /* IO, continue scan */
|
||||||
if (lpt_dma && lpt_eor) SET_INT (INT_LPT); /* end of range? */
|
if (lpt_dma && lpt_eor) SET_INT (INT_LPT); /* end of range? */
|
||||||
if (lpt_svcst & LPT_SVCSH) { /* shuttling */
|
if (lpt_svcst & LPT_SVCSH) { /* shuttling? */
|
||||||
SET_INT (INT_LPT); /* interrupt */
|
SET_INT (INT_LPT); /* interrupt */
|
||||||
if (lpt_crpos == 0) lpt_prdn = 1;
|
if (lpt_crpos == 0) { /* done shuttling? */
|
||||||
|
for (i = LPT_WIDTH - 1; i >= 0; i--) { /* backscan for blanks */
|
||||||
|
if (lpt_buf[i] != ' ') break;
|
||||||
|
}
|
||||||
|
lpt_buf[i + 1] = 0;
|
||||||
|
fputs (lpt_buf, uptr->fileref); /* output buf */
|
||||||
|
uptr->pos = ftell (uptr->fileref); /* update pos */
|
||||||
|
for (i = 0; i < LPT_WIDTH; i++) lpt_buf[i] = ' '; /* clear buf */
|
||||||
|
lpt_prdn = 1; /* print done */
|
||||||
|
}
|
||||||
}
|
}
|
||||||
if (lpt_svcst & LPT_SVCPA) { /* paper advance */
|
if (lpt_svcst & LPT_SVCPA) { /* paper advance */
|
||||||
SET_INT (INT_LPT); /* interrupt */
|
SET_INT (INT_LPT); /* interrupt */
|
||||||
for (i = LPT_WIDTH - 1; i >= 0; i--) { /* backscan for blanks */
|
|
||||||
if (lpt_buf[i] != ' ') break;
|
|
||||||
}
|
|
||||||
lpt_buf[i + 1] = 0;
|
|
||||||
fputs (lpt_buf, uptr->fileref); /* output buf */
|
|
||||||
fputs (lpt_cc[lpt_svcch & 03], uptr->fileref); /* output eol */
|
fputs (lpt_cc[lpt_svcch & 03], uptr->fileref); /* output eol */
|
||||||
uptr->pos = ftell (uptr->fileref); /* update pos */
|
uptr->pos = ftell (uptr->fileref); /* update pos */
|
||||||
for (i = 0; i < LPT_WIDTH; i++) lpt_buf[i] = ' '; /* clear buf */
|
|
||||||
}
|
}
|
||||||
lpt_svcst = 0;
|
lpt_svcst = 0;
|
||||||
return SCPE_OK;
|
return SCPE_OK;
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* h316_mt.c: H316/516 magnetic tape simulator
|
/* h316_mt.c: H316/516 magnetic tape simulator
|
||||||
|
|
||||||
Copyright (c) 2003-2006, Robert M. Supnik
|
Copyright (c) 2003-2007, Robert M. Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -25,6 +25,7 @@
|
||||||
|
|
||||||
mt 516-4100 seven track magnetic tape
|
mt 516-4100 seven track magnetic tape
|
||||||
|
|
||||||
|
09-Jun-07 RMS Fixed bug in write without stop (from Theo Engel)
|
||||||
16-Feb-06 RMS Added tape capacity checking
|
16-Feb-06 RMS Added tape capacity checking
|
||||||
26-Aug-05 RMS Revised to use API for write lock check
|
26-Aug-05 RMS Revised to use API for write lock check
|
||||||
08-Feb-05 RMS Fixed error reporting from OCP (found by Philipp Hachtmann)
|
08-Feb-05 RMS Fixed error reporting from OCP (found by Philipp Hachtmann)
|
||||||
|
|
@ -431,6 +432,7 @@ switch (uptr->FNC) { /* case on function */
|
||||||
case FNC_WBIN3 | FNC_2ND:
|
case FNC_WBIN3 | FNC_2ND:
|
||||||
if (mt_eor || mt_rdy) { /* done or no data? */
|
if (mt_eor || mt_rdy) { /* done or no data? */
|
||||||
if (!mt_rdy) mt_wrwd (uptr, mt_buf); /* write last word */
|
if (!mt_rdy) mt_wrwd (uptr, mt_buf); /* write last word */
|
||||||
|
else mt_rdy = 0; /* rdy must be clr */
|
||||||
if (mt_ptr) { /* any data? */
|
if (mt_ptr) { /* any data? */
|
||||||
if (st = sim_tape_wrrecf (uptr, mtxb, mt_ptr)) /* write, err? */
|
if (st = sim_tape_wrrecf (uptr, mtxb, mt_ptr)) /* write, err? */
|
||||||
r = mt_map_err (uptr, st); /* map error */
|
r = mt_map_err (uptr, st); /* map error */
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* h316_stddev.c: Honeywell 316/516 standard devices
|
/* h316_stddev.c: Honeywell 316/516 standard devices
|
||||||
|
|
||||||
Copyright (c) 1999-2006, Robert M. Supnik
|
Copyright (c) 1999-2007, Robert M. Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -28,6 +28,7 @@
|
||||||
tty 316/516-33 teleprinter
|
tty 316/516-33 teleprinter
|
||||||
clk/options 316/516-12 real time clocks/internal options
|
clk/options 316/516-12 real time clocks/internal options
|
||||||
|
|
||||||
|
09-Jun-07 RMS Fixed bug in clock increment (found by Theo Engel)
|
||||||
30-Sep-06 RMS Fixed handling of non-printable characters in KSR mode
|
30-Sep-06 RMS Fixed handling of non-printable characters in KSR mode
|
||||||
03-Apr-06 RMS Fixed bugs in punch state handling (from Theo Engel)
|
03-Apr-06 RMS Fixed bugs in punch state handling (from Theo Engel)
|
||||||
22-Nov-05 RMS Revised for new terminal processing routines
|
22-Nov-05 RMS Revised for new terminal processing routines
|
||||||
|
|
@ -829,7 +830,7 @@ return dat;
|
||||||
t_stat clk_svc (UNIT *uptr)
|
t_stat clk_svc (UNIT *uptr)
|
||||||
{
|
{
|
||||||
|
|
||||||
M[M_CLK] = M[M_CLK + 1] & DMASK; /* increment mem ctr */
|
M[M_CLK] = (M[M_CLK] + 1) & DMASK; /* increment mem ctr */
|
||||||
if (M[M_CLK] == 0) SET_INT (INT_CLK); /* = 0? set flag */
|
if (M[M_CLK] == 0) SET_INT (INT_CLK); /* = 0? set flag */
|
||||||
sim_activate (&clk_unit, sim_rtc_calb (clk_tps)); /* reactivate */
|
sim_activate (&clk_unit, sim_rtc_calb (clk_tps)); /* reactivate */
|
||||||
return SCPE_OK;
|
return SCPE_OK;
|
||||||
|
|
|
||||||
|
|
@ -35,6 +35,7 @@
|
||||||
Cards are represented as ASCII text streams terminated by newlines.
|
Cards are represented as ASCII text streams terminated by newlines.
|
||||||
This allows cards to be created and edited as normal files.
|
This allows cards to be created and edited as normal files.
|
||||||
|
|
||||||
|
28-Jun-07 RMS Added support for SS overlap modifiers
|
||||||
19-Jan-07 RMS Added UNIT_TEXT flag
|
19-Jan-07 RMS Added UNIT_TEXT flag
|
||||||
20-Sep-05 RMS Revised for new code tables, compatible colbinary treatment
|
20-Sep-05 RMS Revised for new code tables, compatible colbinary treatment
|
||||||
30-Aug-05 RMS Fixed read, punch to ignore modifier on 1,4 char inst
|
30-Aug-05 RMS Fixed read, punch to ignore modifier on 1,4 char inst
|
||||||
|
|
@ -307,15 +308,16 @@ return SCPE_OK;
|
||||||
/* Select stack routine
|
/* Select stack routine
|
||||||
|
|
||||||
Modifiers have been checked by the caller
|
Modifiers have been checked by the caller
|
||||||
Modifiers are 1, 2, 4, 8 for the respective stack
|
Modifiers are 1, 2, 4, 8 for the respective stack,
|
||||||
|
or $, ., square for overlap control (ignored).
|
||||||
*/
|
*/
|
||||||
|
|
||||||
t_stat select_stack (int32 ilnt, int32 mod)
|
t_stat select_stack (int32 ilnt, int32 mod)
|
||||||
{
|
{
|
||||||
if (mod == 1) s1sel = 1;
|
if (mod == BCD_ONE) s1sel = 1;
|
||||||
else if (mod == 2) s2sel = 1;
|
else if (mod == BCD_TWO) s2sel = 1;
|
||||||
else if (mod == 4) s4sel = 1;
|
else if (mod == BCD_FOUR) s4sel = 1;
|
||||||
else if (mod == 8) s8sel = 1;
|
else if (mod == BCD_EIGHT) s8sel = 1;
|
||||||
return SCPE_OK;
|
return SCPE_OK;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* i1401_cpu.c: IBM 1401 CPU simulator
|
/* i1401_cpu.c: IBM 1401 CPU simulator
|
||||||
|
|
||||||
Copyright (c) 1993-2006, Robert M. Supnik
|
Copyright (c) 1993-2007, Robert M. Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -23,6 +23,8 @@
|
||||||
used in advertising or otherwise to promote the sale, use or other dealings
|
used in advertising or otherwise to promote the sale, use or other dealings
|
||||||
in this Software without prior written authorization from Robert M Supnik.
|
in this Software without prior written authorization from Robert M Supnik.
|
||||||
|
|
||||||
|
07-Jul-07 RMS Removed restriction on load-mode binary tape
|
||||||
|
28-Jun-07 RMS Added support for SS overlap modifiers
|
||||||
22-May-06 RMS Fixed format error in CPU history (found by Peter Schorn)
|
22-May-06 RMS Fixed format error in CPU history (found by Peter Schorn)
|
||||||
06-Mar-06 RMS Fixed bug in divide (found by Van Snyder)
|
06-Mar-06 RMS Fixed bug in divide (found by Van Snyder)
|
||||||
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
|
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
|
||||||
|
|
@ -489,7 +491,8 @@ static const int32 cry_table[100] = {
|
||||||
static const int32 r_mod[] = { BCD_C, -1 };
|
static const int32 r_mod[] = { BCD_C, -1 };
|
||||||
static const int32 p_mod[] = { BCD_C, -1 };
|
static const int32 p_mod[] = { BCD_C, -1 };
|
||||||
static const int32 w_mod[] = { BCD_S, BCD_SQUARE, -1 };
|
static const int32 w_mod[] = { BCD_S, BCD_SQUARE, -1 };
|
||||||
static const int32 ss_mod[] = { 1, 2, 4, 8, -1 };
|
static const int32 ss_mod[] = { BCD_ONE, BCD_TWO, BCD_FOUR, BCD_EIGHT,
|
||||||
|
BCD_DOLLAR, BCD_DECIMAL, BCD_SQUARE, -1 };
|
||||||
static const int32 mtf_mod[] = { BCD_B, BCD_E, BCD_M, BCD_R, BCD_U, -1 };
|
static const int32 mtf_mod[] = { BCD_B, BCD_E, BCD_M, BCD_R, BCD_U, -1 };
|
||||||
|
|
||||||
t_stat sim_instr (void)
|
t_stat sim_instr (void)
|
||||||
|
|
@ -1655,10 +1658,8 @@ t_stat iodisp (int32 dev, int32 unit, int32 flag, int32 mod)
|
||||||
if (dev == IO_INQ) return inq_io (flag, mod); /* inq terminal? */
|
if (dev == IO_INQ) return inq_io (flag, mod); /* inq terminal? */
|
||||||
if (dev == IO_DP) return dp_io (unit, flag, mod); /* disk pack? */
|
if (dev == IO_DP) return dp_io (unit, flag, mod); /* disk pack? */
|
||||||
if (dev == IO_MT) return mt_io (unit, flag, mod); /* magtape? */
|
if (dev == IO_MT) return mt_io (unit, flag, mod); /* magtape? */
|
||||||
if (dev == IO_MTB) { /* binary? */
|
if (dev == IO_MTB) /* binary magtape? */
|
||||||
if (flag == MD_WM) return STOP_INVM; /* invalid */
|
return mt_io (unit, flag | MD_BIN, mod);
|
||||||
return mt_io (unit, MD_BIN, mod);
|
|
||||||
}
|
|
||||||
return STOP_NXD; /* not implemented */
|
return STOP_NXD; /* not implemented */
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* i1401_defs.h: IBM 1401 simulator definitions
|
/* i1401_defs.h: IBM 1401 simulator definitions
|
||||||
|
|
||||||
Copyright (c) 1993-2005, Robert M. Supnik
|
Copyright (c) 1993-2007, Robert M. Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -23,6 +23,7 @@
|
||||||
used in advertising or otherwise to promote the sale, use or other dealings
|
used in advertising or otherwise to promote the sale, use or other dealings
|
||||||
in this Software without prior written authorization from Robert M Supnik.
|
in this Software without prior written authorization from Robert M Supnik.
|
||||||
|
|
||||||
|
28-Jun-07 RMS Defined character code for tape mark
|
||||||
14-Nov-04 RMS Added column binary support
|
14-Nov-04 RMS Added column binary support
|
||||||
27-Oct-04 RMS Added maximum instruction length
|
27-Oct-04 RMS Added maximum instruction length
|
||||||
16-Mar-03 RMS Fixed mnemonic for MCS
|
16-Mar-03 RMS Fixed mnemonic for MCS
|
||||||
|
|
@ -169,6 +170,7 @@
|
||||||
#define BCD_EIGHT 010
|
#define BCD_EIGHT 010
|
||||||
#define BCD_NINE 011
|
#define BCD_NINE 011
|
||||||
#define BCD_ZERO 012
|
#define BCD_ZERO 012
|
||||||
|
#define BCD_TAPMRK 017
|
||||||
#define BCD_ALT 020
|
#define BCD_ALT 020
|
||||||
#define BCD_S 022
|
#define BCD_S 022
|
||||||
#define BCD_U 024
|
#define BCD_U 024
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* i1401_mt.c: IBM 1401 magnetic tape simulator
|
/* i1401_mt.c: IBM 1401 magnetic tape simulator
|
||||||
|
|
||||||
Copyright (c) 1993-2006, Robert M. Supnik
|
Copyright (c) 1993-2007, Robert M. Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -25,6 +25,9 @@
|
||||||
|
|
||||||
mt 7-track magtape
|
mt 7-track magtape
|
||||||
|
|
||||||
|
07-Jul-07 RMS Removed restriction on load-mode binary tape
|
||||||
|
28-Jun-07 RMS Revised read tape mark behavior based on real hardware
|
||||||
|
(found by Van Snyder)
|
||||||
16-Feb-06 RMS Added tape capacity checking
|
16-Feb-06 RMS Added tape capacity checking
|
||||||
15-Sep-05 RMS Yet another fix to load read group mark plus word mark
|
15-Sep-05 RMS Yet another fix to load read group mark plus word mark
|
||||||
Added debug printouts (from Van Snyder)
|
Added debug printouts (from Van Snyder)
|
||||||
|
|
@ -242,6 +245,11 @@ switch (mod) {
|
||||||
wm_seen = 0; /* no word mk seen */
|
wm_seen = 0; /* no word mk seen */
|
||||||
st = sim_tape_rdrecf (uptr, dbuf, &tbc, MT_MAXFR); /* read rec */
|
st = sim_tape_rdrecf (uptr, dbuf, &tbc, MT_MAXFR); /* read rec */
|
||||||
if (st == MTSE_RECE) ind[IN_TAP] = 1; /* rec in error? */
|
if (st == MTSE_RECE) ind[IN_TAP] = 1; /* rec in error? */
|
||||||
|
else if (st == MTSE_TMK) { /* tape mark? */
|
||||||
|
ind[IN_END] = 1; /* set indicator */
|
||||||
|
tbc = 1; /* one char read */
|
||||||
|
dbuf[0] = BCD_TAPMRK; /* BCD tapemark */
|
||||||
|
}
|
||||||
else if (st != MTSE_OK) { /* stop on error */
|
else if (st != MTSE_OK) { /* stop on error */
|
||||||
if (DEBUG_PRS (mt_dev))
|
if (DEBUG_PRS (mt_dev))
|
||||||
fprintf (sim_deb, ", stopped by status = %d\n", st);
|
fprintf (sim_deb, ", stopped by status = %d\n", st);
|
||||||
|
|
@ -259,15 +267,17 @@ switch (mod) {
|
||||||
return SCPE_OK; /* done */
|
return SCPE_OK; /* done */
|
||||||
}
|
}
|
||||||
t = dbuf[i]; /* get char */
|
t = dbuf[i]; /* get char */
|
||||||
if ((flag != MD_BIN) && (t == BCD_ALT)) t = BCD_BLANK;
|
if (!(flag & MD_BIN) && (t == BCD_ALT)) /* BCD mode alt blank? */
|
||||||
if (flag == MD_WM) { /* word mk mode? */
|
t = BCD_BLANK; /* real blank */
|
||||||
if ((t == BCD_WM) && (wm_seen == 0)) wm_seen = WM;
|
if (flag & MD_WM) { /* word mk mode? */
|
||||||
|
if ((t == BCD_WM) && (wm_seen == 0)) /* WM char, none prev? */
|
||||||
|
wm_seen = WM; /* set flag */
|
||||||
else {
|
else {
|
||||||
M[BS] = wm_seen | (t & CHAR);
|
M[BS] = wm_seen | (t & CHAR); /* char + wm seen */
|
||||||
wm_seen = 0;
|
wm_seen = 0; /* clear flag */
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
else M[BS] = (M[BS] & WM) | (t & CHAR);
|
else M[BS] = (M[BS] & WM) | (t & CHAR); /* preserve mem WM */
|
||||||
if (!wm_seen) BS++;
|
if (!wm_seen) BS++;
|
||||||
if (ADDR_ERR (BS)) { /* check next BS */
|
if (ADDR_ERR (BS)) { /* check next BS */
|
||||||
BS = BA | (BS % MAXMEMSIZE);
|
BS = BA | (BS % MAXMEMSIZE);
|
||||||
|
|
@ -275,7 +285,7 @@ switch (mod) {
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
if (M[BS] != (BCD_GRPMRK + WM)) { /* not GM+WM at end? */
|
if (M[BS] != (BCD_GRPMRK + WM)) { /* not GM+WM at end? */
|
||||||
if (flag == MD_WM) M[BS] = BCD_GRPMRK; /* LCA: clear WM */
|
if (flag & MD_WM) M[BS] = BCD_GRPMRK; /* LCA: clear WM */
|
||||||
else M[BS] = (M[BS] & WM) | BCD_GRPMRK; /* MCW: save WM */
|
else M[BS] = (M[BS] & WM) | BCD_GRPMRK; /* MCW: save WM */
|
||||||
}
|
}
|
||||||
if (DEBUG_PRS (mt_dev))
|
if (DEBUG_PRS (mt_dev))
|
||||||
|
|
@ -294,8 +304,9 @@ switch (mod) {
|
||||||
fprintf (sim_deb, ">>MT%d: write from %d", unit, BS);
|
fprintf (sim_deb, ">>MT%d: write from %d", unit, BS);
|
||||||
ind[IN_TAP] = ind[IN_END] = 0; /* clear error */
|
ind[IN_TAP] = ind[IN_END] = 0; /* clear error */
|
||||||
for (tbc = 0; (t = M[BS++]) != (BCD_GRPMRK + WM); ) {
|
for (tbc = 0; (t = M[BS++]) != (BCD_GRPMRK + WM); ) {
|
||||||
if ((t & WM) && (flag == MD_WM)) dbuf[tbc++] = BCD_WM;
|
if ((t & WM) && (flag & MD_WM)) /* WM in wm mode? */
|
||||||
if (((t & CHAR) == BCD_BLANK) && (flag != MD_BIN))
|
dbuf[tbc++] = BCD_WM;
|
||||||
|
if (((t & CHAR) == BCD_BLANK) && !(flag & MD_BIN))
|
||||||
dbuf[tbc++] = BCD_ALT;
|
dbuf[tbc++] = BCD_ALT;
|
||||||
else dbuf[tbc++] = t & CHAR;
|
else dbuf[tbc++] = t & CHAR;
|
||||||
if (ADDR_ERR (BS)) { /* check next BS */
|
if (ADDR_ERR (BS)) { /* check next BS */
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* id_pas.c: Interdata programmable async line adapter simulator
|
/* id_pas.c: Interdata programmable async line adapter simulator
|
||||||
|
|
||||||
Copyright (c) 2001-2006, Robert M Supnik
|
Copyright (c) 2001-2007, Robert M Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -25,6 +25,7 @@
|
||||||
|
|
||||||
pas Programmable asynchronous line adapter(s)
|
pas Programmable asynchronous line adapter(s)
|
||||||
|
|
||||||
|
18-Jun-07 RMS Added UNIT_IDLE flag
|
||||||
18-Oct-06 RMS Synced PASLA to clock
|
18-Oct-06 RMS Synced PASLA to clock
|
||||||
22-Nov-05 RMS Revised for new terminal processing routines
|
22-Nov-05 RMS Revised for new terminal processing routines
|
||||||
29-Jun-05 RMS Added SET PASLn DISCONNECT
|
29-Jun-05 RMS Added SET PASLn DISCONNECT
|
||||||
|
|
@ -126,7 +127,7 @@ void pas_reset_ln (int32 i);
|
||||||
|
|
||||||
DIB pas_dib = { d_PAS, -1, v_PAS, pas_tplte, &pas, &pas_ini };
|
DIB pas_dib = { d_PAS, -1, v_PAS, pas_tplte, &pas, &pas_ini };
|
||||||
|
|
||||||
UNIT pas_unit = { UDATA (&pasi_svc, UNIT_ATTABLE, 0), 0 };
|
UNIT pas_unit = { UDATA (&pasi_svc, UNIT_ATTABLE|UNIT_IDLE, 0), 0 };
|
||||||
|
|
||||||
REG pas_nlreg = { DRDATA (NLINES, PAS_ENAB, 6), PV_LEFT };
|
REG pas_nlreg = { DRDATA (NLINES, PAS_ENAB, 6), PV_LEFT };
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* id_tt.c: Interdata teletype
|
/* id_tt.c: Interdata teletype
|
||||||
|
|
||||||
Copyright (c) 2000-2006, Robert M. Supnik
|
Copyright (c) 2000-2007, Robert M. Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -25,6 +25,7 @@
|
||||||
|
|
||||||
tt console
|
tt console
|
||||||
|
|
||||||
|
18-Jun-07 RMS Added UNIT_IDLE flag to console input
|
||||||
18-Oct-06 RMS Sync keyboard to LFC clock
|
18-Oct-06 RMS Sync keyboard to LFC clock
|
||||||
30-Sep-06 RMS Fixed handling of non-printable characters in KSR mode
|
30-Sep-06 RMS Fixed handling of non-printable characters in KSR mode
|
||||||
22-Nov-05 RMS Revised for new terminal processing routines
|
22-Nov-05 RMS Revised for new terminal processing routines
|
||||||
|
|
@ -77,7 +78,7 @@ t_stat tt_set_enbdis (UNIT *uptr, int32 val, char *cptr, void *desc);
|
||||||
DIB tt_dib = { d_TT, -1, v_TT, NULL, &tt, NULL };
|
DIB tt_dib = { d_TT, -1, v_TT, NULL, &tt, NULL };
|
||||||
|
|
||||||
UNIT tt_unit[] = {
|
UNIT tt_unit[] = {
|
||||||
{ UDATA (&tti_svc, TT_MODE_KSR, 0), 0 },
|
{ UDATA (&tti_svc, TT_MODE_KSR|UNIT_IDLE, 0), 0 },
|
||||||
{ UDATA (&tto_svc, TT_MODE_KSR, 0), SERIAL_OUT_WAIT }
|
{ UDATA (&tto_svc, TT_MODE_KSR, 0), SERIAL_OUT_WAIT }
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* id_ttp.c: Interdata PASLA console interface
|
/* id_ttp.c: Interdata PASLA console interface
|
||||||
|
|
||||||
Copyright (c) 2000-2006, Robert M. Supnik
|
Copyright (c) 2000-2007, Robert M. Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -25,6 +25,7 @@
|
||||||
|
|
||||||
ttp console (on PAS)
|
ttp console (on PAS)
|
||||||
|
|
||||||
|
18-Jun-07 RMS Added UNIT_IDLE flag to console input
|
||||||
18-Oct-06 RMS Sync keyboard to LFC clock
|
18-Oct-06 RMS Sync keyboard to LFC clock
|
||||||
22-Nov-05 RMS Revised for new terminal processing routines
|
22-Nov-05 RMS Revised for new terminal processing routines
|
||||||
29-Dec-03 RMS Added support for console backpressure
|
29-Dec-03 RMS Added support for console backpressure
|
||||||
|
|
@ -76,7 +77,7 @@ t_stat ttp_set_enbdis (UNIT *uptr, int32 val, char *cptr, void *desc);
|
||||||
DIB ttp_dib = { d_TTP, -1, v_TTP, ttp_tplte, &ttp, NULL };
|
DIB ttp_dib = { d_TTP, -1, v_TTP, ttp_tplte, &ttp, NULL };
|
||||||
|
|
||||||
UNIT ttp_unit[] = {
|
UNIT ttp_unit[] = {
|
||||||
{ UDATA (&ttpi_svc, 0, 0), 0 },
|
{ UDATA (&ttpi_svc, UNIT_IDLE, 0), 0 },
|
||||||
{ UDATA (&ttpo_svc, 0, 0), SERIAL_OUT_WAIT }
|
{ UDATA (&ttpo_svc, 0, 0), SERIAL_OUT_WAIT }
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* id_uvc.c: Interdata universal clock
|
/* id_uvc.c: Interdata universal clock
|
||||||
|
|
||||||
Copyright (c) 2001-2006, Robert M. Supnik
|
Copyright (c) 2001-2007, Robert M. Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -26,6 +26,7 @@
|
||||||
pic precision incremental clock
|
pic precision incremental clock
|
||||||
lfc line frequency clock
|
lfc line frequency clock
|
||||||
|
|
||||||
|
18-Jun-07 RMS Added UNIT_IDLE flag
|
||||||
18-Oct-06 RMS Changed LFC to be free running, export tmr_poll
|
18-Oct-06 RMS Changed LFC to be free running, export tmr_poll
|
||||||
23-Jul-05 RMS Fixed {} error in OC
|
23-Jul-05 RMS Fixed {} error in OC
|
||||||
01-Mar-03 RMS Added SET/SHOW LFC FREQ support
|
01-Mar-03 RMS Added SET/SHOW LFC FREQ support
|
||||||
|
|
@ -95,7 +96,7 @@ t_stat lfc_show_freq (FILE *st, UNIT *uptr, int32 val, void *desc);
|
||||||
|
|
||||||
DIB pic_dib = { d_PIC, -1, v_PIC, NULL, &pic, NULL };
|
DIB pic_dib = { d_PIC, -1, v_PIC, NULL, &pic, NULL };
|
||||||
|
|
||||||
UNIT pic_unit = { UDATA (&pic_svc, 0, 0), 1000 };
|
UNIT pic_unit = { UDATA (&pic_svc, UNIT_IDLE, 0), 1000 };
|
||||||
|
|
||||||
REG pic_reg[] = {
|
REG pic_reg[] = {
|
||||||
{ HRDATA (BUF, pic_db, 16) },
|
{ HRDATA (BUF, pic_db, 16) },
|
||||||
|
|
@ -140,7 +141,7 @@ DEVICE pic_dev = {
|
||||||
|
|
||||||
DIB lfc_dib = { d_LFC, -1, v_LFC, NULL, &lfc, NULL };
|
DIB lfc_dib = { d_LFC, -1, v_LFC, NULL, &lfc, NULL };
|
||||||
|
|
||||||
UNIT lfc_unit = { UDATA (&lfc_svc, 0, 0), 8333 };
|
UNIT lfc_unit = { UDATA (&lfc_svc, UNIT_IDLE, 0), 8333 };
|
||||||
|
|
||||||
REG lfc_reg[] = {
|
REG lfc_reg[] = {
|
||||||
{ FLDATA (IREQ, int_req[l_LFC], i_LFC) },
|
{ FLDATA (IREQ, int_req[l_LFC], i_LFC) },
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* pdp1_cpu.c: PDP-1 CPU simulator
|
/* pdp1_cpu.c: PDP-1 CPU simulator
|
||||||
|
|
||||||
Copyright (c) 1993-2006, Robert M. Supnik
|
Copyright (c) 1993-2007, Robert M. Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -25,6 +25,7 @@
|
||||||
|
|
||||||
cpu PDP-1 central processor
|
cpu PDP-1 central processor
|
||||||
|
|
||||||
|
30-May-07 RMS Fixed typo in SBS clear (from Norm Lastovica)
|
||||||
28-Dec-06 RMS Added 16-channel SBS support, PDP-1D support
|
28-Dec-06 RMS Added 16-channel SBS support, PDP-1D support
|
||||||
28-Jun-06 RMS Fixed bugs in MUS and DIV
|
28-Jun-06 RMS Fixed bugs in MUS and DIV
|
||||||
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
|
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
|
||||||
|
|
@ -534,7 +535,7 @@ if (cpu_unit.flags & UNIT_SBS) { /* 16-chan SBS? */
|
||||||
sbs = sbs & SB_ON; /* yes, only SB ON */
|
sbs = sbs & SB_ON; /* yes, only SB ON */
|
||||||
sbs_lvl = sbs_eval (); /* eval SBS system */
|
sbs_lvl = sbs_eval (); /* eval SBS system */
|
||||||
}
|
}
|
||||||
else sbs_lvl = sbs_req = sbs_enb = sbs_lvl = 0; /* no, clr SBS sys */
|
else sbs_lvl = sbs_req = sbs_enb = sbs_act = 0; /* no, clr SBS sys */
|
||||||
|
|
||||||
/* Main instruction fetch/decode loop: check events and interrupts */
|
/* Main instruction fetch/decode loop: check events and interrupts */
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* pdp10_fe.c: PDP-10 front end (console terminal) simulator
|
/* pdp10_fe.c: PDP-10 front end (console terminal) simulator
|
||||||
|
|
||||||
Copyright (c) 1993-2006, Robert M Supnik
|
Copyright (c) 1993-2007, Robert M Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -25,6 +25,7 @@
|
||||||
|
|
||||||
fe KS10 console front end
|
fe KS10 console front end
|
||||||
|
|
||||||
|
18-Jun-07 RMS Added UNIT_IDLE flag to console input
|
||||||
17-Oct-06 RMS Synced keyboard to clock for idling
|
17-Oct-06 RMS Synced keyboard to clock for idling
|
||||||
28-May-04 RMS Removed SET FE CTRL-C
|
28-May-04 RMS Removed SET FE CTRL-C
|
||||||
29-Dec-03 RMS Added console backpressure support
|
29-Dec-03 RMS Added console backpressure support
|
||||||
|
|
@ -58,7 +59,7 @@ t_stat fe_stop_os (UNIT *uptr, int32 val, char *cptr, void *desc);
|
||||||
#define feo_unit fe_unit[1]
|
#define feo_unit fe_unit[1]
|
||||||
|
|
||||||
UNIT fe_unit[] = {
|
UNIT fe_unit[] = {
|
||||||
{ UDATA (&fei_svc, 0, 0), 0 },
|
{ UDATA (&fei_svc, UNIT_IDLE, 0), 0 },
|
||||||
{ UDATA (&feo_svc, 0, 0), SERIAL_OUT_WAIT }
|
{ UDATA (&feo_svc, 0, 0), SERIAL_OUT_WAIT }
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* pdp10_tim.c: PDP-10 tim subsystem simulator
|
/* pdp10_tim.c: PDP-10 tim subsystem simulator
|
||||||
|
|
||||||
Copyright (c) 1993-2006, Robert M Supnik
|
Copyright (c) 1993-2007, Robert M Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -25,6 +25,7 @@
|
||||||
|
|
||||||
tim timer subsystem
|
tim timer subsystem
|
||||||
|
|
||||||
|
18-Jun-07 RMS Added UNIT_IDLE flag
|
||||||
03-Nov-06 RMS Rewritten to support idling
|
03-Nov-06 RMS Rewritten to support idling
|
||||||
29-Oct-06 RMS Added clock coscheduling function
|
29-Oct-06 RMS Added clock coscheduling function
|
||||||
02-Feb-04 RMS Exported variables needed by Ethernet simulator
|
02-Feb-04 RMS Exported variables needed by Ethernet simulator
|
||||||
|
|
@ -104,7 +105,7 @@ extern t_stat wr_nop (int32 data, int32 PA, int32 access);
|
||||||
|
|
||||||
DIB tcu_dib = { IOBA_TCU, IOLN_TCU, &tcu_rd, &wr_nop, 0 };
|
DIB tcu_dib = { IOBA_TCU, IOLN_TCU, &tcu_rd, &wr_nop, 0 };
|
||||||
|
|
||||||
UNIT tim_unit = { UDATA (&tim_svc, 0, 0), TIM_WAIT_T10 };
|
UNIT tim_unit = { UDATA (&tim_svc, UNIT_IDLE, 0), TIM_WAIT_T10 };
|
||||||
|
|
||||||
REG tim_reg[] = {
|
REG tim_reg[] = {
|
||||||
{ BRDATA (TIMEBASE, tim_base, 8, 36, 2) },
|
{ BRDATA (TIMEBASE, tim_base, 8, 36, 2) },
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* pdp11_dz.c: DZ11 terminal multiplexor simulator
|
/* pdp11_dz.c: DZ11 terminal multiplexor simulator
|
||||||
|
|
||||||
Copyright (c) 2001-2006, Robert M Supnik
|
Copyright (c) 2001-2007, Robert M Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -25,6 +25,7 @@
|
||||||
|
|
||||||
dz DZ11 terminal multiplexor
|
dz DZ11 terminal multiplexor
|
||||||
|
|
||||||
|
18-Jun-07 RMS Added UNIT_IDLE flag
|
||||||
29-Oct-06 RMS Synced poll and clock
|
29-Oct-06 RMS Synced poll and clock
|
||||||
22-Nov-05 RMS Revised for new terminal processing routines
|
22-Nov-05 RMS Revised for new terminal processing routines
|
||||||
07-Jul-05 RMS Removed extraneous externs
|
07-Jul-05 RMS Removed extraneous externs
|
||||||
|
|
@ -194,7 +195,7 @@ DIB dz_dib = {
|
||||||
2, IVCL (DZRX), VEC_DZRX, { &dz_rxinta, &dz_txinta }
|
2, IVCL (DZRX), VEC_DZRX, { &dz_rxinta, &dz_txinta }
|
||||||
};
|
};
|
||||||
|
|
||||||
UNIT dz_unit = { UDATA (&dz_svc, UNIT_ATTABLE + DZ_8B_DFLT, 0) };
|
UNIT dz_unit = { UDATA (&dz_svc, UNIT_IDLE|UNIT_ATTABLE|DZ_8B_DFLT, 0) };
|
||||||
|
|
||||||
REG dz_nlreg = { DRDATA (NLINES, dz_desc.lines, 6), PV_LEFT };
|
REG dz_nlreg = { DRDATA (NLINES, dz_desc.lines, 6), PV_LEFT };
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* pdp11_pclk.c: KW11P programmable clock simulator
|
/* pdp11_pclk.c: KW11P programmable clock simulator
|
||||||
|
|
||||||
Copyright (c) 1993-2005, Robert M Supnik
|
Copyright (c) 1993-2007, Robert M Supnik
|
||||||
Written by John Dundas, used with his gracious permission
|
Written by John Dundas, used with his gracious permission
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
|
|
@ -26,6 +26,7 @@
|
||||||
|
|
||||||
pclk KW11P line frequency clock
|
pclk KW11P line frequency clock
|
||||||
|
|
||||||
|
18-Jun-07 RMS Added UNIT_IDLE flag
|
||||||
07-Jul-05 RMS Removed extraneous externs
|
07-Jul-05 RMS Removed extraneous externs
|
||||||
|
|
||||||
KW11-P Programmable Clock
|
KW11-P Programmable Clock
|
||||||
|
|
@ -154,7 +155,7 @@ DIB pclk_dib = {
|
||||||
1, IVCL (PCLK), VEC_PCLK, { NULL }
|
1, IVCL (PCLK), VEC_PCLK, { NULL }
|
||||||
};
|
};
|
||||||
|
|
||||||
UNIT pclk_unit = { UDATA (&pclk_svc, 0, 0) };
|
UNIT pclk_unit = { UDATA (&pclk_svc, UNIT_IDLE, 0) };
|
||||||
|
|
||||||
REG pclk_reg[] = {
|
REG pclk_reg[] = {
|
||||||
{ ORDATA (CSR, pclk_csr, 16) },
|
{ ORDATA (CSR, pclk_csr, 16) },
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* pdp11_rh.c: PDP-11 Massbus adapter simulator
|
/* pdp11_rh.c: PDP-11 Massbus adapter simulator
|
||||||
|
|
||||||
Copyright (c) 2005, Robert M Supnik
|
Copyright (c) 2005-2007, Robert M Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -25,6 +25,7 @@
|
||||||
|
|
||||||
rha, rhb RH11/RH70 Massbus adapter
|
rha, rhb RH11/RH70 Massbus adapter
|
||||||
|
|
||||||
|
17-May-07 RMS Moved CS1 drive enable to devices
|
||||||
21-Nov-05 RMS Added enable/disable routine
|
21-Nov-05 RMS Added enable/disable routine
|
||||||
07-Jul-05 RMS Removed extraneous externs
|
07-Jul-05 RMS Removed extraneous externs
|
||||||
|
|
||||||
|
|
@ -69,7 +70,6 @@
|
||||||
#define CS1_V_UAE 8 /* Unibus addr ext */
|
#define CS1_V_UAE 8 /* Unibus addr ext */
|
||||||
#define CS1_M_UAE 03
|
#define CS1_M_UAE 03
|
||||||
#define CS1_UAE (CS1_M_UAE << CS1_V_UAE)
|
#define CS1_UAE (CS1_M_UAE << CS1_V_UAE)
|
||||||
#define CS1_DVA 0004000 /* drive avail NI */
|
|
||||||
#define CS1_MCPE 0020000 /* Mbus par err NI */
|
#define CS1_MCPE 0020000 /* Mbus par err NI */
|
||||||
#define CS1_TRE 0040000 /* transfer err */
|
#define CS1_TRE 0040000 /* transfer err */
|
||||||
#define CS1_SC 0100000 /* special cond */
|
#define CS1_SC 0100000 /* special cond */
|
||||||
|
|
@ -644,7 +644,7 @@ void mba_upd_cs1 (uint32 set, uint32 clr, uint32 mb)
|
||||||
if (mb >= MBA_NUM) return;
|
if (mb >= MBA_NUM) return;
|
||||||
if ((set & ~massbus[mb].cs1) & CS1_DONE) /* DONE 0 to 1? */
|
if ((set & ~massbus[mb].cs1) & CS1_DONE) /* DONE 0 to 1? */
|
||||||
massbus[mb].iff = (massbus[mb].cs1 & CS1_IE)? 1: 0; /* CSTB INTR <- IE */
|
massbus[mb].iff = (massbus[mb].cs1 & CS1_IE)? 1: 0; /* CSTB INTR <- IE */
|
||||||
massbus[mb].cs1 = (massbus[mb].cs1 & ~(clr | CS1_MCPE | CS1_MBZ | CS1_DRV)) | CS1_DVA | set;
|
massbus[mb].cs1 = (massbus[mb].cs1 & ~(clr | CS1_MCPE | CS1_MBZ | CS1_DRV)) | set;
|
||||||
if (massbus[mb].cs2 & CS2_ERR) massbus[mb].cs1 = massbus[mb].cs1 | CS1_TRE | CS1_SC;
|
if (massbus[mb].cs2 & CS2_ERR) massbus[mb].cs1 = massbus[mb].cs1 | CS1_TRE | CS1_SC;
|
||||||
else if (massbus[mb].cs1 & CS1_TRE) massbus[mb].cs1 = massbus[mb].cs1 | CS1_SC;
|
else if (massbus[mb].cs1 & CS1_TRE) massbus[mb].cs1 = massbus[mb].cs1 | CS1_SC;
|
||||||
if (massbus[mb].iff ||
|
if (massbus[mb].iff ||
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* pdp11_rp.c - RP04/05/06/07 RM02/03/05/80 Massbus disk controller
|
/* pdp11_rp.c - RP04/05/06/07 RM02/03/05/80 Massbus disk controller
|
||||||
|
|
||||||
Copyright (c) 1993-2005, Robert M Supnik
|
Copyright (c) 1993-2007, Robert M Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -25,6 +25,7 @@
|
||||||
|
|
||||||
rp RH/RP/RM moving head disks
|
rp RH/RP/RM moving head disks
|
||||||
|
|
||||||
|
17-May-07 RMS CS1 DVA resides in device, not MBA
|
||||||
21-Nov-05 RMS Enable/disable device also enables/disables Massbus adapter
|
21-Nov-05 RMS Enable/disable device also enables/disables Massbus adapter
|
||||||
12-Nov-05 RMS Fixed DriveClear, does not clear disk address
|
12-Nov-05 RMS Fixed DriveClear, does not clear disk address
|
||||||
16-Aug-05 RMS Fixed C++ declaration and cast problems
|
16-Aug-05 RMS Fixed C++ declaration and cast problems
|
||||||
|
|
@ -119,6 +120,7 @@
|
||||||
#define FNC_READ 034 /* read */
|
#define FNC_READ 034 /* read */
|
||||||
#define FNC_READH 035 /* read w/ headers */
|
#define FNC_READH 035 /* read w/ headers */
|
||||||
#define CS1_RW 076
|
#define CS1_RW 076
|
||||||
|
#define CS1_DVA 04000 /* drive avail */
|
||||||
#define GET_FNC(x) (((x) >> CS1_V_FNC) & CS1_M_FNC)
|
#define GET_FNC(x) (((x) >> CS1_V_FNC) & CS1_M_FNC)
|
||||||
|
|
||||||
/* RPDS, RMDS - drive status - offset 1 */
|
/* RPDS, RMDS - drive status - offset 1 */
|
||||||
|
|
@ -498,7 +500,7 @@ if (drv_tab[dtype].ctrl == RM_CTRL) ofs = ofs + RM_OF; /* RM? convert */
|
||||||
switch (ofs) { /* decode offset */
|
switch (ofs) { /* decode offset */
|
||||||
|
|
||||||
case RP_CS1_OF: case RM_CS1_OF: /* RPCS1 */
|
case RP_CS1_OF: case RM_CS1_OF: /* RPCS1 */
|
||||||
val = rpcs1[drv] & CS1_RW;
|
val = (rpcs1[drv] & CS1_RW) | CS1_DVA; /* DVA always set */
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case RP_DA_OF: case RM_DA_OF: /* RPDA */
|
case RP_DA_OF: case RM_DA_OF: /* RPDA */
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* pdp11_rq.c: MSCP disk controller simulator
|
/* pdp11_rq.c: MSCP disk controller simulator
|
||||||
|
|
||||||
Copyright (c) 2002-2005, Robert M Supnik
|
Copyright (c) 2002-2007, Robert M Supnik
|
||||||
Derived from work by Stephen F. Shirron
|
Derived from work by Stephen F. Shirron
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
|
|
@ -26,6 +26,7 @@
|
||||||
|
|
||||||
rq RQDX3 disk controller
|
rq RQDX3 disk controller
|
||||||
|
|
||||||
|
18-Jun-07 RMS Added UNIT_IDLE flag to timer thread
|
||||||
31-Oct-05 RMS Fixed address width for large files
|
31-Oct-05 RMS Fixed address width for large files
|
||||||
16-Aug-05 RMS Fixed C++ declaration and cast problems
|
16-Aug-05 RMS Fixed C++ declaration and cast problems
|
||||||
22-Jul-05 RMS Fixed warning from Solaris C (from Doug Gwyn)
|
22-Jul-05 RMS Fixed warning from Solaris C (from Doug Gwyn)
|
||||||
|
|
@ -658,7 +659,7 @@ UNIT rq_unit[] = {
|
||||||
(RD54_DTYPE << UNIT_V_DTYPE), RQ_SIZE (RD54)) },
|
(RD54_DTYPE << UNIT_V_DTYPE), RQ_SIZE (RD54)) },
|
||||||
{ UDATA (&rq_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+UNIT_ROABLE+
|
{ UDATA (&rq_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+UNIT_ROABLE+
|
||||||
(RX50_DTYPE << UNIT_V_DTYPE), RQ_SIZE (RX50)) },
|
(RX50_DTYPE << UNIT_V_DTYPE), RQ_SIZE (RX50)) },
|
||||||
{ UDATA (&rq_tmrsvc, UNIT_DIS, 0) },
|
{ UDATA (&rq_tmrsvc, UNIT_IDLE|UNIT_DIS, 0) },
|
||||||
{ UDATA (&rq_quesvc, UNIT_DIS, 0) }
|
{ UDATA (&rq_quesvc, UNIT_DIS, 0) }
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* pdp11_stddev.c: PDP-11 standard I/O devices simulator
|
/* pdp11_stddev.c: PDP-11 standard I/O devices simulator
|
||||||
|
|
||||||
Copyright (c) 1993-2006, Robert M Supnik
|
Copyright (c) 1993-2007, Robert M Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -26,6 +26,7 @@
|
||||||
tti,tto DL11 terminal input/output
|
tti,tto DL11 terminal input/output
|
||||||
clk KW11L (and other) line frequency clock
|
clk KW11L (and other) line frequency clock
|
||||||
|
|
||||||
|
18-Jun-07 RMS Added UNIT_IDLE flag to console input, clock
|
||||||
29-Oct-06 RMS Synced keyboard and clock
|
29-Oct-06 RMS Synced keyboard and clock
|
||||||
Added clock coscheduling support
|
Added clock coscheduling support
|
||||||
05-Jul-06 RMS Added UC only support for early DOS/RSTS
|
05-Jul-06 RMS Added UC only support for early DOS/RSTS
|
||||||
|
|
@ -109,7 +110,7 @@ DIB tti_dib = {
|
||||||
1, IVCL (TTI), VEC_TTI, { NULL }
|
1, IVCL (TTI), VEC_TTI, { NULL }
|
||||||
};
|
};
|
||||||
|
|
||||||
UNIT tti_unit = { UDATA (&tti_svc, 0, 0), 0 };
|
UNIT tti_unit = { UDATA (&tti_svc, UNIT_IDLE, 0), 0 };
|
||||||
|
|
||||||
REG tti_reg[] = {
|
REG tti_reg[] = {
|
||||||
{ ORDATA (BUF, tti_unit.buf, 8) },
|
{ ORDATA (BUF, tti_unit.buf, 8) },
|
||||||
|
|
@ -201,7 +202,7 @@ DIB clk_dib = {
|
||||||
1, IVCL (CLK), VEC_CLK, { &clk_inta }
|
1, IVCL (CLK), VEC_CLK, { &clk_inta }
|
||||||
};
|
};
|
||||||
|
|
||||||
UNIT clk_unit = { UDATA (&clk_svc, 0, 0), 8000 };
|
UNIT clk_unit = { UDATA (&clk_svc, UNIT_IDLE, 0), 8000 };
|
||||||
|
|
||||||
REG clk_reg[] = {
|
REG clk_reg[] = {
|
||||||
{ ORDATA (CSR, clk_csr, 16) },
|
{ ORDATA (CSR, clk_csr, 16) },
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* pdp11_tq.c: TMSCP tape controller simulator
|
/* pdp11_tq.c: TMSCP tape controller simulator
|
||||||
|
|
||||||
Copyright (c) 2002-2006, Robert M Supnik
|
Copyright (c) 2002-2007, Robert M Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -25,6 +25,7 @@
|
||||||
|
|
||||||
tq TQK50 tape controller
|
tq TQK50 tape controller
|
||||||
|
|
||||||
|
18-Jun-07 RMS Added UNIT_IDLE flag to timer thread
|
||||||
16-Feb-06 RMS Revised for new magtape capacity checking
|
16-Feb-06 RMS Revised for new magtape capacity checking
|
||||||
31-Oct-05 RMS Fixed address width for large files
|
31-Oct-05 RMS Fixed address width for large files
|
||||||
16-Aug-05 RMS Fixed C++ declaration and cast problems
|
16-Aug-05 RMS Fixed C++ declaration and cast problems
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* pdp11_tu.c - PDP-11 TM02/TU16 TM03/TU45/TU77 Massbus magnetic tape controller
|
/* pdp11_tu.c - PDP-11 TM02/TU16 TM03/TU45/TU77 Massbus magnetic tape controller
|
||||||
|
|
||||||
Copyright (c) 1993-2006, Robert M Supnik
|
Copyright (c) 1993-2007, Robert M Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -25,6 +25,7 @@
|
||||||
|
|
||||||
tu TM02/TM03 magtape
|
tu TM02/TM03 magtape
|
||||||
|
|
||||||
|
17-May-07 RMS CS1 DVA resides in device, not MBA
|
||||||
29-Apr-07 RMS Fixed bug in setting FCE on TMK (found by Naoki Hamada)
|
29-Apr-07 RMS Fixed bug in setting FCE on TMK (found by Naoki Hamada)
|
||||||
16-Feb-06 RMS Added tape capacity checking
|
16-Feb-06 RMS Added tape capacity checking
|
||||||
12-Nov-05 RMS Changed default formatter to TM03 (for VMS)
|
12-Nov-05 RMS Changed default formatter to TM03 (for VMS)
|
||||||
|
|
@ -106,6 +107,7 @@
|
||||||
#define FNC_READF 034 /* read forward */
|
#define FNC_READF 034 /* read forward */
|
||||||
#define FNC_READR 037 /* read reverse */
|
#define FNC_READR 037 /* read reverse */
|
||||||
#define CS1_RW 077
|
#define CS1_RW 077
|
||||||
|
#define CS1_DVA 04000 /* drive avail */
|
||||||
#define GET_FNC(x) (((x) >> CS1_V_FNC) & CS1_M_FNC)
|
#define GET_FNC(x) (((x) >> CS1_V_FNC) & CS1_M_FNC)
|
||||||
|
|
||||||
/* TUFS - formatter status - offset 1
|
/* TUFS - formatter status - offset 1
|
||||||
|
|
@ -339,7 +341,7 @@ tu_update_fs (0, drv); /* update status */
|
||||||
switch (ofs) { /* decode offset */
|
switch (ofs) { /* decode offset */
|
||||||
|
|
||||||
case CS1_OF: /* MTCS1 */
|
case CS1_OF: /* MTCS1 */
|
||||||
*data = tucs1 & CS1_RW;
|
*data = (tucs1 & CS1_RW) | CS1_DVA; /* DVA always set */
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case FC_OF: /* MTFC */
|
case FC_OF: /* MTFC */
|
||||||
|
|
|
||||||
|
|
@ -26,6 +26,7 @@
|
||||||
|
|
||||||
vh DHQ11 asynch multiplexor for SIMH
|
vh DHQ11 asynch multiplexor for SIMH
|
||||||
|
|
||||||
|
18-Jun-07 RMS Added UNIT_IDLE flag
|
||||||
29-Oct-06 RMS Synced poll and clock
|
29-Oct-06 RMS Synced poll and clock
|
||||||
07-Jul-05 RMS Removed extraneous externs
|
07-Jul-05 RMS Removed extraneous externs
|
||||||
15-Jun-05 RMS Revised for new autoconfigure interface
|
15-Jun-05 RMS Revised for new autoconfigure interface
|
||||||
|
|
@ -316,10 +317,10 @@ static DIB vh_dib = {
|
||||||
};
|
};
|
||||||
|
|
||||||
static UNIT vh_unit[VH_MUXES] = {
|
static UNIT vh_unit[VH_MUXES] = {
|
||||||
{ UDATA (&vh_svc, UNIT_ATTABLE, 0) },
|
{ UDATA (&vh_svc, UNIT_IDLE|UNIT_ATTABLE, 0) },
|
||||||
{ UDATA (&vh_svc, UNIT_ATTABLE, 0) },
|
{ UDATA (&vh_svc, UNIT_IDLE|UNIT_ATTABLE, 0) },
|
||||||
{ UDATA (&vh_svc, UNIT_ATTABLE, 0) },
|
{ UDATA (&vh_svc, UNIT_IDLE|UNIT_ATTABLE, 0) },
|
||||||
{ UDATA (&vh_svc, UNIT_ATTABLE, 0) },
|
{ UDATA (&vh_svc, UNIT_IDLE|UNIT_ATTABLE, 0) },
|
||||||
};
|
};
|
||||||
|
|
||||||
static const REG vh_nlreg = { DRDATA (NLINES, vh_desc.lines, 6), PV_LEFT };
|
static const REG vh_nlreg = { DRDATA (NLINES, vh_desc.lines, 6), PV_LEFT };
|
||||||
|
|
|
||||||
|
|
@ -1,7 +1,7 @@
|
||||||
/* pdp11_xq.c: DEQNA/DELQA ethernet controller simulator
|
/* pdp11_xq.c: DEQNA/DELQA ethernet controller simulator
|
||||||
------------------------------------------------------------------------------
|
------------------------------------------------------------------------------
|
||||||
|
|
||||||
Copyright (c) 2002-2006, David T. Hittner
|
Copyright (c) 2002-2007, David T. Hittner
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -66,6 +66,7 @@
|
||||||
|
|
||||||
Modification history:
|
Modification history:
|
||||||
|
|
||||||
|
18-Jun-07 RMS Added UNIT_IDLE flag
|
||||||
29-Oct-06 RMS Synced poll and clock
|
29-Oct-06 RMS Synced poll and clock
|
||||||
27-Jan-06 RMS Fixed unaligned accesses in XQB (found by Doug Carman)
|
27-Jan-06 RMS Fixed unaligned accesses in XQB (found by Doug Carman)
|
||||||
07-Jan-06 RMS Fixed unaligned access bugs (found by Doug Carman)
|
07-Jan-06 RMS Fixed unaligned access bugs (found by Doug Carman)
|
||||||
|
|
@ -273,7 +274,7 @@ DIB xqa_dib = { IOBA_XQ, IOLN_XQ, &xq_rd, &xq_wr,
|
||||||
1, IVCL (XQ), 0, { &xq_int } };
|
1, IVCL (XQ), 0, { &xq_int } };
|
||||||
|
|
||||||
UNIT xqa_unit[] = {
|
UNIT xqa_unit[] = {
|
||||||
{ UDATA (&xq_svc, UNIT_ATTABLE + UNIT_DISABLE, 2047) }, /* receive timer */
|
{ UDATA (&xq_svc, UNIT_IDLE|UNIT_ATTABLE|UNIT_DISABLE, 2047) }, /* receive timer */
|
||||||
};
|
};
|
||||||
|
|
||||||
REG xqa_reg[] = {
|
REG xqa_reg[] = {
|
||||||
|
|
@ -304,7 +305,7 @@ DIB xqb_dib = { IOBA_XQB, IOLN_XQB, &xq_rd, &xq_wr,
|
||||||
1, IVCL (XQ), 0, { &xq_int } };
|
1, IVCL (XQ), 0, { &xq_int } };
|
||||||
|
|
||||||
UNIT xqb_unit[] = {
|
UNIT xqb_unit[] = {
|
||||||
{ UDATA (&xq_svc, UNIT_ATTABLE + UNIT_DISABLE, 2047) }, /* receive timer */
|
{ UDATA (&xq_svc, UNIT_IDLE|UNIT_ATTABLE|UNIT_DISABLE, 2047) }, /* receive timer */
|
||||||
};
|
};
|
||||||
|
|
||||||
REG xqb_reg[] = {
|
REG xqb_reg[] = {
|
||||||
|
|
|
||||||
|
|
@ -1,7 +1,7 @@
|
||||||
/* pdp11_xu.c: DEUNA/DELUA ethernet controller simulator
|
/* pdp11_xu.c: DEUNA/DELUA ethernet controller simulator
|
||||||
------------------------------------------------------------------------------
|
------------------------------------------------------------------------------
|
||||||
|
|
||||||
Copyright (c) 2003-2006, David T. Hittner
|
Copyright (c) 2003-2007, David T. Hittner
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -34,34 +34,29 @@
|
||||||
|
|
||||||
Testing performed:
|
Testing performed:
|
||||||
1) Receives/Transmits single packet under custom RSX driver
|
1) Receives/Transmits single packet under custom RSX driver
|
||||||
2) Passes RSTS 10.1 controller diagnostics during boot
|
2) Passes RSTS 10.1 controller probe diagnostics during boot
|
||||||
3) VMS 7.2 on VAX780 summary:
|
3) VMS 7.2 on VAX780 summary:
|
||||||
(May/2007: WinXP x64 host; MS VC++ 2005; SIMH v3.7-0 base; WinPcap 4.0)
|
(May/2007: WinXP x64 host; MS VC++ 2005; SIMH v3.7-0 base; WinPcap 4.0)
|
||||||
LAT - SET HOST/LAT in/out
|
LAT - SET HOST/LAT in/out
|
||||||
DECNET - SET HOST in/out, COPY in/out
|
DECNET - SET HOST in/out, COPY in/out
|
||||||
TCP/IP - PING in/out; SET HOST/TELNET out, COPY/FTP out
|
TCP/IP - PING in/out; SET HOST/TELNET in/out, COPY/FTP in/out
|
||||||
- can't seem to connect in
|
|
||||||
- possible TCPIP v5.0 misconfiguration?
|
|
||||||
- issues with host WinXP firewall or Domain policy?
|
|
||||||
Clustering - Successfully clustered with AlphaVMS 8.2
|
Clustering - Successfully clustered with AlphaVMS 8.2
|
||||||
- no hangs or offlines, some odd delays and jerkiness
|
|
||||||
- out-of-order ring messages causing retransmits?
|
|
||||||
- caused by ping times (min/avg/max) of 2/7/16 ms?
|
|
||||||
4) Runs VAX EVDWA diagnostic tests 1-10; tests 11-19 (M68000/ROM/RAM) fail
|
4) Runs VAX EVDWA diagnostic tests 1-10; tests 11-19 (M68000/ROM/RAM) fail
|
||||||
|
|
||||||
Known issues:
|
Known issues:
|
||||||
1) Transmit/Receive rings have not been thoroughly tested,
|
1) Most auxiliary commands are not implemented yet.
|
||||||
particularly when and where the ring pointers get reset.
|
2) System_ID broadcast is not implemented.
|
||||||
2) Most auxiliary commands are not implemented yet.
|
3) There are residual Map_ReadB and Map_WriteB from the FvK version that
|
||||||
3) System_ID broadcast is not implemented.
|
|
||||||
4) Error/Interrupt signalling is still iffy from merge of FvK and sim_ether.
|
|
||||||
5) There are residual Map_ReadB and Map_WriteB from the FvK version that
|
|
||||||
probably need to be converted to Map_ReadW and Map_WriteW calls.
|
probably need to be converted to Map_ReadW and Map_WriteW calls.
|
||||||
|
4) Some jerkiness seen during interactive I/O with remote systems;
|
||||||
|
this is probably attributable to changed polling times from when
|
||||||
|
the poll duration was standardized for idling support.
|
||||||
|
|
||||||
------------------------------------------------------------------------------
|
------------------------------------------------------------------------------
|
||||||
|
|
||||||
Modification history:
|
Modification history:
|
||||||
|
|
||||||
|
18-Jun-07 RMS Added UNIT_IDLE flag
|
||||||
03-May-07 DTH Added missing FC_RMAL command; cleared multicast on write
|
03-May-07 DTH Added missing FC_RMAL command; cleared multicast on write
|
||||||
29-Oct-06 RMS Synced poll and clock
|
29-Oct-06 RMS Synced poll and clock
|
||||||
08-Dec-05 DTH Implemented ancilliary functions 022/023/024/025
|
08-Dec-05 DTH Implemented ancilliary functions 022/023/024/025
|
||||||
|
|
@ -122,7 +117,7 @@ DIB xua_dib = { IOBA_XU, IOLN_XU, &xu_rd, &xu_wr,
|
||||||
1, IVCL (XU), VEC_XU, {&xu_int} };
|
1, IVCL (XU), VEC_XU, {&xu_int} };
|
||||||
|
|
||||||
UNIT xua_unit[] = {
|
UNIT xua_unit[] = {
|
||||||
{ UDATA (&xu_svc, UNIT_ATTABLE + UNIT_DISABLE, 0) } /* receive timer */
|
{ UDATA (&xu_svc, UNIT_IDLE|UNIT_ATTABLE|UNIT_DISABLE, 0) } /* receive timer */
|
||||||
};
|
};
|
||||||
|
|
||||||
struct xu_device xua = {
|
struct xu_device xua = {
|
||||||
|
|
@ -183,7 +178,7 @@ DIB xub_dib = { IOBA_XUB, IOLN_XUB, &xu_rd, &xu_wr,
|
||||||
1, IVCL (XU), 0, { &xu_int } };
|
1, IVCL (XU), 0, { &xu_int } };
|
||||||
|
|
||||||
UNIT xub_unit[] = {
|
UNIT xub_unit[] = {
|
||||||
{ UDATA (&xu_svc, UNIT_ATTABLE + UNIT_DISABLE, 0) } /* receive timer */
|
{ UDATA (&xu_svc, UNIT_IDLE|UNIT_ATTABLE|UNIT_DISABLE, 0) } /* receive timer */
|
||||||
};
|
};
|
||||||
|
|
||||||
struct xu_device xub = {
|
struct xu_device xub = {
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* pdp18b_stddev.c: 18b PDP's standard devices
|
/* pdp18b_stddev.c: 18b PDP's standard devices
|
||||||
|
|
||||||
Copyright (c) 1993-2006, Robert M Supnik
|
Copyright (c) 1993-2007, Robert M Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -29,6 +29,7 @@
|
||||||
tto teleprinter
|
tto teleprinter
|
||||||
clk clock
|
clk clock
|
||||||
|
|
||||||
|
18-Jun-07 RMS Added UNIT_IDLE to console input, clock
|
||||||
18-Oct-06 RMS Added PDP-15 programmable duplex control
|
18-Oct-06 RMS Added PDP-15 programmable duplex control
|
||||||
Fixed handling of non-printable characters in KSR mode
|
Fixed handling of non-printable characters in KSR mode
|
||||||
Changed clock to be free-running
|
Changed clock to be free-running
|
||||||
|
|
@ -167,7 +168,7 @@ extern int32 upd_iors (void);
|
||||||
|
|
||||||
DIB clk_dib = { 0, 0, &clk_iors, { NULL } };
|
DIB clk_dib = { 0, 0, &clk_iors, { NULL } };
|
||||||
|
|
||||||
UNIT clk_unit = { UDATA (&clk_svc, 0, 0), 16000 };
|
UNIT clk_unit = { UDATA (&clk_svc, UNIT_IDLE, 0), 16000 };
|
||||||
|
|
||||||
REG clk_reg[] = {
|
REG clk_reg[] = {
|
||||||
{ FLDATA (INT, int_hwre[API_CLK], INT_V_CLK) },
|
{ FLDATA (INT, int_hwre[API_CLK], INT_V_CLK) },
|
||||||
|
|
@ -309,7 +310,7 @@ DEVICE ptp_dev = {
|
||||||
|
|
||||||
DIB tti_dib = { DEV_TTI, 1, &tti_iors, { &tti } };
|
DIB tti_dib = { DEV_TTI, 1, &tti_iors, { &tti } };
|
||||||
|
|
||||||
UNIT tti_unit = { UDATA (&tti_svc, TT_MODE_KSR+TTUF_HDX, 0), 0 };
|
UNIT tti_unit = { UDATA (&tti_svc, UNIT_IDLE+TT_MODE_KSR+TTUF_HDX, 0), 0 };
|
||||||
|
|
||||||
REG tti_reg[] = {
|
REG tti_reg[] = {
|
||||||
{ ORDATA (BUF, tti_unit.buf, TTI_WIDTH) },
|
{ ORDATA (BUF, tti_unit.buf, TTI_WIDTH) },
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* pdp15_ttx.c: PDP-15 additional terminals simulator
|
/* pdp15_ttx.c: PDP-15 additional terminals simulator
|
||||||
|
|
||||||
Copyright (c) 1993-2006, Robert M Supnik
|
Copyright (c) 1993-2007, Robert M Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -25,6 +25,7 @@
|
||||||
|
|
||||||
ttix,ttox LT15/LT19 terminal input/output
|
ttix,ttox LT15/LT19 terminal input/output
|
||||||
|
|
||||||
|
18-Jun-07 RMS Added UNIT_IDLE flag
|
||||||
30-Sep-06 RMS Fixed handling of non-printable characters in KSR mode
|
30-Sep-06 RMS Fixed handling of non-printable characters in KSR mode
|
||||||
22-Nov-05 RMS Revised for new terminal processing routines
|
22-Nov-05 RMS Revised for new terminal processing routines
|
||||||
29-Jun-05 RMS Added SET TTOXn DISCONNECT
|
29-Jun-05 RMS Added SET TTOXn DISCONNECT
|
||||||
|
|
@ -95,7 +96,7 @@ DIB ttix_dib = {
|
||||||
{ &ttox, &ttix, &ttox, &ttix, &ttox, &ttix, &ttox, &ttix }
|
{ &ttox, &ttix, &ttox, &ttix, &ttox, &ttix, &ttox, &ttix }
|
||||||
};
|
};
|
||||||
|
|
||||||
UNIT ttix_unit = { UDATA (&ttix_svc, UNIT_ATTABLE, 0), KBD_POLL_WAIT };
|
UNIT ttix_unit = { UDATA (&ttix_svc, UNIT_IDLE|UNIT_ATTABLE, 0), KBD_POLL_WAIT };
|
||||||
|
|
||||||
REG ttx_nlreg = { DRDATA (NLINES, ttx_lines, 4), PV_LEFT };
|
REG ttx_nlreg = { DRDATA (NLINES, ttx_lines, 4), PV_LEFT };
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* pdp8_clk.c: PDP-8 real-time clock simulator
|
/* pdp8_clk.c: PDP-8 real-time clock simulator
|
||||||
|
|
||||||
Copyright (c) 1993-2005, Robert M Supnik
|
Copyright (c) 1993-2007, Robert M Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -25,6 +25,7 @@
|
||||||
|
|
||||||
clk real time clock
|
clk real time clock
|
||||||
|
|
||||||
|
18-Jun-07 RMS Added UNIT_IDLE flag
|
||||||
01-Mar-03 RMS Aded SET/SHOW CLK FREQ support
|
01-Mar-03 RMS Aded SET/SHOW CLK FREQ support
|
||||||
04-Oct-02 RMS Added DIB, device number support
|
04-Oct-02 RMS Added DIB, device number support
|
||||||
30-Dec-01 RMS Removed for generalized timers
|
30-Dec-01 RMS Removed for generalized timers
|
||||||
|
|
@ -57,7 +58,7 @@ t_stat clk_show_freq (FILE *st, UNIT *uptr, int32 val, void *desc);
|
||||||
|
|
||||||
DIB clk_dib = { DEV_CLK, 1, { &clk } };
|
DIB clk_dib = { DEV_CLK, 1, { &clk } };
|
||||||
|
|
||||||
UNIT clk_unit = { UDATA (&clk_svc, 0, 0), 16000 };
|
UNIT clk_unit = { UDATA (&clk_svc, UNIT_IDLE, 0), 16000 };
|
||||||
|
|
||||||
REG clk_reg[] = {
|
REG clk_reg[] = {
|
||||||
{ FLDATA (DONE, dev_done, INT_V_CLK) },
|
{ FLDATA (DONE, dev_done, INT_V_CLK) },
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* pdp8_ct.c: PDP-8 cassette tape simulator
|
/* pdp8_ct.c: PDP-8 cassette tape simulator
|
||||||
|
|
||||||
Copyright (c) 2006, Robert M Supnik
|
Copyright (c) 2006-2007, Robert M Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -25,6 +25,8 @@
|
||||||
|
|
||||||
ct TA8E/TU60 cassette tape
|
ct TA8E/TU60 cassette tape
|
||||||
|
|
||||||
|
30-May-2007 RMS Fixed typo (from Norm Lastovica)
|
||||||
|
|
||||||
Magnetic tapes are represented as a series of variable records
|
Magnetic tapes are represented as a series of variable records
|
||||||
of the form:
|
of the form:
|
||||||
|
|
||||||
|
|
@ -461,7 +463,7 @@ int32 srb;
|
||||||
if (uptr == NULL) { /* unit specified? */
|
if (uptr == NULL) { /* unit specified? */
|
||||||
uptr = ct_busy (); /* use busy unit */
|
uptr = ct_busy (); /* use busy unit */
|
||||||
if ((uptr == NULL) && (ct_sra & SRA_ENAB)) /* none busy? */
|
if ((uptr == NULL) && (ct_sra & SRA_ENAB)) /* none busy? */
|
||||||
uptr = uptr = ct_dev.units + GET_UNIT (ct_sra); /* use sel unit */
|
uptr = ct_dev.units + GET_UNIT (ct_sra); /* use sel unit */
|
||||||
}
|
}
|
||||||
else if (ct_srb & SRB_EOF) uptr->UST |= UST_GAP; /* save gap */
|
else if (ct_srb & SRB_EOF) uptr->UST |= UST_GAP; /* save gap */
|
||||||
if (uptr) { /* any unit? */
|
if (uptr) { /* any unit? */
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* pdp8_tt.c: PDP-8 console terminal simulator
|
/* pdp8_tt.c: PDP-8 console terminal simulator
|
||||||
|
|
||||||
Copyright (c) 1993-2006, Robert M Supnik
|
Copyright (c) 1993-2007, Robert M Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -25,6 +25,7 @@
|
||||||
|
|
||||||
tti,tto KL8E terminal input/output
|
tti,tto KL8E terminal input/output
|
||||||
|
|
||||||
|
18-Jun-07 RMS Added UNIT_IDLE flag to console input
|
||||||
18-Oct-06 RMS Synced keyboard to clock
|
18-Oct-06 RMS Synced keyboard to clock
|
||||||
30-Sep-06 RMS Fixed handling of non-printable characters in KSR mode
|
30-Sep-06 RMS Fixed handling of non-printable characters in KSR mode
|
||||||
22-Nov-05 RMS Revised for new terminal processing routines
|
22-Nov-05 RMS Revised for new terminal processing routines
|
||||||
|
|
@ -63,7 +64,7 @@ t_stat tty_set_mode (UNIT *uptr, int32 val, char *cptr, void *desc);
|
||||||
|
|
||||||
DIB tti_dib = { DEV_TTI, 1, { &tti } };
|
DIB tti_dib = { DEV_TTI, 1, { &tti } };
|
||||||
|
|
||||||
UNIT tti_unit = { UDATA (&tti_svc, TT_MODE_KSR, 0), 0 };
|
UNIT tti_unit = { UDATA (&tti_svc, UNIT_IDLE|TT_MODE_KSR, 0), 0 };
|
||||||
|
|
||||||
REG tti_reg[] = {
|
REG tti_reg[] = {
|
||||||
{ ORDATA (BUF, tti_unit.buf, 8) },
|
{ ORDATA (BUF, tti_unit.buf, 8) },
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* pdp8_ttx.c: PDP-8 additional terminals simulator
|
/* pdp8_ttx.c: PDP-8 additional terminals simulator
|
||||||
|
|
||||||
Copyright (c) 1993-2006, Robert M Supnik
|
Copyright (c) 1993-2007, Robert M Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -25,6 +25,7 @@
|
||||||
|
|
||||||
ttix,ttox PT08/KL8JA terminal input/output
|
ttix,ttox PT08/KL8JA terminal input/output
|
||||||
|
|
||||||
|
07-Jun-06 RMS Added UNIT_IDLE flag
|
||||||
06-Jul-06 RMS Fixed bug in DETACH routine
|
06-Jul-06 RMS Fixed bug in DETACH routine
|
||||||
22-Nov-05 RMS Revised for new terminal processing routines
|
22-Nov-05 RMS Revised for new terminal processing routines
|
||||||
29-Jun-05 RMS Added SET TTOXn DISCONNECT
|
29-Jun-05 RMS Added SET TTOXn DISCONNECT
|
||||||
|
|
@ -89,7 +90,7 @@ void ttx_enbdis (int32 dis);
|
||||||
DIB ttix_dib = { DEV_KJ8, 8,
|
DIB ttix_dib = { DEV_KJ8, 8,
|
||||||
{ &ttix, &ttox, &ttix, &ttox, &ttix, &ttox, &ttix, &ttox } };
|
{ &ttix, &ttox, &ttix, &ttox, &ttix, &ttox, &ttix, &ttox } };
|
||||||
|
|
||||||
UNIT ttix_unit = { UDATA (&ttix_svc, UNIT_ATTABLE, 0), KBD_POLL_WAIT };
|
UNIT ttix_unit = { UDATA (&ttix_svc, UNIT_IDLE|UNIT_ATTABLE, 0), KBD_POLL_WAIT };
|
||||||
|
|
||||||
REG ttix_reg[] = {
|
REG ttix_reg[] = {
|
||||||
{ BRDATA (BUF, ttix_buf, 8, 8, TTX_LINES) },
|
{ BRDATA (BUF, ttix_buf, 8, 8, TTX_LINES) },
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* vax780_stddev.c: VAX 11/780 standard I/O devices
|
/* vax780_stddev.c: VAX 11/780 standard I/O devices
|
||||||
|
|
||||||
Copyright (c) 1998-2006, Robert M Supnik
|
Copyright (c) 1998-2007, Robert M Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -29,6 +29,7 @@
|
||||||
todr TODR clock
|
todr TODR clock
|
||||||
tmr interval timer
|
tmr interval timer
|
||||||
|
|
||||||
|
18-Jun-07 RMS Added UNIT_IDLE flag to console input, clock
|
||||||
29-Oct-2006 RMS Added clock coscheduler function
|
29-Oct-2006 RMS Added clock coscheduler function
|
||||||
Synced keyboard to clock for idling
|
Synced keyboard to clock for idling
|
||||||
11-May-06 RMS Revised timer logic for EVKAE
|
11-May-06 RMS Revised timer logic for EVKAE
|
||||||
|
|
@ -276,7 +277,7 @@ DEVICE tto_dev = {
|
||||||
|
|
||||||
/* TODR and TMR data structures */
|
/* TODR and TMR data structures */
|
||||||
|
|
||||||
UNIT clk_unit = { UDATA (&clk_svc, 0, 0), CLK_DELAY }; /* 100Hz */
|
UNIT clk_unit = { UDATA (&clk_svc, UNIT_IDLE, 0), CLK_DELAY }; /* 100Hz */
|
||||||
|
|
||||||
REG clk_reg[] = {
|
REG clk_reg[] = {
|
||||||
{ DRDATA (TODR, todr_reg, 32), PV_LEFT },
|
{ DRDATA (TODR, todr_reg, 32), PV_LEFT },
|
||||||
|
|
|
||||||
|
|
@ -247,8 +247,9 @@ int32 cpu_astop = 0;
|
||||||
int32 mchk_va, mchk_ref; /* mem ref param */
|
int32 mchk_va, mchk_ref; /* mem ref param */
|
||||||
int32 ibufl, ibufh; /* prefetch buf */
|
int32 ibufl, ibufh; /* prefetch buf */
|
||||||
int32 ibcnt, ppc; /* prefetch ctl */
|
int32 ibcnt, ppc; /* prefetch ctl */
|
||||||
uint32 cpu_idle_ipl_mask = 0xB; /* idle if on IPL 0,1,3 */
|
uint32 cpu_idle_ipl_mask = 0x8; /* idle if on IPL 3 */
|
||||||
int32 cpu_idle_wait = 200; /* for this many cycles */
|
uint32 cpu_idle_type = 1; /* default to VMS */
|
||||||
|
int32 cpu_idle_wait = 1000; /* for these cycles */
|
||||||
jmp_buf save_env;
|
jmp_buf save_env;
|
||||||
REG *pcq_r = NULL; /* PC queue reg ptr */
|
REG *pcq_r = NULL; /* PC queue reg ptr */
|
||||||
int32 pcq[PCQ_SIZE] = { 0 }; /* PC queue */
|
int32 pcq[PCQ_SIZE] = { 0 }; /* PC queue */
|
||||||
|
|
@ -371,11 +372,13 @@ t_stat cpu_set_size (UNIT *uptr, int32 val, char *cptr, void *desc);
|
||||||
t_stat cpu_set_hist (UNIT *uptr, int32 val, char *cptr, void *desc);
|
t_stat cpu_set_hist (UNIT *uptr, int32 val, char *cptr, void *desc);
|
||||||
t_stat cpu_show_hist (FILE *st, UNIT *uptr, int32 val, void *desc);
|
t_stat cpu_show_hist (FILE *st, UNIT *uptr, int32 val, void *desc);
|
||||||
t_stat cpu_show_virt (FILE *st, UNIT *uptr, int32 val, void *desc);
|
t_stat cpu_show_virt (FILE *st, UNIT *uptr, int32 val, void *desc);
|
||||||
|
t_stat cpu_set_idle (UNIT *uptr, int32 val, char *cptr, void *desc);
|
||||||
|
t_stat cpu_show_idle (FILE *st, UNIT *uptr, int32 val, void *desc);
|
||||||
int32 cpu_get_vsw (int32 sw);
|
int32 cpu_get_vsw (int32 sw);
|
||||||
int32 get_istr (int32 lnt, int32 acc);
|
int32 get_istr (int32 lnt, int32 acc);
|
||||||
int32 ReadOcta (int32 va, int32 *opnd, int32 j, int32 acc);
|
int32 ReadOcta (int32 va, int32 *opnd, int32 j, int32 acc);
|
||||||
t_bool cpu_show_opnd (FILE *st, InstHistory *h, int32 line);
|
t_bool cpu_show_opnd (FILE *st, InstHistory *h, int32 line);
|
||||||
int32 cpu_psl_ipl (int32 newpsl);
|
int32 cpu_psl_ipl_idle (int32 newpsl);
|
||||||
t_stat cpu_idle_svc (UNIT *uptr);
|
t_stat cpu_idle_svc (UNIT *uptr);
|
||||||
|
|
||||||
/* CPU data structures
|
/* CPU data structures
|
||||||
|
|
@ -434,6 +437,7 @@ REG cpu_reg[] = {
|
||||||
{ FLDATA (MEMERR, mem_err, 0) },
|
{ FLDATA (MEMERR, mem_err, 0) },
|
||||||
{ FLDATA (HLTPIN, hlt_pin, 0) },
|
{ FLDATA (HLTPIN, hlt_pin, 0) },
|
||||||
{ HRDATA (IDLE_IPL, cpu_idle_ipl_mask, 16), REG_HIDDEN },
|
{ HRDATA (IDLE_IPL, cpu_idle_ipl_mask, 16), REG_HIDDEN },
|
||||||
|
{ DRDATA (IDLE_TYPE, cpu_idle_type, 4), REG_HRO },
|
||||||
{ DRDATA (IDLE_WAIT, cpu_idle_wait, 16), REG_HIDDEN },
|
{ DRDATA (IDLE_WAIT, cpu_idle_wait, 16), REG_HIDDEN },
|
||||||
{ BRDATA (PCQ, pcq, 16, 32, PCQ_SIZE), REG_RO+REG_CIRC },
|
{ BRDATA (PCQ, pcq, 16, 32, PCQ_SIZE), REG_RO+REG_CIRC },
|
||||||
{ HRDATA (PCQP, pcq_p, 6), REG_HRO },
|
{ HRDATA (PCQP, pcq_p, 6), REG_HRO },
|
||||||
|
|
@ -445,7 +449,7 @@ REG cpu_reg[] = {
|
||||||
MTAB cpu_mod[] = {
|
MTAB cpu_mod[] = {
|
||||||
{ UNIT_CONH, 0, "HALT to SIMH", "SIMHALT", NULL },
|
{ UNIT_CONH, 0, "HALT to SIMH", "SIMHALT", NULL },
|
||||||
{ UNIT_CONH, UNIT_CONH, "HALT to console", "CONHALT", NULL },
|
{ UNIT_CONH, UNIT_CONH, "HALT to console", "CONHALT", NULL },
|
||||||
{ MTAB_XTD|MTAB_VDV, 0, "IDLE", "IDLE", &sim_set_idle, &sim_show_idle },
|
{ MTAB_XTD|MTAB_VDV, 0, "IDLE", "IDLE", &cpu_set_idle, &cpu_show_idle },
|
||||||
{ MTAB_XTD|MTAB_VDV, 0, NULL, "NOIDLE", &sim_clr_idle, NULL },
|
{ MTAB_XTD|MTAB_VDV, 0, NULL, "NOIDLE", &sim_clr_idle, NULL },
|
||||||
{ UNIT_MSIZE, (1u << 23), NULL, "8M", &cpu_set_size },
|
{ UNIT_MSIZE, (1u << 23), NULL, "8M", &cpu_set_size },
|
||||||
{ UNIT_MSIZE, (1u << 24), NULL, "16M", &cpu_set_size },
|
{ UNIT_MSIZE, (1u << 24), NULL, "16M", &cpu_set_size },
|
||||||
|
|
@ -2953,9 +2957,11 @@ opnd[j++] = Read (va + 12, L_LONG, acc);
|
||||||
return j;
|
return j;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Set new PSL IPL */
|
/* Check new PSL IPL for idle start
|
||||||
|
Checked only on exception or REI, not on MTPR #IPL,
|
||||||
|
to allow for local locking within the idle loop */
|
||||||
|
|
||||||
int32 cpu_psl_ipl (int32 newpsl)
|
int32 cpu_psl_ipl_idle (int32 newpsl)
|
||||||
{
|
{
|
||||||
if (((newpsl ^ PSL) & PSL_IPL) != 0) {
|
if (((newpsl ^ PSL) & PSL_IPL) != 0) {
|
||||||
sim_cancel (&cpu_unit);
|
sim_cancel (&cpu_unit);
|
||||||
|
|
@ -2984,7 +2990,7 @@ t_stat cpu_reset (DEVICE *dptr)
|
||||||
hlt_pin = 0;
|
hlt_pin = 0;
|
||||||
mem_err = 0;
|
mem_err = 0;
|
||||||
crd_err = 0;
|
crd_err = 0;
|
||||||
PSL = cpu_psl_ipl (PSL_IS | PSL_IPL1F);
|
PSL = PSL_IS | PSL_IPL1F;
|
||||||
SISR = 0;
|
SISR = 0;
|
||||||
ASTLVL = 4;
|
ASTLVL = 4;
|
||||||
mapen = 0;
|
mapen = 0;
|
||||||
|
|
@ -3231,3 +3237,43 @@ for (i = 1, j = 0, more = FALSE; i <= numspec; i++) { /* loop thru specs */
|
||||||
return more;
|
return more;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
struct os_idle {
|
||||||
|
char *name;
|
||||||
|
uint32 mask;
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct os_idle os_tab[] = {
|
||||||
|
{ "VMS", 0x8 },
|
||||||
|
{ "NETBSD", 0x2 },
|
||||||
|
{ "ULTRIX", 0x2 },
|
||||||
|
{ "OPENBSD", 0x1 },
|
||||||
|
{ "32V", 0x1 },
|
||||||
|
{ NULL, 0 }
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Set and show idle */
|
||||||
|
|
||||||
|
t_stat cpu_set_idle (UNIT *uptr, int32 val, char *cptr, void *desc)
|
||||||
|
{
|
||||||
|
uint32 i;
|
||||||
|
|
||||||
|
if (cptr != NULL) {
|
||||||
|
for (i = 0; os_tab[i].name != NULL; i++) {
|
||||||
|
if (strcmp (os_tab[i].name, cptr) == 0) {
|
||||||
|
cpu_idle_type = i + 1;
|
||||||
|
cpu_idle_ipl_mask = os_tab[i].mask;
|
||||||
|
return sim_set_idle (uptr, val, cptr, desc);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return SCPE_ARG;
|
||||||
|
}
|
||||||
|
return sim_set_idle (uptr, val, cptr, desc);
|
||||||
|
}
|
||||||
|
|
||||||
|
t_stat cpu_show_idle (FILE *st, UNIT *uptr, int32 val, void *desc)
|
||||||
|
{
|
||||||
|
if (sim_idle_enab && (cpu_idle_type != 0))
|
||||||
|
fprintf (st, "idle enabled=%s", os_tab[cpu_idle_type - 1].name);
|
||||||
|
else fprintf (st, "idle disabled");
|
||||||
|
return SCPE_OK;
|
||||||
|
}
|
||||||
|
|
|
||||||
|
|
@ -112,7 +112,7 @@ extern t_bool chk_tb_ent (uint32 va);
|
||||||
extern int32 ReadIPR (int32 rg);
|
extern int32 ReadIPR (int32 rg);
|
||||||
extern void WriteIPR (int32 rg, int32 val);
|
extern void WriteIPR (int32 rg, int32 val);
|
||||||
extern t_bool BadCmPSL (int32 newpsl);
|
extern t_bool BadCmPSL (int32 newpsl);
|
||||||
extern int32 cpu_psl_ipl (int32 newpsl);
|
extern int32 cpu_psl_ipl_idle (int32 newpsl);
|
||||||
|
|
||||||
extern jmp_buf save_env;
|
extern jmp_buf save_env;
|
||||||
|
|
||||||
|
|
@ -1082,8 +1082,9 @@ else {
|
||||||
SP = KSP; /* new stack */
|
SP = KSP; /* new stack */
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
if (ei > 0) PSL = cpu_psl_ipl (newpsl | (ipl << PSL_V_IPL)); /* if int, new IPL */
|
if (ei > 0) /* if int, new IPL */
|
||||||
else PSL = cpu_psl_ipl (newpsl |
|
PSL = cpu_psl_ipl_idle (newpsl | (ipl << PSL_V_IPL));
|
||||||
|
else PSL = cpu_psl_ipl_idle (newpsl | /* exc, old IPL/1F */
|
||||||
((newpc & 1)? PSL_IPL1F: (oldpsl & PSL_IPL)) | (oldcur << PSL_V_PRV));
|
((newpc & 1)? PSL_IPL1F: (oldpsl & PSL_IPL)) | (oldcur << PSL_V_PRV));
|
||||||
if (DEBUG_PRI (cpu_dev, LOG_CPU_I)) fprintf (sim_deb,
|
if (DEBUG_PRI (cpu_dev, LOG_CPU_I)) fprintf (sim_deb,
|
||||||
">>IEX: PC=%08x, PSL=%08x, SP=%08x, VEC=%08x, nPSL=%08x, nSP=%08x\n",
|
">>IEX: PC=%08x, PSL=%08x, SP=%08x, VEC=%08x, nPSL=%08x, nSP=%08x\n",
|
||||||
|
|
@ -1187,7 +1188,7 @@ else STK[oldcur] = SP;
|
||||||
if (DEBUG_PRI (cpu_dev, LOG_CPU_R)) fprintf (sim_deb,
|
if (DEBUG_PRI (cpu_dev, LOG_CPU_R)) fprintf (sim_deb,
|
||||||
">>REI: PC=%08x, PSL=%08x, SP=%08x, nPC=%08x, nPSL=%08x, nSP=%08x\n",
|
">>REI: PC=%08x, PSL=%08x, SP=%08x, nPC=%08x, nPSL=%08x, nSP=%08x\n",
|
||||||
PC, PSL, SP - 8, newpc, newpsl, ((newpsl & IS)? IS: STK[newcur]));
|
PC, PSL, SP - 8, newpc, newpsl, ((newpsl & IS)? IS: STK[newcur]));
|
||||||
PSL = cpu_psl_ipl ((PSL & PSL_TP) | (newpsl & ~CC_MASK)); /* set new PSL */
|
PSL = cpu_psl_ipl_idle ((PSL & PSL_TP) | (newpsl & ~CC_MASK)); /* set PSL */
|
||||||
if (PSL & PSL_IS) SP = IS; /* set new stack */
|
if (PSL & PSL_IS) SP = IS; /* set new stack */
|
||||||
else {
|
else {
|
||||||
SP = STK[newcur]; /* if ~IS, chk AST */
|
SP = STK[newcur]; /* if ~IS, chk AST */
|
||||||
|
|
@ -1279,7 +1280,7 @@ else {
|
||||||
KSP = SP + 8; /* pop kernel stack */
|
KSP = SP + 8; /* pop kernel stack */
|
||||||
SP = IS; /* switch to int stk */
|
SP = IS; /* switch to int stk */
|
||||||
if ((PSL & PSL_IPL) == 0) /* make IPL > 0 */
|
if ((PSL & PSL_IPL) == 0) /* make IPL > 0 */
|
||||||
PSL = cpu_psl_ipl (PSL | PSL_IPL1);
|
PSL = PSL | PSL_IPL1;
|
||||||
PSL = PSL | PSL_IS; /* set PSL<is> */
|
PSL = PSL | PSL_IS; /* set PSL<is> */
|
||||||
}
|
}
|
||||||
pcbpa = PCBB & PAMASK;
|
pcbpa = PCBB & PAMASK;
|
||||||
|
|
@ -1440,7 +1441,7 @@ switch (prn) { /* case on reg # */
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case MT_IPL: /* IPL */
|
case MT_IPL: /* IPL */
|
||||||
PSL = cpu_psl_ipl ((PSL & ~PSL_IPL) | ((val & PSL_M_IPL) << PSL_V_IPL));
|
PSL = (PSL & ~PSL_IPL) | ((val & PSL_M_IPL) << PSL_V_IPL);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case MT_ASTLVL: /* ASTLVL */
|
case MT_ASTLVL: /* ASTLVL */
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
/* vax_stddev.c: VAX 3900 standard I/O devices
|
/* vax_stddev.c: VAX 3900 standard I/O devices
|
||||||
|
|
||||||
Copyright (c) 1998-2006, Robert M Supnik
|
Copyright (c) 1998-2007, Robert M Supnik
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -27,6 +27,7 @@
|
||||||
tto terminal output
|
tto terminal output
|
||||||
clk 100Hz and TODR clock
|
clk 100Hz and TODR clock
|
||||||
|
|
||||||
|
18-Jun-07 RMS Added UNIT_IDLE flag to console input, clock
|
||||||
17-Oct-06 RMS Synced keyboard poll to real-time clock for idling
|
17-Oct-06 RMS Synced keyboard poll to real-time clock for idling
|
||||||
22-Nov-05 RMS Revised for new terminal processing routines
|
22-Nov-05 RMS Revised for new terminal processing routines
|
||||||
09-Sep-04 RMS Integrated powerup into RESET (with -p)
|
09-Sep-04 RMS Integrated powerup into RESET (with -p)
|
||||||
|
|
@ -88,7 +89,7 @@ extern int32 sysd_hlt_enb (void);
|
||||||
|
|
||||||
DIB tti_dib = { 0, 0, NULL, NULL, 1, IVCL (TTI), SCB_TTI, { NULL } };
|
DIB tti_dib = { 0, 0, NULL, NULL, 1, IVCL (TTI), SCB_TTI, { NULL } };
|
||||||
|
|
||||||
UNIT tti_unit = { UDATA (&tti_svc, TT_MODE_8B, 0), 0 };
|
UNIT tti_unit = { UDATA (&tti_svc, UNIT_IDLE|TT_MODE_8B, 0), 0 };
|
||||||
|
|
||||||
REG tti_reg[] = {
|
REG tti_reg[] = {
|
||||||
{ HRDATA (BUF, tti_unit.buf, 16) },
|
{ HRDATA (BUF, tti_unit.buf, 16) },
|
||||||
|
|
@ -164,7 +165,7 @@ DEVICE tto_dev = {
|
||||||
|
|
||||||
DIB clk_dib = { 0, 0, NULL, NULL, 1, IVCL (CLK), SCB_INTTIM, { NULL } };
|
DIB clk_dib = { 0, 0, NULL, NULL, 1, IVCL (CLK), SCB_INTTIM, { NULL } };
|
||||||
|
|
||||||
UNIT clk_unit = { UDATA (&clk_svc, 0, 0), CLK_DELAY };
|
UNIT clk_unit = { UDATA (&clk_svc, UNIT_IDLE, 0), CLK_DELAY };
|
||||||
|
|
||||||
REG clk_reg[] = {
|
REG clk_reg[] = {
|
||||||
{ HRDATA (CSR, clk_csr, 16) },
|
{ HRDATA (CSR, clk_csr, 16) },
|
||||||
|
|
|
||||||
|
|
@ -276,7 +276,6 @@ extern void txcs_wr (int32 dat);
|
||||||
extern void txdb_wr (int32 dat);
|
extern void txdb_wr (int32 dat);
|
||||||
extern void ioreset_wr (int32 dat);
|
extern void ioreset_wr (int32 dat);
|
||||||
extern uint32 sim_os_msec();
|
extern uint32 sim_os_msec();
|
||||||
extern int32 cpu_psl_ipl (int32 newpsl);
|
|
||||||
|
|
||||||
/* ROM data structures
|
/* ROM data structures
|
||||||
|
|
||||||
|
|
@ -1501,7 +1500,7 @@ else STK[temp] = SP; /* save stack */
|
||||||
if (mapen) conpsl = conpsl | CON_MAPON; /* mapping on? */
|
if (mapen) conpsl = conpsl | CON_MAPON; /* mapping on? */
|
||||||
mapen = 0; /* turn off map */
|
mapen = 0; /* turn off map */
|
||||||
SP = IS; /* set SP from IS */
|
SP = IS; /* set SP from IS */
|
||||||
PSL = cpu_psl_ipl (PSL_IS | PSL_IPL1F); /* PSL = 41F0000 */
|
PSL = PSL_IS | PSL_IPL1F; /* PSL = 41F0000 */
|
||||||
JUMP (ROMBASE); /* PC = 20040000 */
|
JUMP (ROMBASE); /* PC = 20040000 */
|
||||||
return 0; /* new cc = 0 */
|
return 0; /* new cc = 0 */
|
||||||
}
|
}
|
||||||
|
|
@ -1515,7 +1514,7 @@ extern FILE *sim_log;
|
||||||
t_stat r;
|
t_stat r;
|
||||||
|
|
||||||
PC = ROMBASE;
|
PC = ROMBASE;
|
||||||
PSL = cpu_psl_ipl (PSL_IS | PSL_IPL1F);
|
PSL = PSL_IS | PSL_IPL1F;
|
||||||
conpc = 0;
|
conpc = 0;
|
||||||
conpsl = PSL_IS | PSL_IPL1F | CON_PWRUP;
|
conpsl = PSL_IS | PSL_IPL1F | CON_PWRUP;
|
||||||
if (rom == NULL) return SCPE_IERR;
|
if (rom == NULL) return SCPE_IERR;
|
||||||
|
|
|
||||||
|
|
@ -382,8 +382,8 @@ PDP11_SOURCE1 = $(PDP11_DIR)PDP11_FP.C,$(PDP11_DIR)PDP11_CPU.C,\
|
||||||
$(PDP11_DIR)PDP11_RL.C,$(PDP11_DIR)PDP11_RP.C,\
|
$(PDP11_DIR)PDP11_RL.C,$(PDP11_DIR)PDP11_RP.C,\
|
||||||
$(PDP11_DIR)PDP11_RX.C,$(PDP11_DIR)PDP11_STDDEV.C,\
|
$(PDP11_DIR)PDP11_RX.C,$(PDP11_DIR)PDP11_STDDEV.C,\
|
||||||
$(PDP11_DIR)PDP11_SYS.C,$(PDP11_DIR)PDP11_TC.C, \
|
$(PDP11_DIR)PDP11_SYS.C,$(PDP11_DIR)PDP11_TC.C, \
|
||||||
$(PDP11_DIR)PDP11_CPUMOD.C,$(PDP11_DIR)PDP11_CR.C,
|
$(PDP11_DIR)PDP11_CPUMOD.C,$(PDP11_DIR)PDP11_CR.C,\
|
||||||
$(PDP11_DIR)PDP11_TA.C
|
$(PDP11_DIR)PDP11_TA.C
|
||||||
PDP11_LIB2 = $(LIB_DIR)PDP11L2-$(ARCH).OLB
|
PDP11_LIB2 = $(LIB_DIR)PDP11L2-$(ARCH).OLB
|
||||||
PDP11_SOURCE2 = $(PDP11_DIR)PDP11_TM.C,$(PDP11_DIR)PDP11_TS.C,\
|
PDP11_SOURCE2 = $(PDP11_DIR)PDP11_TM.C,$(PDP11_DIR)PDP11_TS.C,\
|
||||||
$(PDP11_DIR)PDP11_IO.C,$(PDP11_DIR)PDP11_RQ.C,\
|
$(PDP11_DIR)PDP11_IO.C,$(PDP11_DIR)PDP11_RQ.C,\
|
||||||
|
|
@ -1171,8 +1171,3 @@ $(PCAP_VCMDIR)PCAPVCM.EXE : $(PCAP_VCM_SOURCES)
|
||||||
$!
|
$!
|
||||||
$ @SYS$DISK:[.PCAP-VMS.PCAPVCM]BUILD_PCAPVCM
|
$ @SYS$DISK:[.PCAP-VMS.PCAPVCM]BUILD_PCAPVCM
|
||||||
$ DELETE/NOLOG/NOCONFIRM $(PCAP_VCMDIR)*.OBJ;*,$(PCAP_VCMDIR)*.MAP;*
|
$ DELETE/NOLOG/NOCONFIRM $(PCAP_VCMDIR)*.OBJ;*,$(PCAP_VCMDIR)*.MAP;*
|
||||||
|
|
||||||
|
|
||||||
- - -
|
|
||||||
norm lastovica / oracle rdb engineering / salida, colorado, usa
|
|
||||||
reply to: norman.lastovica@oracle.com / phone: 719.339.6749
|
|
||||||
|
|
|
||||||
|
|
@ -23,6 +23,8 @@
|
||||||
used in advertising or otherwise to promote the sale, use or other dealings
|
used in advertising or otherwise to promote the sale, use or other dealings
|
||||||
in this Software without prior written authorization from Robert M Supnik.
|
in this Software without prior written authorization from Robert M Supnik.
|
||||||
|
|
||||||
|
28-Jun-07 RMS Added IA64 VMS support (from Norm Lastovica)
|
||||||
|
18-Jun-07 RMS Added UNIT_IDLE flag
|
||||||
18-Mar-07 RMS Added UNIT_TEXT flag
|
18-Mar-07 RMS Added UNIT_TEXT flag
|
||||||
07-Mar-07 JDB Added DEBUG_PRJ macro
|
07-Mar-07 JDB Added DEBUG_PRJ macro
|
||||||
18-Oct-06 RMS Added limit check for clock synchronized keyboard waits
|
18-Oct-06 RMS Added limit check for clock synchronized keyboard waits
|
||||||
|
|
@ -131,7 +133,7 @@ typedef unsigned long long t_uint64;
|
||||||
#elif defined (_WIN32) /* Windows */
|
#elif defined (_WIN32) /* Windows */
|
||||||
typedef signed __int64 t_int64;
|
typedef signed __int64 t_int64;
|
||||||
typedef unsigned __int64 t_uint64;
|
typedef unsigned __int64 t_uint64;
|
||||||
#elif defined (__ALPHA) && defined (VMS) /* Alpha VMS */
|
#elif (defined (__ALPHA) || defined (__ia64)) && defined (VMS) /* 64b VMS */
|
||||||
typedef signed __int64 t_int64;
|
typedef signed __int64 t_int64;
|
||||||
typedef unsigned __int64 t_uint64;
|
typedef unsigned __int64 t_uint64;
|
||||||
#elif defined (__ALPHA) && defined (__unix__) /* Alpha UNIX */
|
#elif defined (__ALPHA) && defined (__unix__) /* Alpha UNIX */
|
||||||
|
|
@ -366,6 +368,7 @@ struct sim_unit {
|
||||||
#define UNIT_DIS 004000 /* disabled */
|
#define UNIT_DIS 004000 /* disabled */
|
||||||
#define UNIT_RAW 010000 /* raw mode */
|
#define UNIT_RAW 010000 /* raw mode */
|
||||||
#define UNIT_TEXT 020000 /* text mode */
|
#define UNIT_TEXT 020000 /* text mode */
|
||||||
|
#define UNIT_IDLE 040000 /* idle eligible */
|
||||||
|
|
||||||
#define UNIT_UFMASK_31 (((1u << UNIT_V_RSV) - 1) & ~((1u << UNIT_V_UF_31) - 1))
|
#define UNIT_UFMASK_31 (((1u << UNIT_V_RSV) - 1) & ~((1u << UNIT_V_UF_31) - 1))
|
||||||
#define UNIT_UFMASK (((1u << UNIT_V_RSV) - 1) & ~((1u << UNIT_V_UF) - 1))
|
#define UNIT_UFMASK (((1u << UNIT_V_RSV) - 1) & ~((1u << UNIT_V_UF) - 1))
|
||||||
|
|
|
||||||
208
sim_ether.c
208
sim_ether.c
|
|
@ -1,6 +1,6 @@
|
||||||
/* sim_ether.c: OS-dependent network routines
|
/* sim_ether.c: OS-dependent network routines
|
||||||
------------------------------------------------------------------------------
|
------------------------------------------------------------------------------
|
||||||
Copyright (c) 2002-2006, David T. Hittner
|
Copyright (c) 2002-2007, David T. Hittner
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining a
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
copy of this software and associated documentation files (the "Software"),
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
|
@ -48,6 +48,10 @@
|
||||||
documentation for the appropriate host platform if unprivileged use of
|
documentation for the appropriate host platform if unprivileged use of
|
||||||
networking is needed - there may be known workarounds.
|
networking is needed - there may be known workarounds.
|
||||||
|
|
||||||
|
Define one of the two macros below to enable networking:
|
||||||
|
USE_NETWORK - Create statically linked network code
|
||||||
|
USE_SHARED - Create dynamically linked network code (_WIN32 only)
|
||||||
|
|
||||||
------------------------------------------------------------------------------
|
------------------------------------------------------------------------------
|
||||||
|
|
||||||
Supported/Tested Platforms:
|
Supported/Tested Platforms:
|
||||||
|
|
@ -134,6 +138,11 @@
|
||||||
|
|
||||||
Modification history:
|
Modification history:
|
||||||
|
|
||||||
|
17-May-07 DTH Fixed non-ethernet device removal loop (from Naoki Hamada)
|
||||||
|
15-May-07 DTH Added dynamic loading of wpcap.dll;
|
||||||
|
Corrected exceed max index bug in ethX lookup
|
||||||
|
04-May-07 DTH Corrected failure to look up ethernet device names in
|
||||||
|
the registry on Windows XP x64
|
||||||
10-Jul-06 RMS Fixed linux conditionalization (from Chaskiel Grundman)
|
10-Jul-06 RMS Fixed linux conditionalization (from Chaskiel Grundman)
|
||||||
02-Jun-06 JDB Fixed compiler warning for incompatible sscanf parameter
|
02-Jun-06 JDB Fixed compiler warning for incompatible sscanf parameter
|
||||||
15-Dec-05 DTH Patched eth_host_devices [remove non-ethernet devices]
|
15-Dec-05 DTH Patched eth_host_devices [remove non-ethernet devices]
|
||||||
|
|
@ -422,7 +431,7 @@ char* eth_getname(int number, char* name)
|
||||||
ETH_LIST list[ETH_MAX_DEVICE];
|
ETH_LIST list[ETH_MAX_DEVICE];
|
||||||
int count = eth_devices(ETH_MAX_DEVICE, list);
|
int count = eth_devices(ETH_MAX_DEVICE, list);
|
||||||
|
|
||||||
if (count < number) return 0;
|
if (count <= number) return 0;
|
||||||
strcpy(name, list[number].name);
|
strcpy(name, list[number].name);
|
||||||
return name;
|
return name;
|
||||||
}
|
}
|
||||||
|
|
@ -600,7 +609,7 @@ void ethq_insert(ETH_QUE* que, int32 type, ETH_PACK* pack, int32 status)
|
||||||
/* Non-implemented versions */
|
/* Non-implemented versions */
|
||||||
/*============================================================================*/
|
/*============================================================================*/
|
||||||
|
|
||||||
#if !defined (USE_NETWORK)
|
#if !defined (USE_NETWORK) && !defined(USE_SHARED)
|
||||||
t_stat eth_open(ETH_DEV* dev, char* name, DEVICE* dptr, uint32 dbit)
|
t_stat eth_open(ETH_DEV* dev, char* name, DEVICE* dptr, uint32 dbit)
|
||||||
{return SCPE_NOFNC;}
|
{return SCPE_NOFNC;}
|
||||||
t_stat eth_close (ETH_DEV* dev)
|
t_stat eth_close (ETH_DEV* dev)
|
||||||
|
|
@ -634,6 +643,187 @@ int eth_devices (int max, ETH_LIST* dev)
|
||||||
#include <winreg.h>
|
#include <winreg.h>
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if defined(_WIN32) && defined(USE_SHARED)
|
||||||
|
/* Dynamic DLL loading technique and modified source comes from
|
||||||
|
Etherial/WireShark capture_pcap.c */
|
||||||
|
|
||||||
|
/* Dynamic DLL load variables */
|
||||||
|
static HINSTANCE hDll = 0; /* handle to DLL */
|
||||||
|
static int dll_loaded = 0; /* 0=not loaded, 1=loaded, 2=DLL load failed, 3=Func load failed */
|
||||||
|
static char* no_wpcap = "wpcap load failure";
|
||||||
|
|
||||||
|
/* define pointers to pcap functions needed */
|
||||||
|
static void (*p_pcap_close) (pcap_t *);
|
||||||
|
static int (*p_pcap_compile) (pcap_t *, struct bpf_program *, char *, int, bpf_u_int32);
|
||||||
|
static int (*p_pcap_datalink) (pcap_t *);
|
||||||
|
static int (*p_pcap_dispatch) (pcap_t *, int, pcap_handler, u_char *);
|
||||||
|
static int (*p_pcap_findalldevs) (pcap_if_t **, char *);
|
||||||
|
static void (*p_pcap_freealldevs) (pcap_if_t *);
|
||||||
|
static void (*p_pcap_freecode) (struct bpf_program *);
|
||||||
|
static char* (*p_pcap_geterr) (pcap_t *);
|
||||||
|
static int (*p_pcap_lookupnet) (const char *, bpf_u_int32 *, bpf_u_int32 *, char *);
|
||||||
|
static pcap_t* (*p_pcap_open_live) (const char *, int, int, int, char *);
|
||||||
|
static int (*p_pcap_sendpacket) (pcap_t* handle, const u_char* msg, int len);
|
||||||
|
static int (*p_pcap_setfilter) (pcap_t *, struct bpf_program *);
|
||||||
|
static char* (*p_pcap_lib_version) (void);
|
||||||
|
|
||||||
|
/* load function pointer from DLL */
|
||||||
|
void load_function(char* function, void** func_ptr) {
|
||||||
|
*func_ptr = GetProcAddress(hDll, function);
|
||||||
|
if (*func_ptr == 0) {
|
||||||
|
char* msg = "Eth: Failed to find function '%s' in wpcap.dll\r\n";
|
||||||
|
printf (msg, function);
|
||||||
|
if (sim_log) fprintf (sim_log, msg, function);
|
||||||
|
dll_loaded = 3;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* load wpcap.dll as required */
|
||||||
|
int load_wpcap(void) {
|
||||||
|
switch(dll_loaded) {
|
||||||
|
case 0: /* not loaded */
|
||||||
|
/* attempt to load DLL */
|
||||||
|
hDll = LoadLibrary(TEXT("wpcap.dll"));
|
||||||
|
if (hDll == 0) {
|
||||||
|
/* failed to load DLL */
|
||||||
|
char* msg = "Eth: Failed to load wpcap.dll\r\n";
|
||||||
|
char* msg2 = "Eth: You must install WinPcap 4.x to use networking\r\n";
|
||||||
|
printf (msg);
|
||||||
|
printf (msg2);
|
||||||
|
if (sim_log) {
|
||||||
|
fprintf (sim_log, msg);
|
||||||
|
fprintf (sim_log, msg2);
|
||||||
|
}
|
||||||
|
dll_loaded = 2;
|
||||||
|
break;
|
||||||
|
} else {
|
||||||
|
/* DLL loaded OK */
|
||||||
|
dll_loaded = 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* load required functions; sets dll_load=3 on error */
|
||||||
|
load_function("pcap_close", (void**) &p_pcap_close);
|
||||||
|
load_function("pcap_compile", (void**) &p_pcap_compile);
|
||||||
|
load_function("pcap_datalink", (void**) &p_pcap_datalink);
|
||||||
|
load_function("pcap_dispatch", (void**) &p_pcap_dispatch);
|
||||||
|
load_function("pcap_findalldevs", (void**) &p_pcap_findalldevs);
|
||||||
|
load_function("pcap_freealldevs", (void**) &p_pcap_freealldevs);
|
||||||
|
load_function("pcap_freecode", (void**) &p_pcap_freecode);
|
||||||
|
load_function("pcap_geterr", (void**) &p_pcap_geterr);
|
||||||
|
load_function("pcap_lookupnet", (void**) &p_pcap_lookupnet);
|
||||||
|
load_function("pcap_open_live", (void**) &p_pcap_open_live);
|
||||||
|
load_function("pcap_sendpacket", (void**) &p_pcap_sendpacket);
|
||||||
|
load_function("pcap_setfilter", (void**) &p_pcap_setfilter);
|
||||||
|
load_function("pcap_lib_version", (void**) &p_pcap_lib_version);
|
||||||
|
|
||||||
|
if (dll_loaded == 1) {
|
||||||
|
/* log successful load */
|
||||||
|
char* version = p_pcap_lib_version();
|
||||||
|
printf("%s\n", version);
|
||||||
|
if (sim_log)
|
||||||
|
fprintf(sim_log, "%s\n", version);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
default: /* loaded or failed */
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
return (dll_loaded == 1) ? 1 : 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* define functions with dynamic revectoring */
|
||||||
|
void pcap_close(pcap_t* a) {
|
||||||
|
if (load_wpcap() != 0) {
|
||||||
|
p_pcap_close(a);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
int pcap_compile(pcap_t* a, struct bpf_program* b, char* c, int d, bpf_u_int32 e) {
|
||||||
|
if (load_wpcap() != 0) {
|
||||||
|
return p_pcap_compile(a, b, c, d, e);
|
||||||
|
} else {
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
int pcap_datalink(pcap_t* a) {
|
||||||
|
if (load_wpcap() != 0) {
|
||||||
|
return p_pcap_datalink(a);
|
||||||
|
} else {
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
int pcap_dispatch(pcap_t* a, int b, pcap_handler c, u_char* d) {
|
||||||
|
if (load_wpcap() != 0) {
|
||||||
|
return p_pcap_dispatch(a, b, c, d);
|
||||||
|
} else {
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
int pcap_findalldevs(pcap_if_t** a, char* b) {
|
||||||
|
if (load_wpcap() != 0) {
|
||||||
|
return p_pcap_findalldevs(a, b);
|
||||||
|
} else {
|
||||||
|
*a = 0;
|
||||||
|
strcpy(b, no_wpcap);
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void pcap_freealldevs(pcap_if_t* a) {
|
||||||
|
if (load_wpcap() != 0) {
|
||||||
|
p_pcap_freealldevs(a);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void pcap_freecode(struct bpf_program* a) {
|
||||||
|
if (load_wpcap() != 0) {
|
||||||
|
p_pcap_freecode(a);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
char* pcap_geterr(pcap_t* a) {
|
||||||
|
if (load_wpcap() != 0) {
|
||||||
|
return p_pcap_geterr(a);
|
||||||
|
} else {
|
||||||
|
return (char*) 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
int pcap_lookupnet(const char* a, bpf_u_int32* b, bpf_u_int32* c, char* d) {
|
||||||
|
if (load_wpcap() != 0) {
|
||||||
|
return p_pcap_lookupnet(a, b, c, d);
|
||||||
|
} else {
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
pcap_t* pcap_open_live(const char* a, int b, int c, int d, char* e) {
|
||||||
|
if (load_wpcap() != 0) {
|
||||||
|
return p_pcap_open_live(a, b, c, d, e);
|
||||||
|
} else {
|
||||||
|
return (pcap_t*) 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
int pcap_sendpacket(pcap_t* a, const u_char* b, int c) {
|
||||||
|
if (load_wpcap() != 0) {
|
||||||
|
return p_pcap_sendpacket(a, b, c);
|
||||||
|
} else {
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
int pcap_setfilter(pcap_t* a, struct bpf_program* b) {
|
||||||
|
if (load_wpcap() != 0) {
|
||||||
|
return p_pcap_setfilter(a, b);
|
||||||
|
} else {
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
/* Some platforms have always had pcap_sendpacket */
|
/* Some platforms have always had pcap_sendpacket */
|
||||||
#if defined(_WIN32) || defined(VMS)
|
#if defined(_WIN32) || defined(VMS)
|
||||||
#define HAS_PCAP_SENDPACKET 1
|
#define HAS_PCAP_SENDPACKET 1
|
||||||
|
|
@ -1187,7 +1377,7 @@ int eth_host_devices(int used, int max, ETH_LIST* list)
|
||||||
conn = pcap_open_live(list[i].name, ETH_MAX_PACKET, ETH_PROMISC, PCAP_READ_TIMEOUT, errbuf);
|
conn = pcap_open_live(list[i].name, ETH_MAX_PACKET, ETH_PROMISC, PCAP_READ_TIMEOUT, errbuf);
|
||||||
if (NULL != conn) datalink = pcap_datalink(conn), pcap_close(conn);
|
if (NULL != conn) datalink = pcap_datalink(conn), pcap_close(conn);
|
||||||
if ((NULL == conn) || (datalink != DLT_EN10MB)) {
|
if ((NULL == conn) || (datalink != DLT_EN10MB)) {
|
||||||
for (j=i+1; j<used; ++j)
|
for (j=i; j<used-1; ++j)
|
||||||
list[j] = list[j+1];
|
list[j] = list[j+1];
|
||||||
--used;
|
--used;
|
||||||
--i;
|
--i;
|
||||||
|
|
@ -1204,17 +1394,23 @@ int eth_host_devices(int used, int max, ETH_LIST* list)
|
||||||
HKEY reghnd;
|
HKEY reghnd;
|
||||||
|
|
||||||
/* These registry keys don't seem to exist for all devices, so we simply ignore errors. */
|
/* These registry keys don't seem to exist for all devices, so we simply ignore errors. */
|
||||||
|
/* Windows XP x64 registry uses wide characters by default,
|
||||||
|
so we force use of narrow characters by using the 'A'(ANSI) version of RegOpenKeyEx.
|
||||||
|
This could cause some problems later, if this code is internationalized. Ideally,
|
||||||
|
the pcap lookup will return wide characters, and we should use them to build a wide
|
||||||
|
registry key, rather than hardcoding the string as we do here. */
|
||||||
if(list[i].name[strlen( "\\Device\\NPF_" )] == '{') {
|
if(list[i].name[strlen( "\\Device\\NPF_" )] == '{') {
|
||||||
sprintf( regkey, "SYSTEM\\CurrentControlSet\\Control\\Network\\"
|
sprintf( regkey, "SYSTEM\\CurrentControlSet\\Control\\Network\\"
|
||||||
"{4D36E972-E325-11CE-BFC1-08002BE10318}\\%hs\\Connection", list[i].name+
|
"{4D36E972-E325-11CE-BFC1-08002BE10318}\\%hs\\Connection", list[i].name+
|
||||||
strlen( "\\Device\\NPF_" ) );
|
strlen( "\\Device\\NPF_" ) );
|
||||||
if((status = RegOpenKeyEx (HKEY_LOCAL_MACHINE, regkey, 0, KEY_QUERY_VALUE, ®hnd)) != ERROR_SUCCESS) {
|
if((status = RegOpenKeyExA (HKEY_LOCAL_MACHINE, regkey, 0, KEY_QUERY_VALUE, ®hnd)) != ERROR_SUCCESS) {
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
reglen = sizeof(regval);
|
reglen = sizeof(regval);
|
||||||
|
|
||||||
/* look for user-defined adapter name, bail if not found */
|
/* look for user-defined adapter name, bail if not found */
|
||||||
if((status = RegQueryValueEx (reghnd, "Name", NULL, ®type, regval, ®len)) != ERROR_SUCCESS) {
|
/* same comment about Windows XP x64 (above) using RegQueryValueEx */
|
||||||
|
if((status = RegQueryValueExA (reghnd, "Name", NULL, ®type, regval, ®len)) != ERROR_SUCCESS) {
|
||||||
RegCloseKey (reghnd);
|
RegCloseKey (reghnd);
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -23,6 +23,7 @@
|
||||||
used in advertising or otherwise to promote the sale, use or other dealings
|
used in advertising or otherwise to promote the sale, use or other dealings
|
||||||
in this Software without prior written authorization from Robert M Supnik.
|
in this Software without prior written authorization from Robert M Supnik.
|
||||||
|
|
||||||
|
28-Jun-07 RMS Added VMS IA64 support (from Norm Lastovica)
|
||||||
10-Jul-06 RMS Fixed linux conditionalization (from Chaskiel Grundman)
|
10-Jul-06 RMS Fixed linux conditionalization (from Chaskiel Grundman)
|
||||||
15-May-06 RMS Added sim_fsize_name
|
15-May-06 RMS Added sim_fsize_name
|
||||||
21-Apr-06 RMS Added FreeBSD large file support (from Mark Martinec)
|
21-Apr-06 RMS Added FreeBSD large file support (from Mark Martinec)
|
||||||
|
|
@ -172,9 +173,9 @@ return fopen (file, mode);
|
||||||
|
|
||||||
#if defined (USE_INT64) && defined (USE_ADDR64)
|
#if defined (USE_INT64) && defined (USE_ADDR64)
|
||||||
|
|
||||||
/* Alpha VMS */
|
/* 64b VMS */
|
||||||
|
|
||||||
#if defined (__ALPHA) && defined (VMS) /* Alpha VMS */
|
#if (defined (__ALPHA) || defined (__ia64)) && defined (VMS) /* 64b VMS */
|
||||||
#define _SIM_IO_FSEEK_EXT_ 1
|
#define _SIM_IO_FSEEK_EXT_ 1
|
||||||
|
|
||||||
static t_int64 fpos_t_to_int64 (fpos_t *pos)
|
static t_int64 fpos_t_to_int64 (fpos_t *pos)
|
||||||
|
|
|
||||||
43
sim_rev.h
43
sim_rev.h
|
|
@ -29,13 +29,52 @@
|
||||||
|
|
||||||
#define SIM_MAJOR 3
|
#define SIM_MAJOR 3
|
||||||
#define SIM_MINOR 7
|
#define SIM_MINOR 7
|
||||||
#define SIM_PATCH 1
|
#define SIM_PATCH 2
|
||||||
|
|
||||||
/* V3.7 revision history
|
/* V3.7 revision history
|
||||||
|
|
||||||
patch date module(s) and fix(es)
|
patch date module(s) and fix(es)
|
||||||
|
|
||||||
1 tbd scp.c:
|
2 tbd sim_ether.c (from Dave Hittner):
|
||||||
|
- fixed non-ethernet device removal loop (from Naoki Hamada)
|
||||||
|
- added dynamic loading of wpcap.dll;
|
||||||
|
- corrected exceed max index bug in ethX lookup
|
||||||
|
- corrected failure to look up ethernet device names in
|
||||||
|
the registry on Windows XP x64
|
||||||
|
|
||||||
|
sim_timer.c:
|
||||||
|
- fixed idle timer event selection algorithm
|
||||||
|
|
||||||
|
h316_lp.c:
|
||||||
|
- fixed loss of last print line (from Theo Engel)
|
||||||
|
|
||||||
|
h316_mt.c:
|
||||||
|
- fixed bug in write without stop (from Theo Engel)
|
||||||
|
|
||||||
|
h316_stddev.c:
|
||||||
|
- fixed bug in clock increment (from Theo Engel)
|
||||||
|
|
||||||
|
i1401_cpu.c:
|
||||||
|
- added recognition of overlapped operation modifiers
|
||||||
|
- remove restriction on load-mode binary tape operations
|
||||||
|
|
||||||
|
i1401_mt.c:
|
||||||
|
- fixed read tape mark operation (found by Van Snyder)
|
||||||
|
- remove restriction on load-mode binary tape operations
|
||||||
|
|
||||||
|
pdp1_cpu.c:
|
||||||
|
- fixed typo in SBS clear (from Norm Lastovica)
|
||||||
|
|
||||||
|
pdp11_rh.c, pdp11_rp.c, pdp11_tu.c:
|
||||||
|
- CS1 DVA is in the device, not the MBA
|
||||||
|
|
||||||
|
pdp8_ct.c:
|
||||||
|
- fixed typo (from Norm Lastovica)
|
||||||
|
|
||||||
|
vax_cpu.c:
|
||||||
|
- revised idle detector
|
||||||
|
|
||||||
|
1 14-May-07 scp.c:
|
||||||
- modified sim_instr invocation to call sim_rtcn_init_all
|
- modified sim_instr invocation to call sim_rtcn_init_all
|
||||||
- fixed bug in get_sim_opt (reported by Don North)
|
- fixed bug in get_sim_opt (reported by Don North)
|
||||||
- fixed bug in RESTORE with changed memory size
|
- fixed bug in RESTORE with changed memory size
|
||||||
|
|
|
||||||
12
sim_timer.c
12
sim_timer.c
|
|
@ -23,7 +23,8 @@
|
||||||
used in advertising or otherwise to promote the sale, use or other dealings
|
used in advertising or otherwise to promote the sale, use or other dealings
|
||||||
in this Software without prior written authorization from Robert M Supnik.
|
in this Software without prior written authorization from Robert M Supnik.
|
||||||
|
|
||||||
22-Aug-07 RMS Added sim_rtcn_init_all
|
18-Jun-07 RMS Modified idle to exclude counted delays
|
||||||
|
22-Mar-07 RMS Added sim_rtcn_init_all
|
||||||
17-Oct-06 RMS Added idle support (based on work by Mark Pizzolato)
|
17-Oct-06 RMS Added idle support (based on work by Mark Pizzolato)
|
||||||
Added throttle support
|
Added throttle support
|
||||||
16-Aug-05 RMS Fixed C++ declaration and cast problems
|
16-Aug-05 RMS Fixed C++ declaration and cast problems
|
||||||
|
|
@ -58,6 +59,7 @@ static uint32 sim_throt_state = 0;
|
||||||
static int32 sim_throt_wait = 0;
|
static int32 sim_throt_wait = 0;
|
||||||
extern int32 sim_interval, sim_switches;
|
extern int32 sim_interval, sim_switches;
|
||||||
extern FILE *sim_log;
|
extern FILE *sim_log;
|
||||||
|
extern UNIT *sim_clock_queue;
|
||||||
|
|
||||||
t_stat sim_throt_svc (UNIT *uptr);
|
t_stat sim_throt_svc (UNIT *uptr);
|
||||||
|
|
||||||
|
|
@ -74,6 +76,7 @@ UNIT sim_throt_unit = { UDATA (&sim_throt_svc, 0, 0) };
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#include <starlet.h>
|
#include <starlet.h>
|
||||||
|
#include <lib$routines.h>
|
||||||
#include <unistd.h>
|
#include <unistd.h>
|
||||||
|
|
||||||
const t_bool rtc_avail = TRUE;
|
const t_bool rtc_avail = TRUE;
|
||||||
|
|
@ -444,6 +447,11 @@ t_bool sim_idle (uint32 tmr, t_bool sin_cyc)
|
||||||
uint32 cyc_ms, w_ms, w_idle, act_ms;
|
uint32 cyc_ms, w_ms, w_idle, act_ms;
|
||||||
int32 act_cyc;
|
int32 act_cyc;
|
||||||
|
|
||||||
|
if ((sim_clock_queue == NULL) || /* clock queue empty? */
|
||||||
|
((sim_clock_queue->flags & UNIT_IDLE) == 0)) { /* event not idle-able? */
|
||||||
|
if (sin_cyc) sim_interval = sim_interval - 1;
|
||||||
|
return FALSE;
|
||||||
|
}
|
||||||
cyc_ms = (rtc_currd[tmr] * rtc_hz[tmr]) / 1000; /* cycles per msec */
|
cyc_ms = (rtc_currd[tmr] * rtc_hz[tmr]) / 1000; /* cycles per msec */
|
||||||
if ((sim_idle_rate_ms == 0) || (cyc_ms == 0)) { /* not possible? */
|
if ((sim_idle_rate_ms == 0) || (cyc_ms == 0)) { /* not possible? */
|
||||||
if (sin_cyc) sim_interval = sim_interval - 1;
|
if (sin_cyc) sim_interval = sim_interval - 1;
|
||||||
|
|
@ -491,7 +499,7 @@ return SCPE_OK;
|
||||||
|
|
||||||
t_stat sim_show_idle (FILE *st, UNIT *uptr, int32 val, void *desc)
|
t_stat sim_show_idle (FILE *st, UNIT *uptr, int32 val, void *desc)
|
||||||
{
|
{
|
||||||
fprintf (st, sim_idle_enab? "idling enabled": "idling disabled");
|
fprintf (st, sim_idle_enab? "idle enabled": "idle disabled");
|
||||||
return SCPE_OK;
|
return SCPE_OK;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
Loading…
Add table
Reference in a new issue