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Cleaned up nested comments

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This commit is contained in:
Mark Pizzolato 2012-04-27 12:36:03 -07:00
parent 19bf1cdb90
commit 57008bb8f5
23 changed files with 48 additions and 47 deletions
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4
I1401/i1401_iq.c
View file

@ -93,8 +93,8 @@ ind[IN_INC] = 0; /* clear inq clear */
switch (mod) { /* case on mod */
case BCD_R: /* input */
/* if (ind[IN_INR] == 0)
/* return SCPE_OK; /* return if no req */
/* if (ind[IN_INR] == 0) */
/* return SCPE_OK; *//* return if no req */
ind[IN_INR] = 0; /* clear req */
puts_tty ("[Enter]\r\n"); /* prompt */
for (i = 0; M[BS] != (BCD_GRPMRK + WM); i++) { /* until GM + WM */

2
I1620/i1620_cd.c
View file

@ -109,7 +109,7 @@ DEVICE cdp_dev = {
- Can punch both 11 (-) and 11-0 (uses ]).
On input, the nul and nl generated by C are converted to
spaces; tabs and line feeds are also converted to spaces.
*/
/* Card reader (ASCII) to numeric (one digit) */
const char cdr_to_num[128] = {

3
Ibm1130/ibm1130_cr.c
View file

@ -2580,7 +2580,8 @@ static t_stat pcr_svc (UNIT *uptr)
break;
case OP_READING:
if (pcr_nready >= 2) { /* if there is a whole column buffered, simulate column interrupt/* pcr_trigger_interrupt_0 - simulate a read response interrupt so OS will read queued column data */
if (pcr_nready >= 2) { /* if there is a whole column buffered, simulate column interrupt*/
/* pcr_trigger_interrupt_0 - simulate a read response interrupt so OS will read queued column data */
pcr_trigger_interrupt_0();
sim_activate(&cr_unit, cr_wait); /* keep checking frequently */

2
Ibm1130/ibm1130_sca.c
View file

@ -217,7 +217,7 @@ REG sca_reg[] = { /* DEVICE STATE/SETTABLE PARAMETERS: */
{ HRDATA (SCADSW, sca_dsw, 16) }, /* device status word */
{ DRDATA (SICHAR, sichar, 8), PV_LEFT }, /* sync/idle character */
{ DRDATA (RCVDCHAR, rcvd_char, 8), PV_LEFT }, /* most recently received character */
{ DRDATA (FRAME, sca_frame, 8), PV_LEFT }, /* frame bits (6, 7 or 8)
{ DRDATA (FRAME, sca_frame, 8), PV_LEFT }, /* frame bits (6, 7 or 8) */
{ DRDATA (SCASTATE, sca_state, 32), PV_LEFT }, /* current state */
{ DRDATA (CTIME, sca_cwait, 32), PV_LEFT }, /* inter-character wait */
{ DRDATA (ITIME, sca_iwait, 32), PV_LEFT }, /* idle wait (polling interval for socket connects) */

2
Interdata/id_idc.c
View file

@ -96,7 +96,7 @@
/* Drive status, ^ = dynamic, * = in unit status */
#define STD_WRP 0x80 /* ^write prot */
/* 0x40 /* unused */
/* 0x40 *//* unused */
#define STD_ACH 0x20 /* alt chan busy NI */
#define STD_UNS 0x10 /* *unsafe */
#define STD_NRDY 0x08 /* ^not ready */

8
NOVA/nova_mta.c
View file

@ -493,10 +493,10 @@ if ((uptr->flags & UNIT_ATT) == 0) /* offline? */
change = (uptr->USTAT ^ newsta) & STA_MON; /* changes? */
uptr->USTAT = newsta & STA_DYN; /* update status */
if (change) {
/* if (mta_ep) { /* if polling */
/* u = uptr - mta_dev.units; /* unit num */
/* mta_sta = (mta_sta & ~STA_UNIT) | (u << STA_V_UNIT);
/* set polling interupt...
/* if (mta_ep) { *//* if polling */
/* u = uptr - mta_dev.units; *//* unit num */
/* mta_sta = (mta_sta & ~STA_UNIT) | (u << STA_V_UNIT); */
/* set polling interupt... */
/* } */
mta_sta = mta_sta | STA_CHG; /* flag change */
}

24
PDP10/pdp10_cpu.c
View file

@ -865,8 +865,8 @@ case 0037: Write (040, UUOWORD, MM_CUR); /* store op, ac, ea */
/* Floating point, bytes, multiple precision (0100 - 0177) */
/* case 0100: MUUO /* UJEN */
/* case 0101: MUUO /* unassigned */
/* case 0100: MUUO *//* UJEN */
/* case 0101: MUUO *//* unassigned */
case 0102: if (Q_ITS && !TSTF (F_USR)) { /* GFAD (KL), XCTRI (ITS) */
inst = Read (ea, MM_OPND);
pflgs = pflgs | ac;
@ -879,10 +879,10 @@ case 0103: if (Q_ITS && !TSTF (F_USR)) { /* GFSB (KL), XCTR (ITS)
goto XCT;
}
goto MUUO;
/* case 0104: MUUO /* JSYS (T20) */
/* case 0104: MUUO *//* JSYS (T20) */
case 0105: AC(ac) = adjsp (AC(ac), ea); break; /* ADJSP */
/* case 0106: MUUO /* GFMP (KL)*/
/* case 0107: MUUO /* GFDV (KL) */
/* case 0106: MUUO *//* GFMP (KL)*/
/* case 0107: MUUO *//* GFDV (KL) */
case 0110: RD2; dfad (ac, rs, 0); break; /* DFAD */
case 0111: RD2; dfad (ac, rs, 1); break; /* DFSB */
case 0112: RD2; dfmp (ac, rs); break; /* DFMP */
@ -909,8 +909,8 @@ case 0124: G2AC; WR2; break; /* DMOVEM */
case 0125: G2AC; DMOVN (rs); WR2; DMOVNF; break; /* DMOVNM */
case 0126: RD; fix (ac, mb, 1); break; /* FIXR */
case 0127: RD; AC(ac) = fltr (mb); break; /* FLTR */
/* case 0130: MUUO /* UFA */
/* case 0131: MUUO /* DFN */
/* case 0130: MUUO *//* UFA */
/* case 0131: MUUO *//* DFN */
case 0132: AC(ac) = fsc (AC(ac), ea); break; /* FSC */
case 0133: if (!ac) /* IBP */
ibp (ea, pflgs);
@ -920,7 +920,7 @@ case 0135: LDB; break; /* LDB */
case 0136: CIBP; DPB; CLRF (F_FPD); break; /* IDBP */
case 0137: DPB; break; /* DPB */
case 0140: RD; AC(ac) = FAD (mb); break; /* FAD */
/* case 0141: MUUO /* FADL */
/* case 0141: MUUO *//* FADL */
case 0142: RM; mb = FAD (mb); WR; break; /* FADM */
case 0143: RM; AC(ac) = FAD (mb); WRAC; break; /* FADB */
case 0144: RD; AC(ac) = FADR (mb); break; /* FADR */
@ -928,7 +928,7 @@ case 0145: AC(ac) = FADR (IMS); break; /* FADRI */
case 0146: RM; mb = FADR (mb); WR; break; /* FADRM */
case 0147: RM; AC(ac) = FADR (mb); WRAC; break; /* FADRB */
case 0150: RD; AC(ac) = FSB (mb); break; /* FSB */
/* case 0151: MUUO /* FSBL */
/* case 0151: MUUO *//* FSBL */
case 0152: RM; mb = FSB (mb); WR; break; /* FSBM */
case 0153: RM; AC(ac) = FSB (mb); WRAC; break; /* FSBB */
case 0154: RD; AC(ac) = FSBR (mb); break; /* FSBR */
@ -936,7 +936,7 @@ case 0155: AC(ac) = FSBR (IMS); break; /* FSBRI */
case 0156: RM; mb = FSBR (mb); WR; break; /* FSBRM */
case 0157: RM; AC(ac) = FSBR (mb); WRAC; break; /* FSBRB */
case 0160: RD; AC(ac) = FMP (mb); break; /* FMP */
/* case 0161: MUUO /* FMPL */
/* case 0161: MUUO *//* FMPL */
case 0162: RM; mb = FMP (mb); WR; break; /* FMPM */
case 0163: RM; AC(ac) = FMP (mb); WRAC; break; /* FMPB */
case 0164: RD; AC(ac) = FMPR (mb); break; /* FMPR */
@ -944,7 +944,7 @@ case 0165: AC(ac) = FMPR (IMS); break; /* FMPRI */
case 0166: RM; mb = FMPR (mb); WR; break; /* FMPRM */
case 0167: RM; AC(ac) = FMPR (mb); WRAC; break; /* FMPRB */
case 0170: RD; if (FDV (mb)) S1AC; break; /* FDV */
/* case 0171: MUUO /* FDVL */
/* case 0171: MUUO *//* FDVL */
case 0172: RM; if (FDV (mb)) WR1; break; /* FDVM */
case 0173: RM; if (FDV (mb)) { S1AC; WRAC; } break; /* FDVB */
case 0174: RD; if (FDVR (mb)) S1AC; break; /* FDVR */
@ -1008,7 +1008,7 @@ case 0250: RM; WRAC; AC(ac) = mb; break; /* EXCH */
case 0251: blt (ac, ea, pflgs); break; /* BLT */
case 0252: AOBAC; if (TGE (AC(ac))) JUMP (ea); break; /* AOBJP */
case 0253: AOBAC; if (TL (AC(ac))) JUMP (ea); break; /* AOBJN */
/* case 0254: /* shown later /* JRST */
/* case 0254: *//* shown later *//* JRST */
case 0255: if (flags & (ac << 14)) { /* JFCL */
JUMP (ea);
CLRF (ac << 14);

4
PDP10/pdp10_defs.h
View file

@ -587,9 +587,9 @@ typedef t_int64 d10; /* PDP-10 data (36b) */
/* Unibus I/O constants */
#define READ 0 /* PDP11 compatible */
/* #define READC 1 /* console read */
/* #define READC 1 *//* console read */
#define WRITE 2
/* #define WRITEC 3 /* console write */
/* #define WRITEC 3 *//* console write */
#define WRITEB 4
#define IO_V_UBA 18 /* UBA in I/O addr */
#define IO_N_UBA 16 /* max num of UBA's */

6
PDP10/pdp10_lp20.c
View file

@ -58,10 +58,10 @@
#define TX_DMASK 07777
#define TX_V_FL 8 /* flags */
#define TX_M_FL 017
/* define TX_INTR 04000 /* interrupt */
/* define TX_INTR 04000 *//* interrupt */
#define TX_DELH 02000 /* delimiter */
/* define TX_XLAT 01000 /* translate */
/* define TX_DVFU 00400 /* DAVFU */
/* define TX_XLAT 01000 *//* translate */
/* define TX_DVFU 00400 *//* DAVFU */
#define TX_SLEW 00020 /* chan vs slew */
#define TX_VMASK 00017 /* spacing mask */
#define TX_CHR 0 /* states: pr char */

2
PDP10/pdp10_sys.c
View file

@ -118,7 +118,7 @@ const char *sim_stop_messages[] = {
#define EXE_DIR 01776 /* EXE directory */
#define EXE_VEC 01775 /* EXE entry vec */
#define EXE_PDV 01774 /* EXE ignored */
#define EXE_END 01777 /* EXE end
#define EXE_END 01777 /* EXE end */
/* RIM10 loader

10
PDP11/pdp11_mscp.h
View file

@ -211,7 +211,7 @@
#define CMD_REFL 2 /* ref # */
#define CMD_REFH 3
#define CMD_UN 4 /* unit # */
/* 5 /* reserved */
/* 5 *//* reserved */
#define CMD_OPC 6 /* opcode */
#define CMD_MOD 7 /* modifier */
@ -256,14 +256,14 @@
/* Flush - 10 W status (8 undefined) */
#define FLU_LNT 32
/* 8 - 15 /* reserved */
/* 8 - 15 *//* reserved */
#define FLU_POSL 16 /* position */
#define FLU_POSH 17
/* Write tape mark - 10W status (8 undefined) */
#define WTM_LNT 32
/* 8 - 15 /* reserved */
/* 8 - 15 *//* reserved */
#define WTM_POSL 16 /* position */
#define WTM_POSH 17
@ -399,8 +399,8 @@
#define RW_BAH 11
#define RW_MAPL 12 /* map table */
#define RW_MAPH 13
/* 14 /* reserved */
/* 15 /* reserved */
/* 14 *//* reserved */
/* 15 *//* reserved */
/* Disk specific parameters */

2
PDP11/pdp11_rq.c
View file

@ -1769,7 +1769,7 @@ if (bc & 1) /* odd byte cnt? */
return (ST_HST | SB_HST_OC);
if (bc & 0xF0000000) /* 'reasonable' bc? */
return (ST_CMD | I_BCNT);
/* if (lbn & 0xF0000000) return (ST_CMD | I_LBN); /* 'reasonable' lbn? */
/* if (lbn & 0xF0000000) return (ST_CMD | I_LBN); *//* 'reasonable' lbn? */
if (lbn >= maxlbn) { /* accessing RCT? */
if (lbn >= (maxlbn + drv_tab[dtyp].rcts)) /* beyond copy 1? */
return (ST_CMD | I_LBN); /* lbn err */

2
PDP11/pdp11_tc.c
View file

@ -992,7 +992,7 @@ switch (fnc) { /* at speed, check fnc *
if (ba >= uptr->hwmark)
uptr->hwmark = ba + 1;
}
/* else /* ignore hdr */
/* else *//* ignore hdr */
sim_activate (uptr, DT_WSIZE * dt_ltime);
DT_SETDONE; /* set done */
break;

2
PDP11/pdp11_tm.c
View file

@ -377,7 +377,7 @@ if (f == MTC_UNLOAD) { /* unload? */
}
else if (f == MTC_REWIND) /* rewind */
uptr->USTAT = uptr->USTAT | STA_REW; /* rewinding */
/* else /* uncomment this else if rewind/unload don't set done */
/* else *//* uncomment this else if rewind/unload don't set done */
tm_cmd = tm_cmd & ~MTC_DONE; /* clear done */
CLR_INT (TM); /* clear int */
sim_activate (uptr, tm_time); /* start io */

2
PDP11/pdp11_tq.c
View file

@ -834,7 +834,7 @@ else { /* valid cmd */
tq_enqt (&uptr->pktq, pkt); /* do later */
return OK;
}
/* if (tq_cmf[cmd] & MD_CDL) /* clr cch lost? */
/* if (tq_cmf[cmd] & MD_CDL) *//* clr cch lost? */
/* uptr->flags = uptr->flags & ~UNIT_CDL; */
if ((mdf & MD_CSE) && (uptr->flags & UNIT_SXC)) /* clr ser exc? */
uptr->flags = uptr->flags & ~UNIT_SXC;

4
PDP11/pdp11_xu.c
View file

@ -1041,7 +1041,7 @@ void xu_process_receive(CTLR* xu)
sim_debug(DBG_TRC, xu->dev, "xu_process_receive(), buffers: %d\n", xu->var->rrlen);
/* xu_dump_rxring(xu); /* debug receive ring */
/* xu_dump_rxring(xu); *//* debug receive ring */
/* process only when in the running state, and host buffers are available */
if ((state != STATE_RUNNING) || no_buffers)
@ -1213,7 +1213,7 @@ void xu_process_transmit(CTLR* xu)
t_stat rstatus, wstatus;
sim_debug(DBG_TRC, xu->dev, "xu_process_transmit()\n");
/* xu_dump_txring(xu); /* debug receive ring */
/* xu_dump_txring(xu); *//* debug receive ring */
for (;;) {

2
PDP18B/pdp18b_dt.c
View file

@ -1147,7 +1147,7 @@ switch (fnc) { /* at speed, check fnc *
if (ba >= uptr->hwmark)
uptr->hwmark = ba + 1;
}
/* /* ignore hdr */
/* ignore hdr */
sim_activate (uptr, DT_WSIZE * dt_ltime);
if (M[DT_WC] == 0)
dt_substate = DTO_WCO;

2
PDP8/pdp8_dt.c
View file

@ -964,7 +964,7 @@ switch (fnc) { /* at speed, check fnc *
if (ba >= uptr->hwmark)
uptr->hwmark = ba + 1;
}
/* /* ignore hdr */
/* ignore hdr */
sim_activate (uptr, DT_WSIZE * dt_ltime);
if (M[DT_WC] == 0)
dt_substate = DTO_WCO;

2
PDP8/pdp8_mt.c
View file

@ -120,7 +120,7 @@
#define STA_CPE (00002 << 12) /* compare error */
#define STA_ILL (00001 << 12) /* illegal */
#define STA_9TK 00040 /* 9 track */
/* #define STA_BAD 00020 /* bad tape?? */
/* #define STA_BAD 00020 *//* bad tape?? */
#define STA_INC 00010 /* increment error */
#define STA_LAT 00004 /* lateral par error */
#define STA_CRC 00002 /* CRC error */

2
VAX/vax780_sbi.c
View file

@ -224,7 +224,7 @@ CTAB vax780_cmd[] = {
Instead, the interrupt handler for a given UBA IPL
reads a vector register that contains the Unibus vector
for that IPL.
*/
/* Find highest priority vectorable interrupt */
int32 eval_int (void)

4
VAX/vax_cis.c
View file

@ -1225,8 +1225,8 @@ for (i = 0; i <= end; i++) { /* loop thru string */
}
if ((i == end) && ((lnt & 1) == 0))
c = c & 0xF;
/* if (((c & 0xF0) > 0x90) || /* check hi digit */
/* ((c & 0x0F) > 0x09)) /* check lo digit */
/* if (((c & 0xF0) > 0x90) || *//* check hi digit */
/* ((c & 0x0F) > 0x09)) *//* check lo digit */
/* RSVD_OPND_FAULT; */
src->val[i / 4] = src->val[i / 4] | (c << ((i % 4) * 8));
} /* end for */

2
VAX/vax_defs.h
View file

@ -473,7 +473,7 @@
#define PR_PACV 2 /* pte ACV (780) */
#define PR_PLNV 3 /* pte len viol */
#define PR_TNV 4 /* TNV */
/* #define PR_TB 5 /* impossible */
/* #define PR_TB 5 *//* impossible */
#define PR_PTNV 6 /* pte TNV */
#define PR_OK 7 /* ok */
#define MM_PARAM(w,p) (((w)? 4: 0) | ((p) & 3)) /* fault param */

2
VAX/vaxmod_defs.h
View file

@ -178,7 +178,7 @@
/* CMCTL registers */
/* #define CMCTLSIZE (18 << 2) /* 18 registers */
/* #define CMCTLSIZE (18 << 2) *//* 18 registers */
#define CMCTLSIZE (19 << 2) /* KA655X extra reg */
#define CMCTLBASE (REGBASE + 0x100) /* CMCTL addr base */