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PDP11: Addition of option to disable BEVENT for 11/03 and 11/23 CPUs (Bob Supnik's latest state).

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Mark Pizzolato 2015-12-30 12:01:58 -08:00
parent ac837e5be2
commit 59947e8ceb
5 changed files with 23 additions and 11 deletions
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6
PDP11/pdp11_cpu.c
View file

@ -1,6 +1,6 @@
/* pdp11_cpu.c: PDP-11 CPU simulator /* pdp11_cpu.c: PDP-11 CPU simulator
Copyright (c) 1993-2013, Robert M Supnik Copyright (c) 1993-2015, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"), copy of this software and associated documentation files (the "Software"),
@ -25,6 +25,8 @@
cpu PDP-11 CPU cpu PDP-11 CPU
30-Dec-15 RMS Added NOBEVENT option for 11/03, 11/23
29-Dec-15 RMS Call build_dib_tab during reset (Mark Pizzolato)
05-Dec-13 RMS Fixed bug in CSM (John Dundas) 05-Dec-13 RMS Fixed bug in CSM (John Dundas)
23-Oct-13 RMS Fixed PS behavior on initialization and boot 23-Oct-13 RMS Fixed PS behavior on initialization and boot
10-Apr-13 RMS MMR1 does not track PC changes (Johnny Billquist) 10-Apr-13 RMS MMR1 does not track PC changes (Johnny Billquist)
@ -588,6 +590,8 @@ MTAB cpu_mod[] = {
{ MTAB_XTD|MTAB_VDV, OPT_CIS, NULL, "NOCIS", &cpu_clr_opt }, { MTAB_XTD|MTAB_VDV, OPT_CIS, NULL, "NOCIS", &cpu_clr_opt },
{ MTAB_XTD|MTAB_VDV, OPT_MMU, NULL, "MMU", &cpu_set_opt }, { MTAB_XTD|MTAB_VDV, OPT_MMU, NULL, "MMU", &cpu_set_opt },
{ MTAB_XTD|MTAB_VDV, OPT_MMU, NULL, "NOMMU", &cpu_clr_opt }, { MTAB_XTD|MTAB_VDV, OPT_MMU, NULL, "NOMMU", &cpu_clr_opt },
{ MTAB_XTD|MTAB_VDV, OPT_BVT, NULL, "BEVENT", &cpu_set_opt, NULL, NULL, "Enable BEVENT line (11/03, 11/23 only)" },
{ MTAB_XTD|MTAB_VDV, OPT_BVT, NULL, "NOBEVENT", &cpu_clr_opt, NULL, NULL, "Disable BEVENT line (11/03, 11/23 only)" },
{ MTAB_XTD|MTAB_VDV, 0, "IDLE", "IDLE", &sim_set_idle, &sim_show_idle }, { MTAB_XTD|MTAB_VDV, 0, "IDLE", "IDLE", &sim_set_idle, &sim_show_idle },
{ MTAB_XTD|MTAB_VDV, 0, NULL, "NOIDLE", &sim_clr_idle, NULL }, { MTAB_XTD|MTAB_VDV, 0, NULL, "NOIDLE", &sim_clr_idle, NULL },
{ UNIT_MSIZE, 16384, NULL, "16K", &cpu_set_size}, { UNIT_MSIZE, 16384, NULL, "16K", &cpu_set_size},

3
PDP11/pdp11_cpumod.c
View file

@ -247,7 +247,8 @@ CNFTAB cnf_tab[] = {
static const char *opt_name[] = { static const char *opt_name[] = {
"Unibus", "Qbus", "EIS", "NOEIS", "FIS", "NOFIS", "Unibus", "Qbus", "EIS", "NOEIS", "FIS", "NOFIS",
"FPP", "NOFPP", "CIS", "NOCIS", "MMU", "NOMMU", "FPP", "NOFPP", "CIS", "NOCIS", "MMU", "NOMMU",
"RH11", "RH70", "PARITY", "NOPARITY", "Unibus map", "No map", NULL "RH11", "RH70", "PARITY", "NOPARITY", "Unibus map", "No map",
"BEVENT enabled", "BEVENT disabled", NULL
}; };
static const char *jcsr_val[4] = { static const char *jcsr_val[4] = {

11
PDP11/pdp11_cpumod.h
View file

@ -1,6 +1,6 @@
/* pdp11_cpumod.h: PDP-11 CPU model definitions /* pdp11_cpumod.h: PDP-11 CPU model definitions
Copyright (c) 2004-2008, Robert M Supnik Copyright (c) 2004-2015, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"), copy of this software and associated documentation files (the "Software"),
@ -23,6 +23,7 @@
used in advertising or otherwise to promote the sale, use or other dealings used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik. in this Software without prior written authorization from Robert M Supnik.
30-Dec-15 RMS Added 11/03, 11/23 BEVENT disable
22-Apr-08 RMS Added 11/70 MBRK register 22-Apr-08 RMS Added 11/70 MBRK register
30-Aug-05 RMS Added additional 11/60 registers 30-Aug-05 RMS Added additional 11/60 registers
*/ */
@ -30,8 +31,8 @@
#ifndef PDP11_CPUMOD_H_ #ifndef PDP11_CPUMOD_H_
#define PDP11_CPUMOD_H_ 0 #define PDP11_CPUMOD_H_ 0
#define SOP_1103 (BUS_Q) #define SOP_1103 (BUS_Q|OPT_BVT)
#define OPT_1103 (OPT_EIS|OPT_FIS) #define OPT_1103 (OPT_EIS|OPT_FIS|OPT_BVT)
#define PSW_1103 0000377 #define PSW_1103 0000377
#define SOP_1104 (BUS_U) #define SOP_1104 (BUS_U)
@ -46,8 +47,8 @@
#define OPT_1120 0 #define OPT_1120 0
#define PSW_1120 0000377 #define PSW_1120 0000377
#define SOP_1123 (BUS_Q|OPT_EIS|OPT_FPP|OPT_MMU) #define SOP_1123 (BUS_Q|OPT_EIS|OPT_FPP|OPT_MMU|OPT_BVT)
#define OPT_1123 (OPT_FPP|OPT_CIS) #define OPT_1123 (OPT_FPP|OPT_CIS|OPT_BVT)
#define PSW_F 0170777 #define PSW_F 0170777
#define PAR_F 0177777 #define PAR_F 0177777
#define PDR_F 0077516 #define PDR_F 0077516

4
PDP11/pdp11_defs.h
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@ -1,6 +1,6 @@
/* pdp11_defs.h: PDP-11 simulator definitions /* pdp11_defs.h: PDP-11 simulator definitions
Copyright (c) 1993-2011, Robert M Supnik Copyright (c) 1993-2015, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"), copy of this software and associated documentation files (the "Software"),
@ -26,6 +26,7 @@
The author gratefully acknowledges the help of Max Burnet, Megan Gentry, The author gratefully acknowledges the help of Max Burnet, Megan Gentry,
and John Wilson in resolving questions about the PDP-11 and John Wilson in resolving questions about the PDP-11
30-Dec-15 RMS Added NOBVT option
23-Oct-13 RMS Added cpu_set_boot prototype 23-Oct-13 RMS Added cpu_set_boot prototype
02-Sep-13 RMS Added third Massbus adapter and RS drive 02-Sep-13 RMS Added third Massbus adapter and RS drive
11-Dec-11 RMS Fixed priority of PIRQ vs IO; added INT_INTERNALn 11-Dec-11 RMS Fixed priority of PIRQ vs IO; added INT_INTERNALn
@ -174,6 +175,7 @@
#define OPT_RH11 (1u << 6) /* RH11 */ #define OPT_RH11 (1u << 6) /* RH11 */
#define OPT_PAR (1u << 7) /* parity */ #define OPT_PAR (1u << 7) /* parity */
#define OPT_UBM (1u << 8) /* UBM */ #define OPT_UBM (1u << 8) /* UBM */
#define OPT_BVT (1u << 9) /* BEVENT */
#define CPUT(x) ((cpu_type & (x)) != 0) #define CPUT(x) ((cpu_type & (x)) != 0)
#define CPUO(x) ((cpu_opt & (x)) != 0) #define CPUO(x) ((cpu_opt & (x)) != 0)

8
PDP11/pdp11_stddev.c
View file

@ -1,6 +1,6 @@
/* pdp11_stddev.c: PDP-11 standard I/O devices simulator /* pdp11_stddev.c: PDP-11 standard I/O devices simulator
Copyright (c) 1993-2012, Robert M Supnik Copyright (c) 1993-2015, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"), copy of this software and associated documentation files (the "Software"),
@ -26,6 +26,7 @@
tti,tto DL11 terminal input/output tti,tto DL11 terminal input/output
clk KW11L (and other) line frequency clock clk KW11L (and other) line frequency clock
30-Dec-15 RMS Added NOBEVENT support
18-Apr-12 RMS Modified to use clock coscheduling 18-Apr-12 RMS Modified to use clock coscheduling
20-May-08 RMS Standardized clock delay at 1mips 20-May-08 RMS Standardized clock delay at 1mips
18-Jun-07 RMS Added UNIT_IDLE flag to console input, clock 18-Jun-07 RMS Added UNIT_IDLE flag to console input, clock
@ -473,7 +474,10 @@ t_stat clk_reset (DEVICE *dptr)
sim_register_clock_unit (&clk_unit); /* declare clock unit */ sim_register_clock_unit (&clk_unit); /* declare clock unit */
if (CPUT (HAS_LTCR)) /* reg there? */ if (CPUT (HAS_LTCR)) /* reg there? */
clk_fie = clk_fnxm = 0; clk_fie = clk_fnxm = 0;
else clk_fie = clk_fnxm = 1; /* no, BEVENT */ else {
clk_fnxm = 1; /* no LTCR, set nxm */
clk_fie = CPUO (OPT_BVT); /* ie = 1 unless no BEVENT */
}
clk_tps = clk_default; /* set default tps */ clk_tps = clk_default; /* set default tps */
clk_csr = CSR_DONE; /* set done */ clk_csr = CSR_DONE; /* set done */
CLR_INT (CLK); CLR_INT (CLK);