TIMER: Enabled catchup clock ticks
Historically, hosts which have a tick size slower than the tick a simulator wants to implement can't idle effectively and keep good time. This change allows simulators which call sim_rtcn_tick_ack() to provide useful idling behavior while still keeping the passage of wall clock time to time in the simulator accurate.
This commit is contained in:
Mark Pizzolato
parent
1c3c50fd26
commit
5d8553e24c
3 changed files with 121 additions and 91 deletions
14
scp.c
14
scp.c
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@ -1115,6 +1115,15 @@ static const char simh_help[] =
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"+set throttle {x{M|K|%%}}|{x/t}\n"
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"++++++++ set simulation rate\n"
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"+set nothrottle set simulation rate to maximum\n"
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#define HLP_SET_CLOCKS "*Commands SET Clocks"
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"3Clock\n"
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#if defined (SIM_ASYNCH_CLOCKS)
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"+set clock asynch enable asynchronous clocks\n"
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"+set clock noasynch disable asynchronous clocks\n"
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#endif
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"+set clock nocatchup disable catchup clock ticks\n"
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"+set clock catchup enable catchup clock ticks\n"
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"+set clock calib=n%% specify idle calibration skip %%\n"
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#define HLP_SET_ASYNCH "*Commands SET Asynch"
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"3Asynch\n"
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"+set asynch enable asynchronous I/O\n"
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@ -1202,7 +1211,7 @@ static const char simh_help[] =
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#if defined(USE_SIM_VIDEO)
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"+sh{ow} video show video capabilities\n"
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#endif
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"+sh{ow} clocks show calibrated timers\n"
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"+sh{ow} clocks show calibrated timer information\n"
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"+sh{ow} throttle show throttle info\n"
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"+sh{ow} on show on condition actions\n"
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"+h{elp} <dev> show displays the device specific show commands\n"
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@ -1839,6 +1848,7 @@ static CTAB set_glob_tab[] = {
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{ "NODEBUG", &sim_set_deboff, 0, HLP_SET_DEBUG },
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{ "THROTTLE", &sim_set_throt, 1, HLP_SET_THROTTLE },
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{ "NOTHROTTLE", &sim_set_throt, 0, HLP_SET_THROTTLE },
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{ "CLOCKS", &sim_set_timers, 1, HLP_SET_CLOCKS },
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{ "ASYNCH", &sim_set_asynch, 1, HLP_SET_ASYNCH },
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{ "NOASYNCH", &sim_set_asynch, 0, HLP_SET_ASYNCH },
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{ "ENVIRONMENT", &sim_set_environment, 1, HLP_SET_ENVIRON },
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@ -4427,7 +4437,7 @@ static char capac_buf[((CHAR_BIT * sizeof (t_value) * 4 + 3)/3) + 8];
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t_addr kval = (uptr->flags & UNIT_BINK)? 1024: 1000;
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t_addr mval;
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t_addr psize = uptr->capac;
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char *scale, *width;
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const char *scale, *width;
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if (sim_switches & SWMASK ('B'))
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kval = 1024;
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195
sim_timer.c
195
sim_timer.c
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@ -168,7 +168,7 @@ static int32 sim_throt_wait = 0;
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static UNIT *sim_clock_unit[SIM_NTIMERS+1] = {NULL};
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UNIT * volatile sim_clock_cosched_queue[SIM_NTIMERS+1] = {NULL};
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static int32 sim_cosched_interval[SIM_NTIMERS+1];
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static t_bool sim_catchup_ticks = FALSE;
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static t_bool sim_catchup_ticks = TRUE;
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#if defined (SIM_ASYNCH_CLOCKS) && !defined (SIM_ASYNCH_IO)
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#undef SIM_ASYNCH_CLOCKS
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#endif
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@ -686,6 +686,8 @@ static void _rtcn_configure_calibrated_clock (int32 newtmr);
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static void _sim_coschedule_cancel(UNIT *uptr);
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static void _sim_wallclock_cancel (UNIT *uptr);
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static t_bool _sim_wallclock_is_active (UNIT *uptr);
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t_stat sim_timer_show_idle_mode (FILE* st, UNIT* uptr, int32 val, CONST void * desc);
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#if defined(SIM_ASYNCH_CLOCKS)
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static int sim_timespec_compare (struct timespec *a, struct timespec *b)
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@ -869,13 +871,10 @@ if (sim_clock_unit[tmr] == NULL) { /* Not using TIMER units
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if (rtc_clock_catchup_pending[tmr]) { /* catchup tick? */
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++rtc_clock_catchup_ticks[tmr]; /* accumulating which were catchups */
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rtc_clock_catchup_pending[tmr] = FALSE;
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if (!sim_asynch_timer) /* non asynch timers? */
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return rtc_currd[tmr]; /* return now avoiding counting catchup tick in calibration */
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}
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rtc_ticks[tmr] = rtc_ticks[tmr] + 1; /* count ticks */
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if (rtc_ticks[tmr] < ticksper) { /* 1 sec yet? */
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if (rtc_ticks[tmr] < ticksper) /* 1 sec yet? */
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return rtc_currd[tmr];
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}
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rtc_ticks[tmr] = 0; /* reset ticks */
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rtc_elapsed[tmr] = rtc_elapsed[tmr] + 1; /* count sec */
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if (sim_throt_type != SIM_THROT_NONE) {
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@ -885,9 +884,8 @@ if (sim_throt_type != SIM_THROT_NONE) {
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sim_debug (DBG_CAL, &sim_timer_dev, "using throttle calibrated value - result: %d\n", rtc_currd[tmr]);
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return rtc_currd[tmr];
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}
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if (!rtc_avail) { /* no timer? */
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if (!rtc_avail) /* no timer? */
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return rtc_currd[tmr];
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}
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if (sim_calb_tmr != tmr) {
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rtc_currd[tmr] = (int32)(sim_timer_inst_per_sec()/ticksper);
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sim_debug (DBG_CAL, &sim_timer_dev, "calibrated calibrated tmr=%d against system tmr=%d, tickper=%d (result: %d)\n", tmr, sim_calb_tmr, ticksper, rtc_currd[tmr]);
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@ -1048,12 +1046,23 @@ fprintf (st, "Minimum Host Sleep Time: %d ms (%dHz)\n", sim_os_sleep_min_m
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if (sim_os_sleep_min_ms != sim_os_sleep_inc_ms)
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fprintf (st, "Minimum Host Sleep Incr Time: %d ms\n", sim_os_sleep_inc_ms);
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fprintf (st, "Host Clock Resolution: %d ms\n", sim_os_clock_resoluton_ms);
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if (sim_idle_enab)
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fprintf (st, "Time before Idling starts: %d seconds\n", sim_idle_stable);
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fprintf (st, "Execution Rate: %.0f instructions/sec\n", inst_per_sec);
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if (sim_idle_enab) {
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fprintf (st, "Idling: Enabled\n");
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fprintf (st, "Time before Idling starts: %d seconds\n", sim_idle_stable);
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}
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if (sim_throt_type != SIM_THROT_NONE) {
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sim_show_throt (st, NULL, uptr, val, desc);
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}
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fprintf (st, "Calibrated Timer: %s\n", (calb_tmr == -1) ? "Undetermined" :
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((calb_tmr == SIM_NTIMERS) ? "Internal Timer" :
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(sim_clock_unit[calb_tmr] ? sim_uname(sim_clock_unit[calb_tmr]) : "")));
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if (calb_tmr == SIM_NTIMERS)
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fprintf (st, "Catchup Ticks: %s for clocks ticking faster than %d Hz\n", sim_catchup_ticks ? "Enabled" : "Disabled", sim_os_tick_hz);
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if (sim_idle_calib_pct == 0)
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fprintf (st, "Calibration: Always\n");
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else
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fprintf (st, "Calibration: Skipped when Idle exceeds %d%%\n", sim_idle_calib_pct);
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fprintf (st, "\n");
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for (tmr=clocks=0; tmr<=SIM_NTIMERS; ++tmr) {
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if (0 == rtc_initd[tmr])
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@ -1187,13 +1196,6 @@ pthread_mutex_unlock (&sim_timer_lock);
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return SCPE_OK;
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}
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t_stat sim_timer_show_idle_mode (FILE* st, UNIT* uptr, int32 val, CONST void * desc)
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{
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if (sim_throt_type != SIM_THROT_NONE)
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return sim_show_throt (st, NULL, uptr, val, desc);
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return sim_show_idle (st, uptr, val, desc);
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}
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REG sim_timer_reg[] = {
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{ NULL }
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};
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@ -1211,19 +1213,18 @@ REG sim_throttle_reg[] = {
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/* Clear, Set and show catchup */
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/* Clear catchup */
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/* Set/Clear catchup */
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t_stat sim_timer_clr_catchup (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
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t_stat sim_timer_set_catchup (int32 flag, CONST char *cptr)
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{
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if (sim_catchup_ticks)
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sim_catchup_ticks = FALSE;
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return SCPE_OK;
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}
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t_stat sim_timer_set_catchup (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
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{
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if (!sim_catchup_ticks)
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sim_catchup_ticks = TRUE;
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if (flag) {
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if (!sim_catchup_ticks)
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sim_catchup_ticks = TRUE;
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}
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else {
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if (sim_catchup_ticks)
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sim_catchup_ticks = FALSE;
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}
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return SCPE_OK;
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}
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@ -1233,9 +1234,9 @@ fprintf (st, "Calibrated Ticks%s", sim_catchup_ticks ? " with Catchup Ticks" : "
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return SCPE_OK;
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}
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/* Set and show idle calibration threshold */
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/* Set idle calibration threshold */
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t_stat sim_timer_set_idle_pct (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
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t_stat sim_timer_set_idle_pct (int32 flag, CONST char *cptr)
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{
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t_stat r;
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int32 newpct;
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@ -1251,52 +1252,37 @@ sim_idle_calib_pct = (uint32)newpct;
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return SCPE_OK;
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}
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t_stat sim_timer_show_idle_pct (FILE *st, UNIT *uptr, int32 val, CONST void *desc)
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/* Set/Clear asynch */
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t_stat sim_timer_set_async (int32 flag, CONST char *cptr)
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{
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if (sim_idle_calib_pct == 0)
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fprintf (st, "Calibration Always");
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else
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fprintf (st, "Calibration Skipped when Idle exceeds %d%%", sim_idle_calib_pct);
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return SCPE_OK;
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}
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/* Clear, Set and show asynch */
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/* Clear asynch */
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t_stat sim_timer_clr_async (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
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{
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if (sim_asynch_timer) {
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sim_asynch_timer = FALSE;
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sim_timer_change_asynch ();
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if (flag) {
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if (sim_asynch_enabled && (!sim_asynch_timer)) {
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sim_asynch_timer = TRUE;
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sim_timer_change_asynch ();
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}
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}
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else {
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if (sim_asynch_timer) {
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sim_asynch_timer = FALSE;
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sim_timer_change_asynch ();
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}
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}
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return SCPE_OK;
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}
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t_stat sim_timer_set_async (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
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{
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if (sim_asynch_enabled && (!sim_asynch_timer)) {
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sim_asynch_timer = TRUE;
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sim_timer_change_asynch ();
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}
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return SCPE_OK;
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}
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t_stat sim_timer_show_async (FILE *st, UNIT *uptr, int32 val, CONST void *desc)
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{
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fprintf (st, "%s", sim_asynch_timer ? "Asynchronous" : "Synchronous");
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return SCPE_OK;
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}
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static CTAB set_timer_tab[] = {
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#if defined (SIM_ASYNCH_CLOCKS)
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{ "ASYNCH", &sim_timer_set_async, 1 },
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{ "NOASYNCH", &sim_timer_set_async, 0 },
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#endif
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{ "CATCHUP", &sim_timer_set_catchup, 1 },
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{ "NOCATCHUP", &sim_timer_set_catchup, 0 },
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{ "CALIB", &sim_timer_set_idle_pct, 0 },
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{ NULL, NULL, 0 }
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};
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MTAB sim_timer_mod[] = {
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#if defined (SIM_ASYNCH_CLOCKS)
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{ MTAB_VDV, MTAB_VDV, "ASYNCH", "ASYNCH", &sim_timer_set_async, &sim_timer_show_async, NULL, "Enables/Displays Asynchronous Timer mode" },
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{ MTAB_VDV, 0, NULL, "NOASYNCH", &sim_timer_clr_async, NULL, NULL, "Disables Asynchronous Timer operation" },
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#endif
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{ MTAB_VDV, MTAB_VDV, "CATCHUP", "CATCHUP", &sim_timer_set_catchup, &sim_timer_show_catchup, NULL, "Enables/Displays Clock Tick catchup mode" },
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{ MTAB_VDV, 0, NULL, "NOCATCHUP", &sim_timer_clr_catchup, NULL, NULL, "Disables Clock Tick catchup mode" },
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{ MTAB_VDV|MTAB_VALR, 0, "CALIB", "CALIB=nn", &sim_timer_set_idle_pct, &sim_timer_show_idle_pct, NULL, "Configure/Display Calibration Idle Suppression %" },
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{ MTAB_VDV, 0, "IDLE", NULL, NULL, &sim_timer_show_idle_mode, NULL, "Display Idle/Throttle mode" },
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{ 0 },
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};
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@ -1312,6 +1298,31 @@ DEVICE sim_throttle_dev = {
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"THROT-TLE", &sim_throttle_unit, sim_throttle_reg, NULL, 1};
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/* SET CLOCK command */
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t_stat sim_set_timers (int32 arg, CONST char *cptr)
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{
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char *cvptr, gbuf[CBUFSIZE];
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CTAB *ctptr;
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t_stat r;
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if ((cptr == NULL) || (*cptr == 0))
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return SCPE_2FARG;
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while (*cptr != 0) { /* do all mods */
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cptr = get_glyph_nc (cptr, gbuf, ','); /* get modifier */
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if ((cvptr = strchr (gbuf, '='))) /* = value? */
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*cvptr++ = 0;
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get_glyph (gbuf, gbuf, 0); /* modifier to UC */
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if ((ctptr = find_ctab (set_timer_tab, gbuf))) { /* match? */
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r = ctptr->action (ctptr->arg, cvptr); /* do the rest */
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if (r != SCPE_OK)
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return r;
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}
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else return SCPE_NOPARAM;
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}
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return SCPE_OK;
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}
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/* sim_idle - idle simulator until next event or for specified interval
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Inputs:
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@ -1390,8 +1401,16 @@ if ((sim_idle_rate_ms == 0) || (cyc_ms == 0)) { /* not possible? */
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return FALSE;
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}
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w_ms = (uint32) sim_interval / cyc_ms; /* ms to wait */
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w_idle = (w_ms * 1000) / sim_idle_rate_ms; /* intervals to wait * 1000 */
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if (w_idle < 500) { /* shorter than 1/2 a minimum sleep? */
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/* When the host system has a clock tick which is less frequent than the */
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/* simulated system's clock, idling will cause delays which will miss */
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/* simulated clock ticks. To accomodate this, and still allow idling, if */
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/* the simulator acknowledges the processing of clock ticks, then catchup */
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/* ticks can be used to make up for missed ticks. */
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if (rtc_clock_catchup_eligible[tmr])
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w_idle = (sim_interval * 1000) / rtc_currd[tmr]; /* 1000 * pending fraction of tick */
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else
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w_idle = (w_ms * 1000) / sim_idle_rate_ms; /* 1000 * intervals to wait */
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if (w_idle < 500) { /* shorter than 1/2 the interval? */
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if (sin_cyc)
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sim_interval = sim_interval - 1;
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sim_debug (DBG_IDL, &sim_timer_dev, "no wait\n");
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@ -1524,34 +1543,34 @@ return SCPE_OK;
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t_stat sim_show_throt (FILE *st, DEVICE *dnotused, UNIT *unotused, int32 flag, CONST char *cptr)
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{
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if (sim_idle_rate_ms == 0)
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fprintf (st, "Throttling not available\n");
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fprintf (st, "Throttling: Not Available\n");
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else {
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switch (sim_throt_type) {
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case SIM_THROT_MCYC:
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fprintf (st, "Throttle = %d megacycles\n", sim_throt_val);
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fprintf (st, "Throttle: %d megacycles\n", sim_throt_val);
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if (sim_throt_wait)
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fprintf (st, "Throttling achieved by sleeping for %d ms every %d cycles\n", sim_throt_sleep_time, sim_throt_wait);
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fprintf (st, "Throttling by sleeping for: %d ms every %d cycles\n", sim_throt_sleep_time, sim_throt_wait);
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break;
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case SIM_THROT_KCYC:
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fprintf (st, "Throttle = %d kilocycles\n", sim_throt_val);
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fprintf (st, "Throttle: %d kilocycles\n", sim_throt_val);
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if (sim_throt_wait)
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fprintf (st, "Throttling achieved by sleeping for %d ms every %d cycles\n", sim_throt_sleep_time, sim_throt_wait);
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fprintf (st, "Throttling by sleeping for: %d ms every %d cycles\n", sim_throt_sleep_time, sim_throt_wait);
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break;
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case SIM_THROT_PCT:
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fprintf (st, "Throttle = %d%%\n", sim_throt_val);
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fprintf (st, "Throttle: %d%%\n", sim_throt_val);
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if (sim_throt_wait)
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fprintf (st, "Throttling achieved by sleeping for %d ms every %d cycles\n", sim_throt_sleep_time, sim_throt_wait);
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fprintf (st, "Throttling by sleeping for: %d ms every %d cycles\n", sim_throt_sleep_time, sim_throt_wait);
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break;
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case SIM_THROT_SPC:
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fprintf (st, "Throttle = %d ms every %d cycles\n", sim_throt_sleep_time, sim_throt_val);
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fprintf (st, "Throttle: sleep %d ms every %d cycles\n", sim_throt_sleep_time, sim_throt_val);
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break;
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default:
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fprintf (st, "Throttling disabled\n");
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fprintf (st, "Throttling: Disabled\n");
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break;
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}
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}
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@ -1736,11 +1755,6 @@ clock_gettime (CLOCK_REALTIME, now);
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* We accomodate these problems and make up for lost ticks by injecting
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* catch-up ticks to the simulator.
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*
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* We avoid excessive co-scheduled polling during these catch-up ticks
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* to minimize what is likely excessive overhead, thus 'coschedule
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* polling' only occurs on every fourth clock tick when processing
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* catch-up ticks.
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*
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* When necessary, catch-up ticks are scheduled to run under one
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* of two conditions:
|
||||
* 1) after indicated number of instructions in a call by the simulator
|
||||
|
|
@ -1748,6 +1762,9 @@ clock_gettime (CLOCK_REALTIME, now);
|
|||
* mechanism to inform the simh timer facilities when the simulated
|
||||
* system has accepted the most recent clock tick interrupt.
|
||||
* 2) immediately when the simulator calls sim_idle
|
||||
*
|
||||
* catchup ticks are only scheduled (eligible to happen) under these
|
||||
* conditions after at least one tick has been acknowledged.
|
||||
*/
|
||||
|
||||
/* _rtcn_tick_catchup_check - idle simulator until next event or for specified interval
|
||||
|
|
@ -1767,7 +1784,9 @@ if ((!sim_catchup_ticks) ||
|
|||
((tmr < 0) || (tmr >= SIM_NTIMERS)))
|
||||
return FALSE;
|
||||
tnow = sim_timenow_double();
|
||||
if (!rtc_clock_catchup_eligible[tmr]) {
|
||||
if ((rtc_hz[tmr] > sim_os_tick_hz) && /* faster than host tick */
|
||||
(!rtc_clock_catchup_eligible[tmr]) && /* not eligible yet? */
|
||||
(time != -1)) { /* called from ack? */
|
||||
rtc_clock_catchup_base_time[tmr] = tnow;
|
||||
rtc_clock_ticks_tot[tmr] += rtc_clock_ticks[tmr];
|
||||
rtc_clock_ticks[tmr] = 0;
|
||||
|
|
@ -1785,18 +1804,18 @@ if (rtc_clock_catchup_eligible[tmr] &&
|
|||
(tnow > (rtc_clock_catchup_base_time[tmr] + (rtc_calib_tick_time[tmr] + rtc_clock_tick_size[tmr])))) {
|
||||
sim_debug (DBG_QUE, &sim_timer_dev, "_rtcn_tick_catchup_check(%d) - scheduling catchup tick for %s which is behind %s\n", time, sim_uname (sim_clock_unit[tmr]), sim_fmt_secs (tnow > (rtc_clock_catchup_base_time[tmr] + (rtc_calib_tick_time[tmr] + rtc_clock_tick_size[tmr]))));
|
||||
rtc_clock_catchup_pending[tmr] = TRUE;
|
||||
sim_activate_abs (&sim_timer_units[tmr], time);
|
||||
sim_activate_abs (&sim_timer_units[tmr], (time < 0) ? 0 : time);
|
||||
return TRUE;
|
||||
}
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
t_stat sim_rtcn_tick_ack (int32 time, int32 tmr)
|
||||
t_stat sim_rtcn_tick_ack (uint32 time, int32 tmr)
|
||||
{
|
||||
if ((tmr < 0) || (tmr >= SIM_NTIMERS))
|
||||
return SCPE_TIMER;
|
||||
sim_debug (DBG_ACK, &sim_timer_dev, "sim_rtcn_tick_ack - for %s\n", sim_uname (sim_clock_unit[tmr]));
|
||||
_rtcn_tick_catchup_check (tmr, time);
|
||||
_rtcn_tick_catchup_check (tmr, (int32)time);
|
||||
++rtc_calib_ticks_acked[tmr];
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -106,11 +106,12 @@ double sim_timenow_double (void);
|
|||
int32 sim_rtcn_init (int32 time, int32 tmr);
|
||||
int32 sim_rtcn_init_unit (UNIT *uptr, int32 time, int32 tmr);
|
||||
void sim_rtcn_get_time (struct timespec *now, int tmr);
|
||||
t_stat sim_rtcn_tick_ack (int32 time, int32 tmr);
|
||||
t_stat sim_rtcn_tick_ack (uint32 time, int32 tmr);
|
||||
void sim_rtcn_init_all (void);
|
||||
int32 sim_rtcn_calb (int32 ticksper, int32 tmr);
|
||||
int32 sim_rtc_init (int32 time);
|
||||
int32 sim_rtc_calb (int32 ticksper);
|
||||
t_stat sim_set_timers (int32 arg, CONST char *cptr);
|
||||
t_stat sim_show_timers (FILE* st, DEVICE *dptr, UNIT* uptr, int32 val, CONST char* desc);
|
||||
t_stat sim_show_clock_queues (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, CONST char *cptr);
|
||||
t_bool sim_idle (uint32 tmr, t_bool sin_cyc);
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue