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VAX440: Fixed memory sizing and DMA address mapping

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Fixes #687
This commit is contained in:
Matt Burke 2019-04-30 01:40:02 +01:00
parent 63d2eccd64
commit 5e540cea98
3 changed files with 19 additions and 6 deletions
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2
VAX/is1000_sysdev.c
View file

@ -89,8 +89,6 @@ CTAB is1000_cmd[] = {
#define DMANMAPR 32768 /* number of map reg */ #define DMANMAPR 32768 /* number of map reg */
#define DMAMAP_VLD 0x80000000 /* valid */ #define DMAMAP_VLD 0x80000000 /* valid */
#define DMAMAP_PAG 0x0000FFFF /* mem page */ #define DMAMAP_PAG 0x0000FFFF /* mem page */
#define DMAMAP_RD (QBMAP_VLD | QBMAP_PAG)
#define DMAMAP_WR (QBMAP_VLD | QBMAP_PAG)
#define CSR_XDONE 0x01 #define CSR_XDONE 0x01
#define CSR_RDONE 0x02 #define CSR_RDONE 0x02

8
VAX/vax440_defs.h
View file

@ -113,6 +113,7 @@
#define INITMEMSIZE (1 << 24) /* initial memory size */ #define INITMEMSIZE (1 << 24) /* initial memory size */
#define MEMSIZE (cpu_unit.capac) #define MEMSIZE (cpu_unit.capac)
#define ADDR_IS_MEM(x) (((uint32) (x)) < MEMSIZE) #define ADDR_IS_MEM(x) (((uint32) (x)) < MEMSIZE)
#if defined (VAX_46) || defined (VAX_47)
#define MEM_MODIFIERS { UNIT_MSIZE, (1u << 23), NULL, "8M", &cpu_set_size }, \ #define MEM_MODIFIERS { UNIT_MSIZE, (1u << 23), NULL, "8M", &cpu_set_size }, \
{ UNIT_MSIZE, (1u << 24), NULL, "16M", &cpu_set_size }, \ { UNIT_MSIZE, (1u << 24), NULL, "16M", &cpu_set_size }, \
{ UNIT_MSIZE, (1u << 24) + (1u << 23), NULL, "24M", &cpu_set_size }, \ { UNIT_MSIZE, (1u << 24) + (1u << 23), NULL, "24M", &cpu_set_size }, \
@ -122,7 +123,12 @@
{ UNIT_MSIZE, (1u << 25) + (1u << 24) + (1u << 23), NULL, "56M", &cpu_set_size }, \ { UNIT_MSIZE, (1u << 25) + (1u << 24) + (1u << 23), NULL, "56M", &cpu_set_size }, \
{ UNIT_MSIZE, (1u << 26) + (1u << 23), NULL, "72M", &cpu_set_size }, \ { UNIT_MSIZE, (1u << 26) + (1u << 23), NULL, "72M", &cpu_set_size }, \
{ UNIT_MSIZE, (1u << 26) + (1u << 24), NULL, "80M", &cpu_set_size }, \ { UNIT_MSIZE, (1u << 26) + (1u << 24), NULL, "80M", &cpu_set_size }, \
{ UNIT_MSIZE, (1u << 26) + (1u << 25) + (1u << 24), NULL, "104M", &cpu_set_size } { UNIT_MSIZE, (1u << 26) + (1u << 25) + (1u << 23), NULL, "104M", &cpu_set_size }
#elif defined (VAX_48)
#define MEM_MODIFIERS { UNIT_MSIZE, (1u << 23), NULL, "8M", &cpu_set_size }, \
{ UNIT_MSIZE, (1u << 24), NULL, "16M", &cpu_set_size }, \
{ UNIT_MSIZE, (1u << 24) + (1u << 23), NULL, "24M", &cpu_set_size }
#endif
/* DMA map */ /* DMA map */

15
VAX/vax440_sysdev.c
View file

@ -123,9 +123,11 @@ CTAB vax460_cmd[] = {
#define DMANMAPR 32768 /* number of map reg */ #define DMANMAPR 32768 /* number of map reg */
#define DMAMAP_VLD 0x80000000 /* valid */ #define DMAMAP_VLD 0x80000000 /* valid */
#if defined (VAX_46) || defined (VAX_47)
#define DMAMAP_PAG 0x0003FFFF /* mem page */
#elif defined (VAX_48)
#define DMAMAP_PAG 0x0000FFFF /* mem page */ #define DMAMAP_PAG 0x0000FFFF /* mem page */
#define DMAMAP_RD (QBMAP_VLD | QBMAP_PAG) #endif
#define DMAMAP_WR (QBMAP_VLD | QBMAP_PAG)
extern int32 tmr_int; extern int32 tmr_int;
extern DEVICE lk_dev, vs_dev; extern DEVICE lk_dev, vs_dev;
@ -429,7 +431,6 @@ uint32 sc;
#if defined (VAX_46) || defined (VAX_47) #if defined (VAX_46) || defined (VAX_47)
mem -= (1u << 23); /* 8MB on system board */ mem -= (1u << 23); /* 8MB on system board */
#endif
for (sc = 0; mem > 0; sc+=2) { for (sc = 0; mem > 0; sc+=2) {
if (mem >= (1u << 25)) { if (mem >= (1u << 25)) {
val |= (0x3 << sc); /* add two 16MB SIMMs */ val |= (0x3 << sc); /* add two 16MB SIMMs */
@ -438,9 +439,17 @@ for (sc = 0; mem > 0; sc+=2) {
} }
else { else {
val |= (0x3 << sc); /* add two 4MB SIMMs */ val |= (0x3 << sc); /* add two 4MB SIMMs */
val = (val & ~CFGT_SIM) | ((val & CFGT_SIM) << 2); /* must be installed before 16MB SIMMs */
mem -= (1u << 23); mem -= (1u << 23);
} }
} }
#elif defined (VAX_48)
val |= 0x1; /* bit zero always set */
for (sc = 1; mem > 0; sc++) {
val |= (0x1 << sc); /* add two 4MB SIMMs */
mem -= (1u << 23);
}
#endif
return val; return val;
} }