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AltairZ80: Fixed device descriptions for all devices.

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This commit is contained in:
Peter Schorn 2016-05-08 10:03:56 +02:00 • committed by Mark Pizzolato
parent 5fc2207774
commit 60a8a2d43d
26 changed files with 195 additions and 49 deletions
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7
AltairZ80/altairz80_cpu.c
View file

@ -180,6 +180,7 @@ static t_stat sim_instr_mmu(void);
static uint32 GetBYTE(register uint32 Addr);
static void PutWORD(register uint32 Addr, const register uint32 Value);
static void PutBYTE(register uint32 Addr, const register uint32 Value);
static const char* cpu_description(DEVICE *dptr);
void out(const uint32 Port, const uint32 Value);
uint32 in(const uint32 Port);
void altairz80_init(void);
@ -447,6 +448,10 @@ REG cpu_reg[] = {
{ NULL }
};
static const char* cpu_description(DEVICE *dptr) {
return "Central Processing Unit";
}
static MTAB cpu_mod[] = {
{ MTAB_XTD | MTAB_VDV, CHIP_TYPE_8080, NULL, "8080", &cpu_set_chiptype,
NULL, NULL, "Chooses 8080 CPU"},
@ -544,7 +549,7 @@ DEVICE cpu_dev = {
&cpu_ex, &cpu_dep, &cpu_reset,
NULL, NULL, NULL,
NULL, DEV_DEBUG, 0,
cpu_dt, NULL, NULL
cpu_dt, NULL, NULL, NULL, NULL, NULL, &cpu_description
};
/* This is the I/O configuration table. There are 255 possible

9
AltairZ80/altairz80_dsk.c
View file

@ -164,6 +164,7 @@ int32 dsk12(const int32 port, const int32 io, const int32 data);
static t_stat dsk_boot(int32 unitno, DEVICE *dptr);
static t_stat dsk_reset(DEVICE *dptr);
static t_stat dsk_attach(UNIT *uptr, char *cptr);
static const char* dsk_description(DEVICE *dptr);
extern UNIT cpu_unit;
extern uint32 PCX;
@ -333,7 +334,11 @@ static REG dsk_reg[] = {
{ NULL }
};
#define DSK_NAME "Altair Floppy Disk DSK"
#define DSK_NAME "Altair Floppy Disk"
static const char* dsk_description(DEVICE *dptr) {
return DSK_NAME;
}
static MTAB dsk_mod[] = {
{ UNIT_DSK_WLK, 0, "WRTENB", "WRTENB", NULL, NULL, NULL,
@ -361,7 +366,7 @@ DEVICE dsk_dev = {
NULL, NULL, &dsk_reset,
&dsk_boot, &dsk_attach, NULL,
NULL, (DEV_DISABLE | DEV_DEBUG), 0,
dsk_dt, NULL, DSK_NAME
dsk_dt, NULL, NULL, NULL, NULL, NULL, &dsk_description
};
static char* selectInOut(const int32 io) {

9
AltairZ80/altairz80_hdsk.c
View file

@ -86,6 +86,7 @@ extern int32 find_unit_index(UNIT *uptr);
static t_stat hdsk_boot(int32 unitno, DEVICE *dptr);
int32 hdsk_io(const int32 port, const int32 io, const int32 data);
static const char* hdsk_description(DEVICE *dptr);
static int32 hdskLastCommand = HDSK_NONE;
static int32 hdskCommandPosition = 0;
@ -331,7 +332,11 @@ static REG hdsk_reg[] = {
{ NULL }
};
#define HDSK_NAME "Hard Disk HDSK"
#define HDSK_NAME "Hard Disk"
static const char* hdsk_description(DEVICE *dptr) {
return HDSK_NAME;
}
static MTAB hdsk_mod[] = {
{ MTAB_XTD|MTAB_VDV, 0, "IOBASE", "IOBASE",
@ -361,7 +366,7 @@ DEVICE hdsk_dev = {
NULL, NULL, &hdsk_reset,
&hdsk_boot, &hdsk_attach, &hdsk_detach,
&hdsk_info_data, (DEV_DISABLE | DEV_DEBUG), 0,
hdsk_dt, NULL, "Hard Disk HDSK"
hdsk_dt, NULL, NULL, NULL, NULL, NULL, &hdsk_description
};
/* Reset routine */

9
AltairZ80/altairz80_mhdsk.c
View file

@ -165,6 +165,7 @@ static t_stat dsk_reset(DEVICE *dptr);
static char* cmdTranslate(const int32 cmd);
extern uint32 sim_map_resource(uint32 baseaddr, uint32 size, uint32 resource_type,
int32 (*routine)(const int32, const int32, const int32), uint8 unmap);
static const char* mhdsk_description(DEVICE *dptr);
/* 88DSK Standard I/O Data Structures */
@ -178,7 +179,11 @@ static UNIT dsk_unit[] = {
{ UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, HDSK_CAPACITY) },
{ UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, HDSK_CAPACITY) }};
#define MHDSK_NAME "MITS Hard Disk MHDSK"
#define MHDSK_NAME "MITS Hard Disk"
static const char* mhdsk_description(DEVICE *dptr) {
return MHDSK_NAME;
}
static MTAB dsk_mod[] = {
{ UNIT_DSK_WLK, 0, "WRTENB", "WRTENB", NULL, NULL, NULL,
@ -202,7 +207,7 @@ DEVICE mhdsk_dev = {
NULL, NULL, &dsk_reset,
&mhdsk_boot, NULL, NULL,
NULL, (DEV_DISABLE | DEV_DEBUG), 0,
mhdsk_dt, NULL, MHDSK_NAME
mhdsk_dt, NULL, NULL, NULL, NULL, NULL, &mhdsk_description
};
static int32 bootrom_mhdsk[BOOTROM_SIZE_MHDSK] = {

7
AltairZ80/altairz80_net.c
View file

@ -47,6 +47,7 @@ static t_stat net_svc (UNIT *uptr);
static t_stat set_net (UNIT *uptr, int32 value, char *cptr, void *desc);
int32 netStatus (const int32 port, const int32 io, const int32 data);
int32 netData (const int32 port, const int32 io, const int32 data);
static const char* net_description(DEVICE *dptr);
extern uint32 sim_map_resource(uint32 baseaddr, uint32 size, uint32 resource_type,
int32 (*routine)(const int32, const int32, const int32), uint8 unmap);
@ -88,6 +89,10 @@ static REG net_reg[] = {
{ NULL }
};
static const char* net_description(DEVICE *dptr) {
return "Network";
}
static MTAB net_mod[] = {
{ UNIT_SERVER, 0, "CLIENT", "CLIENT", &set_net, NULL, NULL,
"Sets machine to client mode"}, /* machine is a client */
@ -111,7 +116,7 @@ DEVICE net_dev = {
NULL, NULL, &net_reset,
NULL, &net_attach, &net_detach,
NULL, (DEV_DISABLE | DEV_DEBUG), 0,
net_dt, NULL, "Network NET"
net_dt, NULL, NULL, NULL, NULL, NULL, &net_description
};
static t_stat set_net(UNIT *uptr, int32 value, char *cptr, void *desc) {

28
AltairZ80/altairz80_sio.c
View file

@ -140,6 +140,10 @@ static t_stat sio_dev_set_interruptoff(UNIT *uptr, int32 value, char *cptr, void
static t_stat sio_svc(UNIT *uptr);
static t_stat simh_dev_reset(DEVICE *dptr);
static t_stat simh_svc(UNIT *uptr);
static const char* sio_description(DEVICE *dptr);
static const char* simh_description(DEVICE *dptr);
static const char* ptr_description(DEVICE *dptr);
static const char* ptp_description(DEVICE *dptr);
static void mapAltairPorts(void);
int32 nulldev (const int32 port, const int32 io, const int32 data);
int32 sr_dev (const int32 port, const int32 io, const int32 data);
@ -347,13 +351,17 @@ static MTAB sio_mod[] = {
{ 0 }
};
static const char* sio_description(DEVICE *dptr) {
return "Serial Input Output";
}
DEVICE sio_dev = {
"SIO", &sio_unit, sio_reg, sio_mod,
1, 10, 31, 1, 8, 8,
NULL, NULL, &sio_reset,
NULL, &sio_attach, &sio_detach,
NULL, DEV_DEBUG | DEV_MUX, 0,
generic_dt, NULL, "Serial Input Output SIO"
generic_dt, NULL, NULL, NULL, NULL, NULL, &sio_description
};
static MTAB ptpptr_mod[] = {
@ -369,26 +377,34 @@ static REG ptr_reg[] = {
{ NULL }
};
static const char* ptr_description(DEVICE *dptr) {
return "Paper Tape Reader";
}
DEVICE ptr_dev = {
"PTR", &ptr_unit, ptr_reg, ptpptr_mod,
1, 10, 31, 1, 8, 8,
NULL, NULL, &ptr_reset,
NULL, NULL, NULL,
NULL, (DEV_DISABLE | DEV_DEBUG), 0,
generic_dt, NULL, "Paper Tape Reader PTR"
generic_dt, NULL, NULL, NULL, NULL, NULL, &ptr_description
};
static UNIT ptp_unit = {
UDATA (NULL, UNIT_ATTABLE, 0)
};
static const char* ptp_description(DEVICE *dptr) {
return "Paper Tape Puncher";
}
DEVICE ptp_dev = {
"PTP", &ptp_unit, NULL, ptpptr_mod,
1, 10, 31, 1, 8, 8,
NULL, NULL, &ptp_reset,
NULL, NULL, NULL,
NULL, (DEV_DISABLE | DEV_DEBUG), 0,
generic_dt, NULL, "Paper Tape Puncher PTP"
generic_dt, NULL, NULL, NULL, NULL, NULL, &ptp_description
};
/* Synthetic device SIMH for communication
@ -465,13 +481,17 @@ static MTAB simh_mod[] = {
{ 0 }
};
const char* simh_description(DEVICE *dptr) {
return "Pseudo Device";
}
DEVICE simh_device = {
"SIMH", &simh_unit, simh_reg, simh_mod,
1, 10, 31, 1, 16, 4,
NULL, NULL, &simh_dev_reset,
NULL, NULL, NULL,
NULL, (DEV_DISABLE | DEV_DEBUG), 0,
generic_dt, NULL, "Pseudo Device SIMH"
generic_dt, NULL, NULL, NULL, NULL, NULL, &simh_description
};
static void resetSIOWarningFlags(void) {

9
AltairZ80/flashwriter2.c
View file

@ -80,6 +80,7 @@ static t_stat fw2_detach(UNIT *uptr);
static uint8 FW2_Read(const uint32 Addr);
static uint8 FW2_Write(const uint32 Addr, uint8 cData);
static t_stat get_base_address(char *cptr, uint32 *baseaddr);
static const char* fw2_description(DEVICE *dptr);
static UNIT fw2_unit[] = {
{ UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, FW2_CAPACITY) },
@ -88,7 +89,11 @@ static UNIT fw2_unit[] = {
{ UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, FW2_CAPACITY) }
};
#define FWII_NAME "Vector Graphic Flashwriter 2 FWII"
#define FWII_NAME "Vector Graphic Flashwriter 2"
static const char* fw2_description(DEVICE *dptr) {
return FWII_NAME;
}
static MTAB fw2_mod[] = {
/* quiet, no warning messages */
@ -106,7 +111,7 @@ DEVICE fw2_dev = {
NULL, NULL, NULL,
NULL, &fw2_attach, &fw2_detach,
NULL, (DEV_DISABLE | DEV_DIS), 0,
NULL, NULL, FWII_NAME
NULL, NULL, NULL, NULL, NULL, NULL, &fw2_description
};
/* Attach routine */

9
AltairZ80/i8272.c
View file

@ -176,6 +176,7 @@ static void raise_i8272_interrupt(void);
static int32 i8272dev(const int32 port, const int32 io, const int32 data);
static t_stat i8272_reset(DEVICE *dptr);
int32 find_unit_index (UNIT *uptr);
static const char* i8272_description(DEVICE *dptr);
I8272_INFO i8272_info_data = { { 0x0, 0, 0xC0, 2 } };
I8272_INFO *i8272_info = &i8272_info_data;
@ -189,7 +190,11 @@ static UNIT i8272_unit[] = {
{ UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, I8272_CAPACITY) }
};
#define I8272_NAME "Intel/NEC(765) FDC Core I8272"
#define I8272_NAME "Intel/NEC(765) FDC Core"
static const char* i8272_description(DEVICE *dptr) {
return I8272_NAME;
}
static MTAB i8272_mod[] = {
{ MTAB_XTD|MTAB_VDV, 0, "IOBASE", "IOBASE",
@ -223,7 +228,7 @@ DEVICE i8272_dev = {
NULL, NULL, &i8272_reset,
NULL, &i8272_attach, &i8272_detach,
&i8272_info_data, (DEV_DISABLE | DEV_DIS | DEV_DEBUG), ERROR_MSG,
i8272_dt, NULL, I8272_NAME
i8272_dt, NULL, NULL, NULL, NULL, NULL, &i8272_description
};
static uint8 I8272_Setup_Cmd(uint8 fdc_cmd);

9
AltairZ80/mfdc.c
View file

@ -74,6 +74,7 @@ extern uint32 sim_map_resource(uint32 baseaddr, uint32 size, uint32 resource_typ
extern int32 find_unit_index(UNIT *uptr);
static void MFDC_Command(uint8 cData);
static const char* mfdc_description(DEVICE *dptr);
#define MFDC_MAX_DRIVES 4
#define JUMPER_W9 1 /* Not Installed (0) = 2MHz, Installed (1) = 4MHz. */
@ -149,7 +150,11 @@ static REG mfdc_reg[] = {
{ NULL }
};
#define MDSK_NAME "Micropolis FD Control MDSK"
#define MDSK_NAME "Micropolis FD Control"
static const char* mfdc_description(DEVICE *dptr) {
return MDSK_NAME;
}
static MTAB mfdc_mod[] = {
{ MTAB_XTD|MTAB_VDV, 0, "MEMBASE", "MEMBASE",
@ -184,7 +189,7 @@ DEVICE mfdc_dev = {
NULL, NULL, &mfdc_reset,
NULL, &mfdc_attach, &mfdc_detach,
&mfdc_info_data, (DEV_DISABLE | DEV_DIS | DEV_DEBUG), 0,
mfdc_dt, NULL, MDSK_NAME
mfdc_dt, NULL, NULL, NULL, NULL, NULL, &mfdc_description
};
/* Micropolis FD Control Boot ROM

9
AltairZ80/n8vem.c
View file

@ -103,6 +103,7 @@ static int32 n8vem_pio1a = 0x00; /* 8255 PIO1A IN Port */
static int32 n8vem_pio1b = 0x00; /* 8255 PIO1B OUT Port */
static int32 n8vem_pio1c = 0x00; /* 8255 PIO1C IN Port */
static int32 n8vem_pio1ctrl = 0x00; /* 8255 PIO1 Control Port */
static const char* n8vem_description(DEVICE *dptr);
#define N8VEM_ROM_SIZE (1024 * 1024)
#define N8VEM_RAM_SIZE (512 * 1024)
@ -133,7 +134,11 @@ static REG n8vem_reg[] = {
{ NULL }
};
#define N8VEM_NAME "Single-Board Computer N8VEM"
#define N8VEM_NAME "Single-Board Computer"
static const char* n8vem_description(DEVICE *dptr) {
return N8VEM_NAME;
}
static MTAB n8vem_mod[] = {
{ MTAB_XTD|MTAB_VDV, 0, "MEMBASE", "MEMBASE", &set_membase, &show_membase,
@ -158,7 +163,7 @@ DEVICE n8vem_dev = {
NULL, NULL, &n8vem_reset,
&n8vem_boot, &n8vem_attach, &n8vem_detach,
&n8vem_info_data, (DEV_DISABLE | DEV_DIS | DEV_DEBUG), 0,
n8vem_dt, NULL, "Single-Board Computer N8VEM"
n8vem_dt, NULL, NULL, NULL, NULL, NULL, &n8vem_description
};
/* Reset routine */

9
AltairZ80/s100_64fdc.c
View file

@ -112,6 +112,7 @@ static int32 cromfdc_control(const int32 port, const int32 io, const int32 data)
static int32 cromfdc_banksel(const int32 port, const int32 io, const int32 data);
static int32 cromfdcrom(const int32 port, const int32 io, const int32 data);
static int32 ccs2810_uart_status(const int32 port, const int32 io, const int32 data);
static const char* cromfdc_description(DEVICE *dptr);
static int32 dipswitch = 0; /* 5-position DIP switch on 64FDC card */
static int32 bootstrap = 0; /* 0 for RDOS 2.52, 1 for RDOS 3.12. */
@ -229,7 +230,11 @@ static REG cromfdc_reg[] = {
{ NULL }
};
#define CROMFDC_NAME "Cromemco 4/16/64 FDC CROMFDC"
#define CROMFDC_NAME "Cromemco 4/16/64 FDC"
static const char* cromfdc_description(DEVICE *dptr) {
return CROMFDC_NAME;
}
static MTAB cromfdc_mod[] = {
{ MTAB_XTD|MTAB_VDV, 0, "MEMBASE", "MEMBASE",
@ -259,7 +264,7 @@ DEVICE cromfdc_dev = {
NULL, NULL, &cromfdc_reset,
&cromfdc_boot, &wd179x_attach, &wd179x_detach,
&cromfdc_info_data, (DEV_DISABLE | DEV_DIS | DEV_DEBUG), 0,
cromfdc_dt, NULL, CROMFDC_NAME
cromfdc_dt, NULL, NULL, NULL, NULL, NULL, &cromfdc_description
};
/* This is the CROMFDC RDOS-II ROM.

9
AltairZ80/s100_adcs6.c
View file

@ -113,6 +113,7 @@ static int32 adcs6_timer(const int32 port, const int32 io, const int32 data);
static int32 adcs6_control(const int32 port, const int32 io, const int32 data);
static int32 adcs6_banksel(const int32 port, const int32 io, const int32 data);
static int32 adcs6rom(const int32 port, const int32 io, const int32 data);
static const char* adcs6_description(DEVICE *dptr);
static int32 dipswitch = 0x00; /* 5-position DIP switch on 64FDC card */
@ -181,7 +182,11 @@ static REG adcs6_reg[] = {
{ NULL }
};
#define ADCS6_NAME "ADC Super-Six ADCS6"
#define ADCS6_NAME "ADC Super-Six"
static const char* adcs6_description(DEVICE *dptr) {
return ADCS6_NAME;
}
static MTAB adcs6_mod[] = {
{ MTAB_XTD|MTAB_VDV, 0, "MEMBASE", "MEMBASE",
@ -211,7 +216,7 @@ DEVICE adcs6_dev = {
NULL, NULL, &adcs6_reset,
&adcs6_boot, &adcs6_attach, &adcs6_detach,
&adcs6_info_data, (DEV_DISABLE | DEV_DIS | DEV_DEBUG), ERROR_MSG,
adcs6_dt, NULL, ADCS6_NAME
adcs6_dt, NULL, NULL, NULL, NULL, NULL, &adcs6_description
};
/* This is the DIGITEX Monitor version 1.2.A -- 10/06/83

9
AltairZ80/s100_disk1a.c
View file

@ -95,6 +95,7 @@ static t_stat disk1a_reset(DEVICE *disk1a_dev);
static t_stat disk1a_boot(int32 unitno, DEVICE *dptr);
static t_stat disk1a_attach(UNIT *uptr, char *cptr);
static t_stat disk1a_detach(UNIT *uptr);
static const char* disk1a_description(DEVICE *dptr);
static int32 disk1adev(const int32 port, const int32 io, const int32 data);
static int32 disk1arom(const int32 port, const int32 io, const int32 data);
@ -123,7 +124,11 @@ static REG disk1a_reg[] = {
{ NULL }
};
#define DISK1A_NAME "Compupro Floppy Controller DISK1A"
#define DISK1A_NAME "Compupro Floppy Controller"
static const char* disk1a_description(DEVICE *dptr) {
return DISK1A_NAME;
}
static MTAB disk1a_mod[] = {
{ MTAB_XTD|MTAB_VDV, 0, "MEMBASE", "MEMBASE",
@ -153,7 +158,7 @@ DEVICE disk1a_dev = {
NULL, NULL, &disk1a_reset,
&disk1a_boot, &disk1a_attach, &disk1a_detach,
&disk1a_info_data, (DEV_DISABLE | DEV_DIS | DEV_DEBUG), 9,
disk1a_dt, NULL, DISK1A_NAME
disk1a_dt, NULL, NULL, NULL, NULL, NULL, &disk1a_description
};
/* This is the DISK1A Boot ROM.

10
AltairZ80/s100_disk2.c
View file

@ -133,6 +133,8 @@ extern void raise_ss1_interrupt(uint8 intnum);
static t_stat disk2_reset(DEVICE *disk2_dev);
static t_stat disk2_attach(UNIT *uptr, char *cptr);
static t_stat disk2_detach(UNIT *uptr);
static const char* disk2_description(DEVICE *dptr);
static void raise_disk2_interrupt(void);
static int32 disk2dev(const int32 port, const int32 io, const int32 data);
@ -168,7 +170,11 @@ static REG disk2_reg[] = {
{ NULL }
};
#define DISK2_NAME "Compupro Hard Disk Controller DISK2"
#define DISK2_NAME "Compupro Hard Disk Controller"
static const char* disk2_description(DEVICE *dptr) {
return DISK2_NAME;
}
static MTAB disk2_mod[] = {
{ MTAB_XTD|MTAB_VDV, 0, "IOBASE", "IOBASE",
@ -201,7 +207,7 @@ DEVICE disk2_dev = {
NULL, NULL, &disk2_reset,
NULL, &disk2_attach, &disk2_detach,
&disk2_info_data, (DEV_DISABLE | DEV_DIS | DEV_DEBUG), ERROR_MSG,
disk2_dt, NULL, DISK2_NAME
disk2_dt, NULL, NULL, NULL, NULL, NULL, &disk2_description
};
/* Reset routine */

9
AltairZ80/s100_disk3.c
View file

@ -194,6 +194,7 @@ static t_stat disk3_reset(DEVICE *disk3_dev);
static t_stat disk3_attach(UNIT *uptr, char *cptr);
static t_stat disk3_detach(UNIT *uptr);
static void raise_disk3_interrupt(void);
static const char* disk3_description(DEVICE *dptr);
static int32 disk3dev(const int32 port, const int32 io, const int32 data);
@ -233,7 +234,11 @@ static REG disk3_reg[] = {
{ NULL }
};
#define DISK3_NAME "Compupro ST-506 Disk Controller DISK3"
#define DISK3_NAME "Compupro ST-506 Disk Controller"
static const char* disk3_description(DEVICE *dptr) {
return DISK3_NAME;
}
static MTAB disk3_mod[] = {
{ MTAB_XTD|MTAB_VDV, 0, "IOBASE", "IOBASE",
@ -266,7 +271,7 @@ DEVICE disk3_dev = {
NULL, NULL, &disk3_reset,
NULL, &disk3_attach, &disk3_detach,
&disk3_info_data, (DEV_DISABLE | DEV_DIS | DEV_DEBUG), ERROR_MSG,
disk3_dt, NULL, DISK3_NAME
disk3_dt, NULL, NULL, NULL, NULL, NULL, &disk3_description
};
/* Reset routine */

9
AltairZ80/s100_fif.c
View file

@ -42,6 +42,7 @@
static t_stat fif_reset(DEVICE *dptr);
static t_stat fif_set_verbose(UNIT *uptr, int32 value, char *cptr, void *desc);
static int32 fif_io(const int32 port, const int32 io, const int32 data);
static const char* fif_description(DEVICE *dptr);
extern t_stat set_iobase(UNIT *uptr, int32 val, char *cptr, void *desc);
extern t_stat show_iobase(FILE *st, UNIT *uptr, int32 val, void *desc);
@ -81,7 +82,11 @@ static UNIT fif_unit[] = {
{ UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, MAX_DSK_SIZE) }
};
#define FIF_NAME "IMSAI FIF"
#define FIF_NAME "IMSAI"
static const char* fif_description(DEVICE *dptr) {
return FIF_NAME;
}
static REG fif_reg[] = {
{ DRDATAD (DISK, current_disk, 4,
@ -113,7 +118,7 @@ DEVICE fif_dev = {
NULL, NULL, &fif_reset,
NULL, NULL, NULL,
&fif_info_data, (DEV_DISABLE | DEV_DIS), 0,
NULL, NULL, FIF_NAME
NULL, NULL, NULL, NULL, NULL, NULL, &fif_description
};
static void resetDSKWarningFlags(void) {

9
AltairZ80/s100_hdc1001.c
View file

@ -117,6 +117,7 @@ static int32 hdc1001dev(const int32 port, const int32 io, const int32 data);
static uint8 HDC1001_Read(const uint32 Addr);
static uint8 HDC1001_Write(const uint32 Addr, uint8 cData);
static const char* hdc1001_description(DEVICE *dptr);
static UNIT hdc1001_unit[] = {
{ UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, HDC1001_CAPACITY) },
@ -129,7 +130,11 @@ static REG hdc1001_reg[] = {
{ NULL }
};
#define HDC1001_NAME "ADC Hard Disk Controller HDC1001"
#define HDC1001_NAME "ADC Hard Disk Controller"
static const char* hdc1001_description(DEVICE *dptr) {
return HDC1001_NAME;
}
static MTAB hdc1001_mod[] = {
{ MTAB_XTD|MTAB_VDV, 0, "IOBASE", "IOBASE",
@ -160,7 +165,7 @@ DEVICE hdc1001_dev = {
NULL, NULL, &hdc1001_reset,
NULL, &hdc1001_attach, &hdc1001_detach,
&hdc1001_info_data, (DEV_DISABLE | DEV_DIS | DEV_DEBUG), ERROR_MSG,
hdc1001_dt, NULL, HDC1001_NAME
hdc1001_dt, NULL, NULL, NULL, NULL, NULL, &hdc1001_description
};
/* Reset routine */

9
AltairZ80/s100_if3.c
View file

@ -93,6 +93,7 @@ static uint8 IF3_Read(const uint32 Addr);
static uint8 IF3_Write(const uint32 Addr, uint8 cData);
static int32 if3dev(const int32 port, const int32 io, const int32 data);
static t_stat update_rx_tx_isr (UNIT *uptr);
static const char* if3_description(DEVICE *dptr);
static UNIT if3_unit[] = {
{ UDATA (&if3_svc, UNIT_FIX | UNIT_DISABLE | UNIT_ROABLE | UNIT_IF3_CONNECT, 0) },
@ -118,7 +119,11 @@ static REG if3_reg[] = {
{ NULL }
};
#define IF3_NAME "Compupro Interfacer 3 IF3"
#define IF3_NAME "Compupro Interfacer 3"
static const char* if3_description(DEVICE *dptr) {
return IF3_NAME;
}
static MTAB if3_mod[] = {
{ MTAB_XTD|MTAB_VDV, 0, "IOBASE", "IOBASE",
@ -146,7 +151,7 @@ DEVICE if3_dev = {
NULL, NULL, &if3_reset,
NULL, NULL, NULL,
&if3_info_data, (DEV_DISABLE | DEV_DIS | DEV_DEBUG), 0,
if3_dt, NULL, IF3_NAME
if3_dt, NULL, NULL, NULL, NULL, NULL, &if3_description
};
static t_stat set_if3_connect(UNIT *uptr, int32 val, char *cptr, void *desc)

9
AltairZ80/s100_mdriveh.c
View file

@ -88,6 +88,7 @@ static t_stat mdriveh_reset(DEVICE *mdriveh_dev);
static int32 mdrivehdev(const int32 port, const int32 io, const int32 data);
static uint8 MDRIVEH_Read(const uint32 Addr);
static uint8 MDRIVEH_Write(const uint32 Addr, uint8 cData);
static const char* mdriveh_description(DEVICE *dptr);
static UNIT mdriveh_unit[] = {
{ UDATA (NULL, UNIT_FIX + UNIT_DISABLE + UNIT_ROABLE, MDRIVEH_CAPACITY) },
@ -104,7 +105,11 @@ static REG mdriveh_reg[] = {
{ NULL }
};
#define MDRIVEH_NAME "Compupro Memory Drive MDRIVEH"
#define MDRIVEH_NAME "Compupro Memory Drive"
static const char* mdriveh_description(DEVICE *dptr) {
return MDRIVEH_NAME;
}
static MTAB mdriveh_mod[] = {
{ MTAB_XTD|MTAB_VDV, 0, "IOBASE", "IOBASE",
@ -139,7 +144,7 @@ DEVICE mdriveh_dev = {
NULL, NULL, &mdriveh_reset,
NULL, NULL, NULL,
&mdriveh_info_data, (DEV_DISABLE | DEV_DIS | DEV_DEBUG), 0,
mdriveh_dt, NULL, MDRIVEH_NAME
mdriveh_dt, NULL, NULL, NULL, NULL, NULL, &mdriveh_description
};

9
AltairZ80/s100_mdsa.c
View file

@ -152,6 +152,7 @@ static t_stat mdsa_attach(UNIT *uptr, char *cptr);
static t_stat mdsa_detach(UNIT *uptr);
static t_stat mdsa_boot(int32 unitno, DEVICE *dptr);
static uint8 MDSA_Read(const uint32 Addr);
static const char* mdsa_description(DEVICE *dptr);
static int32 mdsadev(const int32 Addr, const int32 rw, const int32 data);
@ -166,7 +167,11 @@ static REG mdsa_reg[] = {
{ NULL }
};
#define MDSA_NAME "North Star Single Density Controller MDSA"
#define MDSA_NAME "North Star Single Density Controller"
static const char* mdsa_description(DEVICE *dptr) {
return MDSA_NAME;
}
static MTAB mdsa_mod[] = {
{ MTAB_XTD|MTAB_VDV, 0, "MEMBASE", "MEMBASE",
@ -199,7 +204,7 @@ DEVICE mdsa_dev = {
NULL, NULL, &mdsa_reset,
&mdsa_boot, &mdsa_attach, &mdsa_detach,
&mdsa_info_data, (DEV_DISABLE | DEV_DIS | DEV_DEBUG), ERROR_MSG,
mdsa_dt, NULL, MDSA_NAME
mdsa_dt, NULL, NULL, NULL, NULL, NULL, &mdsa_description
};
/* Reset routine */

9
AltairZ80/s100_mdsad.c
View file

@ -215,6 +215,7 @@ static t_stat mdsad_attach(UNIT *uptr, char *cptr);
static t_stat mdsad_detach(UNIT *uptr);
static t_stat mdsad_boot(int32 unitno, DEVICE *dptr);
static uint8 MDSAD_Read(const uint32 Addr);
static const char* mdsad_description(DEVICE *dptr);
static int32 mdsaddev(const int32 Addr, const int32 rw, const int32 data);
@ -229,7 +230,11 @@ static REG mdsad_reg[] = {
{ NULL }
};
#define MDSAD_NAME "North Star Floppy Controller MDSAD"
#define MDSAD_NAME "North Star Floppy Controller"
static const char* mdsad_description(DEVICE *dptr) {
return MDSAD_NAME;
}
static MTAB mdsad_mod[] = {
{ MTAB_XTD|MTAB_VDV, 0, "MEMBASE", "MEMBASE",
@ -263,7 +268,7 @@ DEVICE mdsad_dev = {
NULL, NULL, &mdsad_reset,
&mdsad_boot, &mdsad_attach, &mdsad_detach,
&mdsad_info_data, (DEV_DISABLE | DEV_DIS | DEV_DEBUG), ERROR_MSG,
mdsad_dt, NULL, "North Star Floppy Controller MDSAD"
mdsad_dt, NULL, NULL, NULL, NULL, NULL, &mdsad_description
};
/* Reset routine */

7
AltairZ80/s100_scp300f.c
View file

@ -88,6 +88,7 @@ static t_stat scp300f_reset(DEVICE *scp300f_dev);
static uint8 SCP300F_Read(const uint32 Addr);
static uint8 SCP300F_Write(const uint32 Addr, uint8 cData);
static const char* scp300f_description(DEVICE *dptr);
static int32 scp300fdev(const int32 port, const int32 io, const int32 data);
static int32 scp300f_mem(const int32 port, const int32 io, const int32 data);
@ -103,6 +104,10 @@ static REG scp300f_reg[] = {
{ NULL }
};
static const char* scp300f_description(DEVICE *dptr) {
return "SCP Support Board";
}
static MTAB scp300f_mod[] = {
{ MTAB_XTD|MTAB_VDV, 0, "MEMBASE", "MEMBASE",
&set_membase, &show_membase, NULL, "Sets support module memory base address" },
@ -126,7 +131,7 @@ DEVICE scp300f_dev = {
NULL, NULL, &scp300f_reset,
NULL, NULL, NULL,
&scp300f_info_data, (DEV_DISABLE | DEV_DIS | DEV_DEBUG), 0,
scp300f_dt, NULL, "SCP Support Board SCP300F"
scp300f_dt, NULL, NULL, NULL, NULL, NULL, &scp300f_description
};
/* Reset routine */

7
AltairZ80/s100_selchan.c
View file

@ -82,6 +82,7 @@ extern void PutByteDMA(const uint32 Addr, const uint32 Value);
extern uint8 GetByteDMA(const uint32 Addr);
static t_stat selchan_reset(DEVICE *selchan_dev);
static const char* selchan_description(DEVICE *dptr);
static int32 selchandev(const int32 port, const int32 io, const int32 data);
@ -96,6 +97,10 @@ static REG selchan_reg[] = {
{ NULL }
};
static const char* selchan_description(DEVICE *dptr) {
return "Compupro Selector Channel";
}
static MTAB selchan_mod[] = {
{ MTAB_XTD|MTAB_VDV, 0, "IOBASE", "IOBASE", &set_iobase, &show_iobase, NULL,
"Sets disk controller I/O base address" },
@ -115,7 +120,7 @@ DEVICE selchan_dev = {
NULL, NULL, &selchan_reset,
NULL, NULL, NULL,
&selchan_info_data, (DEV_DISABLE | DEV_DIS | DEV_DEBUG), 0,
selchan_dt, NULL, "Compupro Selector Channel SELCHAN"
selchan_dt, NULL, NULL, NULL, NULL, NULL, &selchan_description
};
/* Reset routine */

7
AltairZ80/s100_ss1.c
View file

@ -86,6 +86,7 @@ static uint8 SS1_Read(const uint32 Addr);
static uint8 SS1_Write(const uint32 Addr, uint8 cData);
static int32 ss1dev(const int32 port, const int32 io, const int32 data);
void raise_ss1_interrupt(uint8 isr_index);
static const char* ss1_description(DEVICE *dptr);
/* SS1 Interrupt Controller notes:
*
@ -202,6 +203,10 @@ static REG ss1_reg[] = {
{ NULL }
};
static const char* ss1_description(DEVICE *dptr) {
return "Compupro System Support 1";
}
static MTAB ss1_mod[] = {
{ MTAB_XTD|MTAB_VDV, 0, "IOBASE", "IOBASE",
&set_iobase, &show_iobase, NULL, "Sets system support module base address" },
@ -227,7 +232,7 @@ DEVICE ss1_dev = {
NULL, NULL, &ss1_reset,
NULL, NULL, NULL,
&ss1_info_data, (DEV_DISABLE | DEV_DIS | DEV_DEBUG), ERROR_MSG,
ss1_dt, NULL, "Compupro System Support 1 SS1"
ss1_dt, NULL, NULL, NULL, NULL, NULL, &ss1_description
};
/* Reset routine */

9
AltairZ80/vfdhd.c
View file

@ -133,6 +133,7 @@ typedef struct {
static VFDHD_INFO vfdhd_info_data = { { 0x0, 0, 0xC0, 4 } };
static VFDHD_INFO *vfdhd_info = &vfdhd_info_data;
static const char* vfdhd_description(DEVICE *dptr);
static SECTOR_FORMAT sdata;
extern uint32 PCX;
@ -168,7 +169,11 @@ static REG vfdhd_reg[] = {
{ NULL }
};
#define VFDHD_NAME "Vector Graphic FD-HD Controller VFDHD"
#define VFDHD_NAME "Vector Graphic FD-HD Controller"
static const char* vfdhd_description(DEVICE *dptr) {
return VFDHD_NAME;
}
static MTAB vfdhd_mod[] = {
{ MTAB_XTD|MTAB_VDV, 0, "IOBASE", "IOBASE",
@ -200,7 +205,7 @@ DEVICE vfdhd_dev = {
NULL, NULL, &vfdhd_reset,
NULL, &vfdhd_attach, &vfdhd_detach,
&vfdhd_info_data, (DEV_DISABLE | DEV_DIS | DEV_DEBUG), ERROR_MSG,
vfdhd_dt, NULL, VFDHD_NAME
vfdhd_dt, NULL, NULL, NULL, NULL, NULL, &vfdhd_description
};
/* Reset routine */

9
AltairZ80/wd179x.c
View file

@ -195,6 +195,7 @@ extern uint8 GetBYTEWrapper(const uint32 Addr);
static int32 wd179xdev(const int32 port, const int32 io, const int32 data);
static t_stat wd179x_reset(DEVICE *dptr);
static const char* wd179x_description(DEVICE *dptr);
uint8 floorlog2(unsigned int n);
WD179X_INFO wd179x_info_data = { { 0x0, 0, 0x30, 4 } };
@ -208,7 +209,11 @@ static UNIT wd179x_unit[] = {
{ UDATA (&wd179x_svc, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, WD179X_CAPACITY), 58200 }
};
#define WD179X_NAME "Western Digital FDC Core WD179X"
#define WD179X_NAME "Western Digital FDC Core"
static const char* wd179x_description(DEVICE *dptr) {
return WD179X_NAME;
}
static MTAB wd179x_mod[] = {
{ MTAB_XTD|MTAB_VDV, 0, "IOBASE", "IOBASE",
@ -245,7 +250,7 @@ DEVICE wd179x_dev = {
NULL, NULL, &wd179x_reset,
NULL, &wd179x_attach, &wd179x_detach,
&wd179x_info_data, (DEV_DISABLE | DEV_DIS | DEV_DEBUG), ERROR_MSG,
wd179x_dt, NULL, WD179X_NAME
wd179x_dt, NULL, NULL, NULL, NULL, NULL, &wd179x_description
};
/* Unit service routine */