TIMER: Add additional calibration skip while idling counter statistic
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parent
165c37acee
commit
60fb70128c
1 changed files with 31 additions and 31 deletions
62
sim_timer.c
62
sim_timer.c
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@ -720,6 +720,7 @@ static t_bool rtc_clock_catchup_pending[SIM_NTIMERS+1] = { 0 };/* clock tick cat
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static t_bool rtc_clock_catchup_eligible[SIM_NTIMERS+1] = { 0 };/* clock tick catchup eligible */
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static t_bool rtc_clock_catchup_eligible[SIM_NTIMERS+1] = { 0 };/* clock tick catchup eligible */
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static uint32 rtc_clock_time_idled[SIM_NTIMERS+1] = { 0 };/* total time idled */
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static uint32 rtc_clock_time_idled[SIM_NTIMERS+1] = { 0 };/* total time idled */
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static uint32 rtc_clock_time_idled_last[SIM_NTIMERS+1] = { 0 };/* total time idled */
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static uint32 rtc_clock_time_idled_last[SIM_NTIMERS+1] = { 0 };/* total time idled */
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static uint32 rtc_clock_calib_skip_idle[SIM_NTIMERS+1] = { 0 };/* Calibrations skipped due to idling */
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UNIT sim_timer_units[SIM_NTIMERS+1]; /* one for each timer and one for an */
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UNIT sim_timer_units[SIM_NTIMERS+1]; /* one for each timer and one for an */
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/* internal clock if no clocks are registered */
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/* internal clock if no clocks are registered */
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@ -855,6 +856,7 @@ if (last_idle_pct > (100 - sim_idle_calib_pct)) {
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rtc_rtime[tmr] = new_rtime; /* save wall time */
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rtc_rtime[tmr] = new_rtime; /* save wall time */
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rtc_vtime[tmr] = rtc_vtime[tmr] + 1000; /* adv sim time */
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rtc_vtime[tmr] = rtc_vtime[tmr] + 1000; /* adv sim time */
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rtc_gtime[tmr] = sim_gtime(); /* save instruction time */
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rtc_gtime[tmr] = sim_gtime(); /* save instruction time */
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++rtc_clock_calib_skip_idle[tmr];
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sim_debug (DBG_CAL, &sim_timer_dev, "skipping calibration due to idling - result: %d\n", rtc_currd[tmr]);
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sim_debug (DBG_CAL, &sim_timer_dev, "skipping calibration due to idling - result: %d\n", rtc_currd[tmr]);
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return rtc_currd[tmr]; /* avoid calibrating idle checks */
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return rtc_currd[tmr]; /* avoid calibrating idle checks */
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}
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}
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@ -1012,48 +1014,50 @@ for (tmr=clocks=0; tmr<=SIM_NTIMERS; ++tmr) {
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fprintf (st, "%s%sTimer %d:\n", sim_asynch_timer ? "Asynchronous " : "", rtc_hz[tmr] ? "Calibrated " : "Uncalibrated ", tmr);
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fprintf (st, "%s%sTimer %d:\n", sim_asynch_timer ? "Asynchronous " : "", rtc_hz[tmr] ? "Calibrated " : "Uncalibrated ", tmr);
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if (rtc_hz[tmr]) {
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if (rtc_hz[tmr]) {
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fprintf (st, " Running at: %d Hz\n", rtc_hz[tmr]);
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fprintf (st, " Running at: %d Hz\n", rtc_hz[tmr]);
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fprintf (st, " Tick Size: %s\n", sim_fmt_secs (rtc_clock_tick_size[tmr]));
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fprintf (st, " Tick Size: %s\n", sim_fmt_secs (rtc_clock_tick_size[tmr]));
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fprintf (st, " Ticks in current second: %d\n", rtc_ticks[tmr]);
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fprintf (st, " Ticks in current second: %d\n", rtc_ticks[tmr]);
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}
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}
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fprintf (st, " Seconds Running: %u (%s)\n", rtc_elapsed[tmr], sim_fmt_secs ((double)rtc_elapsed[tmr]));
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fprintf (st, " Seconds Running: %u (%s)\n", rtc_elapsed[tmr], sim_fmt_secs ((double)rtc_elapsed[tmr]));
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fprintf (st, " Calibrations: %u\n", rtc_calibrations[tmr]);
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fprintf (st, " Calibration Opportunities: %u\n", rtc_calibrations[tmr]);
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if (rtc_clock_calib_skip_idle[tmr])
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fprintf (st, " Calibs Skipped While Idle: %u\n", rtc_clock_calib_skip_idle[tmr]);
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if (rtc_gtime[tmr])
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if (rtc_gtime[tmr])
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fprintf (st, " Instruction Time: %.0f\n", rtc_gtime[tmr]);
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fprintf (st, " Instruction Time: %.0f\n", rtc_gtime[tmr]);
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if ((!sim_asynch_timer) && (sim_throt_type == SIM_THROT_NONE)) {
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if ((!sim_asynch_timer) && (sim_throt_type == SIM_THROT_NONE)) {
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fprintf (st, " Real Time: %u\n", rtc_rtime[tmr]);
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fprintf (st, " Real Time: %u\n", rtc_rtime[tmr]);
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fprintf (st, " Virtual Time: %u\n", rtc_vtime[tmr]);
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fprintf (st, " Virtual Time: %u\n", rtc_vtime[tmr]);
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fprintf (st, " Next Interval: %u\n", rtc_nxintv[tmr]);
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fprintf (st, " Next Interval: %u\n", rtc_nxintv[tmr]);
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fprintf (st, " Base Tick Delay: %d\n", rtc_based[tmr]);
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fprintf (st, " Base Tick Delay: %d\n", rtc_based[tmr]);
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fprintf (st, " Initial Insts Per Tick: %d\n", rtc_initd[tmr]);
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fprintf (st, " Initial Insts Per Tick: %d\n", rtc_initd[tmr]);
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}
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}
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fprintf (st, " Current Insts Per Tick: %d\n", rtc_currd[tmr]);
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fprintf (st, " Current Insts Per Tick: %d\n", rtc_currd[tmr]);
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fprintf (st, " Initializations: %d\n", rtc_calib_initializations[tmr]);
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fprintf (st, " Initializations: %d\n", rtc_calib_initializations[tmr]);
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fprintf (st, " Total Ticks: %u\n", rtc_clock_ticks_tot[tmr]+rtc_clock_ticks[tmr]);
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fprintf (st, " Total Ticks: %u\n", rtc_clock_ticks_tot[tmr]+rtc_clock_ticks[tmr]);
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if (rtc_clock_skew_max[tmr] != 0.0)
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if (rtc_clock_skew_max[tmr] != 0.0)
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fprintf (st, " Peak Clock Skew: %s%s\n", sim_fmt_secs (fabs(rtc_clock_skew_max[tmr])), (rtc_clock_skew_max[tmr] < 0) ? " fast" : " slow");
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fprintf (st, " Peak Clock Skew: %s%s\n", sim_fmt_secs (fabs(rtc_clock_skew_max[tmr])), (rtc_clock_skew_max[tmr] < 0) ? " fast" : " slow");
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if (rtc_calib_ticks_acked[tmr])
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if (rtc_calib_ticks_acked[tmr])
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fprintf (st, " Ticks Acked: %u\n", rtc_calib_ticks_acked[tmr]);
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fprintf (st, " Ticks Acked: %u\n", rtc_calib_ticks_acked[tmr]);
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if (rtc_calib_ticks_acked_tot[tmr]+rtc_calib_ticks_acked[tmr] != rtc_calib_ticks_acked[tmr])
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if (rtc_calib_ticks_acked_tot[tmr]+rtc_calib_ticks_acked[tmr] != rtc_calib_ticks_acked[tmr])
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fprintf (st, " Total Ticks Acked: %u\n", rtc_calib_ticks_acked_tot[tmr]+rtc_calib_ticks_acked[tmr]);
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fprintf (st, " Total Ticks Acked: %u\n", rtc_calib_ticks_acked_tot[tmr]+rtc_calib_ticks_acked[tmr]);
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if (rtc_calib_tick_time[tmr])
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if (rtc_calib_tick_time[tmr])
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fprintf (st, " Tick Time: %s\n", sim_fmt_secs (rtc_calib_tick_time[tmr]));
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fprintf (st, " Tick Time: %s\n", sim_fmt_secs (rtc_calib_tick_time[tmr]));
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if (rtc_calib_tick_time_tot[tmr]+rtc_calib_tick_time[tmr] != rtc_calib_tick_time[tmr])
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if (rtc_calib_tick_time_tot[tmr]+rtc_calib_tick_time[tmr] != rtc_calib_tick_time[tmr])
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fprintf (st, " Total Tick Time: %s\n", sim_fmt_secs (rtc_calib_tick_time_tot[tmr]+rtc_calib_tick_time[tmr]));
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fprintf (st, " Total Tick Time: %s\n", sim_fmt_secs (rtc_calib_tick_time_tot[tmr]+rtc_calib_tick_time[tmr]));
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if (rtc_clock_catchup_ticks[tmr])
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if (rtc_clock_catchup_ticks[tmr])
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fprintf (st, " Catchup Ticks Sched: %u\n", rtc_clock_catchup_ticks[tmr]);
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fprintf (st, " Catchup Ticks Sched: %u\n", rtc_clock_catchup_ticks[tmr]);
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if (rtc_clock_catchup_ticks_tot[tmr]+rtc_clock_catchup_ticks[tmr] != rtc_clock_catchup_ticks[tmr])
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if (rtc_clock_catchup_ticks_tot[tmr]+rtc_clock_catchup_ticks[tmr] != rtc_clock_catchup_ticks[tmr])
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fprintf (st, " Total Catchup Ticks Sched:%u\n", rtc_clock_catchup_ticks_tot[tmr]+rtc_clock_catchup_ticks[tmr]);
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fprintf (st, " Total Catchup Ticks Sched: %u\n", rtc_clock_catchup_ticks_tot[tmr]+rtc_clock_catchup_ticks[tmr]);
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clock_gettime (CLOCK_REALTIME, &now);
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clock_gettime (CLOCK_REALTIME, &now);
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fprintf (st, " Wall Clock Time Now: %8.8s.%03d\n", 11+ctime(&now.tv_sec), (int)(now.tv_nsec/1000000));
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fprintf (st, " Wall Clock Time Now: %8.8s.%03d\n", 11+ctime(&now.tv_sec), (int)(now.tv_nsec/1000000));
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if (rtc_clock_catchup_eligible[tmr]) {
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if (rtc_clock_catchup_eligible[tmr]) {
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_double_to_timespec (&now, rtc_clock_catchup_base_time[tmr]+rtc_calib_tick_time[tmr]);
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_double_to_timespec (&now, rtc_clock_catchup_base_time[tmr]+rtc_calib_tick_time[tmr]);
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fprintf (st, " Catchup Tick Time: %8.8s.%03d\n", 11+ctime(&now.tv_sec), (int)(now.tv_nsec/1000000));
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fprintf (st, " Catchup Tick Time: %8.8s.%03d\n", 11+ctime(&now.tv_sec), (int)(now.tv_nsec/1000000));
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_double_to_timespec (&now, rtc_clock_catchup_base_time[tmr]);
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_double_to_timespec (&now, rtc_clock_catchup_base_time[tmr]);
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fprintf (st, " Catchup Base Time: %8.8s.%03d\n", 11+ctime(&now.tv_sec), (int)(now.tv_nsec/1000000));
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fprintf (st, " Catchup Base Time: %8.8s.%03d\n", 11+ctime(&now.tv_sec), (int)(now.tv_nsec/1000000));
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}
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}
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if (rtc_clock_time_idled[tmr])
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if (rtc_clock_time_idled[tmr])
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fprintf (st, " Total Time Idled: %s\n", sim_fmt_secs (rtc_clock_time_idled[tmr]/1000.0));
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fprintf (st, " Total Time Idled: %s\n", sim_fmt_secs (rtc_clock_time_idled[tmr]/1000.0));
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}
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}
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if (clocks == 0)
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if (clocks == 0)
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fprintf (st, "%s clock device is not specified, co-scheduling is unavailable\n", sim_name);
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fprintf (st, "%s clock device is not specified, co-scheduling is unavailable\n", sim_name);
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@ -1258,7 +1262,7 @@ DEVICE sim_throttle_dev = {
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t_bool sim_idle (uint32 tmr, t_bool sin_cyc)
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t_bool sim_idle (uint32 tmr, t_bool sin_cyc)
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{
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{
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static uint32 cyc_ms = 0;
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uint32 cyc_ms = 0;
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uint32 w_ms, w_idle, act_ms;
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uint32 w_ms, w_idle, act_ms;
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int32 act_cyc;
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int32 act_cyc;
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@ -1312,13 +1316,12 @@ if (_rtcn_tick_catchup_check(tmr, 0)) {
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the bookkeeping on sim_idle_idled is done here in sim_timer where it
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the bookkeeping on sim_idle_idled is done here in sim_timer where it
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means something, while not idling when it isn't enabled.
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means something, while not idling when it isn't enabled.
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*/
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*/
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//sim_idle_idled = TRUE; /* record idle attempt */
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sim_debug (DBG_TRC, &sim_timer_dev, "sim_idle(tmr=%d, sin_cyc=%d)\n", tmr, sin_cyc);
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sim_debug (DBG_TRC, &sim_timer_dev, "sim_idle(tmr=%d, sin_cyc=%d)\n", tmr, sin_cyc);
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cyc_ms = (rtc_currd[tmr] * rtc_hz[tmr]) / 1000; /* cycles per msec */
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cyc_ms = (rtc_currd[tmr] * rtc_hz[tmr]) / 1000; /* cycles per msec */
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if ((sim_idle_rate_ms == 0) || (cyc_ms == 0)) { /* not possible? */
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if ((sim_idle_rate_ms == 0) || (cyc_ms == 0)) { /* not possible? */
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if (sin_cyc)
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if (sin_cyc)
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sim_interval = sim_interval - 1;
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sim_interval = sim_interval - 1;
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sim_debug (DBG_IDL, &sim_timer_dev, "not possible %d - %d\n", sim_idle_rate_ms, cyc_ms);
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sim_debug (DBG_IDL, &sim_timer_dev, "not possible idle_rate_ms=%d - cyc/ms=%d\n", sim_idle_rate_ms, cyc_ms);
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return FALSE;
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return FALSE;
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}
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}
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w_ms = (uint32) sim_interval / cyc_ms; /* ms to wait */
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w_ms = (uint32) sim_interval / cyc_ms; /* ms to wait */
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@ -1759,9 +1762,6 @@ return _timespec_to_double (&now);
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#if defined(SIM_ASYNCH_CLOCKS)
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#if defined(SIM_ASYNCH_CLOCKS)
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extern UNIT * volatile sim_wallclock_queue;
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extern UNIT * volatile sim_wallclock_entry;
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pthread_t sim_timer_thread; /* Wall Clock Timing Thread Id */
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pthread_t sim_timer_thread; /* Wall Clock Timing Thread Id */
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pthread_cond_t sim_timer_startup_cond;
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pthread_cond_t sim_timer_startup_cond;
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t_bool sim_timer_thread_running = FALSE;
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t_bool sim_timer_thread_running = FALSE;
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