PDP11: Fix DL help attach regression and missing SHOW IOSPACE details

This commit is contained in:
Mark Pizzolato 2013-10-02 08:37:09 -07:00
parent 5feb20d054
commit 63e05c77be
6 changed files with 13 additions and 13 deletions

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@ -512,7 +512,9 @@ struct pdp_dib {
int32 vloc; /* locator */
int32 vec; /* value */
int32 (*ack[VEC_DEVMAX])(void); /* ack routines */
uint32 ulnt; /* IO length per-unit */
uint32 ulnt; /* IO length per-device */
/* Only need to be populated */
/* when numunits != num devices */
};
typedef struct pdp_dib DIB;

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@ -160,7 +160,7 @@ DEVICE dli_dev = {
1, 10, 31, 1, 8, 8,
NULL, NULL, &dlx_reset,
NULL, &dlx_attach, &dlx_detach,
&dli_dib, DEV_UBUS | DEV_QBUS | DEV_DISABLE | DEV_DIS
&dli_dib, DEV_UBUS | DEV_QBUS | DEV_DISABLE | DEV_DIS | DEV_MUX
};
/* DLO data structures
@ -219,7 +219,7 @@ DEVICE dlo_dev = {
DLX_LINES, 10, 31, 1, 8, 8,
NULL, NULL, &dlx_reset,
NULL, NULL, NULL,
NULL, DEV_UBUS | DEV_QBUS | DEV_DISABLE | DEV_DIS | DEV_MUX
NULL, DEV_UBUS | DEV_QBUS | DEV_DISABLE | DEV_DIS
};
/* Terminal input routines */

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@ -245,7 +245,7 @@ MTAB mba0_mod[] = {
DIB mba1_dib = {
IOBA_AUTO, IOLN_TU, &mba_rd, &mba_wr,
1, IVCL (TU), VEC_AUTO, { &mba1_inta }
1, IVCL (TU), VEC_AUTO, { &mba1_inta }, IOLN_TU
};
UNIT mba1_unit = { UDATA (NULL, 0, 0) };
@ -280,7 +280,7 @@ MTAB mba1_mod[] = {
DIB mba2_dib = {
IOBA_AUTO, IOLN_RS, &mba_rd, &mba_wr,
1, IVCL (RS), VEC_AUTO, { &mba2_inta }
1, IVCL (RS), VEC_AUTO, { &mba2_inta }, IOLN_RS
};
UNIT mba2_unit = { UDATA (NULL, 0, 0) };

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@ -1028,7 +1028,7 @@ MSC rqb_ctx = { 1 };
DIB rqb_dib = {
IOBA_AUTO, IOLN_RQ, &rq_rd, &rq_wr,
1, IVCL (RQ), 0, { &rq_inta }
1, IVCL (RQ), 0, { &rq_inta }, IOLN_RQ
};
UNIT rqb_unit[] = {
@ -1103,7 +1103,7 @@ MSC rqc_ctx = { 2 };
DIB rqc_dib = {
IOBA_AUTO, IOLN_RQ, &rq_rd, &rq_wr,
1, IVCL (RQ), 0, { &rq_inta }
1, IVCL (RQ), 0, { &rq_inta }, IOLN_RQ
};
UNIT rqc_unit[] = {
@ -1178,7 +1178,7 @@ MSC rqd_ctx = { 3 };
DIB rqd_dib = {
IOBA_AUTO, IOLN_RQ, &rq_rd, &rq_wr,
1, IVCL (RQ), 0, { &rq_inta }
1, IVCL (RQ), 0, { &rq_inta }, IOLN_RQ
};
UNIT rqd_unit[] = {

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@ -400,7 +400,7 @@ REG xqa_reg[] = {
};
DIB xqb_dib = { IOBA_AUTO, IOLN_XQ, &xq_rd, &xq_wr,
1, IVCL (XQ), 0, { &xq_int } };
1, IVCL (XQ), 0, { &xq_int }, IOLN_XQ };
UNIT xqb_unit[] = {
{ UDATA (&xq_svc, UNIT_IDLE|UNIT_ATTABLE|UNIT_DISABLE, 2047) }, /* receive timer */

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@ -231,8 +231,6 @@ DEVICE xu_dev = {
&xu_description
};
#define IOLN_XU 010
DIB xub_dib = { IOBA_AUTO, IOLN_XU, &xu_rd, &xu_wr,
1, IVCL (XU), 0, { &xu_int }, IOLN_XU };