PDP11, VAX: convert RL and HK devices to use sim_disk
This adds file system size verification to allow robust auto sizing and adds the potential to use VHD and/or access RAW devices if desired
This commit is contained in:
parent
5a0970fefb
commit
641d72c3a7
2 changed files with 117 additions and 100 deletions
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@ -68,6 +68,8 @@
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extern uint32 cpu_opt;
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#endif
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#include "sim_disk.h"
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#define HK_NUMDR 8 /* #drives */
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#define HK_NUMCY6 411 /* cyl/drive */
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#define HK_NUMCY7 815 /* cyl/drive */
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@ -83,9 +85,9 @@ extern uint32 cpu_opt;
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/* Flags in the unit flags word */
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#define UNIT_V_WLK (UNIT_V_UF + 0) /* write locked */
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#define UNIT_V_DTYPE (UNIT_V_UF + 1) /* disk type */
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#define UNIT_V_AUTO (UNIT_V_UF + 2) /* autosize */
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#define UNIT_V_DUMMY (UNIT_V_UF + 3) /* dummy flag */
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#define UNIT_V_DTYPE (DKUF_V_UF + 0) /* disk type */
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#define UNIT_V_AUTO (DKUF_V_UF + 1) /* autosize */
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#define UNIT_V_DUMMY (DKUF_V_UF + 2) /* dummy flag */
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#define UNIT_WLK (1 << UNIT_V_WLK)
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#define UNIT_DTYPE (1 << UNIT_V_DTYPE)
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#define UNIT_RK06 (0 << UNIT_V_DTYPE)
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@ -519,11 +521,12 @@ BITFIELD *hk_reg_bits[] = {
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/* Debug detail levels */
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#define HKDEB_OPS 001 /* transactions */
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#define HKDEB_RRD 002 /* reg reads */
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#define HKDEB_RWR 004 /* reg writes */
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#define HKDEB_TRC 010 /* trace */
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#define HKDEB_INT 020 /* interrupts */
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#define HKDEB_OPS 0001 /* transactions */
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#define HKDEB_RRD 0002 /* reg reads */
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#define HKDEB_RWR 0004 /* reg writes */
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#define HKDEB_TRC 0010 /* trace */
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#define HKDEB_INT 0020 /* interrupts */
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#define HKDEB_DAT 0040 /* transfer data */
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uint16 *hkxb = NULL; /* xfer buffer */
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int32 hkcs1 = 0; /* control/status 1 */
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@ -651,6 +654,8 @@ MTAB hk_mod[] = {
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NULL, NULL, NULL, "Write lock disk drive" },
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{ UNIT_DUMMY, 0, NULL, "BADBLOCK",
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&hk_set_bad, NULL, NULL, "write bad block table on last track" },
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{ MTAB_XTD|MTAB_VUN|MTAB_VALR, 0, "FORMAT", "FORMAT={SIMH|VHD|RAW}",
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&sim_disk_set_fmt, &sim_disk_show_fmt, NULL, "Display disk format" },
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{ (UNIT_DTYPE+UNIT_ATT), UNIT_RK06 + UNIT_ATT,
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"RK06", NULL, NULL },
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{ (UNIT_DTYPE+UNIT_ATT), UNIT_RK07 + UNIT_ATT,
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@ -679,6 +684,7 @@ DEBTAB hk_deb[] = {
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{ "RWR", HKDEB_RWR, "register writes" },
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{ "INT", HKDEB_INT, "interrupts" },
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{ "TRACE", HKDEB_TRC, "trace" },
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{ "DATA", HKDEB_DAT, "data transfer"},
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{ NULL, 0 }
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};
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@ -687,7 +693,7 @@ DEVICE hk_dev = {
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HK_NUMDR, DEV_RDX, 24, 1, DEV_RDX, 16,
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NULL, NULL, &hk_reset,
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&hk_boot, &hk_attach, &hk_detach,
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&hk_dib, DEV_DISABLE | DEV_UBUS | DEV_Q18 | DEV_DEBUG, 0,
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&hk_dib, DEV_DISABLE | DEV_UBUS | DEV_Q18 | DEV_DISK | DEV_DEBUG, 0,
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hk_deb, NULL, NULL, &hk_help, NULL, NULL,
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&hk_description
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};
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@ -1054,10 +1060,13 @@ return;
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t_stat hk_svc (UNIT *uptr)
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{
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int32 i, t, dc, fnc, err;
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int32 i, t, dc, fnc;
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t_seccnt sectsread;
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t_stat err;
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int32 wc, awc, da;
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uint32 drv, ba;
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uint16 comp;
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DEVICE *dptr = find_dev_from_unit (uptr);
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drv = (uint32) (uptr - hk_dev.units); /* get drv number */
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fnc = uptr->FNC & CS1_M_FNC; /* get function */
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@ -1142,7 +1151,6 @@ switch (fnc) { /* case on function */
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}
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}
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err = fseek (uptr->fileref, da * sizeof (int16), SEEK_SET);
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if (uptr->FNC == FNC_WRITE) { /* write? */
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if (hkcs2 & CS2_UAI) { /* no addr inc? */
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if ((t = Map_ReadW (ba, 2, &comp))) { /* get 1st wd */
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@ -1162,16 +1170,14 @@ switch (fnc) { /* case on function */
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awc = (wc + (HK_NUMWD - 1)) & ~(HK_NUMWD - 1);
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for (i = wc; i < awc; i++) /* fill buf */
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hkxb[i] = 0;
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if (wc && !err) { /* write buf */
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fxwrite (hkxb, sizeof (uint16), awc, uptr->fileref);
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err = ferror (uptr->fileref);
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if (wc) { /* write buf */
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sim_disk_data_trace (uptr, (uint8 *)hkxb, da/HK_NUMWD, awc, "sim_disk_wrsect", HKDEB_DAT & dptr->dctrl, HKDEB_OPS);
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err = sim_disk_wrsect (uptr, da/HK_NUMWD, (uint8 *)hkxb, NULL, awc/HK_NUMWD);
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}
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} /* end if wr */
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else if (uptr->FNC == FNC_READ) { /* read? */
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i = fxread (hkxb, sizeof (uint16), wc, uptr->fileref);
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err = ferror (uptr->fileref);
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for ( ; i < wc; i++) /* fill buf */
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hkxb[i] = 0;
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err = sim_disk_rdsect (uptr, da/HK_NUMWD, (uint8 *)hkxb, §sread, wc/HK_NUMWD);
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sim_disk_data_trace (uptr, (uint8 *)hkxb, da/HK_NUMWD, sectsread*HK_NUMWD*sizeof(*hkxb), "sim_disk_rdsect", HKDEB_DAT & dptr->dctrl, HKDEB_OPS);
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if (hkcs2 & CS2_UAI) { /* no addr inc? */
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if ((t = Map_WriteW (ba, 2, &hkxb[wc - 1]))) {
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wc = 0; /* NXM, no xfr */
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@ -1187,10 +1193,8 @@ switch (fnc) { /* case on function */
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}
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} /* end if read */
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else { /* wchk */
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i = fxread (hkxb, sizeof (uint16), wc, uptr->fileref);
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err = ferror (uptr->fileref);
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for ( ; i < wc; i++) /* fill buf */
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hkxb[i] = 0;
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err = sim_disk_rdsect (uptr, da/HK_NUMWD, (uint8 *)hkxb, §sread, wc/HK_NUMWD);
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sim_disk_data_trace (uptr, (uint8 *)hkxb, da/HK_NUMWD, sectsread*HK_NUMWD*sizeof(*hkxb), "sim_disk_rdsect", HKDEB_DAT & dptr->dctrl, HKDEB_OPS);
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awc = wc;
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for (wc = 0; wc < awc; wc++) { /* loop thru buf */
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if (Map_ReadW (ba, 2, &comp)) { /* read word */
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@ -1483,12 +1487,15 @@ return auto_config (0, 0);
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t_stat hk_attach (UNIT *uptr, CONST char *cptr)
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{
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uint32 drv, p;
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uint32 drv;
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t_offset p;
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t_stat r;
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int32 old_hkds;
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uptr->capac = HK_SIZE (uptr);
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r = attach_unit (uptr, cptr); /* attach unit */
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r = sim_disk_attach (uptr, cptr, HK_NUMWD * sizeof (uint16),
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sizeof (uint16), TRUE, 0,
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(uptr->capac == RK06_SIZE) ? "RK06" : "RK07", HK_NUMSC, 0);
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if (r != SCPE_OK) /* error? */
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return r;
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drv = (uint32) (uptr - hk_dev.units); /* get drv number */
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@ -1503,12 +1510,7 @@ uptr->CYL = 0;
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if ((old_hkds & DS_ATA) == 0) /* ATN transition? */
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update_hkcs (CS1_DI, drv); /* upd ctlr status */
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p = sim_fsize (uptr->fileref); /* get file size */
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if (p == 0) { /* new disk image? */
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if (uptr->flags & UNIT_RO)
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return SCPE_OK;
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return pdp11_bad_block (uptr, HK_NUMSC, HK_NUMWD);
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}
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p = sim_disk_size (uptr); /* get file size */
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if ((uptr->flags & UNIT_AUTO) == 0) /* autosize? */
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return SCPE_OK;
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if (p > (RK06_SIZE * sizeof (uint16))) {
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@ -1542,7 +1544,7 @@ if (sim_is_active (uptr)) { /* unit active? */
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}
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if ((old_hkds & DS_ATA) == 0) /* ATN transition? */
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update_hkcs (CS1_DI, drv); /* upd ctlr status */
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return detach_unit (uptr);
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return sim_disk_detach (uptr);
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}
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/* Set size command validation routine */
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139
PDP11/pdp11_rl.c
139
PDP11/pdp11_rl.c
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@ -97,6 +97,8 @@
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#include "pdp11_defs.h"
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#endif
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#include "sim_disk.h"
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/* Constants */
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#define RL_NUMWD (128) /* words/sector */
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@ -116,11 +118,11 @@
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/* Flags in the unit flags word */
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#define UNIT_V_WLK (UNIT_V_UF + 0) /* hwre write lock */
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#define UNIT_V_RL02 (UNIT_V_UF + 1) /* RL01 vs RL02 */
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#define UNIT_V_AUTO (UNIT_V_UF + 2) /* autosize enable */
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#define UNIT_V_DUMMY (UNIT_V_UF + 3) /* dummy flag, for SET BADBLOCK */
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#define UNIT_V_OFFL (UNIT_V_UF + 4) /* unit off line */
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#define UNIT_V_BRUSH (UNIT_V_UF + 5) /* unit has brushes */
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#define UNIT_V_RL02 (DKUF_V_UF + 0) /* RL01 vs RL02 */
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#define UNIT_V_AUTO (DKUF_V_UF + 1) /* autosize enable */
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#define UNIT_V_DUMMY (DKUF_V_UF + 2) /* dummy flag, for SET BADBLOCK */
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#define UNIT_V_OFFL (DKUF_V_UF + 3) /* unit off line */
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#define UNIT_V_BRUSH (DKUF_V_UF + 4) /* unit has brushes */
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#define UNIT_BRUSH (1u << UNIT_V_BRUSH)
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#define UNIT_OFFL (1u << UNIT_V_OFFL)
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#define UNIT_DUMMY (1u << UNIT_V_DUMMY)
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@ -225,6 +227,29 @@
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#define RLBAE_IMP (0000077) /* implemented */
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const char *rl_regnames[] = {
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"RLCS",
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"RLDA",
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"RLBA",
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"RLMP",
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"RLBAE",
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"",
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"",
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"",
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};
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/* Debug detail levels */
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#define RLDEB_OPS 0001 /* transactions */
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#define RLDEB_RRD 0002 /* reg reads */
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#define RLDEB_RWR 0004 /* reg writes */
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#define RLDEB_TRC 0010 /* trace */
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#define RLDEB_INT 0020 /* interrupts */
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#define RLDEB_DAT 0100 /* transfer data */
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uint16 *rlxb = NULL; /* xfer buffer */
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int32 rlcs = 0; /* control/status */
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int32 rlba = 0; /* memory address */
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@ -338,6 +363,8 @@ static const MTAB rl_mod[] = {
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NULL, NULL, NULL, "Write lock disk drive" },
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{ UNIT_DUMMY, 0, NULL, "BADBLOCK",
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&rl_set_bad, NULL, NULL, "Write bad block table on last track" },
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{ MTAB_XTD|MTAB_VUN|MTAB_VALR, 0, "FORMAT", "FORMAT={SIMH|VHD|RAW}",
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&sim_disk_set_fmt, &sim_disk_show_fmt, NULL, "Display disk format" },
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{ (UNIT_RL02+UNIT_ATT), UNIT_ATT, "RL01", NULL, NULL },
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{ (UNIT_RL02+UNIT_ATT), (UNIT_RL02+UNIT_ATT), "RL02", NULL, NULL },
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{ (UNIT_AUTO+UNIT_RL02+UNIT_ATT), 0, "RL01", NULL,
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@ -358,13 +385,23 @@ static const MTAB rl_mod[] = {
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{ 0 }
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};
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DEBTAB rl_deb[] = {
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{ "OPS", RLDEB_OPS, "transactions" },
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{ "RRD", RLDEB_RRD, "register reads" },
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{ "RWR", RLDEB_RWR, "register writes" },
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{ "INT", RLDEB_INT, "interrupts" },
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{ "TRACE", RLDEB_TRC, "trace" },
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{ "DATA", RLDEB_DAT, "data transfer"},
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{ NULL, 0 }
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};
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DEVICE rl_dev = {
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"RL", (UNIT *) &rl_unit, (REG *)rl_reg, (MTAB *)rl_mod,
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RL_NUMDR, DEV_RDX, 24, 1, DEV_RDX, 16,
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NULL, NULL, &rl_reset,
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&rl_boot, &rl_attach, &rl_detach,
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&rl_dib, DEV_DISABLE | DEV_UBUS | DEV_QBUS | DEV_DEBUG, 0,
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NULL, NULL, NULL, &rl_help, NULL, NULL,
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&rl_dib, DEV_DISABLE | DEV_UBUS | DEV_QBUS | DEV_DISK | DEV_DEBUG, 0,
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rl_deb, NULL, NULL, &rl_help, NULL, NULL,
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&rl_description
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};
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@ -418,8 +455,7 @@ errors.
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if (rlcs & RLCS_ALLERR)
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rlcs |= RLCS_ERR;
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*data = rlcs;
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if (DEBUG_PRS (rl_dev))
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fprintf (sim_deb, ">>RL rd: RLCS %06o\n", rlcs);
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sim_debug (RLDEB_RRD, &rl_dev, ">>RL rd: RLCS %06o\n", rlcs);
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break;
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case 1: /* RLBA */
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@ -446,6 +482,7 @@ errors.
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return (SCPE_NXM);
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} /* end switch */
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sim_debug (RLDEB_RRD, &rl_dev, ">>RL%d read: %s=0%o\n", GET_DRIVE (rlcs), rl_regnames[(PA >> 1) & 07], *data);
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return SCPE_OK;
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}
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@ -461,8 +498,7 @@ switch ((PA >> 1) & 07) { /* decode PA<2:1> */
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uptr = rl_dev.units + GET_DRIVE (data); /* get new drive */
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if (access == WRITEB)
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data = (PA & 1)? (rlcs & 0377) | (data << 8): (rlcs & ~0377) | data;
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if (DEBUG_PRS (rl_dev))
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fprintf (sim_deb, ">>RL wr: RLCS %06o new %06o\n", rlcs, data);
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sim_debug (RLDEB_RWR, &rl_dev, ">>RL wr: RLCS %06o new %06o\n", rlcs, data);
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rlcs = (rlcs & ~RLCS_RW) | (data & RLCS_RW);
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rlbae = (rlbae & ~RLCS_M_MEX) | ((rlcs >> RLCS_V_MEX) & RLCS_M_MEX);
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/*
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@ -521,8 +557,7 @@ max 17ms for 1 track seek w/head switch
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if (tim == 0)
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tim++;
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tim *= rl_swait;
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if (DEBUG_PRS (rl_dev))
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fprintf (sim_deb, ">>RL SEEK: drv %d, dist %d, head sw %d, tim %d\n",
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sim_debug (RLDEB_RWR, &rl_dev, ">>RL SEEK: drv %d, dist %d, head sw %d, tim %d\n",
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(int32) (uptr - rl_dev.units),
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abs (newc - curr), (rlda & RLDA_SK_HD), tim);
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uptr->FNC = RLCS_SEEK;
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@ -547,8 +582,7 @@ max 17ms for 1 track seek w/head switch
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rl_set_done (RLCS_DRE | RLCS_INCMP);
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}
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rlmp2 = rlmp1 = rlmp;
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if (DEBUG_PRS (rl_dev))
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fprintf (sim_deb, ">>RL GSTA: rlds=%06o drv=%ld\n",
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sim_debug (RLDEB_RWR, &rl_dev, ">>RL GSTA: rlds=%06o drv=%ld\n",
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rlmp, (long)(uptr - rl_dev.units));
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rl_set_done (0); /* done */
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break;
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@ -585,24 +619,21 @@ says, bit 0 can be written and read (as 1) on an RLV12 (verified
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if (access == WRITEB)
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data = (PA & 1)? (rlba & 0377) | (data << 8): (rlba & ~0377) | data;
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rlba = data & (UNIBUS ? 0177776 : 0177777);
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if (DEBUG_PRS (rl_dev))
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fprintf (sim_deb, ">>RL wr: RLBA %06o\n", rlba);
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sim_debug (RLDEB_RWR, &rl_dev, ">>RL wr: RLBA %06o\n", rlba);
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break;
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case 2: /* RLDA */
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if (access == WRITEB)
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data = (PA & 1)? (rlda & 0377) | (data << 8): (rlda & ~0377) | data;
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rlda = data;
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if (DEBUG_PRS (rl_dev))
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fprintf (sim_deb, ">>RL wr: RLDA %06o\n", rlda);
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sim_debug (RLDEB_RWR, &rl_dev, ">>RL wr: RLDA %06o\n", rlda);
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break;
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case 3: /* RLMP */
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if (access == WRITEB)
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data = (PA & 1)? (rlmp & 0377) | (data << 8): (rlmp & ~0377) | data;
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rlmp = rlmp1 = rlmp2 = (uint16)data;
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if (DEBUG_PRS (rl_dev))
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fprintf (sim_deb, ">>RL wr: RLMP %06o\n", rlmp);
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sim_debug (RLDEB_RWR, &rl_dev, ">>RL wr: RLMP %06o\n", rlmp);
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break;
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case 4: /* RLBAE */
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@ -612,13 +643,12 @@ says, bit 0 can be written and read (as 1) on an RLV12 (verified
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return SCPE_OK;
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rlbae = data & RLBAE_IMP;
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rlcs = (rlcs & ~RLCS_MEX) | ((rlbae & RLCS_M_MEX) << RLCS_V_MEX);
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if (DEBUG_PRS (rl_dev))
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fprintf (sim_deb, ">>RL wr: RLBAE %06o\n", rlbae);
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break;
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default:
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return (SCPE_NXM);
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} /* end switch */
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sim_debug (RLDEB_RWR, &rl_dev, ">>RL%d write: %s=0%o\n", GET_DRIVE (rlcs), rl_regnames[(PA >> 1) & 07], data);
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return SCPE_OK;
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}
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@ -653,8 +683,7 @@ static void rlv_maint (void)
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uint32 ma;
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uint16 w;
|
||||
|
||||
if (DEBUG_PRS (rl_dev))
|
||||
fprintf (sim_deb, ">>RL maint: RLDA %06o\n", rlda);
|
||||
sim_debug (RLDEB_OPS, &rl_dev, ">>RL maint: RLDA %06o\n", rlda);
|
||||
/* 1: check internal logic */
|
||||
rlda = (rlda & ~0377) | ((rlda + 1) & 0377);
|
||||
|
||||
|
@ -664,8 +693,7 @@ static void rlv_maint (void)
|
|||
/* 3: check DMA transfers */
|
||||
ma = (rlbae << 16) | rlba; /* get mem addr */
|
||||
/* xfer 256 words to FIFO */
|
||||
if (DEBUG_PRS (rl_dev))
|
||||
fprintf (sim_deb, ">>RL maint: RLMP %06o\n", rlmp);
|
||||
sim_debug (RLDEB_OPS, &rl_dev, ">>RL maint: RLMP %06o\n", rlmp);
|
||||
if (rlmp != 0177001) { /* must be exactly -511 */
|
||||
rlcs |= RLCS_ERR | RLCS_HDE; /* HNF error */
|
||||
return;
|
||||
|
@ -720,23 +748,22 @@ static void rlv_maint (void)
|
|||
|
||||
t_stat rl_svc (UNIT *uptr)
|
||||
{
|
||||
int32 err, wc, maxwc, t;
|
||||
int32 wc, maxwc, t;
|
||||
t_stat err;
|
||||
t_seccnt sectsread;
|
||||
int32 i, da, awc;
|
||||
uint32 ma;
|
||||
uint16 comp;
|
||||
DEVICE *dptr = find_dev_from_unit (uptr);
|
||||
static const char * const funcname[] = {
|
||||
"NOP", "WCK", "GSTA", "SEEK",
|
||||
"RHDR", "WT", "RD", "RNOHDR", "SPECIAL",
|
||||
};
|
||||
|
||||
if (DEBUG_PRS (rl_dev)) {
|
||||
if (uptr->FNC == RLCS_SPECIAL)
|
||||
fprintf (sim_deb, ">>RL svc: func=SPECIAL(%s) drv=%d\n",
|
||||
state[uptr->STAT & RLDS_M_STATE], (int32) (uptr - rl_dev.units));
|
||||
sim_debug (RLDEB_OPS, &rl_dev, ">>RL: svc: func=SPECIAL(%s) drv=%d\n", state[uptr->STAT & RLDS_M_STATE], (int32) (uptr - rl_dev.units));
|
||||
else
|
||||
fprintf (sim_deb, ">>RL svc: func=%s drv=%d rlda=%06o\n",
|
||||
funcname[uptr->FNC], (int32) (uptr - rl_dev.units), rlda);
|
||||
}
|
||||
sim_debug (RLDEB_OPS, &rl_dev, ">>RL svc: func=%s drv=%d rlda=%06o\n", funcname[uptr->FNC], (int32) (uptr - rl_dev.units), rlda);
|
||||
|
||||
/* really shouldn't happen... */
|
||||
if ((uptr->FNC == RLCS_GSTA) || (uptr->FNC == RLCS_NOP)) {
|
||||
|
@ -873,17 +900,12 @@ wc = 0200000 - rlmp; /* get true wc */
|
|||
|
||||
if (wc > maxwc) /* track overrun? */
|
||||
wc = maxwc;
|
||||
err = fseek (uptr->fileref, da * sizeof (int16), SEEK_SET);
|
||||
|
||||
if (DEBUG_PRS (rl_dev))
|
||||
fprintf (sim_deb, ">>RL svc: cyl %d, sect %d, wc %d, maxwc %d, err %d\n",
|
||||
GET_CYL (rlda), GET_SECT (rlda), wc, maxwc, err);
|
||||
sim_debug (RLDEB_OPS, &rl_dev, ">>RL svc: cyl %d, sect %d, wc %d, maxwc %d\n", GET_CYL (rlda), GET_SECT (rlda), wc, maxwc);
|
||||
|
||||
if ((uptr->FNC >= RLCS_READ) && (err == 0)) { /* read (no hdr)? */
|
||||
i = fxread (rlxb, sizeof (int16), wc, uptr->fileref);
|
||||
err = ferror (uptr->fileref);
|
||||
for ( ; i < wc; i++) /* fill buffer */
|
||||
rlxb[i] = 0;
|
||||
if (uptr->FNC >= RLCS_READ) { /* read (no hdr)? */
|
||||
err = sim_disk_rdsect (uptr, da/RL_NUMWD, (uint8 *)rlxb, §sread, wc/RL_NUMWD);
|
||||
sim_disk_data_trace (uptr, (uint8 *)rlxb, da/RL_NUMWD, sectsread*RL_NUMWD*sizeof(*rlxb), "sim_disk_rdsect", RLDEB_DAT & dptr->dctrl, RLDEB_OPS);
|
||||
if ((t = Map_WriteW (ma, wc << 1, rlxb))) { /* store buffer */
|
||||
rlcs = rlcs | RLCS_ERR | RLCS_NXM; /* nxm */
|
||||
wc = wc - t; /* adjust wc */
|
||||
|
@ -891,7 +913,7 @@ if (DEBUG_PRS (rl_dev))
|
|||
} /* end read */
|
||||
|
||||
else
|
||||
if ((uptr->FNC == RLCS_WRITE) && (err == 0)) { /* write? */
|
||||
if (uptr->FNC == RLCS_WRITE) { /* write? */
|
||||
if ((t = Map_ReadW (ma, wc << 1, rlxb))) { /* fetch buffer */
|
||||
rlcs = rlcs | RLCS_ERR | RLCS_NXM; /* nxm */
|
||||
wc = wc - t; /* adj xfer lnt */
|
||||
|
@ -900,17 +922,15 @@ if ((uptr->FNC == RLCS_WRITE) && (err == 0)) { /* write? */
|
|||
awc = (wc + (RL_NUMWD - 1)) & ~(RL_NUMWD - 1); /* clr to */
|
||||
for (i = wc; i < awc; i++) /* end of blk */
|
||||
rlxb[i] = 0;
|
||||
fxwrite (rlxb, sizeof (int16), awc, uptr->fileref);
|
||||
err = ferror (uptr->fileref);
|
||||
sim_disk_data_trace (uptr, (uint8 *)rlxb, da/RL_NUMWD, awc, "sim_disk_wrsect", RLDEB_DAT & dptr->dctrl, RLDEB_OPS);
|
||||
err = sim_disk_wrsect (uptr, da/RL_NUMWD, (uint8 *)rlxb, NULL, awc/RL_NUMWD);
|
||||
}
|
||||
} /* end write */
|
||||
|
||||
else
|
||||
if ((uptr->FNC == RLCS_WCHK) && (err == 0)) { /* write check? */
|
||||
i = fxread (rlxb, sizeof (int16), wc, uptr->fileref);
|
||||
err = ferror (uptr->fileref);
|
||||
for ( ; i < wc; i++) /* fill buffer */
|
||||
rlxb[i] = 0;
|
||||
if (uptr->FNC == RLCS_WCHK) { /* write check? */
|
||||
err = sim_disk_rdsect (uptr, da/RL_NUMWD, (uint8 *)rlxb, §sread, wc/RL_NUMWD);
|
||||
sim_disk_data_trace (uptr, (uint8 *)rlxb, da/RL_NUMWD, sectsread*RL_NUMWD*sizeof(*rlxb), "sim_disk_rdsect", RLDEB_DAT & dptr->dctrl, RLDEB_OPS);
|
||||
awc = wc; /* save wc */
|
||||
for (wc = 0; (err == 0) && (wc < awc); wc++) { /* loop thru buf */
|
||||
if (Map_ReadW (ma + (wc << 1), 2, &comp)) { /* mem wd */
|
||||
|
@ -995,11 +1015,13 @@ return auto_config (0, 0);
|
|||
|
||||
t_stat rl_attach (UNIT *uptr, CONST char *cptr)
|
||||
{
|
||||
uint32 p;
|
||||
t_offset p;
|
||||
t_stat r;
|
||||
|
||||
uptr->capac = (uptr->flags & UNIT_RL02)? RL02_SIZE: RL01_SIZE;
|
||||
r = attach_unit (uptr, cptr); /* attach unit */
|
||||
r = sim_disk_attach (uptr, cptr, RL_NUMWD * sizeof (uint16),
|
||||
sizeof (uint16), TRUE, 0,
|
||||
(uptr->capac == RL02_SIZE) ? "RL02" : "RL01", RL_NUMSC, 0);
|
||||
if (r != SCPE_OK) /* error? */
|
||||
return r;
|
||||
/*
|
||||
|
@ -1008,11 +1030,7 @@ as if the load procedure had already executed.
|
|||
*/
|
||||
uptr->TRK = 0; /* cylinder 0 */
|
||||
uptr->STAT = RLDS_HDO | RLDS_BHO | RLDS_VCK | RLDS_LOCK; /* new volume */
|
||||
if ((p = sim_fsize (uptr->fileref)) == 0) { /* new disk image? */
|
||||
if (uptr->flags & UNIT_RO) /* if ro, done */
|
||||
return SCPE_OK;
|
||||
return pdp11_bad_block (uptr, RL_NUMSC, RL_NUMWD);
|
||||
}
|
||||
p = sim_disk_size (uptr); /* get file size */
|
||||
if ((uptr->flags & UNIT_AUTO) == 0) /* autosize? */
|
||||
return SCPE_OK;
|
||||
if (p > (RL01_SIZE * sizeof (int16))) {
|
||||
|
@ -1028,12 +1046,9 @@ return SCPE_OK;
|
|||
|
||||
t_stat rl_detach (UNIT *uptr)
|
||||
{
|
||||
t_stat stat;
|
||||
|
||||
sim_cancel (uptr);
|
||||
stat = detach_unit (uptr);
|
||||
uptr->STAT = RLDS_BHO | RLDS_LOAD;
|
||||
return (stat);
|
||||
return sim_disk_detach (uptr);
|
||||
}
|
||||
|
||||
/* Set size routine */
|
||||
|
|
Loading…
Add table
Reference in a new issue