From 65ea457d5b298a558e37c59a03d86b9177ac735a Mon Sep 17 00:00:00 2001 From: Timothe Litt Date: Wed, 19 Jun 2013 05:49:07 -0400 Subject: [PATCH] PDP-10 tape boot rom update The boot rom for tape didn't handle a tapes coming on-line, didn't take the RH/TM/addresses from the FE. The launcher also didn't handle autoboot. Now it does, with the restriction that ITS will only talk to UBA1. --- PDP10/pdp10_tu.c | 130 ++++++++++++++++++++++++++++++++++++----------- 1 file changed, 99 insertions(+), 31 deletions(-) diff --git a/PDP10/pdp10_tu.c b/PDP10/pdp10_tu.c index 47f947b6..b27b3627 100644 --- a/PDP10/pdp10_tu.c +++ b/PDP10/pdp10_tu.c @@ -101,6 +101,7 @@ #define MT_MAXFR (1 << 16) /* max data buf */ #define TU_STATEFLAGS u5 /* Simulator state flags */ #define TUS_ATTPENDING 0000001 /* Attach pending */ +#define SPINUPDLY 100*1000 /* 100 msec */ /* MTCS1 - 172440 - control/status 1 */ @@ -1163,6 +1164,9 @@ for (u = 0; u < TU_NUMDR; u++) { /* loop thru units */ sim_tape_reset (uptr); /* clear pos flag */ if (!uptr->TU_STATEFLAGS & TUS_ATTPENDING) /* Delayed on-line must survive massbus clear */ sim_cancel (uptr); /* cancel activity */ + else if (!sim_is_active(uptr) ) + sim_activate_after(uptr, SPINUPDLY); + uptr->USTAT = 0; } if (xbuf == NULL) @@ -1197,7 +1201,7 @@ if ((GET_FMTR (tucs2) == 0) && (GET_DRV (tutc) == drv)) /* selected drive? */ uptr->TU_STATEFLAGS |= TUS_ATTPENDING; update_tucs (CS1_SC, drv); /* update status */ sim_cancel(uptr); -sim_activate_after (uptr,100*1000); +sim_activate_after (uptr,SPINUPDLY); return r; } @@ -1228,83 +1232,131 @@ return sim_tape_detach (uptr); } /* Device bootstrap */ +/* Note that the dec and ITS boot code is word for word identical, + * except for the IO instructions. The ITS instructions encode the + * UBA number. No attempt is made to allow UBA selection under ITS, + * though it should work with the DEC rom. + * The sequence is: + * controller clear - to clear controller errors + * formatter select - to gain access to the formatter registers. (since only + * one formatter is supported, and it's assumed to be zero, this isn't strictly + * necessary. But maybe someday...) + * wait for MOL to appear. + * Drive clear - to clear any errors in the transport, including attention from on-line. + * Space forward one file - this is the KS CPU microcode, which the simulator doesn't + * use. + * Read the preboot (next level bootstrap) from the tape into page 1. + * Each operation produces erors - for one, the frame count is not exact. + * They are cleared, and the expected ones ignored. If no unexpected + * errors are encountered, control is transferred to the preboot. + */ #define BOOT_START 0377000 /* start */ #define BOOT_LEN (sizeof (boot_rom_dec) / sizeof (d10)) static const d10 boot_rom_dec[] = { - INT64_C(0515040000003), /* boot:hrlzi 1,3 ; uba # */ + INT64_C(0510040000000)+FE_RHBASE, /* boot:hllz 1,FE_RHBASE ; uba # */ INT64_C(0201000040001), /* movei 0,40001 ; vld,pg 1 */ INT64_C(0713001000000)+(IOBA_UBMAP+1 & RMASK), /* wrio 0,763001(1); set ubmap */ - INT64_C(0435040000000)+(IOBA_TU & RMASK), /* iori 1,772440 ; rh addr */ - INT64_C(0202040000000)+FE_RHBASE, /* movem 1,FE_RHBASE */ + INT64_C(0200040000000)+FE_RHBASE, /* move 1,FE_RHBASE */ INT64_C(0201000000040), /* movei 0,40 ; ctrl reset */ INT64_C(0713001000010), /* wrio 0,10(1) ; ->MTFS */ + INT64_C(0200300000000)+FE_UNIT, /* move 6,FE_UNIT ; fmtr */ + INT64_C(0713301000010), /* wrio 6,10(1) ; ->MTCS2 */ + + INT64_C(0200240000000)+FE_MTFMT, /* move 5,FE_MTFMT ; slave, dens, fmt */ + INT64_C(0713241000032), /* wrio 5,32(1) ; ->MTTC */ + INT64_C(0712001000012), /* rdio 0,12(1) ; MTFS */ + INT64_C(0640000010600), /* trc 0,10600 ; MOL + DPR + RDY */ + INT64_C(0642000010600), /* trce 0,10600 ; */ + INT64_C(0254000377012), /* jrst .-3 ; wait */ + INT64_C(0201000000011), /* movei 0,11 ; clr+go */ + INT64_C(0713001000000), /* wrio 0,0(1) ; ->MTCS1 */ + + INT64_C(0201000000377), /* movei 0,1 ; Formatter */ + INT64_C(0242006000000), /* lsh 0,(6) ; attn bit */ + INT64_C(0713001000016), /* wrio 0,16(1) ; Clear on-line attn */ INT64_C(0201100000031), /* movei 2,31 ; space f */ - INT64_C(0265740377014), /* jsp 17,tpop ; skip ucode */ + INT64_C(0265740377030), /* jsp 17,tpop ; skip ucode */ INT64_C(0201100000071), /* movei 2,71 ; read f */ - INT64_C(0265740377014), /* jsp 17,tpop ; read boot */ + INT64_C(0265740377030), /* jsp 17,tpop ; read boot */ INT64_C(0254000001000), /* jrst 1000 ; start */ - INT64_C(0200000000000)+FE_MTFMT, /* tpop:move 0,FE_MTFMT ; den,fmt,slv */ - INT64_C(0713001000032), /* wrio 0,32(1) ; ->MTTC */ + + INT64_C(0713241000032), /* tpop:wrio 5,32(1) ; ->MTTC */ INT64_C(0201000000011), /* movei 0,11 ; clr+go */ INT64_C(0713001000000), /* wrio 0,0(1) ; ->MTCS1 */ INT64_C(0201140176000), /* movei 3,176000 ; wd cnt */ - INT64_C(0201200004000), /* movei 4,4000 ; addr */ - INT64_C(0200240000000)+FE_MTFMT, /* move 5,FE_MTFMT ; unit */ - INT64_C(0201300000000), /* movei 6,0 ; fmtr */ INT64_C(0713141000002), /* wrio 3,2(1) ; ->MTWC */ + INT64_C(0201200004000), /* movei 4,4000 ; addr */ INT64_C(0713201000004), /* wrio 4,4(1) ; ->MTBA */ - INT64_C(0713301000006), /* wrio 6,6(1) ; ->MTFC */ - INT64_C(0713301000010), /* wrio 6,10(1) ; ->MTFS */ - INT64_C(0713241000032), /* wrio 5,32(1) ; ->MTTC */ - INT64_C(0713101000000), /* wrio 2,0(1) ; ->MTCS1 */ + INT64_C(0400400000000), /* setz 10, ; max fc */ + + INT64_C(0713401000006), /* wrio 10,6(1) ; ->MTFC */ + INT64_C(0713301000010), /* wrio 6,10(1) ; ->MTCS2 reset errs */ + INT64_C(0713241000032), /* wrio 5,32(1) ; ->MTTC reset errs */ + INT64_C(0713101000000), /* wrio 2,0(1) ; OP ->MTCS1 */ INT64_C(0712341000012), /* rdio 7,12(1) ; read FS */ INT64_C(0606340000200), /* trnn 7,200 ; test rdy */ - INT64_C(0254000377032), /* jrst .-2 ; loop */ + INT64_C(0254000377044), /* jrst .-2 ; loop */ INT64_C(0606340040000), /* trnn 7,40000 ; test err */ + INT64_C(0254017000000), /* jrst 0(17) ; return */ INT64_C(0712341000014), /* rdio 7,14(1) ; read err */ INT64_C(0302340001000), /* caie 7,1000 ; fce? */ - INT64_C(0254200377052), /* halt */ + INT64_C(0254200377053), /* halt . */ INT64_C(0254017000000), /* jrst 0(17) ; return */ }; static const d10 boot_rom_its[] = { - INT64_C(0515040000003), /* boot:hrlzi 1,3 ; uba # - not used */ + INT64_C(0510040000000)+FE_RHBASE, /* boot:hllz 1,FE_RHBASE ; uba # - not used */ INT64_C(0201000040001), /* movei 0,40001 ; vld,pg 1 */ INT64_C(0714000000000)+(IOBA_UBMAP+1 & RMASK), /* iowri 0,763001 ; set ubmap */ - INT64_C(0435040000000)+(IOBA_TU & RMASK), /* iori 1,772440 ; rh addr */ - INT64_C(0202040000000)+FE_RHBASE, /* movem 1,FE_RHBASE */ + INT64_C(0200040000000)+FE_RHBASE, /* move 1,FE_RHBASE */ INT64_C(0201000000040), /* movei 0,40 ; ctrl reset */ INT64_C(0714001000010), /* iowri 0,10(1) ; ->MTFS */ + INT64_C(0200300000000)+FE_UNIT, /* move 6,FE_UNIT ; fmtr */ + INT64_C(0714301000010), /* iowri 6,10(1) ; ->MTFS */ + + INT64_C(0200240000000)+FE_MTFMT, /* move 5,FE_MTFMT ; slave, dens, fmt */ + INT64_C(0714241000032), /* iowri 5,32(1) ; ->MTTC */ + INT64_C(0710001000012), /* iordi 0,12(1) ; read FS */ + INT64_C(0640000010600), /* trc 0,10600 ; MOL + DPR + RDY */ + INT64_C(0642000010600), /* trce 0,10600 ; */ + INT64_C(0254000377012), /* jrst .-3 ; wait */ + INT64_C(0201000000011), /* movei 0,11 ; clr+go */ + INT64_C(0714001000000), /* iowri 0,0(1) ; ->MTCS1 */ + + INT64_C(0201000000377), /* movei 0,1 ; Formatter */ + INT64_C(0242006000000), /* lsh 0,(6) ; attn bit */ + INT64_C(0714001000016), /* iowri 0,16(1) ; Clear on-line attn */ INT64_C(0201100000031), /* movei 2,31 ; space f */ - INT64_C(0265740377014), /* jsp 17,tpop ; skip ucode */ + INT64_C(0265740377030), /* jsp 17,tpop ; skip ucode */ INT64_C(0201100000071), /* movei 2,71 ; read f */ - INT64_C(0265740377014), /* jsp 17,tpop ; read boot */ + INT64_C(0265740377030), /* jsp 17,tpop ; read boot */ INT64_C(0254000001000), /* jrst 1000 ; start */ - INT64_C(0200000000000)+FE_MTFMT, /* tpop:move 0,FE_MTFMT ; den,fmt,slv */ - INT64_C(0714001000032), /* iowri 0,32(1) ; ->MTTC */ + + INT64_C(0714241000032), /* tpop:iowri 5,32(1) ; ->MTTC */ INT64_C(0201000000011), /* movei 0,11 ; clr+go */ INT64_C(0714001000000), /* iowri 0,0(1) ; ->MTCS1 */ INT64_C(0201140176000), /* movei 3,176000 ; wd cnt */ - INT64_C(0201200004000), /* movei 4,4000 ; addr */ - INT64_C(0200240000000)+FE_MTFMT, /* move 5,FE_MTFMT ; unit */ - INT64_C(0201300000000), /* movei 6,0 ; fmtr */ INT64_C(0714141000002), /* iowri 3,2(1) ; ->MTWC */ + INT64_C(0201200004000), /* movei 4,4000 ; addr */ INT64_C(0714201000004), /* iowri 4,4(1) ; ->MTBA */ - INT64_C(0714301000006), /* iowri 6,6(1) ; ->MTFC */ + INT64_C(0400400000000), /* setz 10, ; max fc */ + + INT64_C(0714401000006), /* iowri 10,6(1) ; ->MTFC */ INT64_C(0714301000010), /* iowri 6,10(1) ; ->MTFS */ INT64_C(0714241000032), /* iowri 5,32(1) ; ->MTTC */ INT64_C(0714101000000), /* iowri 2,0(1) ; ->MTCS1 */ INT64_C(0710341000012), /* iordi 7,12(1) ; read FS */ INT64_C(0606340000200), /* trnn 7,200 ; test rdy */ - INT64_C(0254000377032), /* jrst .-2 ; loop */ + INT64_C(0254000377044), /* jrst .-2 ; loop */ INT64_C(0606340040000), /* trnn 7,40000 ; test err */ + INT64_C(0254017000000), /* jrst 0(17) ; return */ INT64_C(0710341000014), /* iordi 7,14(1) ; read err */ INT64_C(0302340001000), /* caie 7,1000 ; fce? */ - INT64_C(0254200377052), /* halt */ + INT64_C(0254200377053), /* halt . */ INT64_C(0254017000000), /* jrst 0(17) ; return */ }; @@ -1312,10 +1364,26 @@ t_stat tu_boot (int32 unitno, DEVICE *dptr) { size_t i; extern a10 saved_PC; +UNIT *uptr; + +unitno &= TC_M_UNIT; +uptr = tu_unit + unitno; +if (!(uptr->flags & UNIT_ATT)) + return SCPE_NOATT; + +M[FE_RHBASE] = tu_dib.ba; +M[FE_UNIT] = 0; /* Only one formatter in this implementation */ + +assert (sizeof(boot_rom_dec) == sizeof(boot_rom_its); -M[FE_UNIT] = 0; M[FE_MTFMT] = (unitno & TC_M_UNIT) | (TC_1600 << TC_V_DEN) | (TC_10C << TC_V_FMT); tu_unit[unitno].pos = 0; + +if (sim_switches & SWMASK ('A')) + M[FE_KEEPA] = ((d10) 010); /* <32>: Autoboot */ +else + M[FE_KEEPA] = 0; + for (i = 0; i < BOOT_LEN; i++) M[BOOT_START + i] = Q_ITS? boot_rom_its[i]: boot_rom_dec[i]; saved_PC = BOOT_START;