diff --git a/ALTAIR/altair_defs.h b/ALTAIR/altair_defs.h index ca8444a9..b864c7f1 100644 --- a/ALTAIR/altair_defs.h +++ b/ALTAIR/altair_defs.h @@ -24,19 +24,19 @@ in this Software without prior written authorization from Charles E. Owen. */ -#include "sim_defs.h" /* simulator defns */ +#include "sim_defs.h" /* simulator defns */ /* Memory */ -#define MAXMEMSIZE 65536 /* max memory size */ -#define MEMSIZE (cpu_unit.capac) /* actual memory size */ -#define ADDRMASK (MAXMEMSIZE - 1) /* address mask */ -#define MEM_ADDR_OK(x) (((uint32) (x)) < MEMSIZE) +#define MAXMEMSIZE 65536 /* max memory size */ +#define MEMSIZE (cpu_unit.capac) /* actual memory size */ +#define ADDRMASK (MAXMEMSIZE - 1) /* address mask */ +#define MEM_ADDR_OK(x) (((uint32) (x)) < MEMSIZE) /* Simulator stop codes */ -#define STOP_RSRV 1 /* must be 1 */ -#define STOP_HALT 2 /* HALT */ -#define STOP_IBKPT 3 /* breakpoint */ -#define STOP_OPCODE 4 +#define STOP_RSRV 1 /* must be 1 */ +#define STOP_HALT 2 /* HALT */ +#define STOP_IBKPT 3 /* breakpoint */ +#define STOP_OPCODE 4 diff --git a/AltairZ80/altairz80_dsk.c b/AltairZ80/altairz80_dsk.c index 6e4bad79..ebe39c84 100644 --- a/AltairZ80/altairz80_dsk.c +++ b/AltairZ80/altairz80_dsk.c @@ -106,28 +106,28 @@ T = Sector True, is a 0 when the sector is positioned to read or write. - ---------------------------------------------------------- + ---------------------------------------------------------- - 5/22/2014 - Updated by Mike Douglas to support the Altair Minidisk. - This disk uses 35 (vs 70) tracks of 16 (vs 32) sectors - of 137 bytes each. + 5/22/2014 - Updated by Mike Douglas to support the Altair Minidisk. + This disk uses 35 (vs 70) tracks of 16 (vs 32) sectors + of 137 bytes each. - 6/30/2014 - When the disk is an Altair Minidisk, load the head as - soon as the disk is enabled, and ignore the head - unload command (both like the real hardware). + 6/30/2014 - When the disk is an Altair Minidisk, load the head as + soon as the disk is enabled, and ignore the head + unload command (both like the real hardware). - 7/13/2014 - This code previously returned zero when the sector position - register was read with the head not loaded. This zero looks - like an asserted "Sector True" flag for sector zero. The real - hardware returns 0xff in this case. The same problem occurs - when the drive is deselected - the sector position register - returned zero instead of 0xff. These have been corrected. + 7/13/2014 - This code previously returned zero when the sector position + register was read with the head not loaded. This zero looks + like an asserted "Sector True" flag for sector zero. The real + hardware returns 0xff in this case. The same problem occurs + when the drive is deselected - the sector position register + returned zero instead of 0xff. These have been corrected. - 7/13/2014 Some software for the Altair skips a sector by verifying - that "Sector True" goes false. Previously, this code - returned "Sector True" every time the sector register - was read. Now the flag alternates true and false on - subsequent reads of the sector register. + 7/13/2014 Some software for the Altair skips a sector by verifying + that "Sector True" goes false. Previously, this code + returned "Sector True" every time the sector register + was read. Now the flag alternates true and false on + subsequent reads of the sector register. */ #include "altairz80_defs.h" @@ -153,9 +153,9 @@ #define NUM_OF_DSK_MASK (NUM_OF_DSK - 1) #define BOOTROM_SIZE_DSK 256 /* size of boot rom */ -#define MINI_DISK_SECT 16 /* mini disk sectors per track */ -#define MINI_DISK_TRACKS 35 /* number of tracks on mini disk */ -#define MINI_DISK_SIZE (MINI_DISK_TRACKS * MINI_DISK_SECT * DSK_SECTSIZE) +#define MINI_DISK_SECT 16 /* mini disk sectors per track */ +#define MINI_DISK_TRACKS 35 /* number of tracks on mini disk */ +#define MINI_DISK_SIZE (MINI_DISK_TRACKS * MINI_DISK_SECT * DSK_SECTSIZE) #define MINI_DISK_DELTA 4096 /* threshold for detecting mini disks */ int32 dsk10(const int32 port, const int32 io, const int32 data); @@ -183,7 +183,7 @@ static int32 current_track [NUM_OF_DSK] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, static int32 current_sector [NUM_OF_DSK] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; static int32 current_byte [NUM_OF_DSK] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; static int32 current_flag [NUM_OF_DSK] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; -static int32 sectors_per_track [NUM_OF_DSK] = { DSK_SECT, DSK_SECT, DSK_SECT, DSK_SECT, +static int32 sectors_per_track [NUM_OF_DSK] = { DSK_SECT, DSK_SECT, DSK_SECT, DSK_SECT, DSK_SECT, DSK_SECT, DSK_SECT, DSK_SECT, DSK_SECT, DSK_SECT, DSK_SECT, DSK_SECT, DSK_SECT, DSK_SECT, DSK_SECT, DSK_SECT }; @@ -201,7 +201,7 @@ static int32 warnDSK10 = 0; static int32 warnDSK11 = 0; static int32 warnDSK12 = 0; static int8 dskbuf[DSK_SECTSIZE]; /* data Buffer */ -static int32 sector_true = 0; /* sector true flag for sector register read */ +static int32 sector_true = 0; /* sector true flag for sector register read */ const static int32 alt_bootrom_dsk[BOOTROM_SIZE_DSK] = { // boot ROM for mini disk support 0x21, 0x13, 0xff, 0x11, 0x00, 0x4c, 0x0e, 0xe3, /* ff00-ff07 */ @@ -396,7 +396,7 @@ static t_stat dsk_reset(DEVICE *dptr) { static t_stat dsk_attach(UNIT *uptr, char *cptr) { int32 thisUnitIndex; - int32 imageSize; + int32 imageSize; const t_stat r = attach_unit(uptr, cptr); /* attach unit */ if (r != SCPE_OK) /* error? */ return r; @@ -408,7 +408,7 @@ static t_stat dsk_attach(UNIT *uptr, char *cptr) { /* If the file size is close to the mini-disk image size, set the number of tracks to 16, otherwise, 32 sectors per track. */ - imageSize = sim_fsize(uptr -> fileref); + imageSize = sim_fsize(uptr -> fileref); sectors_per_track[thisUnitIndex] = (((MINI_DISK_SIZE - MINI_DISK_DELTA < imageSize) && (imageSize < MINI_DISK_SIZE + MINI_DISK_DELTA)) ? MINI_DISK_SECT : DSK_SECT); @@ -547,15 +547,15 @@ int32 dsk10(const int32 port, const int32 io, const int32 data) { else { current_sector[current_disk] = 0xff; /* reset internal counters */ current_byte[current_disk] = 0xff; - if (data & 0x80) /* disable drive? */ - current_flag[current_disk] = 0; /* yes, clear all flags */ - else { /* enable drive */ - current_flag[current_disk] = 0x1a; /* move head true */ - if (current_track[current_disk] == 0) /* track 0? */ - current_flag[current_disk] |= 0x40; /* yes, set track 0 true as well */ - if (sectors_per_track[current_disk] == MINI_DISK_SECT) /* drive enable loads head for Minidisk */ - current_flag[current_disk] |= 0x84; - } + if (data & 0x80) /* disable drive? */ + current_flag[current_disk] = 0; /* yes, clear all flags */ + else { /* enable drive */ + current_flag[current_disk] = 0x1a; /* move head true */ + if (current_track[current_disk] == 0) /* track 0? */ + current_flag[current_disk] |= 0x40; /* yes, set track 0 true as well */ + if (sectors_per_track[current_disk] == MINI_DISK_SECT) /* drive enable loads head for Minidisk */ + current_flag[current_disk] |= 0x84; + } } return 0; /* ignored since OUT */ } @@ -587,13 +587,13 @@ int32 dsk11(const int32 port, const int32 io, const int32 data) { if (dirty) /* implies that current_disk < NUM_OF_DSK */ writebuf(); if (current_flag[current_disk] & 0x04) { /* head loaded? */ - sector_true ^= 1; /* return sector true every other entry */ - if (sector_true == 0) { /* true when zero */ + sector_true ^= 1; /* return sector true every other entry */ + if (sector_true == 0) { /* true when zero */ current_sector[current_disk]++; if (current_sector[current_disk] >= sectors_per_track[current_disk]) current_sector[current_disk] = 0; current_byte[current_disk] = 0xff; - } + } return (((current_sector[current_disk] << 1) & 0x3e) /* return sector number and...) */ | 0xc0 | sector_true); /* sector true, and set 'unused' bits */ } else @@ -611,7 +611,7 @@ int32 dsk11(const int32 port, const int32 io, const int32 data) { current_disk, PCX); } current_track[current_disk]++; - current_flag[current_disk] &= 0xbf; /* mwd 1/29/13: track zero now false */ + current_flag[current_disk] &= 0xbf; /* mwd 1/29/13: track zero now false */ if (current_track[current_disk] > (tracks[current_disk] - 1)) current_track[current_disk] = (tracks[current_disk] - 1); if (dirty) /* implies that current_disk < NUM_OF_DSK */ diff --git a/AltairZ80/m68kopac.c b/AltairZ80/m68kopac.c index 62f787eb..de3af68c 100644 --- a/AltairZ80/m68kopac.c +++ b/AltairZ80/m68kopac.c @@ -6425,10 +6425,10 @@ void m68k_op_bfffo_32_d(void) width = ((width-1) & 31) + 1; data = ROL_32(data, offset); - FLAG_N = (uint)(NFLAG_32(data)); + FLAG_N = (uint)(NFLAG_32(data)); data >>= 32 - width; - FLAG_Z = (uint)data; + FLAG_Z = (uint)data; FLAG_V = VFLAG_CLEAR; FLAG_C = CFLAG_CLEAR; @@ -6833,8 +6833,8 @@ void m68k_op_bfins_32_d(void) mask = ROR_32(mask, offset); insert = MASK_OUT_ABOVE_32(insert << (32 - width)); - FLAG_N = (uint)(NFLAG_32(insert)); - FLAG_Z = (uint)insert; + FLAG_N = (uint)(NFLAG_32(insert)); + FLAG_Z = (uint)insert; insert = ROR_32(insert, offset); FLAG_V = VFLAG_CLEAR; diff --git a/AltairZ80/m68kopdm.c b/AltairZ80/m68kopdm.c index 53bafc08..9496817a 100644 --- a/AltairZ80/m68kopdm.c +++ b/AltairZ80/m68kopdm.c @@ -1139,11 +1139,11 @@ void m68k_op_divl_32_d(void) } } - REG_D[word2 & 7] = (uint)remainder; - REG_D[(word2 >> 12) & 7] = (uint)quotient; + REG_D[word2 & 7] = (uint)remainder; + REG_D[(word2 >> 12) & 7] = (uint)quotient; - FLAG_N = (uint)(NFLAG_32(quotient)); - FLAG_Z = (uint)quotient; + FLAG_N = (uint)(NFLAG_32(quotient)); + FLAG_Z = (uint)quotient; FLAG_V = VFLAG_CLEAR; FLAG_C = CFLAG_CLEAR; return; @@ -1350,11 +1350,11 @@ void m68k_op_divl_32_ai(void) } } - REG_D[word2 & 7] = (uint)remainder; - REG_D[(word2 >> 12) & 7] = (uint)quotient; + REG_D[word2 & 7] = (uint)remainder; + REG_D[(word2 >> 12) & 7] = (uint)quotient; - FLAG_N = (uint)NFLAG_32(quotient); - FLAG_Z = (uint)quotient; + FLAG_N = (uint)NFLAG_32(quotient); + FLAG_Z = (uint)quotient; FLAG_V = VFLAG_CLEAR; FLAG_C = CFLAG_CLEAR; return; @@ -1561,11 +1561,11 @@ void m68k_op_divl_32_pi(void) } } - REG_D[word2 & 7] = (uint)remainder; - REG_D[(word2 >> 12) & 7] = (uint)quotient; + REG_D[word2 & 7] = (uint)remainder; + REG_D[(word2 >> 12) & 7] = (uint)quotient; - FLAG_N = (uint)NFLAG_32(quotient); - FLAG_Z = (uint)quotient; + FLAG_N = (uint)NFLAG_32(quotient); + FLAG_Z = (uint)quotient; FLAG_V = VFLAG_CLEAR; FLAG_C = CFLAG_CLEAR; return; @@ -1772,11 +1772,11 @@ void m68k_op_divl_32_pd(void) } } - REG_D[word2 & 7] = (uint)remainder; - REG_D[(word2 >> 12) & 7] = (uint)quotient; + REG_D[word2 & 7] = (uint)remainder; + REG_D[(word2 >> 12) & 7] = (uint)quotient; - FLAG_N = (uint)NFLAG_32(quotient); - FLAG_Z = (uint)quotient; + FLAG_N = (uint)NFLAG_32(quotient); + FLAG_Z = (uint)quotient; FLAG_V = VFLAG_CLEAR; FLAG_C = CFLAG_CLEAR; return; @@ -1983,11 +1983,11 @@ void m68k_op_divl_32_di(void) } } - REG_D[word2 & 7] = (uint)remainder; - REG_D[(word2 >> 12) & 7] = (uint)quotient; + REG_D[word2 & 7] = (uint)remainder; + REG_D[(word2 >> 12) & 7] = (uint)quotient; - FLAG_N = (uint)NFLAG_32(quotient); - FLAG_Z = (uint)quotient; + FLAG_N = (uint)NFLAG_32(quotient); + FLAG_Z = (uint)quotient; FLAG_V = VFLAG_CLEAR; FLAG_C = CFLAG_CLEAR; return; @@ -2194,11 +2194,11 @@ void m68k_op_divl_32_ix(void) } } - REG_D[word2 & 7] = (uint)remainder; - REG_D[(word2 >> 12) & 7] = (uint)quotient; + REG_D[word2 & 7] = (uint)remainder; + REG_D[(word2 >> 12) & 7] = (uint)quotient; - FLAG_N = (uint)NFLAG_32(quotient); - FLAG_Z = (uint)quotient; + FLAG_N = (uint)NFLAG_32(quotient); + FLAG_Z = (uint)quotient; FLAG_V = VFLAG_CLEAR; FLAG_C = CFLAG_CLEAR; return; @@ -2405,11 +2405,11 @@ void m68k_op_divl_32_aw(void) } } - REG_D[word2 & 7] = (uint)remainder; - REG_D[(word2 >> 12) & 7] = (uint)quotient; + REG_D[word2 & 7] = (uint)remainder; + REG_D[(word2 >> 12) & 7] = (uint)quotient; - FLAG_N = (uint)(NFLAG_32(quotient)); - FLAG_Z = (uint)quotient; + FLAG_N = (uint)(NFLAG_32(quotient)); + FLAG_Z = (uint)quotient; FLAG_V = VFLAG_CLEAR; FLAG_C = CFLAG_CLEAR; return; @@ -2616,11 +2616,11 @@ void m68k_op_divl_32_al(void) } } - REG_D[word2 & 7] = (uint)remainder; - REG_D[(word2 >> 12) & 7] = (uint)quotient; + REG_D[word2 & 7] = (uint)remainder; + REG_D[(word2 >> 12) & 7] = (uint)quotient; - FLAG_N = (uint)(NFLAG_32(quotient)); - FLAG_Z = (uint)quotient; + FLAG_N = (uint)(NFLAG_32(quotient)); + FLAG_Z = (uint)quotient; FLAG_V = VFLAG_CLEAR; FLAG_C = CFLAG_CLEAR; return; @@ -2827,11 +2827,11 @@ void m68k_op_divl_32_pcdi(void) } } - REG_D[word2 & 7] = (uint)remainder; - REG_D[(word2 >> 12) & 7] = (uint)quotient; + REG_D[word2 & 7] = (uint)remainder; + REG_D[(word2 >> 12) & 7] = (uint)quotient; - FLAG_N = (uint)(NFLAG_32(quotient)); - FLAG_Z = (uint)quotient; + FLAG_N = (uint)(NFLAG_32(quotient)); + FLAG_Z = (uint)quotient; FLAG_V = VFLAG_CLEAR; FLAG_C = CFLAG_CLEAR; return; @@ -3038,11 +3038,11 @@ void m68k_op_divl_32_pcix(void) } } - REG_D[word2 & 7] = (uint)remainder; - REG_D[(word2 >> 12) & 7] = (uint)quotient; + REG_D[word2 & 7] = (uint)remainder; + REG_D[(word2 >> 12) & 7] = (uint)quotient; - FLAG_N = (uint)(NFLAG_32(quotient)); - FLAG_Z = (uint)quotient; + FLAG_N = (uint)(NFLAG_32(quotient)); + FLAG_Z = (uint)quotient; FLAG_V = VFLAG_CLEAR; FLAG_C = CFLAG_CLEAR; return; @@ -3249,11 +3249,11 @@ void m68k_op_divl_32_i(void) } } - REG_D[word2 & 7] = (uint)remainder; - REG_D[(word2 >> 12) & 7] = (uint)quotient; + REG_D[word2 & 7] = (uint)remainder; + REG_D[(word2 >> 12) & 7] = (uint)quotient; - FLAG_N = (uint)(NFLAG_32(quotient)); - FLAG_Z = (uint)quotient; + FLAG_N = (uint)(NFLAG_32(quotient)); + FLAG_Z = (uint)quotient; FLAG_V = VFLAG_CLEAR; FLAG_C = CFLAG_CLEAR; return; @@ -11869,7 +11869,7 @@ void m68k_op_mull_32_d(void) if(!BIT_A(word2)) { FLAG_Z = MASK_OUT_ABOVE_32(res); - FLAG_N = (uint)(NFLAG_32(res)); + FLAG_N = (uint)(NFLAG_32(res)); FLAG_V = ((sint64)res != (sint32)res)<<7; REG_D[(word2 >> 12) & 7] = FLAG_Z; return; @@ -11886,7 +11886,7 @@ void m68k_op_mull_32_d(void) if(!BIT_A(word2)) { FLAG_Z = MASK_OUT_ABOVE_32(res); - FLAG_N = (uint)(NFLAG_32(res)); + FLAG_N = (uint)(NFLAG_32(res)); FLAG_V = (res > 0xffffffff)<<7; REG_D[(word2 >> 12) & 7] = FLAG_Z; return; @@ -11993,7 +11993,7 @@ void m68k_op_mull_32_ai(void) if(!BIT_A(word2)) { FLAG_Z = MASK_OUT_ABOVE_32(res); - FLAG_N = (uint)(NFLAG_32(res)); + FLAG_N = (uint)(NFLAG_32(res)); FLAG_V = ((sint64)res != (sint32)res)<<7; REG_D[(word2 >> 12) & 7] = FLAG_Z; return; @@ -12010,7 +12010,7 @@ void m68k_op_mull_32_ai(void) if(!BIT_A(word2)) { FLAG_Z = MASK_OUT_ABOVE_32(res); - FLAG_N = (uint)(NFLAG_32(res)); + FLAG_N = (uint)(NFLAG_32(res)); FLAG_V = (res > 0xffffffff)<<7; REG_D[(word2 >> 12) & 7] = FLAG_Z; return; @@ -12117,7 +12117,7 @@ void m68k_op_mull_32_pi(void) if(!BIT_A(word2)) { FLAG_Z = MASK_OUT_ABOVE_32(res); - FLAG_N = (uint)(NFLAG_32(res)); + FLAG_N = (uint)(NFLAG_32(res)); FLAG_V = ((sint64)res != (sint32)res)<<7; REG_D[(word2 >> 12) & 7] = FLAG_Z; return; @@ -12134,7 +12134,7 @@ void m68k_op_mull_32_pi(void) if(!BIT_A(word2)) { FLAG_Z = MASK_OUT_ABOVE_32(res); - FLAG_N = (uint)(NFLAG_32(res)); + FLAG_N = (uint)(NFLAG_32(res)); FLAG_V = (res > 0xffffffff)<<7; REG_D[(word2 >> 12) & 7] = FLAG_Z; return; @@ -12241,7 +12241,7 @@ void m68k_op_mull_32_pd(void) if(!BIT_A(word2)) { FLAG_Z = MASK_OUT_ABOVE_32(res); - FLAG_N = (uint)(NFLAG_32(res)); + FLAG_N = (uint)(NFLAG_32(res)); FLAG_V = ((sint64)res != (sint32)res)<<7; REG_D[(word2 >> 12) & 7] = FLAG_Z; return; @@ -12258,7 +12258,7 @@ void m68k_op_mull_32_pd(void) if(!BIT_A(word2)) { FLAG_Z = MASK_OUT_ABOVE_32(res); - FLAG_N = (uint)(NFLAG_32(res)); + FLAG_N = (uint)(NFLAG_32(res)); FLAG_V = (res > 0xffffffff)<<7; REG_D[(word2 >> 12) & 7] = FLAG_Z; return; @@ -12365,7 +12365,7 @@ void m68k_op_mull_32_di(void) if(!BIT_A(word2)) { FLAG_Z = MASK_OUT_ABOVE_32(res); - FLAG_N = (uint)(NFLAG_32(res)); + FLAG_N = (uint)(NFLAG_32(res)); FLAG_V = ((sint64)res != (sint32)res)<<7; REG_D[(word2 >> 12) & 7] = FLAG_Z; return; @@ -12382,7 +12382,7 @@ void m68k_op_mull_32_di(void) if(!BIT_A(word2)) { FLAG_Z = MASK_OUT_ABOVE_32(res); - FLAG_N = (uint)(NFLAG_32(res)); + FLAG_N = (uint)(NFLAG_32(res)); FLAG_V = (res > 0xffffffff)<<7; REG_D[(word2 >> 12) & 7] = FLAG_Z; return; @@ -12489,7 +12489,7 @@ void m68k_op_mull_32_ix(void) if(!BIT_A(word2)) { FLAG_Z = MASK_OUT_ABOVE_32(res); - FLAG_N = (uint)(NFLAG_32(res)); + FLAG_N = (uint)(NFLAG_32(res)); FLAG_V = ((sint64)res != (sint32)res)<<7; REG_D[(word2 >> 12) & 7] = FLAG_Z; return; @@ -12506,7 +12506,7 @@ void m68k_op_mull_32_ix(void) if(!BIT_A(word2)) { FLAG_Z = MASK_OUT_ABOVE_32(res); - FLAG_N = (uint)(NFLAG_32(res)); + FLAG_N = (uint)(NFLAG_32(res)); FLAG_V = (res > 0xffffffff)<<7; REG_D[(word2 >> 12) & 7] = FLAG_Z; return; @@ -12613,7 +12613,7 @@ void m68k_op_mull_32_aw(void) if(!BIT_A(word2)) { FLAG_Z = MASK_OUT_ABOVE_32(res); - FLAG_N = (uint)(NFLAG_32(res)); + FLAG_N = (uint)(NFLAG_32(res)); FLAG_V = ((sint64)res != (sint32)res)<<7; REG_D[(word2 >> 12) & 7] = FLAG_Z; return; @@ -12630,7 +12630,7 @@ void m68k_op_mull_32_aw(void) if(!BIT_A(word2)) { FLAG_Z = MASK_OUT_ABOVE_32(res); - FLAG_N = (uint)(NFLAG_32(res)); + FLAG_N = (uint)(NFLAG_32(res)); FLAG_V = (res > 0xffffffff)<<7; REG_D[(word2 >> 12) & 7] = FLAG_Z; return; @@ -12737,7 +12737,7 @@ void m68k_op_mull_32_al(void) if(!BIT_A(word2)) { FLAG_Z = MASK_OUT_ABOVE_32(res); - FLAG_N = (uint)(NFLAG_32(res)); + FLAG_N = (uint)(NFLAG_32(res)); FLAG_V = ((sint64)res != (sint32)res)<<7; REG_D[(word2 >> 12) & 7] = FLAG_Z; return; @@ -12754,7 +12754,7 @@ void m68k_op_mull_32_al(void) if(!BIT_A(word2)) { FLAG_Z = MASK_OUT_ABOVE_32(res); - FLAG_N = (uint)(NFLAG_32(res)); + FLAG_N = (uint)(NFLAG_32(res)); FLAG_V = (res > 0xffffffff)<<7; REG_D[(word2 >> 12) & 7] = FLAG_Z; return; @@ -12861,7 +12861,7 @@ void m68k_op_mull_32_pcdi(void) if(!BIT_A(word2)) { FLAG_Z = MASK_OUT_ABOVE_32(res); - FLAG_N = (uint)(NFLAG_32(res)); + FLAG_N = (uint)(NFLAG_32(res)); FLAG_V = ((sint64)res != (sint32)res)<<7; REG_D[(word2 >> 12) & 7] = FLAG_Z; return; @@ -12878,7 +12878,7 @@ void m68k_op_mull_32_pcdi(void) if(!BIT_A(word2)) { FLAG_Z = MASK_OUT_ABOVE_32(res); - FLAG_N = (uint)(NFLAG_32(res)); + FLAG_N = (uint)(NFLAG_32(res)); FLAG_V = (res > 0xffffffff)<<7; REG_D[(word2 >> 12) & 7] = FLAG_Z; return; @@ -12985,7 +12985,7 @@ void m68k_op_mull_32_pcix(void) if(!BIT_A(word2)) { FLAG_Z = MASK_OUT_ABOVE_32(res); - FLAG_N = (uint)(NFLAG_32(res)); + FLAG_N = (uint)(NFLAG_32(res)); FLAG_V = ((sint64)res != (sint32)res)<<7; REG_D[(word2 >> 12) & 7] = FLAG_Z; return; @@ -13002,7 +13002,7 @@ void m68k_op_mull_32_pcix(void) if(!BIT_A(word2)) { FLAG_Z = MASK_OUT_ABOVE_32(res); - FLAG_N = (uint)(NFLAG_32(res)); + FLAG_N = (uint)(NFLAG_32(res)); FLAG_V = (res > 0xffffffff)<<7; REG_D[(word2 >> 12) & 7] = FLAG_Z; return; @@ -13109,7 +13109,7 @@ void m68k_op_mull_32_i(void) if(!BIT_A(word2)) { FLAG_Z = MASK_OUT_ABOVE_32(res); - FLAG_N = (uint)(NFLAG_32(res)); + FLAG_N = (uint)(NFLAG_32(res)); FLAG_V = ((sint64)res != (sint32)res)<<7; REG_D[(word2 >> 12) & 7] = FLAG_Z; return; @@ -13126,7 +13126,7 @@ void m68k_op_mull_32_i(void) if(!BIT_A(word2)) { FLAG_Z = MASK_OUT_ABOVE_32(res); - FLAG_N = (uint)(NFLAG_32(res)); + FLAG_N = (uint)(NFLAG_32(res)); FLAG_V = (res > 0xffffffff)<<7; REG_D[(word2 >> 12) & 7] = FLAG_Z; return; diff --git a/AltairZ80/m68kopnz.c b/AltairZ80/m68kopnz.c index 1624299e..5b7752ab 100644 --- a/AltairZ80/m68kopnz.c +++ b/AltairZ80/m68kopnz.c @@ -2777,7 +2777,7 @@ void m68k_op_ror_32_s(void) FLAG_N = NFLAG_32(res); FLAG_Z = res; - FLAG_C = (uint)(src << (9 - shift)); + FLAG_C = (uint)(src << (9 - shift)); FLAG_V = VFLAG_CLEAR; } @@ -2849,7 +2849,7 @@ void m68k_op_ror_32_r(void) USE_CYCLES(orig_shift<> ((shift - 1) & 31)) << 8); + FLAG_C = (uint)((src >> ((shift - 1) & 31)) << 8); FLAG_N = NFLAG_32(res); FLAG_Z = res; FLAG_V = VFLAG_CLEAR; @@ -2857,8 +2857,8 @@ void m68k_op_ror_32_r(void) } FLAG_C = CFLAG_CLEAR; - FLAG_N = (uint)(NFLAG_32(src)); - FLAG_Z = (uint)src; + FLAG_N = (uint)(NFLAG_32(src)); + FLAG_Z = (uint)src; FLAG_V = VFLAG_CLEAR; } @@ -3012,7 +3012,7 @@ void m68k_op_rol_32_s(void) FLAG_N = NFLAG_32(res); FLAG_Z = res; - FLAG_C = (uint)(src >> (24 - shift)); + FLAG_C = (uint)(src >> (24 - shift)); FLAG_V = VFLAG_CLEAR; } @@ -3101,7 +3101,7 @@ void m68k_op_rol_32_r(void) *r_dst = res; - FLAG_C = (uint)((src >> (32 - shift)) << 8); + FLAG_C = (uint)((src >> (32 - shift)) << 8); FLAG_N = NFLAG_32(res); FLAG_Z = res; FLAG_V = VFLAG_CLEAR; @@ -3109,8 +3109,8 @@ void m68k_op_rol_32_r(void) } FLAG_C = CFLAG_CLEAR; - FLAG_N = (uint)(NFLAG_32(src)); - FLAG_Z = (uint)src; + FLAG_N = (uint)(NFLAG_32(src)); + FLAG_Z = (uint)src; FLAG_V = VFLAG_CLEAR; } @@ -3267,13 +3267,13 @@ void m68k_op_roxr_32_s(void) res = ROR_33_64(res, shift); - FLAG_C = FLAG_X = (uint)(res >> 24); + FLAG_C = FLAG_X = (uint)(res >> 24); res = MASK_OUT_ABOVE_32(res); - *r_dst = (uint)res; + *r_dst = (uint)res; - FLAG_N = (uint)(NFLAG_32(res)); - FLAG_Z = (uint)res; + FLAG_N = (uint)(NFLAG_32(res)); + FLAG_Z = (uint)res; FLAG_V = VFLAG_CLEAR; #else @@ -3372,12 +3372,12 @@ void m68k_op_roxr_32_r(void) USE_CYCLES(orig_shift<> 24); + FLAG_C = FLAG_X = (uint)(res >> 24); res = MASK_OUT_ABOVE_32(res); - *r_dst = (uint)res; - FLAG_N = (uint)(NFLAG_32(res)); - FLAG_Z = (uint)res; + *r_dst = (uint)res; + FLAG_N = (uint)(NFLAG_32(res)); + FLAG_Z = (uint)res; FLAG_V = VFLAG_CLEAR; return; } @@ -3581,13 +3581,13 @@ void m68k_op_roxl_32_s(void) res = ROL_33_64(res, shift); - FLAG_C = FLAG_X = (uint)(res >> 24); + FLAG_C = FLAG_X = (uint)(res >> 24); res = MASK_OUT_ABOVE_32(res); - *r_dst = (uint)res; + *r_dst = (uint)res; - FLAG_N = (uint)(NFLAG_32(res)); - FLAG_Z = (uint)res; + FLAG_N = (uint)(NFLAG_32(res)); + FLAG_Z = (uint)res; FLAG_V = VFLAG_CLEAR; #else @@ -3687,12 +3687,12 @@ void m68k_op_roxl_32_r(void) USE_CYCLES(orig_shift<> 24); + FLAG_C = FLAG_X = (uint)(res >> 24); res = MASK_OUT_ABOVE_32(res); - *r_dst = (uint)res; - FLAG_N = (uint)(NFLAG_32(res)); - FLAG_Z = (uint)res; + *r_dst = (uint)res; + FLAG_N = (uint)(NFLAG_32(res)); + FLAG_Z = (uint)res; FLAG_V = VFLAG_CLEAR; return; } diff --git a/I7094/i7094_dsk.c b/I7094/i7094_dsk.c index 22d3dcb4..d5b30c3d 100644 --- a/I7094/i7094_dsk.c +++ b/I7094/i7094_dsk.c @@ -1189,7 +1189,7 @@ for (a = 0, ctss = TRUE; a < dsk_tab[dtyp].accpm; a++) { fprintf (st, "Invalid record length %d, unit = %d, access = %d, track = %d, record = %d\n", rlnt, u, a, t, rec); return SCPE_OK; - } + } if (rlnt > maxrsz) maxrsz = rlnt; if (rlnt < minrsz) diff --git a/NOVA/nova_cpu.c b/NOVA/nova_cpu.c index c71b6680..84a32c54 100644 --- a/NOVA/nova_cpu.c +++ b/NOVA/nova_cpu.c @@ -256,12 +256,12 @@ #define UNIT_V_MDV (UNIT_V_UF + 0) /* MDV present */ #define UNIT_V_STK (UNIT_V_UF + 1) /* stack instr */ #define UNIT_V_BYT (UNIT_V_UF + 2) /* byte instr */ -#define UNIT_V_64KW (UNIT_V_UF + 3) /* 64KW mem support */ +#define UNIT_V_64KW (UNIT_V_UF + 3) /* 64KW mem support */ #define UNIT_V_MSIZE (UNIT_V_UF + 4) /* dummy mask */ #define UNIT_MDV (1 << UNIT_V_MDV) #define UNIT_STK (1 << UNIT_V_STK) #define UNIT_BYT (1 << UNIT_V_BYT) -#define UNIT_64KW (1 << UNIT_V_64KW) +#define UNIT_64KW (1 << UNIT_V_64KW) #define UNIT_MSIZE (1 << UNIT_V_MSIZE) #define UNIT_IOPT (UNIT_MDV | UNIT_STK | UNIT_BYT | UNIT_64KW) #define UNIT_NOVA3 (UNIT_MDV | UNIT_STK) @@ -476,7 +476,7 @@ while (reason == 0) { /* loop until halted */ IR = M[PC]; /* fetch instr */ if ( hist_cnt ) { - hist_save( PC, IR ) ; /* PC, int_req unchanged */ + hist_save( PC, IR ) ; /* PC, int_req unchanged */ } INCREMENT_PC ; @@ -1202,11 +1202,11 @@ return SCPE_OK; * - The Binary Loader was in turn used to load tapes in the usual DG 'absolute binary' format. */ -#define BOOT_START 00000 -#define BOOT_LEN (sizeof(boot_rom) / sizeof(int32)) +#define BOOT_START 00000 +#define BOOT_LEN (sizeof(boot_rom) / sizeof(int32)) static const int32 boot_rom[] = { - 0062677, /* IORST ;reset all I/O */ + 0062677, /* IORST ;reset all I/O */ 0060477, /* READS 0 ;read SR into AC0 */ 0024026, /* LDA 1,C77 ;get dev mask */ 0107400, /* AND 0,1 ;isolate dev code */ @@ -1352,7 +1352,7 @@ if ( (r != SCPE_OK) || (lnt && (lnt < HIST_MIN)) ) } hist_p = 0; if ( hist_cnt ) - { + { free( hist ) ; hist_cnt = 0 ; hist = NULL ; diff --git a/NOVA/nova_defs.h b/NOVA/nova_defs.h index c534439e..207c1c69 100644 --- a/NOVA/nova_defs.h +++ b/NOVA/nova_defs.h @@ -56,7 +56,7 @@ #endif /* Simulator stop codes */ - + #define STOP_RSRV 1 /* must be 1 */ #define STOP_HALT 2 /* HALT */ #define STOP_IBKPT 3 /* breakpoint */ @@ -284,7 +284,7 @@ typedef struct { #define INT_ION (1 << INT_V_ION) #define INT_DEV ((1 << INT_V_STK) - 1) /* device ints */ #define INT_PENDING INT_ION+INT_NO_ION_PENDING -#define INT_TRAP (1 << INT_V_TRAP) +#define INT_TRAP (1 << INT_V_TRAP) /* PI disable bits */ diff --git a/NOVA/nova_mta.c b/NOVA/nova_mta.c index 42d16873..0f7a4cc7 100644 --- a/NOVA/nova_mta.c +++ b/NOVA/nova_mta.c @@ -139,22 +139,22 @@ #define STA_PEM 0000001 /* *PE mode */ #define STA_EFLGS1 (STA_DLT | STA_ILL | STA_DAE | STA_EOT | \ - STA_EOF | STA_BOT | STA_BAT | STA_ODD) + STA_EOF | STA_BOT | STA_BAT | STA_ODD) #define STA_EFLGS2 (STA_FGP | STA_CDL | STA_BDS | STA_OVS | \ - STA_CRC | STA_FPR | STA_FPR) /* set error 2 */ + STA_CRC | STA_FPR | STA_FPR) /* set error 2 */ #define STA_CLR ((020 << 16) | 0010000) /* always clear */ #define STA_SET (STA_HDN | STA_9TK) /* always set */ #define STA_DYN (STA_REW | STA_EOT | STA_EOF | STA_BOT | \ - STA_WLK | STA_RDY | STA_PEM) /* kept in USTAT */ + STA_WLK | STA_RDY | STA_PEM) /* kept in USTAT */ #define STA_MON (STA_REW | STA_BOT | STA_WLK | STA_RDY | \ - STA_PEM) /* set status chg */ + STA_PEM) /* set status chg */ -extern uint16 M[]; -extern UNIT cpu_unit; -extern int32 int_req, dev_busy, dev_done, dev_disable; -extern int32 SR, AMASK; +extern uint16 M[]; +extern UNIT cpu_unit; +extern int32 int_req, dev_busy, dev_done, dev_disable; +extern int32 SR, AMASK; -extern t_stat cpu_boot(int32 unitno, DEVICE * dptr ) ; +extern t_stat cpu_boot(int32 unitno, DEVICE * dptr ) ; int32 mta_ma = 0; /* memory address */ @@ -363,9 +363,9 @@ if ((uptr->flags & UNIT_ATT) == 0) { /* not attached? */ } else switch (c) { /* case on command */ - case CU_CMODE: /* controller mode */ - mta_ep = mta_cu & CU_EP; - break; + case CU_CMODE: /* controller mode */ + mta_ep = mta_cu & CU_EP; + break; case CU_DMODE: /* drive mode */ if (!sim_tape_bot (uptr)) /* must be BOT */ @@ -577,9 +577,9 @@ for (u = 0; u < MTA_NUMDR; u++) { /* loop thru units */ sim_tape_reset (uptr); /* clear pos flag */ sim_cancel (uptr); /* cancel activity */ if (uptr->flags & UNIT_ATT) uptr->USTAT = STA_RDY | - (uptr->USTAT & STA_PEM) | - (sim_tape_wrp (uptr)? STA_WLK: 0) | - (sim_tape_bot (uptr)? STA_BOT: 0); + (uptr->USTAT & STA_PEM) | + (sim_tape_wrp (uptr)? STA_WLK: 0) | + (sim_tape_bot (uptr)? STA_BOT: 0); else uptr->USTAT = 0; } mta_updcsta (&mta_unit[0]); /* update status */ @@ -629,17 +629,17 @@ return SCPE_OK; /* Boot routine */ t_stat mta_boot (int32 unitno, DEVICE *dptr) - { - sim_tape_rewind( &mta_unit[unitno] ) ; - /* - use common rewind/reset code - device reset - rewind 'tape' file - device - unit - controller - */ - cpu_boot( unitno, dptr ) ; - SR = 0100000 + DEV_MTA ; - return ( SCPE_OK ); - } /* end of 'mta_boot' */ + { + sim_tape_rewind( &mta_unit[unitno] ) ; + /* + use common rewind/reset code + device reset + rewind 'tape' file + device + unit + controller + */ + cpu_boot( unitno, dptr ) ; + SR = 0100000 + DEV_MTA ; + return ( SCPE_OK ); + } /* end of 'mta_boot' */ diff --git a/NOVA/nova_plt.c b/NOVA/nova_plt.c index 9375e182..e75511b2 100644 --- a/NOVA/nova_plt.c +++ b/NOVA/nova_plt.c @@ -54,7 +54,7 @@ t_stat plt_svc (UNIT *uptr); t_stat plt_reset (DEVICE *dptr); - /* 7 or 8 bit data mask support for either device */ + /* 7 or 8 bit data mask support for either device */ #define UNIT_V_8B (UNIT_V_UF + 0) /* 8b output */ #define UNIT_8B (1 << UNIT_V_8B) diff --git a/NOVA/nova_pt.c b/NOVA/nova_pt.c index 2d7dff4b..219aac4e 100644 --- a/NOVA/nova_pt.c +++ b/NOVA/nova_pt.c @@ -45,10 +45,10 @@ Notes: #include "nova_defs.h" -extern int32 int_req, dev_busy, dev_done, dev_disable ; -extern int32 SR ; +extern int32 int_req, dev_busy, dev_done, dev_disable ; +extern int32 SR ; -extern t_stat cpu_boot(int32 unitno, DEVICE * dptr ) ; +extern t_stat cpu_boot(int32 unitno, DEVICE * dptr ) ; int32 ptr_stopioe = 0, ptp_stopioe = 0; /* stop on error */ @@ -62,7 +62,7 @@ t_stat ptp_reset (DEVICE *dptr); t_stat ptr_boot (int32 unitno, DEVICE *dptr); - /* 7 or 8 bit data mask support for either device */ + /* 7 or 8 bit data mask support for either device */ #define UNIT_V_8B (UNIT_V_UF + 0) /* 8b output */ #define UNIT_8B (1 << UNIT_V_8B) diff --git a/NOVA/nova_sys.c b/NOVA/nova_sys.c index f11ed20e..9be5e651 100644 --- a/NOVA/nova_sys.c +++ b/NOVA/nova_sys.c @@ -176,11 +176,11 @@ internal state machine: t_stat sim_load (FILE *fileref, char *cptr, char *fnam, int flag) { -int32 data, csum, count, state, i; -int32 origin; -int pos ; -int block_start ; -int done ; +int32 data, csum, count, state, i; +int32 origin; +int pos ; +int block_start ; +int done ; if ((*cptr != 0) || (flag != 0)) return ( SCPE_ARG ) ; @@ -223,8 +223,8 @@ for ( pos = 0 ; (! done) && ((i=getc(fileref)) != EOF) ; ++pos ) /* do any auto-start check or inhibit check */ saved_PC = (origin & 077777) ; /* 0B0 = auto-start program */ /* 1B0 = do not auto start */ - state = 0 ; /* indicate okay state */ - done = 1 ; /* we're done! */ + state = 0 ; /* indicate okay state */ + done = 1 ; /* we're done! */ if ( ! (origin & 0x8000) ) { printf( "auto start @ %05o \n", (origin & 0x7FFF) ) ; diff --git a/PDP1/pdp1_drm.c b/PDP1/pdp1_drm.c index aeaae3c6..1b9104ac 100644 --- a/PDP1/pdp1_drm.c +++ b/PDP1/pdp1_drm.c @@ -296,7 +296,7 @@ for (i = 0; i < DRM_NUMWDS; i++, da++) { /* do transfer */ if ((drm_wlk >> (drm_da >> 4)) & 1) drm_err = 1; else { /* not locked */ - fbuf[da] = M[drm_ma]; /* write word */ + fbuf[da] = M[drm_ma]; /* write word */ if (da >= uptr->hwmark) uptr->hwmark = da + 1; } diff --git a/PDP1/pdp1_dt.c b/PDP1/pdp1_dt.c index fa99aa6f..602d0dd1 100644 --- a/PDP1/pdp1_dt.c +++ b/PDP1/pdp1_dt.c @@ -374,7 +374,7 @@ if (pulse == 003) { /* MSE */ dt_deselect (dtsa); dtsa = (dtsa & ~DTA_UNIT) | (dat & DTA_UNIT); dtsb = dtsb & ~(DTB_DTF | DTB_BEF | DTB_ERF | DTB_ALLERR); - } + } if (pulse == 004) { /* MLC */ dtsa = (dtsa & ~DTA_RW) | (dat & DTA_RW); /* load dtsa */ dtsb = dtsb & ~(DTB_DTF | DTB_BEF | DTB_ERF | DTB_ALLERR); @@ -616,7 +616,7 @@ switch (fnc) { /* case function */ if ((fnc == FNC_WRIT) || (fnc == FNC_WALL)) { /* write function? */ dtsb = dtsb | DTB_DTF; /* set data flag */ DT_UPDINT; - } + } sim_activate (uptr, ABS (newpos - ((int32) uptr->pos)) * dt_ltime); return; } @@ -678,13 +678,13 @@ if (mot & DTS_DIR) /* update pos */ else uptr->pos = uptr->pos + delta; if (((int32) uptr->pos < 0) || ((int32) uptr->pos > (DTU_FWDEZ (uptr) + DT_EZLIN))) { - detach_unit (uptr); /* off reel? */ - uptr->STATE = uptr->pos = 0; - unum = (int32) (uptr - dt_dev.units); - if (unum == DTA_GETUNIT (dtsa)) /* if selected, */ - dt_seterr (uptr, DTB_SEL); /* error */ - return TRUE; - } + detach_unit (uptr); /* off reel? */ + uptr->STATE = uptr->pos = 0; + unum = (int32) (uptr - dt_dev.units); + if (unum == DTA_GETUNIT (dtsa)) /* if selected, */ + dt_seterr (uptr, DTB_SEL); /* error */ + return TRUE; + } return FALSE; } @@ -1078,7 +1078,7 @@ if (sim_is_active (uptr)) { if ((u == DTA_GETUNIT (dtsa)) && (dtsa & DTA_STSTP)) { dtsb = dtsb | DTB_ERF | DTB_SEL | DTB_DTF; DT_UPDINT; - } + } uptr->STATE = uptr->pos = 0; } fbuf = (uint32 *) uptr->filebuf; /* file buffer */ diff --git a/PDP1/pdp1_lp.c b/PDP1/pdp1_lp.c index a4c49d16..ae5fe6c1 100644 --- a/PDP1/pdp1_lp.c +++ b/PDP1/pdp1_lp.c @@ -115,7 +115,7 @@ if ((inst & 07000) == 01000) { /* fill buf */ lpt_buf[i] = lpt_trans[(dat >> 12) & 077]; lpt_buf[i + 1] = lpt_trans[(dat >> 6) & 077]; lpt_buf[i + 2] = lpt_trans[dat & 077]; - } + } lpt_bptr = (lpt_bptr + 1) & BPTR_MASK; return dat; } diff --git a/PDP1/spacewar1/macro1.c b/PDP1/spacewar1/macro1.c index 47b78ef6..ec9ff42f 100644 --- a/PDP1/spacewar1/macro1.c +++ b/PDP1/spacewar1/macro1.c @@ -14,11 +14,11 @@ * variables returns value?? * * macro addressing: labels defined during macro are local use only???? - * spacewar expects this??? (is it wrong?) + * spacewar expects this??? (is it wrong?) * * self-feeding lines: \n legal anywhere \t is - * read next token into "token" buffer -- avoid saving "line"? - * remove crocks from "define" + * read next token into "token" buffer -- avoid saving "line"? + * remove crocks from "define" * list title (first line of file) should not be parsed as source? * incorrect listing for bare "start" * list only 4 digits for address column @@ -36,9 +36,9 @@ * Program: MACRO1 * File: macro1.c * Author: Gary A. Messenbrink (macro8) - * MACRO7 modifications: Bob Supnik - * MACRO1 modifications: Bob Supnik - * slashed to be more like real MACRO like by Phil Budne + * MACRO7 modifications: Bob Supnik + * MACRO1 modifications: Bob Supnik + * slashed to be more like real MACRO like by Phil Budne * * Purpose: A 2 pass PDP-1 assembler * @@ -59,61 +59,61 @@ * along with the line number, column number and error message as well as * marking the error in the listing file. * The following file name extensions are used: - * .mac source code (input) - * .lst assembly listing (output) - * .rim assembly output in DEC's rim format (output) - * .prm permanent symbol table in form suitable for reading after - * the EXPUNGE pseudo-op. - * .sym "symbol punch" tape (for DDT, or reloading into macro) + * .mac source code (input) + * .lst assembly listing (output) + * .rim assembly output in DEC's rim format (output) + * .prm permanent symbol table in form suitable for reading after + * the EXPUNGE pseudo-op. + * .sym "symbol punch" tape (for DDT, or reloading into macro) * * OPTIONS * -d Dump the symbol table at end of assembly * -p Generate a file with the permanent symbols in it. - * (To get the current symbol table, assemble a file than has only - * START in it.) + * (To get the current symbol table, assemble a file than has only + * START in it.) * -x Generate a cross-reference (concordance) of user symbols. * -r Output a tape using only RIM format (else output block loader) * -s Output a symbol dump tape (loader + loader blocks) * -S file - * Read a symbol tape back in + * Read a symbol tape back in * * DIAGNOSTICS * Assembler error diagnostics are output to an error file and inserted * in the listing file. Each line in the error file has the form * - * :: : error: at Loc = + * :: : error: at Loc = * * An example error message is: * - * bintst.7:17:9 : error: undefined symbol "UNDEF" at Loc = 07616 + * bintst.7:17:9 : error: undefined symbol "UNDEF" at Loc = 07616 * * The error diagnostics put in the listing start with a two character - * error code (if appropriate) and a short message. A carat '^' is + * error code (if appropriate) and a short message. A carat '^' is * placed under the item in error if appropriate. * An example error message is: * - * 17 07616 3000 DAC UNDEF - * UD undefined ^ - * 18 07617 1777 TAD I DUMMY + * 17 07616 3000 DAC UNDEF + * UD undefined ^ + * 18 07617 1777 TAD I DUMMY * * Undefined symbols are marked in the symbol table listing by prepending * a '?' to the symbol. Redefined symbols are marked in the symbol table * listing by prepending a '#' to the symbol. Examples are: * - * #REDEF 04567 - * SWITCH 07612 - * ?UNDEF 00000 + * #REDEF 04567 + * SWITCH 07612 + * ?UNDEF 00000 * * Refer to the code for the diagnostic messages generated. * * REFERENCES: * This assembler is based on the pal assember by: - * Douglas Jones and - * Rich Coon + * Douglas Jones and + * Rich Coon * * COPYRIGHT NOTICE: * This is free software. There is no fee for using it. You may make - * any changes that you wish and also give it away. If you can make + * any changes that you wish and also give it away. If you can make * a commercial product out of it, fine, but do not put any limits on * the purchaser's right to do the same. If you improve it or fix any * bugs, it would be nice if you told me and offered me a copy of the @@ -121,7 +121,7 @@ * * * Amendments Record: - * Version Date by Comments + * Version Date by Comments * ------- ------- --- --------------------------------------------------- * v1.0 12Apr96 GAM Original * v1.1 18Nov96 GAM Permanent symbol table initialization error. @@ -132,11 +132,11 @@ * v2.2 10Dec96 GAM Added FLTG psuedo-op (floating point constants). * v2.3 2Feb97 GAM Fixed paging problem in cross reference output. * v3.0 14Feb97 RMS MACRO8X features. - * ? RMS MACRO7 - * ? RMS MACRO1 released w/ lispswre - * ? RMS MACRO1 released w/ tools - * ? RMS MACRO1 released w/ ddt1 - * 2003 PLB major reworking + * ? RMS MACRO7 + * ? RMS MACRO1 released w/ lispswre + * ? RMS MACRO1 released w/ tools + * ? RMS MACRO1 released w/ ddt1 + * 2003 PLB major reworking */ @@ -146,18 +146,18 @@ #include #define LINELEN 96 -#define LIST_LINES_PER_PAGE 60 /* Includes 3 line page header. */ +#define LIST_LINES_PER_PAGE 60 /* Includes 3 line page header. */ #define NAMELEN 128 #define SYMBOL_COLUMNS 5 #define SYMLEN 7 -/*#define SYMSIG 4 /* EXP: significant chars in a symbol */ +/*#define SYMSIG 4 /* EXP: significant chars in a symbol */ #define SYMBOL_TABLE_SIZE 8192 #define MAC_MAX_ARGS 20 #define MAC_MAX_LENGTH 8192 -#define MAC_TABLE_LENGTH 1024 /* Must be <= 4096. */ +#define MAC_TABLE_LENGTH 1024 /* Must be <= 4096. */ -#define MAX_LITERALS 1000 -#define MAX_CONSTANTS 10 /* max number of "constants" blocks */ +#define MAX_LITERALS 1000 +#define MAX_CONSTANTS 10 /* max number of "constants" blocks */ #define XREF_COLUMNS 8 @@ -181,14 +181,14 @@ /* (true) if the stated condtion is met. */ /* Use these to test attributes. The proper bits are extracted and then */ /* tested. */ -#define M_DEFINED(s) (((s) & DEFINED) == DEFINED) -#define M_DUPLICATE(s) (((s) & DUPLICATE) == DUPLICATE) -#define M_FIXED(s) (((s) & FIXED) == FIXED) -#define M_LABEL(s) (((s) & LABEL) == LABEL) -#define M_PSEUDO(s) (((s) & PSEUDO) == PSEUDO) -#define M_EPSEUDO(s) (((s) & EPSEUDO) == EPSEUDO) -#define M_MACRO(s) (((s) & MACRO) == MACRO) -#define M_NOTRDEF(s) (((s) & NOTRDEF) != 0) +#define M_DEFINED(s) (((s) & DEFINED) == DEFINED) +#define M_DUPLICATE(s) (((s) & DUPLICATE) == DUPLICATE) +#define M_FIXED(s) (((s) & FIXED) == FIXED) +#define M_LABEL(s) (((s) & LABEL) == LABEL) +#define M_PSEUDO(s) (((s) & PSEUDO) == PSEUDO) +#define M_EPSEUDO(s) (((s) & EPSEUDO) == EPSEUDO) +#define M_MACRO(s) (((s) & MACRO) == MACRO) +#define M_NOTRDEF(s) (((s) & NOTRDEF) != 0) typedef unsigned char BOOL; typedef unsigned char BYTE; @@ -305,10 +305,10 @@ void flushLoader( void ); void readLine( void ); void saveError( char *mesg, WORD32 cc ); void topOfForm( char *title, char *sub_title ); -void constants(void); -void variables(void); -void eob(void); -void dump_symbols(void); +void constants(void); +void variables(void); +void eob(void); +void dump_symbols(void); /*----------------------------------------------------------------------------*/ @@ -316,19 +316,19 @@ void dump_symbols(void); /* table on startup */ SYM_T pseudos[] = { - { PSEUDO, "consta", CONSTANTS }, - { PSEUDO, "define", DEFINE }, /* Define macro. */ - { PSEUDO, "repeat", REPEAT }, - { PSEUDO, "start", START }, /* Set starting address. */ - { PSEUDO, "variab", VARIABLES }, - { PSEUDO, "text", TEXT }, - { PSEUDO, "noinpu", NOINPUT }, - { PSEUDO, "expung", EXPUNGE }, + { PSEUDO, "consta", CONSTANTS }, + { PSEUDO, "define", DEFINE }, /* Define macro. */ + { PSEUDO, "repeat", REPEAT }, + { PSEUDO, "start", START }, /* Set starting address. */ + { PSEUDO, "variab", VARIABLES }, + { PSEUDO, "text", TEXT }, + { PSEUDO, "noinpu", NOINPUT }, + { PSEUDO, "expung", EXPUNGE }, /* the following can appear in expressions: */ - { EPSEUDO, "charac", CHAR }, - { EPSEUDO, "decima", DECIMAL }, /* base 10. */ - { EPSEUDO, "flexo", FLEX }, - { EPSEUDO, "octal", OCTAL }, /* Read literal constants in base 8. */ + { EPSEUDO, "charac", CHAR }, + { EPSEUDO, "decima", DECIMAL }, /* base 10. */ + { EPSEUDO, "flexo", FLEX }, + { EPSEUDO, "octal", OCTAL }, /* Read literal constants in base 8. */ }; /* Symbol Table */ @@ -357,12 +357,12 @@ SYM_T permanent_symbols[] = { DEFFIX, "sad", 0500000 }, { DEFFIX, "sas", 0520000 }, { DEFFIX, "mul", 0540000 }, - { DEFFIX, "mus", 0540000 }, /* for spacewar */ + { DEFFIX, "mus", 0540000 }, /* for spacewar */ { DEFFIX, "div", 0560000 }, - { DEFFIX, "dis", 0560000 }, /* for spacewar */ + { DEFFIX, "dis", 0560000 }, /* for spacewar */ { DEFFIX, "jmp", 0600000 }, { DEFFIX, "jsp", 0620000 }, - { DEFFIX, "skip", 0640000 }, /* for spacewar */ + { DEFFIX, "skip", 0640000 }, /* for spacewar */ { DEFFIX, "cal", 0160000 }, { DEFFIX, "jda", 0170000 }, { DEFFIX, "i", 0010000 }, @@ -423,18 +423,18 @@ SYM_T permanent_symbols[] = { DEFFIX, "ppb", 0730006 }, { DEFFIX, "tyo", 0730003 }, { DEFFIX, "tyi", 0720004 }, - { DEFFIX, "dpy", 0730007 }, /* for spacewar, munching squares! */ + { DEFFIX, "dpy", 0730007 }, /* for spacewar, munching squares! */ { DEFFIX, "lsm", 0720054 }, { DEFFIX, "esm", 0720055 }, { DEFFIX, "cbs", 0720056 }, { DEFFIX, "lem", 0720074 }, { DEFFIX, "eem", 0724074 }, { DEFFIX, "cks", 0720033 }, -}; /* End-of-Symbols for Permanent Symbol Table */ +}; /* End-of-Symbols for Permanent Symbol Table */ /* Global variables */ -SYM_T *symtab; /* Symbol Table */ -int symbol_top; /* Number of entries in symbol table. */ +SYM_T *symtab; /* Symbol Table */ +int symbol_top; /* Number of entries in symbol table. */ #define LOADERBASE 07751 @@ -446,33 +446,33 @@ int symbol_top; /* Number of entries in symbol table. */ #define LOADER_EN1 (LOADERBASE+026) WORD32 loader[] = { - 0730002, /* in, rpb */ - 0320000+LOADER_A, /* dio a */ - 0100000+LOADER_A, /* xct a */ - 0320000+LOADER_CK, /* dio ck */ - 0730002, /* rpb */ - 0320000+LOADER_EN1, /* dio en1 */ - 0730002, /* b, rpb */ - 0000000, /* a, xx */ - 0210000+LOADER_A, /* lac i a */ - 0400000+LOADER_CK, /* add ck */ - 0240000+LOADER_CK, /* dac ck */ - 0440000+LOADER_A, /* idx a */ - 0520000+LOADER_EN1, /* sas en1 */ - 0600000+LOADER_B, /* jmp b */ - 0200000+LOADER_CK, /* lac ck */ - 0400000+LOADER_EN1, /* add en1 */ - 0730002, /* rpb */ - 0320000+LOADER_CK, /* dio ck */ - 0520000+LOADER_CK, /* sas ck */ - 0760400, /* hlt */ - 0600000+LOADER_IN /* jmp in */ - /* ck, 0 */ - /* en1, 0 */ + 0730002, /* in, rpb */ + 0320000+LOADER_A, /* dio a */ + 0100000+LOADER_A, /* xct a */ + 0320000+LOADER_CK, /* dio ck */ + 0730002, /* rpb */ + 0320000+LOADER_EN1, /* dio en1 */ + 0730002, /* b, rpb */ + 0000000, /* a, xx */ + 0210000+LOADER_A, /* lac i a */ + 0400000+LOADER_CK, /* add ck */ + 0240000+LOADER_CK, /* dac ck */ + 0440000+LOADER_A, /* idx a */ + 0520000+LOADER_EN1, /* sas en1 */ + 0600000+LOADER_B, /* jmp b */ + 0200000+LOADER_CK, /* lac ck */ + 0400000+LOADER_EN1, /* add en1 */ + 0730002, /* rpb */ + 0320000+LOADER_CK, /* dio ck */ + 0520000+LOADER_CK, /* sas ck */ + 0760400, /* hlt */ + 0600000+LOADER_IN /* jmp in */ + /* ck, 0 */ + /* en1, 0 */ }; -#define LOADERBUFSIZE 0100 /* <=0100, power of 2*/ -#define LOADERBUFMASK (LOADERBUFSIZE-1) /* for block alignment */ +#define LOADERBUFSIZE 0100 /* <=0100, power of 2*/ +#define LOADERBUFMASK (LOADERBUFSIZE-1) /* for block alignment */ WORD32 loaderbuf[LOADERBUFSIZE]; WORD32 loaderbufcount; @@ -480,7 +480,7 @@ WORD32 loaderbufstart; /*----------------------------------------------------------------------------*/ -WORD32 *xreftab; /* Start of the concordance table. */ +WORD32 *xreftab; /* Start of the concordance table. */ ERRSAVE_T error_list[20]; int save_error_count; @@ -513,7 +513,7 @@ char s_xref[] = "Cross Reference"; /* RD ReDefintion of a symbol */ /* ST Symbol Table full */ /* UA Undefined Address (undefined symbol) */ -/* VR Value Required */ +/* VR Value Required */ /* ZE Zero Page Exceeded (see above, or out of space) */ EMSG_T duplicate_label = { "DT duplicate", "duplicate label" }; EMSG_T illegal_blank = { "IC illegal blank", "illegal blank" }; @@ -569,7 +569,7 @@ char objectpathname[NAMELEN]; char *pathname; char permpathname[NAMELEN]; -WORD32 mac_count; /* Total macros defined. */ +WORD32 mac_count; /* Total macros defined. */ /* * malloced macro bodies, indexed by sym->val dummies are evaluated at @@ -578,110 +578,110 @@ WORD32 mac_count; /* Total macros defined. */ * list here and move symbols to "macinv" */ struct macdef { - int nargs; /* number of args */ - SYM_T args[MAC_MAX_ARGS+1]; /* symbol for each and one for "r" */ - char body[1]; /* malloc'ed accordingly */ + int nargs; /* number of args */ + SYM_T args[MAC_MAX_ARGS+1]; /* symbol for each and one for "r" */ + char body[1]; /* malloc'ed accordingly */ } *mac_defs[MAC_TABLE_LENGTH]; -struct macinv { /* current macro invocation */ - char mac_line[LINELEN]; /* Saved macro invocation line. */ - WORD32 mac_cc; /* Saved cc after macro invocation. */ - char *mac_ptr; /* Pointer to macro body, NULL if no macro. */ - struct macdef *defn; /* pointer to definition for dummies */ - struct macinv *prev; /* previous invocation in stack */ -} *curmacro; /* macro stack */ +struct macinv { /* current macro invocation */ + char mac_line[LINELEN]; /* Saved macro invocation line. */ + WORD32 mac_cc; /* Saved cc after macro invocation. */ + char *mac_ptr; /* Pointer to macro body, NULL if no macro. */ + struct macdef *defn; /* pointer to definition for dummies */ + struct macinv *prev; /* previous invocation in stack */ +} *curmacro; /* macro stack */ -int nrepeats; /* count of nested repeats */ +int nrepeats; /* count of nested repeats */ int list_lineno; int list_pageno; char list_title[LINELEN]; -BOOL list_title_set; /* Set if TITLE pseudo-op used. */ -char line[LINELEN]; /* Input line. */ -int lineno; /* Current line number. */ -int page_lineno; /* print line number on current page. */ -WORD32 listed; /* Listed flag. */ +BOOL list_title_set; /* Set if TITLE pseudo-op used. */ +char line[LINELEN]; /* Input line. */ +int lineno; /* Current line number. */ +int page_lineno; /* print line number on current page. */ +WORD32 listed; /* Listed flag. */ WORD32 listedsave; -WORD32 cc; /* Column Counter (char position in line). */ -WORD32 clc; /* Location counter */ -BOOL end_of_input; /* End of all input files. */ -int errors; /* Number of errors found so far. */ -BOOL error_in_line; /* TRUE if error on current line. */ -int errors_pass_1; /* Number of errors on pass 1. */ -int filix_curr; /* Index in argv to current input file. */ -int filix_start; /* Start of input files in argv. */ -int lexstartprev; /* Where previous lexeme started. */ -int lextermprev; /* Where previous lexeme ended. */ -int lexstart; /* Index of current lexeme on line. */ -int lexterm; /* Index of character after current lexeme. */ -int overbar; /* next saw an overbar in last token */ +WORD32 cc; /* Column Counter (char position in line). */ +WORD32 clc; /* Location counter */ +BOOL end_of_input; /* End of all input files. */ +int errors; /* Number of errors found so far. */ +BOOL error_in_line; /* TRUE if error on current line. */ +int errors_pass_1; /* Number of errors on pass 1. */ +int filix_curr; /* Index in argv to current input file. */ +int filix_start; /* Start of input files in argv. */ +int lexstartprev; /* Where previous lexeme started. */ +int lextermprev; /* Where previous lexeme ended. */ +int lexstart; /* Index of current lexeme on line. */ +int lexterm; /* Index of character after current lexeme. */ +int overbar; /* next saw an overbar in last token */ -int nconst; /* number of "constants" blocks */ -int lit_count[MAX_CONSTANTS]; /* # of lits in each block in pass 1 */ -WORD32 lit_loc[MAX_CONSTANTS]; /* Base of literal blocks */ +int nconst; /* number of "constants" blocks */ +int lit_count[MAX_CONSTANTS]; /* # of lits in each block in pass 1 */ +WORD32 lit_loc[MAX_CONSTANTS]; /* Base of literal blocks */ -int noinput; /* don't punch loader */ +int noinput; /* don't punch loader */ -int nvars; /* number of variables */ -WORD32 vars_addr; /* address of "variables" */ -WORD32 vars_end; /* end of "variables" */ +int nvars; /* number of variables */ +WORD32 vars_addr; /* address of "variables" */ +WORD32 vars_end; /* end of "variables" */ /* pass 2 only; */ -int nlit; /* number of literals in litter[] */ -WORD32 litter[MAX_LITERALS]; /* literals */ +int nlit; /* number of literals in litter[] */ +WORD32 litter[MAX_LITERALS]; /* literals */ -WORD32 maxcc; /* Current line length. */ -BOOL nomac_exp; /* No macro expansion */ -WORD32 pass; /* Number of current pass. */ +WORD32 maxcc; /* Current line length. */ +BOOL nomac_exp; /* No macro expansion */ +WORD32 pass; /* Number of current pass. */ BOOL print_permanent_symbols; -WORD32 radix; /* Default number radix. */ -BOOL rim_mode; /* RIM mode output. */ -BOOL sym_dump; /* punch symbol tape */ -int save_argc; /* Saved argc. */ -char **save_argv; /* Saved *argv[]. */ -WORD32 start_addr; /* Saved start address. */ -BOOL symtab_print; /* Print symbol table flag */ +WORD32 radix; /* Default number radix. */ +BOOL rim_mode; /* RIM mode output. */ +BOOL sym_dump; /* punch symbol tape */ +int save_argc; /* Saved argc. */ +char **save_argv; /* Saved *argv[]. */ +WORD32 start_addr; /* Saved start address. */ +BOOL symtab_print; /* Print symbol table flag */ BOOL xref; SYM_T sym_undefined = { UNDEFINED, "", 0 };/* Symbol Table Terminator */ /* initial data from SIMH v3.0 pdp1_stddev.c (different encoding of UC/LC) */ -#define UC 0100 /* Upper case */ +#define UC 0100 /* Upper case */ #define LC 0200 #define CHARBITS 077 -#define BC LC|UC /* both case bits */ -#define BAD 014 /* unused concise code */ +#define BC LC|UC /* both case bits */ +#define BAD 014 /* unused concise code */ unsigned char ascii_to_fiodec[128] = { - BAD, BAD, BAD, BAD, BAD, BAD, BAD, BAD, - BC|075, BC|036, BAD, BAD, BAD, BC|077, BAD, BAD, - BAD, BAD, BAD, BAD, BAD, BAD, BAD, BAD, - BAD, BAD, BAD, BAD, BAD, BAD, BAD, BAD, - BC|000, UC|005, UC|001, UC|004, BAD, BAD, UC|006, UC|002, - LC|057, LC|055, UC|073, UC|054, LC|033, LC|054, LC|073, LC|021, - LC|020, LC|001, LC|002, LC|003, LC|004, LC|005, LC|006, LC|007, - LC|010, LC|011, BAD, BAD, UC|007, UC|033, UC|010, UC|021, - LC|040, UC|061, UC|062, UC|063, UC|064, UC|065, UC|066, UC|067, - UC|070, UC|071, UC|041, UC|042, UC|043, UC|044, UC|045, UC|046, - UC|047, UC|050, UC|051, UC|022, UC|023, UC|024, UC|025, UC|026, - UC|027, UC|030, UC|031, UC|057, LC|056, UC|055, UC|011, UC|040, - UC|020, LC|061, LC|062, LC|063, LC|064, LC|065, LC|066, LC|067, - LC|070, LC|071, LC|041, LC|042, LC|043, LC|044, LC|045, LC|046, - LC|047, LC|050, LC|051, LC|022, LC|023, LC|024, LC|025, LC|026, - LC|027, LC|030, LC|031, BAD, UC|056, BAD, UC|003, BC|075 + BAD, BAD, BAD, BAD, BAD, BAD, BAD, BAD, + BC|075, BC|036, BAD, BAD, BAD, BC|077, BAD, BAD, + BAD, BAD, BAD, BAD, BAD, BAD, BAD, BAD, + BAD, BAD, BAD, BAD, BAD, BAD, BAD, BAD, + BC|000, UC|005, UC|001, UC|004, BAD, BAD, UC|006, UC|002, + LC|057, LC|055, UC|073, UC|054, LC|033, LC|054, LC|073, LC|021, + LC|020, LC|001, LC|002, LC|003, LC|004, LC|005, LC|006, LC|007, + LC|010, LC|011, BAD, BAD, UC|007, UC|033, UC|010, UC|021, + LC|040, UC|061, UC|062, UC|063, UC|064, UC|065, UC|066, UC|067, + UC|070, UC|071, UC|041, UC|042, UC|043, UC|044, UC|045, UC|046, + UC|047, UC|050, UC|051, UC|022, UC|023, UC|024, UC|025, UC|026, + UC|027, UC|030, UC|031, UC|057, LC|056, UC|055, UC|011, UC|040, + UC|020, LC|061, LC|062, LC|063, LC|064, LC|065, LC|066, LC|067, + LC|070, LC|071, LC|041, LC|042, LC|043, LC|044, LC|045, LC|046, + LC|047, LC|050, LC|051, LC|022, LC|023, LC|024, LC|025, LC|026, + LC|027, LC|030, LC|031, BAD, UC|056, BAD, UC|003, BC|075 }; /* for symbol punch tape conversion only!! */ char fiodec_to_ascii[64] = { - 0, '1', '2', '3', '4', '5', '6', '7', - '8', '9', 0, 0, 0, 0, 0, 0, - '0', 0, 's', 't', 'u', 'v', 'w', 'x', - 'y', 'z', 0, 0, 0, 0, 0, 0, - 0, 'j', 'k', 'l', 'm', 'n', 'o', 'p', - 'q', 'r', 0, 0, 0, 0, 0, 0, - 0, 'a', 'b', 'c', 'd', 'e', 'f', 'g', - 'h', 'i', 0, 0, 0, 0, 0, 0 }; + 0, '1', '2', '3', '4', '5', '6', '7', + '8', '9', 0, 0, 0, 0, 0, 0, + '0', 0, 's', 't', 'u', 'v', 'w', 'x', + 'y', 'z', 0, 0, 0, 0, 0, 0, + 0, 'j', 'k', 'l', 'm', 'n', 'o', 'p', + 'q', 'r', 0, 0, 0, 0, 0, 0, + 0, 'a', 'b', 'c', 'd', 'e', 'f', 'g', + 'h', 'i', 0, 0, 0, 0, 0, 0 }; /* used at startup & for expunge */ void @@ -705,7 +705,7 @@ main( int argc, char *argv[] ) /* Set the default values for global symbols. */ print_permanent_symbols = FALSE; nomac_exp = TRUE; - rim_mode = FALSE; /* default to loader tapes */ + rim_mode = FALSE; /* default to loader tapes */ sym_dump = FALSE; noinput = FALSE; @@ -722,26 +722,26 @@ main( int argc, char *argv[] ) * installing the permanent symbols. */ errorfile = stderr; - pass = 0; /* required for symbol table init */ + pass = 0; /* required for symbol table init */ symtab = (SYM_T *) malloc( sizeof( SYM_T ) * SYMBOL_TABLE_SIZE ); if( symtab == NULL ) { - fprintf( stderr, "Could not allocate memory for symbol table.\n"); - exit( -1 ); + fprintf( stderr, "Could not allocate memory for symbol table.\n"); + exit( -1 ); } init_symtab(); /* Enter the pseudo-ops into the symbol table */ for( ix = 0; ix < DIM( pseudos ); ix++ ) - defineSymbol( pseudos[ix].name, pseudos[ix].val, pseudos[ix].type, 0 ); + defineSymbol( pseudos[ix].name, pseudos[ix].val, pseudos[ix].type, 0 ); /* Enter the predefined symbols into the table. */ /* Also make them part of the permanent symbol table. */ for( ix = 0; ix < DIM( permanent_symbols ); ix++ ) - defineSymbol( permanent_symbols[ix].name, - permanent_symbols[ix].val, - permanent_symbols[ix].type, 0 ); + defineSymbol( permanent_symbols[ix].name, + permanent_symbols[ix].val, + permanent_symbols[ix].type, 0 ); /* Get the options and pathnames */ getArgs( argc, argv ); @@ -761,26 +761,26 @@ main( int argc, char *argv[] ) /* XXX punch title into tape! */ punchLeader( 0 ); if (!rim_mode) { - punchLoader(); - punchLeader(5); + punchLoader(); + punchLeader(5); } if (nlit > 0) - constants(); /* implied "constants"? */ + constants(); /* implied "constants"? */ /* Do pass two of the assembly */ errors = 0; save_error_count = 0; if( xref ) { - /* Get the amount of space that will be required for the concordance */ - for( space = 0, ix = 0; ix < symbol_top; ix++ ) { - symtab[ix].xref_index = space; /* Index into concordance table. */ - space += symtab[ix].xref_count + 1; - symtab[ix].xref_count = 0; /* Clear the count for pass 2. */ - } - /* Allocate & clear the necessary space. */ - xreftab = (WORD32 *) calloc( space, sizeof( WORD32 )); + /* Get the amount of space that will be required for the concordance */ + for( space = 0, ix = 0; ix < symbol_top; ix++ ) { + symtab[ix].xref_index = space; /* Index into concordance table. */ + space += symtab[ix].xref_count + 1; + symtab[ix].xref_count = 0; /* Clear the count for pass 2. */ + } + /* Allocate & clear the necessary space. */ + xreftab = (WORD32 *) calloc( space, sizeof( WORD32 )); } pass = 2; onePass(); @@ -795,33 +795,33 @@ main( int argc, char *argv[] ) /* Display value of error counter. */ if( errors == 0 ) { - fprintf( listfile, "\n %s %s %s\n", s_no, s_errors, s_detected ); + fprintf( listfile, "\n %s %s %s\n", s_no, s_errors, s_detected ); } else { - fprintf( errorfile, "\n %d %s %s\n", errors, s_detected, - ( errors == 1 ? s_error : s_errors )); - fprintf( listfile, "\n %d %s %s\n", errors, s_detected, - ( errors == 1 ? s_error : s_errors )); + fprintf( errorfile, "\n %d %s %s\n", errors, s_detected, + ( errors == 1 ? s_error : s_errors )); + fprintf( listfile, "\n %d %s %s\n", errors, s_detected, + ( errors == 1 ? s_error : s_errors )); } if( symtab_print ) - printSymbolTable(); + printSymbolTable(); if( print_permanent_symbols ) - printPermanentSymbolTable(); + printPermanentSymbolTable(); if( xref ) - printCrossReference(); + printCrossReference(); fclose( objectfile ); fclose( listfile ); if( errors == 0 && errors_pass_1 == 0 ) { - /* after closing objectfile -- we reuse the FILE *!! */ - if (sym_dump) - dump_symbols(); + /* after closing objectfile -- we reuse the FILE *!! */ + if (sym_dump) + dump_symbols(); } else - remove( objectpathname ); + remove( objectpathname ); return( errors != 0 ); } /* main() */ @@ -835,14 +835,14 @@ getw(FILE *f) w = 0; for (i = 0; i < 3;) { - c = getc(f); - if (c == -1) - return -1; - if (c & 0200) { /* ignore if ch8 not punched */ - w <<= 6; - w |= c & 077; - i++; - } + c = getc(f); + if (c == -1) + return -1; + if (c & 0200) { /* ignore if ch8 not punched */ + w <<= 6; + w |= c & 077; + i++; + } } return w; } @@ -859,10 +859,10 @@ permute(WORD32 name) { WORD32 temp; - temp = name & 0202020; /* get zone bits */ + temp = name & 0202020; /* get zone bits */ temp = ((temp << 1) & 0777777) | ((temp >> 17) & 1); /* rotate left */ - name ^= temp; /* flip zone bits */ - name ^= 0400000; /* toggle sign */ + name ^= temp; /* flip zone bits */ + name ^= 0400000; /* toggle sign */ return name; } @@ -887,74 +887,74 @@ read_symbols(char *fname) f = fopen(fname, "rb"); if (!f) { - perror(fname); - exit(1); + perror(fname); + exit(1); } /* skip loader */ for (;;) { - WORD32 w; + WORD32 w; - w = getw(f); - if (w == -1) - goto err; /* XXX complain? */ - if ((w & OP_CODE) == JMP) - break; - if ((w & OP_CODE) != DIO) - goto err; /* XXX complain? */ - w = getw(f); - if (w == -1) - goto err; /* XXX complain? */ + w = getw(f); + if (w == -1) + goto err; /* XXX complain? */ + if ((w & OP_CODE) == JMP) + break; + if ((w & OP_CODE) != DIO) + goto err; /* XXX complain? */ + w = getw(f); + if (w == -1) + goto err; /* XXX complain? */ } /* XXX should push block reader down into a co-routine */ for (;;) { - WORD32 start, end, sum; + WORD32 start, end, sum; - start = getw(f); - if ((start & OP_CODE) == JMP) { - fclose(f); - return; - } + start = getw(f); + if ((start & OP_CODE) == JMP) { + fclose(f); + return; + } - if (start == -1 || (start & OP_CODE) != DIO) - goto err; + if (start == -1 || (start & OP_CODE) != DIO) + goto err; - end = getw(f); - if (end == -1 || (end & OP_CODE) != DIO) - goto err; /* XXX complain? */ + end = getw(f); + if (end == -1 || (end & OP_CODE) != DIO) + goto err; /* XXX complain? */ - sum = start + end; - while (start < end) { - WORD32 sym, val; - sym = getw(f); - if (sym == -1) - goto err; - sum += sym; - start++; - /* XXX handle block boundaries? */ - if (start >= end) - goto err; - val = getw(f); - if (val == -1) - goto err; - /*printf("%06o %06o\n", sym, val);*/ - addsym(sym, val); - sum += val; - start++; - } - start = getw(f); /* eat checksum XXX verify? */ - if (start == -1) - goto err; - /* roll over all the overflows at once */ - if (sum & ~0777777) { - sum = (sum & 0777777) + (sum >> 18); - if (sum & 01000000) /* one more time */ - sum++; - } - if (start != sum) - goto err; + sum = start + end; + while (start < end) { + WORD32 sym, val; + sym = getw(f); + if (sym == -1) + goto err; + sum += sym; + start++; + /* XXX handle block boundaries? */ + if (start >= end) + goto err; + val = getw(f); + if (val == -1) + goto err; + /*printf("%06o %06o\n", sym, val);*/ + addsym(sym, val); + sum += val; + start++; + } + start = getw(f); /* eat checksum XXX verify? */ + if (start == -1) + goto err; + /* roll over all the overflows at once */ + if (sum & ~0777777) { + sum = (sum & 0777777) + (sum >> 18); + if (sum & 01000000) /* one more time */ + sum++; + } + if (start != sum) + goto err; } err: fprintf(stderr, "error reading symbol file %s\n", fname); @@ -990,12 +990,12 @@ void getArgs( int argc, char *argv[] ) break; case 'r': - rim_mode = TRUE; /* punch pure rim-mode tapes */ + rim_mode = TRUE; /* punch pure rim-mode tapes */ break; - case 's': - sym_dump = TRUE; - break; + case 's': + sym_dump = TRUE; + break; case 'm': nomac_exp = FALSE; @@ -1009,10 +1009,10 @@ void getArgs( int argc, char *argv[] ) xref = TRUE; break; - case 'S': - if (ix <= argc) - read_symbols(argv[ix++]); - break; + case 'S': + if (ix <= argc) + read_symbols(argv[ix++]); + break; default: fprintf( stderr, "%s: unknown flag: %s\n", argv[0], argv[ix] ); @@ -1022,7 +1022,7 @@ void getArgs( int argc, char *argv[] ) fprintf( stderr, " -r -- output RIM format file\n" ); fprintf( stderr, " -s -- output symbol punch tape to file\n" ); fprintf( stderr, " -S file -- read symbol punch tape\n" ); - fprintf( stderr, " -x -- output cross reference to file\n" ); + fprintf( stderr, " -x -- output cross reference to file\n" ); fflush( stderr ); exit( -1 ); } /* end switch */ @@ -1091,7 +1091,7 @@ void getArgs( int argc, char *argv[] ) /* Extract the filename from the path. */ if( isalpha( pathname[0] ) && pathname[1] == ':' && pathname[2] != '\\' ) - pathname[1] = '\\'; /* MS-DOS style pathname */ + pathname[1] = '\\'; /* MS-DOS style pathname */ jx = len - 1; while( pathname[jx] != '/' && pathname[jx] != '\\' && jx >= 0 ) @@ -1109,56 +1109,56 @@ invokeMacro(int index) mdp = mac_defs[index]; if (mdp == NULL || mdp->body[0] == '\0') - return 0; + return 0; /* Find arguments. */ while (ISBLANK(line[lexstart])) - next(0); + next(0); mip = calloc(1, sizeof(struct macinv)); if (!mip) { - fprintf(stderr, "could not allocate memory for macro invocation\n"); - exit(1); + fprintf(stderr, "could not allocate memory for macro invocation\n"); + exit(1); } mip->defn = mdp; /* evaluate args, saving values in SYM_T entries in defn. * (cannot have recursive macros) */ - mdp->args[0].val = clc; /* r is location at start */ + mdp->args[0].val = clc; /* r is location at start */ for( jx = 1; !ISDONE(line[lexstart]) && jx <= MAC_MAX_ARGS; ) { - WORD32 val; + WORD32 val; - next(0); - if (ISDONE(line[lexstart])) - break; + next(0); + if (ISDONE(line[lexstart])) + break; - if (line[lexstart] == ',') - next(0); + if (line[lexstart] == ',') + next(0); - while( ISBLANK( line[lexstart] )) - next(0); + while( ISBLANK( line[lexstart] )) + next(0); - if (ISDONE(line[lexstart])) - break; + if (ISDONE(line[lexstart])) + break; - val = getExprs(); + val = getExprs(); - /* ignore excess values silently? */ - if (jx <= mdp->nargs) - mdp->args[jx].val = val; - jx++; + /* ignore excess values silently? */ + if (jx <= mdp->nargs) + mdp->args[jx].val = val; + jx++; } /* end for */ /* XXX complain if too few actuals? -- nah */ while (jx <= mdp->nargs) - mdp->args[jx++].val = 0; + mdp->args[jx++].val = 0; - strcpy(mip->mac_line, line); /* save line */ - mip->mac_cc = cc; /* save position in line */ + strcpy(mip->mac_line, line); /* save line */ + mip->mac_cc = cc; /* save position in line */ mip->mac_ptr = mdp->body; - mip->prev = curmacro; /* push the old entry */ - curmacro = mip; /* step up to the plate! */ + mip->prev = curmacro; /* push the old entry */ + curmacro = mip; /* step up to the plate! */ return 1; } @@ -1166,168 +1166,168 @@ invokeMacro(int index) void processLine() { if (!list_title_set) { - char *cp; + char *cp; - /* assert(sizeof(title) >= sizeof(line)); */ - strcpy(list_title, line); + /* assert(sizeof(title) >= sizeof(line)); */ + strcpy(list_title, line); - if ((cp = strchr(list_title, '\n'))) - *cp = '\0'; + if ((cp = strchr(list_title, '\n'))) + *cp = '\0'; - if (list_title[0]) { - list_title_set = TRUE; - fprintf(stderr, "%s - pass %d\n", list_title, pass ); - /* XXX punch title into tape banner (until an '@' seen) */ - } - return; + if (list_title[0]) { + list_title_set = TRUE; + fprintf(stderr, "%s - pass %d\n", list_title, pass ); + /* XXX punch title into tape banner (until an '@' seen) */ + } + return; } for (;;) { - int jx; - SYM_T evalue; + int jx; + SYM_T evalue; - next(0); - if( end_of_input ) - return; + next(0); + if( end_of_input ) + return; - if( ISEND( line[lexstart] )) { - if (line[lexstart] != '\t') - return; - continue; - } - if (line[lexstart] == '/') /* comment? */ - return; /* done */ + if( ISEND( line[lexstart] )) { + if (line[lexstart] != '\t') + return; + continue; + } + if (line[lexstart] == '/') /* comment? */ + return; /* done */ - /* look ahead for 'exp/' */ - /* skip until whitespace or terminator */ - for( jx = lexstart; jx < maxcc; jx++ ) - if( ISBLANK(line[jx]) || ISDONE(line[jx])) - break; - if( line[jx] == '/') { /* EXP/ set location */ - WORD32 newclc; + /* look ahead for 'exp/' */ + /* skip until whitespace or terminator */ + for( jx = lexstart; jx < maxcc; jx++ ) + if( ISBLANK(line[jx]) || ISDONE(line[jx])) + break; + if( line[jx] == '/') { /* EXP/ set location */ + WORD32 newclc; - newclc = getExprs(); + newclc = getExprs(); - /* Do not change Current Location Counter if an error occurred. */ - if( !error_in_line ) - clc = newclc; + /* Do not change Current Location Counter if an error occurred. */ + if( !error_in_line ) + clc = newclc; - printLine( line, newclc, 0, LINE_LOC ); - cc = jx + 1; - next(0); /* discard slash */ - continue; - } + printLine( line, newclc, 0, LINE_LOC ); + cc = jx + 1; + next(0); /* discard slash */ + continue; + } - switch( line[lexterm] ) { - case ',': - if( isLexSymbol()) { - WORD32 val; - SYM_T *sym; - char name[SYMLEN]; + switch( line[lexterm] ) { + case ',': + if( isLexSymbol()) { + WORD32 val; + SYM_T *sym; + char name[SYMLEN]; - /* Use lookup so symbol will not be counted as reference. */ - sym = lookup(lexemeToName(name, lexstart, lexterm), UNDEFINED); + /* Use lookup so symbol will not be counted as reference. */ + sym = lookup(lexemeToName(name, lexstart, lexterm), UNDEFINED); - if (curmacro) { - /* relative during macro expansion!! */ - val = clc - curmacro->defn->args[0].val; - } - else - val = clc; + if (curmacro) { + /* relative during macro expansion!! */ + val = clc - curmacro->defn->args[0].val; + } + else + val = clc; - if( M_DEFINED( sym->type )) { - if( sym->val != val && pass == 2 ) - errorSymbol( &duplicate_label, sym->name, lexstart ); - sym->type |= DUPLICATE; /* XXX never used! */ - } - /* Must call define on pass 2 to generate concordance. */ - defineLexeme( lexstart, lexterm, val, LABEL ); - } - else if (isdigit(line[lexstart])) { /* constant, */ - int i; - WORD32 val = 0; + if( M_DEFINED( sym->type )) { + if( sym->val != val && pass == 2 ) + errorSymbol( &duplicate_label, sym->name, lexstart ); + sym->type |= DUPLICATE; /* XXX never used! */ + } + /* Must call define on pass 2 to generate concordance. */ + defineLexeme( lexstart, lexterm, val, LABEL ); + } + else if (isdigit(line[lexstart])) { /* constant, */ + int i; + WORD32 val = 0; - for( i = lexstart; i < lexterm; i++ ) { - if( isdigit( line[i] )) { - int digit; - digit = line[i] - '0'; - if( digit >= radix ) { - errorLexeme( &number_not_radix, i ); - val = 0; - break; - } - val = val * radix + digit; - } - else { - errorLexeme( ¬_a_number, lexstart ); - val = 0; - break; - } - } - if (i == lexterm) { - if( clc != val && pass == 2 ) - errorLexeme( &duplicate_label, lexstart); /* XXX */ - } - } - else - errorLexeme( &label_syntax, lexstart ); - next(0); /* skip comma */ - continue; + for( i = lexstart; i < lexterm; i++ ) { + if( isdigit( line[i] )) { + int digit; + digit = line[i] - '0'; + if( digit >= radix ) { + errorLexeme( &number_not_radix, i ); + val = 0; + break; + } + val = val * radix + digit; + } + else { + errorLexeme( ¬_a_number, lexstart ); + val = 0; + break; + } + } + if (i == lexterm) { + if( clc != val && pass == 2 ) + errorLexeme( &duplicate_label, lexstart); /* XXX */ + } + } + else + errorLexeme( &label_syntax, lexstart ); + next(0); /* skip comma */ + continue; - case '=': - if( isLexSymbol()) { - WORD32 start, term, val; + case '=': + if( isLexSymbol()) { + WORD32 start, term, val; - start = lexstart; - term = lexterm; - next(0); /* skip symbol */ - next(0); /* skip trailing = */ - val = getExprs(); - defineLexeme( start, term, val, DEFINED ); - printLine( line, 0, val, LINE_VAL ); - } - else { - errorLexeme( &symbol_syntax, lexstartprev ); - next(0); /* skip symbol */ - next(0); /* skip trailing = */ - getExprs(); /* skip expression */ - } - continue; - } /* switch on terminator */ + start = lexstart; + term = lexterm; + next(0); /* skip symbol */ + next(0); /* skip trailing = */ + val = getExprs(); + defineLexeme( start, term, val, DEFINED ); + printLine( line, 0, val, LINE_VAL ); + } + else { + errorLexeme( &symbol_syntax, lexstartprev ); + next(0); /* skip symbol */ + next(0); /* skip trailing = */ + getExprs(); /* skip expression */ + } + continue; + } /* switch on terminator */ - if( isLexSymbol()) { - SYM_T *sym; - WORD32 val; + if( isLexSymbol()) { + SYM_T *sym; + WORD32 val; - sym = evalSymbol(); - val = sym->val; - if( M_MACRO(sym->type)) { - if (!invokeMacro(val)) - next(0); /* bad defn? or body is empty! */ - continue; - } /* macro invocation */ - else if( M_PSEUDO(sym->type)) { /* NO EPSEUDOs */ - pseudo( (PSEUDO_T)val & 0777777 ); - continue; - } /* pseudo */ - } /* macro, or non-char pseudo */ + sym = evalSymbol(); + val = sym->val; + if( M_MACRO(sym->type)) { + if (!invokeMacro(val)) + next(0); /* bad defn? or body is empty! */ + continue; + } /* macro invocation */ + else if( M_PSEUDO(sym->type)) { /* NO EPSEUDOs */ + pseudo( (PSEUDO_T)val & 0777777 ); + continue; + } /* pseudo */ + } /* macro, or non-char pseudo */ - evalue = getExpr(); - if (evalue.type != PSEUDO) { /* not a bare pseudo-op? */ - if (line[lexstart] == ',') { /* EXP, */ - if(evalue.val != clc && pass == 2 ) - errorLexeme( &duplicate_label, lexstart); /* XXX */ - } - else if (line[lexstart] == '/') { /* EXP/ */ - clc = evalue.val; - printLine( line, clc, 0, LINE_LOC ); - next(0); - } - else { - punchOutObject( clc, evalue.val & 0777777); /* punch it! */ - incrementClc(); - } - } + evalue = getExpr(); + if (evalue.type != PSEUDO) { /* not a bare pseudo-op? */ + if (line[lexstart] == ',') { /* EXP, */ + if(evalue.val != clc && pass == 2 ) + errorLexeme( &duplicate_label, lexstart); /* XXX */ + } + else if (line[lexstart] == '/') { /* EXP/ */ + clc = evalue.val; + printLine( line, clc, 0, LINE_LOC ); + next(0); + } + else { + punchOutObject( clc, evalue.val & 0777777); /* punch it! */ + incrementClc(); + } + } } /* forever */ } @@ -1336,51 +1336,51 @@ processLine() { void onePass() { int ix; - clc = 4; /* Default location is 4 */ - start_addr = 0; /* No starting address. */ - nconst = 0; /* No constant blocks seen */ - nvars = 0; /* No variables seen */ + clc = 4; /* Default location is 4 */ + start_addr = 0; /* No starting address. */ + nconst = 0; /* No constant blocks seen */ + nvars = 0; /* No variables seen */ - while (curmacro) { /* pop macro stack */ - struct macinv *mp; + while (curmacro) { /* pop macro stack */ + struct macinv *mp; - mp = curmacro->prev; - free(curmacro); - curmacro = mp; + mp = curmacro->prev; + free(curmacro); + curmacro = mp; } for( ix = 0; ix < mac_count; ix++) { - if (mac_defs[ix]) - free( mac_defs[ix] ); - mac_defs[ix] = NULL; + if (mac_defs[ix]) + free( mac_defs[ix] ); + mac_defs[ix] = NULL; } - mac_count = 0; /* No macros defined. */ + mac_count = 0; /* No macros defined. */ listed = TRUE; lineno = 0; list_pageno = 0; list_lineno = 0; list_title_set = FALSE; - page_lineno = LIST_LINES_PER_PAGE; /* Force top of page for new titles. */ - radix = 8; /* Initial radix is octal (base 8). */ + page_lineno = LIST_LINES_PER_PAGE; /* Force top of page for new titles. */ + radix = 8; /* Initial radix is octal (base 8). */ /* Now open the first input file. */ end_of_input = FALSE; - filix_curr = filix_start; /* Initialize pointer to input files. */ + filix_curr = filix_start; /* Initialize pointer to input files. */ if(( infile = fopen( save_argv[filix_curr], "r" )) == NULL ) { - fprintf( stderr, "%s: cannot open \"%s\"\n", save_argv[0], - save_argv[filix_curr] ); - exit( -1 ); + fprintf( stderr, "%s: cannot open \"%s\"\n", save_argv[0], + save_argv[filix_curr] ); + exit( -1 ); } for (;;) { - readLine(); - if (end_of_input) { - eob(); - fclose( infile ); - return; - } - processLine(); + readLine(); + if (end_of_input) { + eob(); + fclose( infile ); + return; + } + processLine(); } /* forever */ } /* onePass */ @@ -1393,7 +1393,7 @@ WORD32 getExprs() sym = getExpr(); if (sym.type == PSEUDO) - errorMessage( &value_required, lexstart ); /* XXX wrong pointer? */ + errorMessage( &value_required, lexstart ); /* XXX wrong pointer? */ return sym.val & 0777777; } /* getExprs */ @@ -1409,89 +1409,89 @@ SYM_T getExpr() /* previous operator from the next, if any. */ for (;;) { - int space; - /* - * falling out of switch breaks loop and returns from routine - * so if you want to keep going, you must "continue"!! - */ - space = FALSE; - switch( line[lexstart] ) { - case ' ': - space = TRUE; - /* fall */ - case '+': /* add */ - next(1); /* skip operator */ - if (space && ISEND(line[lexstart])) /* tollerate a trailing space */ - return sym; - sym.val += eval().val; /* XXX look at type? */ - sym.type = DEFINED; - if( sym.val >= 01000000 ) - sym.val = ( sym.val + 1 ) & 0777777; - continue; + int space; + /* + * falling out of switch breaks loop and returns from routine + * so if you want to keep going, you must "continue"!! + */ + space = FALSE; + switch( line[lexstart] ) { + case ' ': + space = TRUE; + /* fall */ + case '+': /* add */ + next(1); /* skip operator */ + if (space && ISEND(line[lexstart])) /* tollerate a trailing space */ + return sym; + sym.val += eval().val; /* XXX look at type? */ + sym.type = DEFINED; + if( sym.val >= 01000000 ) + sym.val = ( sym.val + 1 ) & 0777777; + continue; - case '-': /* subtract */ - next(1); /* skip over the operator */ - sym.val += eval().val ^ 0777777; /* XXX look at type? */ - sym.type = DEFINED; - if( sym.val >= 01000000 ) - sym.val = ( sym.val + 1 ) & 0777777; - continue; + case '-': /* subtract */ + next(1); /* skip over the operator */ + sym.val += eval().val ^ 0777777; /* XXX look at type? */ + sym.type = DEFINED; + if( sym.val >= 01000000 ) + sym.val = ( sym.val + 1 ) & 0777777; + continue; - case '*': /* multiply */ - next(1); /* skip over the operator */ - sym.val *= eval().val; - sym.type = DEFINED; - if( sym.val >= 01000000 ) - sym.val = ( sym.val + 1 ) & 0777777; - continue; + case '*': /* multiply */ + next(1); /* skip over the operator */ + sym.val *= eval().val; + sym.type = DEFINED; + if( sym.val >= 01000000 ) + sym.val = ( sym.val + 1 ) & 0777777; + continue; #if 0 - case '%': /* divide !??? */ - /* - * neither '%' nor the divide symbol appear in FIO-DEC, - * does any known program use such an operator? - * Easily confused for "MOD", which is how C uses '%'! - */ - next(1); - sym.val /= eval().val; - sym.type = DEFINED; - continue; + case '%': /* divide !??? */ + /* + * neither '%' nor the divide symbol appear in FIO-DEC, + * does any known program use such an operator? + * Easily confused for "MOD", which is how C uses '%'! + */ + next(1); + sym.val /= eval().val; + sym.type = DEFINED; + continue; #endif - case '&': /* and */ - next(1); /* skip over the operator */ - sym.val &= eval().val; - sym.type = DEFINED; - continue; + case '&': /* and */ + next(1); /* skip over the operator */ + sym.val &= eval().val; + sym.type = DEFINED; + continue; - case '!': /* or */ - next(1); /* skip over the operator */ - sym.val |= eval().val; - sym.type = DEFINED; - continue; + case '!': /* or */ + next(1); /* skip over the operator */ + sym.val |= eval().val; + sym.type = DEFINED; + continue; - case '/': - case ')': - case ']': - case ':': - case ',': - break; + case '/': + case ')': + case ']': + case ':': + case ',': + break; - case '=': - errorMessage( &illegal_equals, lexstart ); - moveToEndOfLine(); - sym.val = 0; - break; + case '=': + errorMessage( &illegal_equals, lexstart ); + moveToEndOfLine(); + sym.val = 0; + break; - default: - if (!ISEND(line[lexstart])) { - errorMessage( &illegal_expression, lexstart ); - moveToEndOfLine(); - sym.val = 0; - break; - } - } /* switch */ - break; /* break loop!! */ + default: + if (!ISEND(line[lexstart])) { + errorMessage( &illegal_expression, lexstart ); + moveToEndOfLine(); + sym.val = 0; + break; + } + } /* switch */ + break; /* break loop!! */ } /* "forever" */ return( sym ); } /* getExpr */ @@ -1506,52 +1506,52 @@ nextfiodec(int *ccase, int delim) unsigned char c; for (;;) { - if (cc >= maxcc) { - if (delim == -1) - return -1; + if (cc >= maxcc) { + if (delim == -1) + return -1; - /* XXX MUST NOT BE IN A REPEAT!! */ - readLine(); /* danger will robinson! */ - if (end_of_input) - return -1; - } - c = line[cc]; - switch (c) { - case '\n': - c = '\r'; - break; - case '\r': - continue; - } - break; + /* XXX MUST NOT BE IN A REPEAT!! */ + readLine(); /* danger will robinson! */ + if (end_of_input) + return -1; + } + c = line[cc]; + switch (c) { + case '\n': + c = '\r'; + break; + case '\r': + continue; + } + break; } if (delim != -1 && c == delim) { - if (*ccase == LC) { - cc++; /* eat delim */ - return -1; - } - *ccase = LC; - return CONCISE_LC; /* shift down first */ + if (*ccase == LC) { + cc++; /* eat delim */ + return -1; + } + *ccase = LC; + return CONCISE_LC; /* shift down first */ } - if (c > 0177) { /* non-ascii */ - errorMessage( &illegal_character, cc ); - c = 0; /* space?! */ + if (c > 0177) { /* non-ascii */ + errorMessage( &illegal_character, cc ); + c = 0; /* space?! */ } c = ascii_to_fiodec[c&0177]; if (c == BAD) { - errorMessage( &illegal_character, cc ); - c = 0; /* space?! */ + errorMessage( &illegal_character, cc ); + c = 0; /* space?! */ } - if (!(c & *ccase)) { /* char not in current case? */ - *ccase ^= BC; /* switch case */ - if (*ccase == LC) - return CONCISE_LC; /* shift down */ - else - return CONCISE_UC; /* shift up */ + if (!(c & *ccase)) { /* char not in current case? */ + *ccase ^= BC; /* switch case */ + if (*ccase == LC) + return CONCISE_LC; /* shift down */ + else + return CONCISE_UC; /* shift up */ } cc++; return c & CHARBITS; @@ -1569,48 +1569,48 @@ WORD32 flex() int shift; int ccase; - if (line[lexstart] == ' ') /* always? */ - next(0); + if (line[lexstart] == ' ') /* always? */ + next(0); /* original version appears to take next 3 characters, * REGARDLESS of what they are (tab, newline, space?)! */ w = 0; - ccase = LC; /* current case */ + ccase = LC; /* current case */ for (shift = 12; shift >= 0; shift -= 6) { - unsigned char c; - if( lexstart >= maxcc ) - break; + unsigned char c; + if( lexstart >= maxcc ) + break; - c = line[lexstart]; - if (c == '\t' || c == '\n') { - if (ccase == LC) - break; - c = CONCISE_LC; /* shift down first */ - } - else { - if (c > 0177) { /* non-ascii */ - errorMessage( &illegal_character, lexstart ); - c = 0; - } + c = line[lexstart]; + if (c == '\t' || c == '\n') { + if (ccase == LC) + break; + c = CONCISE_LC; /* shift down first */ + } + else { + if (c > 0177) { /* non-ascii */ + errorMessage( &illegal_character, lexstart ); + c = 0; + } - c = ascii_to_fiodec[c&0177]; - if (c == BAD) { - errorMessage( &illegal_character, lexstart ); - c = 0; - } + c = ascii_to_fiodec[c&0177]; + if (c == BAD) { + errorMessage( &illegal_character, lexstart ); + c = 0; + } - if (!(c & ccase)) { /* char not in current case? */ - ccase ^= BC; /* switch case */ - if (ccase == LC) - c = CONCISE_LC; /* shift down */ - else - c = CONCISE_UC; /* shift up */ - } - else - lexstart++; - } - w |= (c & CHARBITS) << shift; + if (!(c & ccase)) { /* char not in current case? */ + ccase ^= BC; /* switch case */ + if (ccase == LC) + c = CONCISE_LC; /* shift down */ + else + c = CONCISE_UC; /* shift up */ + } + else + lexstart++; + } + w |= (c & CHARBITS) << shift; } /* error to get here w/ case == UC? nah. shift down could be next */ return w; @@ -1626,31 +1626,31 @@ WORD32 getChar() unsigned char c, pos; if( cc >= maxcc ) - return 0; /* XXX error? */ + return 0; /* XXX error? */ pos = line[cc++]; if (pos != 'l' && pos != 'm' && pos != 'r') { - errorMessage( &illegal_character, lexstart ); - return 0; + errorMessage( &illegal_character, lexstart ); + return 0; } if( cc >= maxcc ) - return 0; /* XXX error? */ + return 0; /* XXX error? */ c = line[cc++]; if (c > 0177) { - errorMessage( &illegal_character, lexstart ); - c = 0; + errorMessage( &illegal_character, lexstart ); + c = 0; } c = ascii_to_fiodec[c]; if (c == BAD) { - errorMessage( &illegal_character, lexstart ); - c = 0; + errorMessage( &illegal_character, lexstart ); + c = 0; } - if (!(c & LC)) { /* upper case only char? */ - c = CONCISE_UC; /* take a shift up */ - cc--; /* and leave char for next luser */ + if (!(c & LC)) { /* upper case only char? */ + c = CONCISE_UC; /* take a shift up */ + cc--; /* and leave char for next luser */ } c &= CHARBITS; @@ -1691,27 +1691,27 @@ SYM_T eval2() switch (sym->val) { case DECIMAL: radix = 10; - sym_eval.type = PSEUDO; - sym_eval.val = 0; /* has zero as a value! */ - break; + sym_eval.type = PSEUDO; + sym_eval.val = 0; /* has zero as a value! */ + break; case OCTAL: radix = 8; - sym_eval.type = PSEUDO; - sym_eval.val = 0; /* has zero as a value */ - break; + sym_eval.type = PSEUDO; + sym_eval.val = 0; /* has zero as a value */ + break; case FLEX: - next(1); /* skip keyword */ - sym_eval.val = flex(); - break; + next(1); /* skip keyword */ + sym_eval.val = flex(); + break; case CHAR: - next(1); /* skip keyword */ - sym_eval.val = getChar(); - break; + next(1); /* skip keyword */ + sym_eval.val = getChar(); + break; default: errorSymbol( &value_required, sym->name, lexstart ); sym_eval.type = sym->type; - sym_eval.val = 0; - break; + sym_eval.val = 0; + break; } next(1); return( sym_eval ); @@ -1737,20 +1737,20 @@ SYM_T eval2() from = lexstart; val = 0; while( from < lexterm ) { - if( isdigit( line[from] )) { - digit = line[from++] - '0'; - if( digit >= radix ) { - errorLexeme( &number_not_radix, from - 1 ); - val = 0; - break; - } - val = val * radix + digit; - } - else { - errorLexeme( ¬_a_number, lexstart ); - val = 0; - break; - } + if( isdigit( line[from] )) { + digit = line[from++] - '0'; + if( digit >= radix ) { + errorLexeme( &number_not_radix, from - 1 ); + val = 0; + break; + } + val = val * radix + digit; + } + else { + errorLexeme( ¬_a_number, lexstart ); + val = 0; + break; + } } next(1); sym_eval.val = val; @@ -1758,37 +1758,37 @@ SYM_T eval2() } /* digit */ else { switch( line[lexstart] ) { - case '.': /* Value of Current Location Counter */ - val = clc; - next(1); - break; - case '(': /* Generate literal */ - next(1); /* Skip paren */ - val = getExprs(); /* recurse */ - if( line[lexstart] == ')' ) - next(1); /* Skip end paren */ - sym_eval.val = literal(val); - return sym_eval; - case '[': /* parens!! */ - next(1); - sym_eval.val = getExprs(); /* mutual recursion */ - if( line[lexstart] == ']' ) - next(1); /* Skip close bracket */ - else - errorMessage( &illegal_character, lexstart ); - return sym_eval; + case '.': /* Value of Current Location Counter */ + val = clc; + next(1); + break; + case '(': /* Generate literal */ + next(1); /* Skip paren */ + val = getExprs(); /* recurse */ + if( line[lexstart] == ')' ) + next(1); /* Skip end paren */ + sym_eval.val = literal(val); + return sym_eval; + case '[': /* parens!! */ + next(1); + sym_eval.val = getExprs(); /* mutual recursion */ + if( line[lexstart] == ']' ) + next(1); /* Skip close bracket */ + else + errorMessage( &illegal_character, lexstart ); + return sym_eval; default: - switch( line[lexstart] ) { - case '=': - errorMessage( &illegal_equals, lexstart ); - moveToEndOfLine(); - break; - default: - errorMessage( &illegal_character, lexstart ); - break; - } /* error switch */ - val = 0; /* On error, set value to zero. */ - next(1); /* Go past illegal character. */ + switch( line[lexstart] ) { + case '=': + errorMessage( &illegal_equals, lexstart ); + moveToEndOfLine(); + break; + default: + errorMessage( &illegal_character, lexstart ); + break; + } /* error switch */ + val = 0; /* On error, set value to zero. */ + next(1); /* Go past illegal character. */ } /* switch on first char */ } /* not symbol or number */ sym_eval.val = val; @@ -1800,16 +1800,16 @@ SYM_T eval() { SYM_T sym; switch (line[lexstart]) { - case '-': /* unary - */ - next(1); - sym = eval2(); /* skip op */ - sym.val ^= 0777777; - break; - case '+': /* unary + */ - next(1); /* skip op */ - /* fall */ + case '-': /* unary - */ + next(1); + sym = eval2(); /* skip op */ + sym.val ^= 0777777; + break; + case '+': /* unary + */ + next(1); /* skip op */ + /* fall */ default: - sym = eval2(); + sym = eval2(); } return sym; } @@ -1835,80 +1835,80 @@ void readLine() /* XXX panic if nrepeats > 0 (if self-feeding, do the backup here?) */ - listLine(); /* List previous line if needed. */ - error_in_line = FALSE; /* No error in line. */ + listLine(); /* List previous line if needed. */ + error_in_line = FALSE; /* No error in line. */ if(curmacro && *curmacro->mac_ptr == '\0') { /* end of macro? */ - struct macinv *mp; + struct macinv *mp; - listed = TRUE; /* Already listed. */ + listed = TRUE; /* Already listed. */ - /* Restore invoking line. */ - strcpy(line, curmacro->mac_line); - cc = lexstartprev = curmacro->mac_cc; /* Restore cc. */ - maxcc = strlen( line ); /* Restore maxcc. */ + /* Restore invoking line. */ + strcpy(line, curmacro->mac_line); + cc = lexstartprev = curmacro->mac_cc; /* Restore cc. */ + maxcc = strlen( line ); /* Restore maxcc. */ - mp = curmacro->prev; /* pop stack */ - free(curmacro); - curmacro = mp; + mp = curmacro->prev; /* pop stack */ + free(curmacro); + curmacro = mp; - return; + return; } /* end of macro */ - cc = 0; /* Initialize column counter. */ + cc = 0; /* Initialize column counter. */ lexstartprev = 0; - if( curmacro ) { /* Inside macro? */ - char mc; + if( curmacro ) { /* Inside macro? */ + char mc; - maxcc = 0; - do { + maxcc = 0; + do { - mc = *curmacro->mac_ptr++; /* Next character. */ - /* watch for overflow? how could it?? */ - line[maxcc++] = mc; - } while( !ISEND( mc )); /* note: terminates on tab?! */ - line[maxcc] = '\0'; - listed = nomac_exp; - return; + mc = *curmacro->mac_ptr++; /* Next character. */ + /* watch for overflow? how could it?? */ + line[maxcc++] = mc; + } while( !ISEND( mc )); /* note: terminates on tab?! */ + line[maxcc] = '\0'; + listed = nomac_exp; + return; } /* inside macro */ - lineno++; /* Count lines read. */ - listed = FALSE; /* Mark as not listed. */ + lineno++; /* Count lines read. */ + listed = FALSE; /* Mark as not listed. */ READ_LINE: if(( fgets( inpline, LINELEN - 1, infile )) == NULL ) { - filix_curr++; /* Advance to next file. */ - if( filix_curr < save_argc ) { /* More files? */ - fclose( infile ); - if(( infile = fopen( save_argv[filix_curr], "r" )) == NULL ) { - fprintf( stderr, "%s: cannot open \"%s\"\n", save_argv[0], - save_argv[filix_curr] ); - exit( -1 ); - } - list_title_set = FALSE; - goto READ_LINE; - } - else - end_of_input = TRUE; + filix_curr++; /* Advance to next file. */ + if( filix_curr < save_argc ) { /* More files? */ + fclose( infile ); + if(( infile = fopen( save_argv[filix_curr], "r" )) == NULL ) { + fprintf( stderr, "%s: cannot open \"%s\"\n", save_argv[0], + save_argv[filix_curr] ); + exit( -1 ); + } + list_title_set = FALSE; + goto READ_LINE; + } + else + end_of_input = TRUE; } /* fgets failed */ ffseen = FALSE; for( ix = 0, iy = 0; inpline[ix] != '\0'; ix++ ) { - if( inpline[ix] == '\f' ) { - if( !ffseen && list_title_set ) topOfForm( list_title, NULL ); - ffseen = TRUE; - } - else - line[iy++] = inpline[ix]; + if( inpline[ix] == '\f' ) { + if( !ffseen && list_title_set ) topOfForm( list_title, NULL ); + ffseen = TRUE; + } + else + line[iy++] = inpline[ix]; } line[iy] = '\0'; /* If the line is terminated by CR-LF, remove, the CR. */ if( line[iy - 2] == '\r' ) { - iy--; - line[iy - 1] = line[iy - 0]; - line[iy] = '\0'; + iy--; + line[iy - 1] = line[iy - 0]; + line[iy] = '\0'; } - maxcc = iy; /* Save the current line length. */ + maxcc = iy; /* Save the current line length. */ } /* readLine */ @@ -2110,10 +2110,10 @@ punchLoader() { int i; if (noinput) - return; + return; for (i = 0; i < DIM(loader); i++) - punchLocObjectRIM(LOADERBASE+i, loader[i]); + punchLocObjectRIM(LOADERBASE+i, loader[i]); punchTriplet( JMP | LOADERBASE ); } @@ -2131,19 +2131,19 @@ flushLoader() { int i; if (loaderbufcount == 0) - return; + return; sum = 0; PW( DIO | loaderbufstart ); PW( DIO | loaderbufstart + loaderbufcount ); for (i = 0; i < loaderbufcount; i++) - PW( loaderbuf[i] ); + PW( loaderbuf[i] ); /* roll over all the overflows at once */ if (sum & ~0777777) - sum = (sum & 0777777) + (sum >> 18); - if (sum & 01000000) /* one more time */ - sum++; + sum = (sum & 0777777) + (sum >> 18); + if (sum & 01000000) /* one more time */ + sum++; PW( sum ); punchLeader(5); @@ -2153,16 +2153,16 @@ flushLoader() { void punchLocObject( WORD32 loc, WORD32 val ) { if (!rim_mode) { - if ((loc & LOADERBUFMASK) == 0 || /* full/force alignment */ - loaderbufcount > 0 && - loc != loaderbufstart + loaderbufcount) /* disjoint */ - flushLoader(); - if (loaderbufcount == 0) - loaderbufstart = loc; - loaderbuf[loaderbufcount++] = val; + if ((loc & LOADERBUFMASK) == 0 || /* full/force alignment */ + loaderbufcount > 0 && + loc != loaderbufstart + loaderbufcount) /* disjoint */ + flushLoader(); + if (loaderbufcount == 0) + loaderbufstart = loc; + loaderbuf[loaderbufcount++] = val; } else - punchLocObjectRIM( loc, val ); + punchLocObjectRIM( loc, val ); } /* Function: literal */ @@ -2173,16 +2173,16 @@ literal( WORD32 value ) int i; if (nconst >= MAX_CONSTANTS) { - fprintf(stderr, "too many 'constants'; increase MAX_CONSTANTS\n"); - exit(1); + fprintf(stderr, "too many 'constants'; increase MAX_CONSTANTS\n"); + exit(1); } if (pass == 1) { - if (++lit_count[nconst] == MAX_LITERALS) { - fprintf(stderr, "too many literals; increase MAX_LITERALS\n"); - exit(1); - } - return lit_count[nconst]; + if (++lit_count[nconst] == MAX_LITERALS) { + fprintf(stderr, "too many literals; increase MAX_LITERALS\n"); + exit(1); + } + return lit_count[nconst]; } #if 1 @@ -2191,14 +2191,14 @@ literal( WORD32 value ) * (but "middle" constants blocks can't shrink) */ for (i = 0; i < nlit; i++) - if (litter[i] == value) - return lit_loc[nconst] + i; + if (litter[i] == value) + return lit_loc[nconst] + i; #endif /* paranoia */ if (nlit == MAX_LITERALS) { - fprintf(stderr, "too many literals; increase MAX_LITERALS\n"); - exit(1); + fprintf(stderr, "too many literals; increase MAX_LITERALS\n"); + exit(1); } /* not found, save it */ @@ -2221,30 +2221,30 @@ void printSymbolTable() symbol_lines = 0; for (ix = 0, sym = symtab; ix < symbol_top; ix++, sym++) { - if (M_FIXED(sym->type) || M_PSEUDO(sym->type) || - M_MACRO(sym->type) || M_EPSEUDO(sym->type)) - continue; + if (M_FIXED(sym->type) || M_PSEUDO(sym->type) || + M_MACRO(sym->type) || M_EPSEUDO(sym->type)) + continue; - if (symbol_lines == 0) { - topOfForm( list_title, s_symtable ); - symbol_lines = LIST_LINES_PER_PAGE; - } + if (symbol_lines == 0) { + topOfForm( list_title, s_symtable ); + symbol_lines = LIST_LINES_PER_PAGE; + } - switch( sym->type & ( DEFINED | REDEFINED )) { - case UNDEFINED: - mark = '?'; - break; + switch( sym->type & ( DEFINED | REDEFINED )) { + case UNDEFINED: + mark = '?'; + break; - case REDEFINED: - mark = '#'; - break; + case REDEFINED: + mark = '#'; + break; - default: - mark = ' '; - break; - } - fprintf( listfile, "%c%-6.6s %6.6o\n", mark, sym->name, sym->val ); - symbol_lines--; + default: + mark = ' '; + break; + } + fprintf( listfile, "%c%-6.6s %6.6o\n", mark, sym->name, sym->val ); + symbol_lines--; } } /* printSymbolTable */ @@ -2259,7 +2259,7 @@ void printPermanentSymbolTable() if(( permfile = fopen( permpathname, "w" )) == NULL ) { - exit( 2 ); + exit( 2 ); } fprintf( permfile, "/ PERMANENT SYMBOL TABLE\n/\n" ); @@ -2267,10 +2267,10 @@ void printPermanentSymbolTable() for( ix = 0; ix < symbol_top; ix++ ) { - int type = symtab[ix].type; - if( M_FIXED(type) && !M_PSEUDO(type) && !M_EPSEUDO(type) ) - fprintf( permfile, "\t%s=%o\n", - symtab[ix].name, symtab[ix].val ); + int type = symtab[ix].type; + if( M_FIXED(type) && !M_PSEUDO(type) && !M_EPSEUDO(type) ) + fprintf( permfile, "\t%s=%o\n", + symtab[ix].name, symtab[ix].val ); } fclose( permfile ); } /* printPermanentSymbolTable */ @@ -2294,48 +2294,48 @@ void printCrossReference() list_lineno = 0; for( ix = 0, sym = symtab; ix < symbol_top; ix++, sym++ ) { - if (M_FIXED(sym->type) && xreftab[sym->xref_index] == 0) - continue; - list_lineno++; - page_lineno++; - if( page_lineno >= LIST_LINES_PER_PAGE ) - topOfForm( list_title, s_xref ); + if (M_FIXED(sym->type) && xreftab[sym->xref_index] == 0) + continue; + list_lineno++; + page_lineno++; + if( page_lineno >= LIST_LINES_PER_PAGE ) + topOfForm( list_title, s_xref ); - fprintf( listfile, "%5d", list_lineno ); + fprintf( listfile, "%5d", list_lineno ); - /* Get reference count & index into concordance table for this symbol */ - xc_refcount = sym->xref_count; - xc_index = sym->xref_index; - /* Determine how to label symbol on concordance. */ - /* XXX flag variables? */ - switch( sym->type & ( DEFINED | REDEFINED )) { - case UNDEFINED: - fprintf( listfile, " U "); - break; + /* Get reference count & index into concordance table for this symbol */ + xc_refcount = sym->xref_count; + xc_index = sym->xref_index; + /* Determine how to label symbol on concordance. */ + /* XXX flag variables? */ + switch( sym->type & ( DEFINED | REDEFINED )) { + case UNDEFINED: + fprintf( listfile, " U "); + break; - case REDEFINED: - fprintf( listfile, " M %5d ", xreftab[xc_index] ); - break; + case REDEFINED: + fprintf( listfile, " M %5d ", xreftab[xc_index] ); + break; - default: - fprintf( listfile, " A %5d ", xreftab[xc_index] ); - break; - } - fprintf( listfile, "%-6.6s ", sym->name ); + default: + fprintf( listfile, " A %5d ", xreftab[xc_index] ); + break; + } + fprintf( listfile, "%-6.6s ", sym->name ); - /* Output the references, 8 numbers per line after symbol name. */ - for( xc_cols = 0, xc = 1; xc < xc_refcount + 1; xc++, xc_cols++ ) { - if( xc_cols >= XREF_COLUMNS ) { - xc_cols = 0; - page_lineno++; - if( page_lineno >= LIST_LINES_PER_PAGE ) - topOfForm( list_title, s_xref); - list_lineno++; - fprintf( listfile, "\n%5d%-19s", list_lineno, " " ); - } - fprintf( listfile, " %5d", xreftab[xc_index + xc] ); - } - fprintf( listfile, "\n" ); + /* Output the references, 8 numbers per line after symbol name. */ + for( xc_cols = 0, xc = 1; xc < xc_refcount + 1; xc++, xc_cols++ ) { + if( xc_cols >= XREF_COLUMNS ) { + xc_cols = 0; + page_lineno++; + if( page_lineno >= LIST_LINES_PER_PAGE ) + topOfForm( list_title, s_xref); + list_lineno++; + fprintf( listfile, "\n%5d%-19s", list_lineno, " " ); + } + fprintf( listfile, " %5d", xreftab[xc_index + xc] ); + } + fprintf( listfile, "\n" ); } /* for */ } /* printCrossReference */ @@ -2351,11 +2351,11 @@ void topOfForm( char *title, char *sub_title ) sprintf( temp, "%s %d", s_page, list_pageno ); if (!listfile) - return; + return; /* Output a top of form if not the first page of the listing. */ if( list_pageno > 1 ) - fprintf( listfile, "\f" ); + fprintf( listfile, "\f" ); fprintf( listfile, "\n %-63s %10s\n", title, temp ); @@ -2363,13 +2363,13 @@ void topOfForm( char *title, char *sub_title ) page_lineno = 1; if( sub_title != NULL ) { - fprintf( listfile, "%80s\n", sub_title ); - page_lineno++; + fprintf( listfile, "%80s\n", sub_title ); + page_lineno++; } else { - fprintf( listfile, "\n" ); - page_lineno++; + fprintf( listfile, "\n" ); + page_lineno++; } fprintf( listfile, "\n" ); page_lineno++; @@ -2384,10 +2384,10 @@ char *lexemeToName( char *name, WORD32 from, WORD32 term ) to = 0; while( from < term && to < SYMLEN-1) { - char c = line[from++]; - if (ISOVERBAR(c)) - continue; - name[to++] = c; + char c = line[from++]; + if (ISOVERBAR(c)) + continue; + name[to++] = c; } name[to] = '\0'; @@ -2397,7 +2397,7 @@ char *lexemeToName( char *name, WORD32 from, WORD32 term ) /* Function: defineLexeme */ /* Synopsis: Put lexeme into symbol table with a value. */ SYM_T *defineLexeme( WORD32 start, /* start of lexeme being defined. */ - WORD32 term, /* end+1 of lexeme being defined. */ + WORD32 term, /* end+1 of lexeme being defined. */ WORD32 val, /* value of lexeme being defined. */ SYMTYP type ) /* how symbol is being defined. */ { @@ -2418,35 +2418,35 @@ SYM_T *defineSymbol( char *name, WORD32 val, SYMTYP type, WORD32 start ) if( strlen( name ) < 1 ) { - return( &sym_undefined ); /* Protect against non-existent names. */ + return( &sym_undefined ); /* Protect against non-existent names. */ } sym = lookup( name, type ); - xref_count = 0; /* Set concordance for normal defintion. */ + xref_count = 0; /* Set concordance for normal defintion. */ if( M_DEFINED( sym->type ) && sym->val != val && M_NOTRDEF( sym -> type )) { - if( pass == 2 ) - { - errorSymbol( &redefined_symbol, sym->name, start ); - type = type | REDEFINED; - sym->xref_count++; /* Referenced symbol, count it. */ - xref_count = sym->xref_count; - /* moved inside "if pass2" -plb 10/2/03 allow redefinition - * of predefined symbols during pass1 - */ - return ( sym ); - } + if( pass == 2 ) + { + errorSymbol( &redefined_symbol, sym->name, start ); + type = type | REDEFINED; + sym->xref_count++; /* Referenced symbol, count it. */ + xref_count = sym->xref_count; + /* moved inside "if pass2" -plb 10/2/03 allow redefinition + * of predefined symbols during pass1 + */ + return ( sym ); + } } if( pass == 2 && xref ) { - /* Put the definition line number in the concordance table. */ - /* Defined symbols are not counted as references. */ - if (sym->xref_index >= 0) { /* beware macro dummies */ - xreftab[sym->xref_index] = lineno; - /* Put the line number in the concordance table. */ - xreftab[sym->xref_index + xref_count] = lineno; - } + /* Put the definition line number in the concordance table. */ + /* Defined symbols are not counted as references. */ + if (sym->xref_index >= 0) { /* beware macro dummies */ + xreftab[sym->xref_index] = lineno; + /* Put the line number in the concordance table. */ + xreftab[sym->xref_index + xref_count] = lineno; + } } /* Now set the value and the type. */ @@ -2461,64 +2461,64 @@ SYM_T *defineSymbol( char *name, WORD32 val, SYMTYP type, WORD32 start ) /* table as undefined. Return address of symbol in table. */ SYM_T *lookup( char *name, int type ) { - int ix; /* Insertion index */ - int lx; /* Left index */ - int rx; /* Right index */ - SYM_T *best; /* best match */ + int ix; /* Insertion index */ + int lx; /* Left index */ + int rx; /* Right index */ + SYM_T *best; /* best match */ SYM_T *sym; /* YIKES! Search dummies (and "R") before anything else!! */ if (curmacro && curmacro->defn) { - struct macdef *mdp = curmacro->defn; - int i; + struct macdef *mdp = curmacro->defn; + int i; - for (i = 0, sym = mdp->args; i <= mdp->nargs; i++, sym++) - if (strcmp(name, sym->name) == 0) - return sym; + for (i = 0, sym = mdp->args; i <= mdp->nargs; i++, sym++) + if (strcmp(name, sym->name) == 0) + return sym; } lx = 0; rx = symbol_top - 1; best = NULL; while (lx <= rx) { - int mx = (lx + rx) / 2; /* Find center of search area. */ - int compare; + int mx = (lx + rx) / 2; /* Find center of search area. */ + int compare; - sym = symtab + mx; + sym = symtab + mx; - compare = strcmp(name, sym->name); - if (compare < 0) - rx = mx - 1; - else if (compare > 0) - lx = mx + 1; - else { /* match */ - if (overbar && !M_DEFINED(sym->type) && pass == 2) { - sym->type = DEFINED; - sym->val = vars_addr++; - nvars++; - } - return sym; /* return exact match */ - } /* match */ + compare = strcmp(name, sym->name); + if (compare < 0) + rx = mx - 1; + else if (compare > 0) + lx = mx + 1; + else { /* match */ + if (overbar && !M_DEFINED(sym->type) && pass == 2) { + sym->type = DEFINED; + sym->val = vars_addr++; + nvars++; + } + return sym; /* return exact match */ + } /* match */ - /* save best non-exact match; MACRO returns last defined n-x match! */ - if ((M_PSEUDO(sym->type)||M_EPSEUDO(sym->type)||M_MACRO(sym->type)) && - strncmp(name, sym->name, 3) == 0) - best = sym; + /* save best non-exact match; MACRO returns last defined n-x match! */ + if ((M_PSEUDO(sym->type)||M_EPSEUDO(sym->type)||M_MACRO(sym->type)) && + strncmp(name, sym->name, 3) == 0) + best = sym; } /* while */ /* return best match (pseudo or macro) if any for lookups (not defns) */ if (best && type == UNDEFINED) - return best; + return best; /* Must put symbol in table if index is negative. */ - ix = lx; /* insertion point */ + ix = lx; /* insertion point */ if( symbol_top + 1 >= SYMBOL_TABLE_SIZE ) { - errorSymbol( &symbol_table_full, name, lexstart ); - exit( 1 ); + errorSymbol( &symbol_table_full, name, lexstart ); + exit( 1 ); } for( rx = symbol_top; rx >= ix; rx-- ) - symtab[rx + 1] = symtab[rx]; + symtab[rx + 1] = symtab[rx]; symbol_top++; @@ -2529,10 +2529,10 @@ SYM_T *lookup( char *name, int type ) sym->val = 0; sym->xref_count = 0; if( xref && pass == 2 && sym->xref_index >= 0) - xreftab[sym->xref_index] = 0; + xreftab[sym->xref_index] = 0; if (overbar) - nvars++; + nvars++; return sym; } /* lookup */ @@ -2554,12 +2554,12 @@ SYM_T *evalSymbol() sym = lookup( lexemeToName( name, lexstart, lexterm ), UNDEFINED); - sym->xref_count++; /* Count the number of references to symbol. */ + sym->xref_count++; /* Count the number of references to symbol. */ if( xref && pass == 2 && sym->xref_index >= 0) { - /* Put the line number in the concordance table. */ - xreftab[sym->xref_index + sym->xref_count] = lineno; + /* Put the line number in the concordance table. */ + xreftab[sym->xref_index + sym->xref_count] = lineno; } return( sym ); @@ -2570,7 +2570,7 @@ SYM_T *evalSymbol() /* Synopsis: Move the parser input to the end of the current input line. */ void moveToEndOfLine() { - while( !ISEND( line[cc] )) cc++; /* XXX wrong! will stop on a tab! */ + while( !ISEND( line[cc] )) cc++; /* XXX wrong! will stop on a tab! */ lexstart = cc; lexterm = cc; lexstartprev = lexstart; @@ -2587,28 +2587,28 @@ next(int op) { c = line[cc]; if (c == ' ') { - /* eat spaces */ - do { - c = line[++cc]; - } while (c == ' '); - if (op) /* looking for operators? */ - cc--; /* return one */ + /* eat spaces */ + do { + c = line[++cc]; + } while (c == ' '); + if (op) /* looking for operators? */ + cc--; /* return one */ } overbar = 0; lexstart = cc; c = line[cc]; if( isalnum(c) || ISOVERBAR(c)) { - if (ISOVERBAR(c)) - overbar = 1; - do { - c = line[++cc]; - if (ISOVERBAR(c)) - overbar = 1; - } while (isalnum(c) || ISOVERBAR(c)); + if (ISOVERBAR(c)) + overbar = 1; + do { + c = line[++cc]; + if (ISOVERBAR(c)) + overbar = 1; + } while (isalnum(c) || ISOVERBAR(c)); } - else if(!ISDONE(c) || c == '\t') /* not end of line, or comment */ - cc++; /* advance past all punctuation */ + else if(!ISDONE(c) || c == '\t') /* not end of line, or comment */ + cc++; /* advance past all punctuation */ lexterm = cc; } /* next */ @@ -2618,8 +2618,8 @@ BOOL isLexSymbol() /* XXX alpha within first 4? 3?? */ for( ix = lexstart; ix < lexterm; ix++ ) - if(isalpha(line[ix])) - return TRUE; /* any position will do! */ + if(isalpha(line[ix])) + return TRUE; /* any position will do! */ return FALSE; } /* isLexSymbol */ @@ -2644,35 +2644,35 @@ BOOL isLexSymbol() void defineMacro() { - int lexstartsave; /* point to macro name */ - int index; /* point to error char */ - int error; /* error boolean */ + int lexstartsave; /* point to macro name */ + int index; /* point to error char */ + int error; /* error boolean */ int i; int count; WORD32 length; WORD32 value; char termin[SYMLEN]; - char args[MAC_MAX_ARGS][SYMLEN]; /* macro & arg names */ + char args[MAC_MAX_ARGS][SYMLEN]; /* macro & arg names */ char body[MAC_MAX_LENGTH + 1]; struct macdef *mdp; SYM_T *sym; if (nrepeats) { - /* we can call readLine, so throw up hands now */ - errorLexeme( &define_in_repeat, lexstartprev ); - return; + /* we can call readLine, so throw up hands now */ + errorLexeme( &define_in_repeat, lexstartprev ); + return; } while (line[lexstart] == ' ' || line[lexstart] == '\t') - next(0); + next(0); /* not a tab or space */ - if (ISEND(line[lexstart])) { /* newline or EOS? */ - /* crock; next token should invisibly skip over line boundaries? */ - readLine(); - next(0); - while (line[lexstart] == ' ' || line[lexstart] == '\t') - next(0); + if (ISEND(line[lexstart])) { /* newline or EOS? */ + /* crock; next token should invisibly skip over line boundaries? */ + readLine(); + next(0); + while (line[lexstart] == ' ' || line[lexstart] == '\t') + next(0); } /* XXX pick up macro name out here */ @@ -2682,74 +2682,74 @@ defineMacro() { error = FALSE; lexstartsave = lexstart; while (!ISDONE(line[lexstart]) && count < MAC_MAX_ARGS) { - if (!isalnum(line[lexstart]) && index == 0) - index = lexstart; /* error pointer */ - lexemeToName( args[count++], lexstart, lexterm ); - /* XXX error if NOT a comma (& not first dummy) ? */ - if (line[lexterm] == ',') - next(0); /* eat the comma */ - next(0); - if (line[lexstart] == ' ') - next(0); + if (!isalnum(line[lexstart]) && index == 0) + index = lexstart; /* error pointer */ + lexemeToName( args[count++], lexstart, lexterm ); + /* XXX error if NOT a comma (& not first dummy) ? */ + if (line[lexterm] == ',') + next(0); /* eat the comma */ + next(0); + if (line[lexstart] == ' ') + next(0); } - if( count == 0 ) { /* No macro name. */ - errorMessage( &no_macro_name, lexstartsave ); - error = TRUE; + if( count == 0 ) { /* No macro name. */ + errorMessage( &no_macro_name, lexstartsave ); + error = TRUE; } - else if( index ) { /* Bad argument name. */ - errorMessage( &bad_dummy_arg, index ); - error = TRUE; + else if( index ) { /* Bad argument name. */ + errorMessage( &bad_dummy_arg, index ); + error = TRUE; } else if( mac_count >= MAC_TABLE_LENGTH ) { - errorMessage( ¯o_table_full, lexstartsave ); - error = TRUE; + errorMessage( ¯o_table_full, lexstartsave ); + error = TRUE; } else { - value = mac_count++; /* sym value is index into mac */ - defineSymbol( args[0], value, MACRO, lexstartsave ); + value = mac_count++; /* sym value is index into mac */ + defineSymbol( args[0], value, MACRO, lexstartsave ); } for( length = 0;; ) { - readLine(); - if (end_of_input) - break; - next(0); - while (line[lexstart] == ' ' || line[lexstart] == '\t') - next(0); + readLine(); + if (end_of_input) + break; + next(0); + while (line[lexstart] == ' ' || line[lexstart] == '\t') + next(0); - lexemeToName( termin, lexstart, lexterm ); /* just look at line? */ - if (strncmp( termin, "term", 4 ) == 0) - break; + lexemeToName( termin, lexstart, lexterm ); /* just look at line? */ + if (strncmp( termin, "term", 4 ) == 0) + break; - if (!error) { - int ll = strlen(line); - int allblank = FALSE; + if (!error) { + int ll = strlen(line); + int allblank = FALSE; - /* don't save blank lines! */ - for( i = 0; i < ll && allblank; i++ ) - if(!ISBLANK(line[i])) - allblank = FALSE; + /* don't save blank lines! */ + for( i = 0; i < ll && allblank; i++ ) + if(!ISBLANK(line[i])) + allblank = FALSE; - if (allblank) /* nothing but air? */ - continue; /* skip it! */ + if (allblank) /* nothing but air? */ + continue; /* skip it! */ - if ((length + ll + 1) >= MAC_MAX_LENGTH ) { - errorMessage (¯o_too_long, lexstart ); - error = TRUE; - continue; - } + if ((length + ll + 1) >= MAC_MAX_LENGTH ) { + errorMessage (¯o_too_long, lexstart ); + error = TRUE; + continue; + } - strcpy(body+length, line); - length += ll; - } + strcpy(body+length, line); + length += ll; + } } /* for */ if( error ) - return; + return; mdp = calloc(1, sizeof(struct macdef) + length); if (mdp == NULL) { - fprintf(stderr, "error allocating memory for macro definition\n"); - exit(1); + fprintf(stderr, "error allocating memory for macro definition\n"); + exit(1); } mac_defs[value] = mdp; @@ -2766,14 +2766,14 @@ defineMacro() { sym->type = DEFINED; strcpy(sym->name, "R"); sym->val = 0; - sym->xref_index = -1; /* ??? allow xref? */ + sym->xref_index = -1; /* ??? allow xref? */ sym++; for (i = 1; i <= mdp->nargs; i++, sym++) { - sym->type = DEFINED; - strcpy(sym->name, args[i]); - sym->val = 0; - sym->xref_index = -1; /* don't xref!! */ + sym->type = DEFINED; + strcpy(sym->name, args[i]); + sym->val = 0; + sym->xref_index = -1; /* don't xref!! */ } } /* defineMacro */ @@ -2783,11 +2783,11 @@ variables() { /* XXX error if "variables" already seen (in this pass) */ /* XXX error if different address on pass 2 */ if (pass == 2) - printLine( line, clc, 0, LINE_LOC ); + printLine( line, clc, 0, LINE_LOC ); vars_addr = clc; vars_end = clc = (clc + nvars) & ADDRESS_FIELD; if (pass == 2) - printLine( line, clc, 0, LINE_LOC); + printLine( line, clc, 0, LINE_LOC); } /* TEXT pseudo-op */ @@ -2800,30 +2800,30 @@ text(void) int ccase; /* XXX error in repeat!! */ do { - if (cc == maxcc) { - /* XXX EOL before delim found!!! */ - fprintf(stderr, "FIX ME!\n"); - return; - } - delim = line[cc++]; - } while (delim == ' '); /* others? NL */ + if (cc == maxcc) { + /* XXX EOL before delim found!!! */ + fprintf(stderr, "FIX ME!\n"); + return; + } + delim = line[cc++]; + } while (delim == ' '); /* others? NL */ w = count = 0; ccase = LC; for (;;) { - int c = nextfiodec(&ccase, delim); - if (c == -1) - break; - w |= c << ((2-count)*6); - if (++count == 3) { - punchOutObject(clc, w); /* punch it! */ - incrementClc(); - count = w = 0; - } + int c = nextfiodec(&ccase, delim); + if (c == -1) + break; + w |= c << ((2-count)*6); + if (++count == 3) { + punchOutObject(clc, w); /* punch it! */ + incrementClc(); + count = w = 0; + } } if (count > 0) { - punchOutObject(clc, w); /* punch remainder */ - incrementClc(); + punchOutObject(clc, w); /* punch remainder */ + incrementClc(); } } @@ -2835,27 +2835,27 @@ constants(void) { /* XXX illegal inside macro (curmacro != NULL) */ if (pass == 1) { - lit_loc[nconst] = clc; + lit_loc[nconst] = clc; - /* just use addition?! */ - for (i = 0; i < lit_count[nconst]; i++) - incrementClc(); + /* just use addition?! */ + for (i = 0; i < lit_count[nconst]; i++) + incrementClc(); - nconst++; - return; + nconst++; + return; } /* pass 2: */ /* XXX complain if clc != lit_base[nconst]? */ for (i = 0; i < lit_count[nconst]; i++) { - if (i < nlit) - punchOutObject( clc, litter[i] & 0777777); /* punch it! */ - incrementClc(); + if (i < nlit) + punchOutObject( clc, litter[i] & 0777777); /* punch it! */ + incrementClc(); } nconst++; - nlit = 0; /* litter[] now empty */ + nlit = 0; /* litter[] now empty */ } /* constants */ @@ -2869,85 +2869,85 @@ BOOL pseudo( PSEUDO_T val ) switch( (PSEUDO_T) val ) { case CONSTANTS: - next(0); /* Skip symbol */ - constants(); - break; + next(0); /* Skip symbol */ + constants(); + break; case VARIABLES: - next(0); /* Skip symbol */ - variables(); - break; + next(0); /* Skip symbol */ + variables(); + break; case DEFINE: - next(0); /* Skip symbol */ - defineMacro(); - return FALSE; - break; + next(0); /* Skip symbol */ + defineMacro(); + return FALSE; + break; case REPEAT: - next(0); /* Skip symbol */ + next(0); /* Skip symbol */ - /* NOTE!! constant followed by SPACE picked up as expression!! */ - count = getExprs() & ADDRESS_FIELD; - /* XXX error if sign bit set? */ + /* NOTE!! constant followed by SPACE picked up as expression!! */ + count = getExprs() & ADDRESS_FIELD; + /* XXX error if sign bit set? */ - /* allow comma, but do not require */ - if( line[lexstart] == ',') - next(0); + /* allow comma, but do not require */ + if( line[lexstart] == ',') + next(0); - nrepeats++; - repeatstart = lexstart; /* save line start */ - while (count-- > 0) { - cc = repeatstart; /* reset input pointer */ - processLine(); /* recurse! */ - } - cc = maxcc; - nrepeats--; + nrepeats++; + repeatstart = lexstart; /* save line start */ + while (count-- > 0) { + cc = repeatstart; /* reset input pointer */ + processLine(); /* recurse! */ + } + cc = maxcc; + nrepeats--; - return FALSE; - break; + return FALSE; + break; case START: - next(0); /* Skip symbol */ - /* XXX illegal in macro or repeat */ - flushLoader(); - if (!ISDONE(line[lexstart])) { - if (line[lexstart] == ' ') - next(0); - start_addr = getExprs() & ADDRESS_FIELD; - next(0); - printLine( line, 0, start_addr, LINE_VAL ); - /* MACRO punches 4" of leader */ - punchTriplet(JMP | start_addr); - /* MACRO punches 24" of leader? */ - } - /* - * handle multiple tapes concatenated into one file!! - * have command line option?? treat "start" as EOF?? - */ - list_title_set = FALSE; - return FALSE; + next(0); /* Skip symbol */ + /* XXX illegal in macro or repeat */ + flushLoader(); + if (!ISDONE(line[lexstart])) { + if (line[lexstart] == ' ') + next(0); + start_addr = getExprs() & ADDRESS_FIELD; + next(0); + printLine( line, 0, start_addr, LINE_VAL ); + /* MACRO punches 4" of leader */ + punchTriplet(JMP | start_addr); + /* MACRO punches 24" of leader? */ + } + /* + * handle multiple tapes concatenated into one file!! + * have command line option?? treat "start" as EOF?? + */ + list_title_set = FALSE; + return FALSE; case TEXT: - /* NOTE!! no next()! */ - text(); - break; + /* NOTE!! no next()! */ + text(); + break; case NOINPUT: - next(0); /* Skip symbol */ - noinput = TRUE; - break; + next(0); /* Skip symbol */ + noinput = TRUE; + break; case EXPUNGE: - next(0); /* Skip symbol */ - if (pass == 1) - init_symtab(); - break; + next(0); /* Skip symbol */ + if (pass == 1) + init_symtab(); + break; default: - break; + break; } /* end switch for pseudo-ops */ - return TRUE; /* keep scanning */ + return TRUE; /* keep scanning */ } /* pseudo */ @@ -2974,7 +2974,7 @@ void errorSymbol( EMSG_T *mesg, char *name, WORD32 col ) errors++; sprintf( linecol, ":%d:%d", lineno, col + 1 ); fprintf( errorfile, "%s%-9s : error: %s \"%s\" at Loc = %5.5o\n", - filename, linecol, mesg->file, s, clc ); + filename, linecol, mesg->file, s, clc ); saveError( mesg->list, col ); } error_in_line = TRUE; @@ -2992,7 +2992,7 @@ void errorMessage( EMSG_T *mesg, WORD32 col ) errors++; sprintf( linecol, ":%d:%d", lineno, col + 1 ); fprintf( errorfile, "%s%-9s : error: %s at Loc = %5.5o\n", - filename, linecol, mesg->file, clc ); + filename, linecol, mesg->file, clc ); saveError( mesg->list, col ); } error_in_line = TRUE; @@ -3025,8 +3025,8 @@ dump_symbols(void) { objectfile = fopen( sympathname, "wb" ); if (!objectfile) { - perror(sympathname); - return; + perror(sympathname); + return; } punchLeader(0); @@ -3037,32 +3037,32 @@ dump_symbols(void) { addr = 05000; for( ix = 0; ix < symbol_top; ix++ ) { - int i, type; - WORD32 name; + int i, type; + WORD32 name; - type = symtab[ix].type; - if (M_FIXED(type) || M_PSEUDO(type) || M_MACRO(type)) - continue; + type = symtab[ix].type; + if (M_FIXED(type) || M_PSEUDO(type) || M_MACRO(type)) + continue; - name = 0; - for (i = 0; i < 3; i++) { - char c; + name = 0; + for (i = 0; i < 3; i++) { + char c; - c = symtab[ix].name[i]; - /* XXX leave on NUL? */ + c = symtab[ix].name[i]; + /* XXX leave on NUL? */ - c = ascii_to_fiodec[tolower(c) & 0177]; - /* XXX check for BAD entries? */ + c = ascii_to_fiodec[tolower(c) & 0177]; + /* XXX check for BAD entries? */ - /* XXX OR in val<<(3-i)*6?? */ - name <<= 6; - name |= c & CHARBITS; - } - punchLocObject(addr++, permute(name)); - punchLocObject(addr++, symtab[ix].val); + /* XXX OR in val<<(3-i)*6?? */ + name <<= 6; + name |= c & CHARBITS; + } + punchLocObject(addr++, permute(name)); + punchLocObject(addr++, symtab[ix].val); } flushLoader(); - punchTriplet( JMP ); /* ??? */ + punchTriplet( JMP ); /* ??? */ punchLeader(0); fclose(objectfile); } diff --git a/PDP10/pdp10_fe.c b/PDP10/pdp10_fe.c index fab2aa4b..ba6fcfed 100644 --- a/PDP10/pdp10_fe.c +++ b/PDP10/pdp10_fe.c @@ -121,45 +121,45 @@ DEVICE fe_dev = { */ /* Here is the definition of the communications area: -XPP RLWORD,31 ;RELOAD WORD [FE_KEEPA] - KSRLD==1B4 ;RELOAD REQUEST (8080 will reload -10 if this is set) - KPACT==1B5 ;KEEP ALIVE ACTIVE (8080 reloads -10 if KPALIV doesn't change) - KLACT==1B6 ;KLINIK ACTIVE (Remote diagnosis line enabled) - PAREN==1B7 ;PARITY ERROR DETECT ENABLED - CRMPAR==1B8 ;CRAM PAR ERR DETECT ENABLED - DRMPAR==1B9 ;DRAM PAR ERR DETECT ENABLED - CASHEN==1B10 ;CACHE ENABLED - MILSEN==1B11 ;1MSEC ENABLED - TRPENA==1B12 ;TRAPS ENABLED - MFGMOD==1B13 ;MANUFACTURING MODE - KPALIV==377B27 ;KEEP ALIVE WORD CHECKED EVERY 1 SEC, AFTER 15, FAIL +XPP RLWORD,31 ;RELOAD WORD [FE_KEEPA] + KSRLD==1B4 ;RELOAD REQUEST (8080 will reload -10 if this is set) + KPACT==1B5 ;KEEP ALIVE ACTIVE (8080 reloads -10 if KPALIV doesn't change) + KLACT==1B6 ;KLINIK ACTIVE (Remote diagnosis line enabled) + PAREN==1B7 ;PARITY ERROR DETECT ENABLED + CRMPAR==1B8 ;CRAM PAR ERR DETECT ENABLED + DRMPAR==1B9 ;DRAM PAR ERR DETECT ENABLED + CASHEN==1B10 ;CACHE ENABLED + MILSEN==1B11 ;1MSEC ENABLED + TRPENA==1B12 ;TRAPS ENABLED + MFGMOD==1B13 ;MANUFACTURING MODE + KPALIV==377B27 ;KEEP ALIVE WORD CHECKED EVERY 1 SEC, AFTER 15, FAIL ; Why reload (8080->10) - AUTOBT==1B32 ;BOOT SWITCH OR POWER UP CONDITION - PWRFAL==1B33 ;POWER FAIL restart (Start at 70) - FORREL==1B34 ;FORCED RELOAD - KEPFAL==1B35 ;KEEP ALIVE FAILURE (XCT exec 71) + AUTOBT==1B32 ;BOOT SWITCH OR POWER UP CONDITION + PWRFAL==1B33 ;POWER FAIL restart (Start at 70) + FORREL==1B34 ;FORCED RELOAD + KEPFAL==1B35 ;KEEP ALIVE FAILURE (XCT exec 71) -XPP CTYIWD,32 ;CTY INPUT WORD [FE_CTYIN] - CTYICH==377B35 ;CTY INPUT CHARACTER - CTYIVL==1B27 ;INPUT VALID BIT (Actually, this is an 8-bit function code) +XPP CTYIWD,32 ;CTY INPUT WORD [FE_CTYIN] + CTYICH==377B35 ;CTY INPUT CHARACTER + CTYIVL==1B27 ;INPUT VALID BIT (Actually, this is an 8-bit function code) -XPP CTYOWD,33 ;CTY OUTPUT WORD [FE_CTYOUT] - CTYOCH==377B35 ;CTY OUTPUT CHARACTER - CTYOVL==1B27 ;OUTPUT VALID FLAG +XPP CTYOWD,33 ;CTY OUTPUT WORD [FE_CTYOUT] + CTYOCH==377B35 ;CTY OUTPUT CHARACTER + CTYOVL==1B27 ;OUTPUT VALID FLAG -XPP KLIIWD,34 ;KLINIK INPUT WORD [FE_KLININ] - KLIICH==377B35 ;KLINIK INPUT CHARACTER - KLIIVL==1B27 ;KLINIK INPUT VALID (Historical) - KLICHR==1B27 ;KLINIK CHARACTER - KLIINI==2B27 ;KLINIK INITED - KLICAR==3B27 ;CARRIER LOST +XPP KLIIWD,34 ;KLINIK INPUT WORD [FE_KLININ] + KLIICH==377B35 ;KLINIK INPUT CHARACTER + KLIIVL==1B27 ;KLINIK INPUT VALID (Historical) + KLICHR==1B27 ;KLINIK CHARACTER + KLIINI==2B27 ;KLINIK INITED + KLICAR==3B27 ;CARRIER LOST -XPP KLIOWD,35 ;KLINIK OUTPUT WORD [FE_KLINOUT] - KLIOCH==377B35 ;KLINIK OUTPUT CHARACTER - KLIOVL==1B27 ;KLINIK OUTPUT VALID (Historical) - KLOCHR==1B27 ;KLINIK CHARACTER AVAILABLE - KLIHUP==2B27 ;KLINIK HANGUP REQUEST +XPP KLIOWD,35 ;KLINIK OUTPUT WORD [FE_KLINOUT] + KLIOCH==377B35 ;KLINIK OUTPUT CHARACTER + KLIOVL==1B27 ;KLINIK OUTPUT VALID (Historical) + KLOCHR==1B27 ;KLINIK CHARACTER AVAILABLE + KLIHUP==2B27 ;KLINIK HANGUP REQUEST */ void fe_intr (void) diff --git a/PDP10/pdp10_sys.c b/PDP10/pdp10_sys.c index 6b93e238..895e4e68 100644 --- a/PDP10/pdp10_sys.c +++ b/PDP10/pdp10_sys.c @@ -718,14 +718,14 @@ if (sw & SWMASK ('C')) { /* character? */ for (i = 30; i >= 0; i = i - 6) { c = (int32) ((inst >> i) & 077); fprintf (of, "%c", SIXTOASC (c)); - } + } return SCPE_OK; } if (sw & SWMASK ('P')) { /* packed? */ for (i = 29; i >= 0; i = i - 7) { c = (int32) ((inst >> i) & 0177); fprintf (of, FMTASC (c)); - } + } return SCPE_OK; } if (!(sw & SWMASK ('M'))) diff --git a/PDP11/pdp11_defs.h b/PDP11/pdp11_defs.h index 796eebfc..ec7732c0 100644 --- a/PDP11/pdp11_defs.h +++ b/PDP11/pdp11_defs.h @@ -628,8 +628,8 @@ typedef struct pdp_dib DIB; /* VT simulation is sequential, so only one interrupt is posted at a time. */ #define INT_V_VTLP 13 /* XXX - Manual says VTLP, VTST have opposite */ -#define INT_V_VTST 14 /* XXX precedence, but that breaks LUNAR! */ - /* XXX How this happens is an utter mystery. */ +#define INT_V_VTST 14 /* XXX precedence, but that breaks LUNAR! */ + /* XXX How this happens is an utter mystery. */ #define INT_V_VTCH 15 #define INT_V_VTNM 16 #define INT_V_LK 17 diff --git a/PDP11/pdp11_hk.c b/PDP11/pdp11_hk.c index 6701432f..8c7cb971 100644 --- a/PDP11/pdp11_hk.c +++ b/PDP11/pdp11_hk.c @@ -967,9 +967,9 @@ if (fnc_rdy[fnc] && sim_is_active (uptr)) /* need inactive? */ if (fnc_cyl[fnc] && /* need valid cyl */ ((GET_CY (hkdc) >= HK_CYL (uptr)) || /* bad cylinder */ (GET_SF (hkda) >= HK_NUMSF))) { /* bad surface */ - hk_err (CS1_ERR|CS1_DONE, 0, ER_SKI|ER_IAE, drv); /* set err, no op */ - return; - } + hk_err (CS1_ERR|CS1_DONE, 0, ER_SKI|ER_IAE, drv); /* set err, no op */ + return; + } hkcs1 = (hkcs1 | CS1_GO) & ~CS1_DONE; /* set go, clear done */ diff --git a/PDP11/pdp11_kmc.c b/PDP11/pdp11_kmc.c index 40a132c6..9c1872de 100644 --- a/PDP11/pdp11_kmc.c +++ b/PDP11/pdp11_kmc.c @@ -844,7 +844,7 @@ static t_stat kmc_writeCsr (int32 data, int32 PA, int32 access) { } } } - if (changed & SEL0_RUN) { /* Changing the run bit? */ + if (changed & SEL0_RUN) { /* Changing the run bit? */ if (sel0 & SEL0_RUN) { kmc_startUcode (k); } else { @@ -858,7 +858,7 @@ static t_stat kmc_writeCsr (int32 data, int32 PA, int32 access) { if ((sel0 & SEL0_RQI) && !(sel2 & SEL2_RDO)) sel2 = (sel2 & 0xFF00) | SEL2_RDI; /* Clear command bits too */ kmc_updints(k); - } + } break; case 01: /* SEL2 */ if (access == WRITEB) { @@ -921,23 +921,23 @@ static t_stat kmc_writeCsr (int32 data, int32 PA, int32 access) { static void kmc_doMicroinstruction (int32 k, uint16 instr) { switch (instr) { case 0041222: /* MOVE */ - sel2 = (sel2 & ~0xFF) | (dram[mar%KMC_DRAMSIZE] & 0xFF); - break; + sel2 = (sel2 & ~0xFF) | (dram[mar%KMC_DRAMSIZE] & 0xFF); + break; case 0055222: /* MOVE */ - sel2 = (sel2 & ~0xFF) | (dram[mar%KMC_DRAMSIZE] & 0xFF); - mar = (mar +1)%KMC_DRAMSIZE; - break; + sel2 = (sel2 & ~0xFF) | (dram[mar%KMC_DRAMSIZE] & 0xFF); + mar = (mar +1)%KMC_DRAMSIZE; + break; case 0122440: /* MOVE */ dram[mar%KMC_DRAMSIZE] = sel2 & 0xFF; - break; + break; case 0136440: /* MOVE */ dram[mar%KMC_DRAMSIZE] = sel2 & 0xFF; - mar = (mar +1)%KMC_DRAMSIZE; - break; + mar = (mar +1)%KMC_DRAMSIZE; + break; case 0121202: /* MOVE */ case 0021002: /* MOVE */ - sel2 = (sel2 & ~0xFF) | 0; - break; + sel2 = (sel2 & ~0xFF) | 0; + break; default: if ((instr & 0160000) == 0000000) { /* MVI */ switch (instr & 0174000) { @@ -1707,19 +1707,19 @@ static void kmc_dispatchInputCmd(int32 k) { cmdsel2, sel4, sel6, ba); switch (cmdsel2 & (SEL2_IOT | SEL2_CMD)) { - case CMD_BUFFIN: /* TX BUFFER IN */ + case CMD_BUFFIN: /* TX BUFFER IN */ kmc_txBufferIn(d, ba, sel6); break; - case CMD_CTRLIN: /* CONTROL IN. */ + case CMD_CTRLIN: /* CONTROL IN. */ case SEL2_IOT | CMD_CTRLIN: kmc_ctrlIn (k, d, line); break; - case CMD_BASEIN: /* BASE IN. */ + case CMD_BASEIN: /* BASE IN. */ kmc_baseIn (k, d, cmdsel2, line); break; - case (SEL2_IOT | CMD_BUFFIN): /* Buffer in, receive buffer for us... */ + case (SEL2_IOT | CMD_BUFFIN): /* Buffer in, receive buffer for us... */ kmc_rxBufferIn(d, ba ,sel6); break; default: diff --git a/PDP11/pdp11_rs.c b/PDP11/pdp11_rs.c index 431235b1..aea09100 100644 --- a/PDP11/pdp11_rs.c +++ b/PDP11/pdp11_rs.c @@ -60,7 +60,7 @@ #define UNIT_V_DTYPE (UNIT_V_UF + 0) /* disk type */ #define RS03_DTYPE (0) -#define RS04_DTYPE (1) +#define RS04_DTYPE (1) #define UNIT_V_AUTO (UNIT_V_UF + 1) /* autosize */ #define UNIT_V_WLK (UNIT_V_UF + 2) /* write lock */ #define UNIT_DTYPE (1 << UNIT_V_DTYPE) diff --git a/PDP11/txt2cbn.c b/PDP11/txt2cbn.c index a45d42de..f22415ec 100644 --- a/PDP11/txt2cbn.c +++ b/PDP11/txt2cbn.c @@ -1,49 +1,49 @@ #include -#define ERROR 00404 +#define ERROR 00404 #include "pdp11_cr_dat.h" -static int colStart = 1; /* starting column */ -static int colEnd = 80; /* ending column */ +static int colStart = 1; /* starting column */ +static int colEnd = 80; /* ending column */ main () { - int col, c; + int col, c; - while (1) { - for (col = colStart; col <= colEnd; ) { - switch (c = fgetc (stdin)) { - case EOF: - /* fall through */ - case '\n': - while (col <= colEnd) { - fputc (o29_code[' '] & 077, stdout); - fputc ((o29_code[' '] >> 6) & 077, stdout); - col++; - } - break; - case '\t': - do { - fputc (o29_code[' '] & 077, stdout); - fputc ((o29_code[' '] >> 6) & 077, stdout); - col++; - } while (((col & 07) != 1) && (col <= colEnd)); - break; - default: - fputc (o29_code[c] & 077, stdout); - fputc ((o29_code[c] >> 6) & 077, stdout); - col++; - break; - } - } - /* flush long lines, or flag over-length card */ - if (c != '\n' && c != EOF) { - printf ("overlength line\n"); - do c = fgetc (stdin); - while ((c != EOF) && (c != '\n')); - } - if (c == EOF) - break; - } - exit (1); + while (1) { + for (col = colStart; col <= colEnd; ) { + switch (c = fgetc (stdin)) { + case EOF: + /* fall through */ + case '\n': + while (col <= colEnd) { + fputc (o29_code[' '] & 077, stdout); + fputc ((o29_code[' '] >> 6) & 077, stdout); + col++; + } + break; + case '\t': + do { + fputc (o29_code[' '] & 077, stdout); + fputc ((o29_code[' '] >> 6) & 077, stdout); + col++; + } while (((col & 07) != 1) && (col <= colEnd)); + break; + default: + fputc (o29_code[c] & 077, stdout); + fputc ((o29_code[c] >> 6) & 077, stdout); + col++; + break; + } + } + /* flush long lines, or flag over-length card */ + if (c != '\n' && c != EOF) { + printf ("overlength line\n"); + do c = fgetc (stdin); + while ((c != EOF) && (c != '\n')); + } + if (c == EOF) + break; + } + exit (1); } diff --git a/PDP18B/pdp18b_cpu.c b/PDP18B/pdp18b_cpu.c index 3e2f0cd1..fe799ae3 100644 --- a/PDP18B/pdp18b_cpu.c +++ b/PDP18B/pdp18b_cpu.c @@ -727,7 +727,7 @@ while (reason == 0) { /* loop until halted */ if (sim_brk_summ && sim_brk_test (PC, SWMASK ('E'))) { /* breakpoint? */ reason = STOP_IBKPT; /* stop simulation */ break; - } + } if (!usmd_defer) /* no IOT? load usmd */ usmd = usmd_buf; else usmd_defer = 0; /* cancel defer */ @@ -2051,15 +2051,15 @@ if (MMR & MM_RDIS) /* reloc disabled? */ else if ((MMR & MM_SH) && /* shared enabled and */ (ma >= g_base[gmode]) && /* >= shared base and */ (ma < (g_base[gmode] + slr_lnt[slr]))) { /* < shared end? */ - if (ma & 017400) { /* ESAS? */ - if ((rc == REL_W) && (MMR & MM_WP)) { /* write and protected? */ - prvn = trap_pending = 1; /* set flag, trap */ - return -1; - } - pa = (((MMR & MM_SBR_MASK) << 8) + ma) & DMASK; /* ESAS reloc */ - } - else pa = RR + (ma & 0377); /* no, ISAS reloc */ - } + if (ma & 017400) { /* ESAS? */ + if ((rc == REL_W) && (MMR & MM_WP)) { /* write and protected? */ + prvn = trap_pending = 1; /* set flag, trap */ + return -1; + } + pa = (((MMR & MM_SBR_MASK) << 8) + ma) & DMASK; /* ESAS reloc */ + } + else pa = RR + (ma & 0377); /* no, ISAS reloc */ + } else { if (ma > (BR | 0377)) { /* normal reloc, viol? */ if (rc != REL_C) /* set flag, trap */ @@ -2248,7 +2248,7 @@ static const uint8 std_dev[] = for (i = 0; i < DEV_MAX; i++) { /* clr tables */ dev_tab[i] = NULL; dev_iors[i] = NULL; - } + } for (i = 0; i < ((uint32) sizeof (std_dev)); i++) /* std entries */ dev_tab[std_dev[i]] = &bad_dev; for (i = p = 0; (dptr = sim_devices[i]) != NULL; i++) { /* add devices */ diff --git a/PDP18B/pdp18b_drm.c b/PDP18B/pdp18b_drm.c index 2d4fbd89..d0448003 100644 --- a/PDP18B/pdp18b_drm.c +++ b/PDP18B/pdp18b_drm.c @@ -241,7 +241,7 @@ static const int32 boot_rom[] = { 0706101, /* DRSF ; wait for done */ 0602003, /* JMP .-1 */ 0600000 /* JMP 0 ; enter boot */ - }; + }; t_stat drm_boot (int32 unitno, DEVICE *dptr) { diff --git a/PDP18B/pdp18b_dt.c b/PDP18B/pdp18b_dt.c index cdea389c..151b044d 100644 --- a/PDP18B/pdp18b_dt.c +++ b/PDP18B/pdp18b_dt.c @@ -27,8 +27,8 @@ (PDP-9) TC02/TU55 DECtape (PDP-15) TC15/TU56 DECtape - 23-Jun-06 RMS Fixed switch conflict in ATTACH - Revised Type 550 header based on DECTOG formatter + 23-Jun-06 RMS Fixed switch conflict in ATTACH + Revised Type 550 header based on DECTOG formatter 13-Jun-06 RMS Fixed checksum calculation bug in Type 550 16-Aug-05 RMS Fixed C++ declaration and cast problems 25-Jan-04 RMS Revised for device debug support @@ -557,7 +557,7 @@ else if ((pulse & 044) == 004) { /* MMLC */ ((fnc == FNC_WALL) && (uptr->flags & UNIT_WLK))) dt_seterr (uptr, DTB_SEL); /* select err */ else dt_newsa (dtsa); - } + } DT_UPDINT; return dat; } @@ -858,13 +858,13 @@ if (mot & DTS_DIR) /* update pos */ else uptr->pos = uptr->pos + delta; if (((int32) uptr->pos < 0) || ((int32) uptr->pos > (DTU_FWDEZ (uptr) + DT_EZLIN))) { - detach_unit (uptr); /* off reel? */ - uptr->STATE = uptr->pos = 0; - unum = (int32) (uptr - dt_dev.units); - if (unum == DTA_GETUNIT (dtsa)) /* if selected, */ - dt_seterr (uptr, DTB_SEL); /* error */ - return TRUE; - } + detach_unit (uptr); /* off reel? */ + uptr->STATE = uptr->pos = 0; + unum = (int32) (uptr - dt_dev.units); + if (unum == DTA_GETUNIT (dtsa)) /* if selected, */ + dt_seterr (uptr, DTB_SEL); /* error */ + return TRUE; + } return FALSE; } @@ -1038,7 +1038,7 @@ switch (fnc) { /* at speed, check fnc * if (dtsb & DTB_DTF) { /* DTF set? */ dt_seterr (uptr, DTB_TIM); /* timing error */ return SCPE_OK; - } + } if (DEBUG_PRI (dt_dev, LOG_RW) || (DEBUG_PRI (dt_dev, LOG_BL) && (blk == dt_logblk))) fprintf (sim_deb, ">>DT%d: writing block %d %s%s\n", unum, blk, @@ -1460,7 +1460,7 @@ if (uptr->flags & UNIT_8FMT) { /* 12b? */ } } /* end file loop */ uptr->hwmark = ba; - } /* end if */ + } /* end if */ else if (uptr->flags & UNIT_11FMT) { /* 16b? */ for (ba = 0; ba < uptr->capac; ) { /* loop thru file */ k = fxread (pdp11b, sizeof (uint16), D18_BSIZE, uptr->fileref); @@ -1508,7 +1508,7 @@ if (uptr->WRITTEN && uptr->hwmark && ((uptr->flags & UNIT_RO)== 0)) { /* any ((fbuf[ba + 1] >> 12) & 077); pdp8b[k + 2] = fbuf[ba + 1] & 07777; ba = ba + 2; - } /* end loop blk */ + } /* end loop blk */ fxwrite (pdp8b, sizeof (uint16), D8_NBSIZE, uptr->fileref); if (ferror (uptr->fileref)) break; @@ -1544,7 +1544,7 @@ if (sim_is_active (uptr)) { if ((u == DTA_GETUNIT (dtsa)) && (dtsa & DTA_STSTP)) { dtsb = dtsb | DTB_ERF | DTB_SEL | DTB_DTF; DT_UPDINT; - } + } uptr->STATE = uptr->pos = 0; } if (uptr->hwmark && ((uptr->flags & UNIT_RO) == 0)) { /* any data? */ diff --git a/PDP18B/pdp18b_rb.c b/PDP18B/pdp18b_rb.c index ff2fec5e..b9db8ec2 100644 --- a/PDP18B/pdp18b_rb.c +++ b/PDP18B/pdp18b_rb.c @@ -204,9 +204,9 @@ int32 s = rb_set_bcd (bcd_s); /* bin sector */ if ((t >= RB_NUMTR) || (t < 0) || /* invalid? */ (s >= RB_NUMSC) || (s < 0)) { - rb_updsta (RBS_ILA); /* error */ - return old_da; /* don't change */ - } + rb_updsta (RBS_ILA); /* error */ + return old_da; /* don't change */ + } else return (((t * RB_NUMSC) + s) * RB_NUMWD); /* new da */ } diff --git a/PDP18B/pdp18b_rf.c b/PDP18B/pdp18b_rf.c index a075c4a0..9f78c285 100644 --- a/PDP18B/pdp18b_rf.c +++ b/PDP18B/pdp18b_rf.c @@ -101,11 +101,11 @@ #define RFS_CLR 0000170 /* always clear */ #define RFS_EFLGS (RFS_HDW | RFS_APE | RFS_MXF | RFS_WCE | \ - RFS_DPE | RFS_WLO | RFS_NED ) /* error flags */ + RFS_DPE | RFS_WLO | RFS_NED ) /* error flags */ #define RFS_FR (RFS_FNC|RFS_IE) #define GET_FNC(x) (((x) >> RFS_V_FNC) & RFS_M_FNC) #define GET_POS(x) ((int) fmod (sim_gtime () / ((double) (x)), \ - ((double) RF_NUMWD))) + ((double) RF_NUMWD))) #define RF_BUSY (sim_is_active (&rf_unit)) extern int32 M[]; @@ -295,7 +295,7 @@ do { break; } else { /* not locked */ - fbuf[rf_da] = M[pa]; /* write word */ + fbuf[rf_da] = M[pa]; /* write word */ if (((uint32) rf_da) >= uptr->hwmark) uptr->hwmark = rf_da + 1; } diff --git a/PDP18B/pdp18b_rp.c b/PDP18B/pdp18b_rp.c index e6cf8a75..e1a0755d 100644 --- a/PDP18B/pdp18b_rp.c +++ b/PDP18B/pdp18b_rp.c @@ -90,7 +90,7 @@ #define STA_RW 0777000 /* read/write */ #define STA_EFLGS (STA_WPE | STA_NXC | STA_NXF | STA_NXS | \ - STA_HNF | STA_SUSI) /* error flags */ + STA_HNF | STA_SUSI) /* error flags */ #define STA_DYN (STA_SUWP | STA_SUSI) /* per unit status */ #define GET_UNIT(x) (((x) >> STA_V_UNIT) & STA_M_UNIT) #define GET_FUNC(x) (((x) >> STA_V_FUNC) & STA_M_FUNC) @@ -111,7 +111,7 @@ #define STB_SUNR 0000001 /* sel unit not rdy */ #define STB_EFLGS (STB_SUFU | STB_PGE | STB_EOP | STB_TME | STB_FME | \ - STB_WCE | STB_WPE | STB_LON ) /* error flags */ + STB_WCE | STB_WPE | STB_LON ) /* error flags */ #define STB_DYN (STB_SUFU | STB_SUSU | STB_SUNR) /* per unit */ /* Disk address */ diff --git a/PDP18B/pdp18b_tt1.c b/PDP18B/pdp18b_tt1.c index 77c3c815..41cff857 100644 --- a/PDP18B/pdp18b_tt1.c +++ b/PDP18B/pdp18b_tt1.c @@ -259,7 +259,7 @@ if (ttix_done) { } else { CLR_INT (TTI1); - } + } return; } @@ -438,7 +438,7 @@ if (newln < ttx_lines) { if (ttx_ldsc[i].conn) { tmxr_linemsg (&ttx_ldsc[i], "\r\nOperator disconnected line\r\n"); tmxr_reset_ln (&ttx_ldsc[i]); /* reset line */ - } + } ttox_unit[i].flags = ttox_unit[i].flags | UNIT_DIS; ttx_reset_ln (i); } diff --git a/PDP8/pdp8_cpu.c b/PDP8/pdp8_cpu.c index cb4471c3..3368366c 100644 --- a/PDP8/pdp8_cpu.c +++ b/PDP8/pdp8_cpu.c @@ -357,7 +357,7 @@ while (reason == 0) { /* loop until halted */ sim_brk_test (MA, (1u << SIM_BKPT_V_SPC) | SWMASK ('E'))) { /* breakpoint? */ reason = STOP_IBKPT; /* stop simulation */ break; - } + } IR = M[MA]; /* fetch instruction */ if (sim_brk_summ && diff --git a/PDP8/pdp8_df.c b/PDP8/pdp8_df.c index fef9479d..800e085a 100644 --- a/PDP8/pdp8_df.c +++ b/PDP8/pdp8_df.c @@ -131,7 +131,7 @@ DIB df_dib = { DEV_DF, 3, { &df60, &df61, &df62 } }; UNIT df_unit = { UDATA (&df_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_BUFABLE+UNIT_MUSTBUF, - DF_DKSIZE) + DF_DKSIZE) }; REG df_reg[] = { @@ -266,7 +266,7 @@ do { if (da >= uptr->capac) { /* nx disk addr? */ df_sta = df_sta | DFS_NXD; break; - } + } M[DF_WC] = (M[DF_WC] + 1) & 07777; /* incr word count */ M[DF_MA] = (M[DF_MA] + 1) & 07777; /* incr mem addr */ pa = mex | M[DF_MA]; /* add extension */ @@ -278,7 +278,7 @@ do { if ((df_wlk >> t) & 1) /* locked? set err */ df_sta = df_sta | DFS_WLS; else { /* not locked */ - fbuf[da] = M[pa]; /* write word */ + fbuf[da] = M[pa]; /* write word */ if (da >= uptr->hwmark) uptr->hwmark = da + 1; } } diff --git a/PDP8/pdp8_dt.c b/PDP8/pdp8_dt.c index f77840b2..69fa5e97 100644 --- a/PDP8/pdp8_dt.c +++ b/PDP8/pdp8_dt.c @@ -682,13 +682,13 @@ if (mot & DTS_DIR) /* update pos */ else uptr->pos = uptr->pos + delta; if (((int32) uptr->pos < 0) || ((int32) uptr->pos > (DTU_FWDEZ (uptr) + DT_EZLIN))) { - detach_unit (uptr); /* off reel? */ - uptr->STATE = uptr->pos = 0; - unum = (int32) (uptr - dt_dev.units); - if (unum == DTA_GETUNIT (dtsa)) /* if selected, */ - dt_seterr (uptr, DTB_SEL); /* error */ - return TRUE; - } + detach_unit (uptr); /* off reel? */ + uptr->STATE = uptr->pos = 0; + unum = (int32) (uptr - dt_dev.units); + if (unum == DTA_GETUNIT (dtsa)) /* if selected, */ + dt_seterr (uptr, DTB_SEL); /* error */ + return TRUE; + } return FALSE; } @@ -796,7 +796,7 @@ switch (fnc) { /* at speed, check fnc * if (dtsb & DTB_DTF) { /* DTF set? */ dt_seterr (uptr, DTB_TIM); /* timing error */ return SCPE_OK; - } + } if (DEBUG_PRI (dt_dev, LOG_RW) || (DEBUG_PRI (dt_dev, LOG_BL) && (blk == dt_logblk))) fprintf (sim_deb, ">>DT%d: reading block %d %s%s\n", @@ -950,7 +950,7 @@ switch (fnc) { /* at speed, check fnc * if (dtsb & DTB_DTF) { /* DTF set? */ dt_seterr (uptr, DTB_TIM); /* timing error */ return SCPE_OK; - } + } relpos = DT_LIN2OF (uptr->pos, uptr); /* cur pos in blk */ M[DT_WC] = (M[DT_WC] + 1) & 07777; /* incr WC, CA */ M[DT_CA] = (M[DT_CA] + 1) & 07777; @@ -965,7 +965,7 @@ switch (fnc) { /* at speed, check fnc * fbuf[ba] = dat; /* write word */ if (ba >= uptr->hwmark) uptr->hwmark = ba + 1; - } + } /* ignore hdr */ sim_activate (uptr, DT_WSIZE * dt_ltime); if (M[DT_WC] == 0) diff --git a/PDP8/pdp8_mt.c b/PDP8/pdp8_mt.c index 96b635ba..f42fb83e 100644 --- a/PDP8/pdp8_mt.c +++ b/PDP8/pdp8_mt.c @@ -128,7 +128,7 @@ #define STA_CLR (FN_RMASK | 00020) /* always clear */ #define STA_DYN (STA_REW | STA_BOT | STA_REM | STA_EOF | \ - STA_EOT | STA_WLK) /* kept in USTAT */ + STA_EOT | STA_WLK) /* kept in USTAT */ extern uint16 M[]; extern int32 int_req, stop_inst; diff --git a/PDP8/pdp8_pt.c b/PDP8/pdp8_pt.c index 9fb43c12..01c8bbae 100644 --- a/PDP8/pdp8_pt.c +++ b/PDP8/pdp8_pt.c @@ -217,9 +217,9 @@ switch (IR & 07) { /* decode IR<9:11> */ sim_activate (&ptp_unit, ptp_unit.wait); /* activate unit */ return AC; - default: - return (stop_inst << IOT_V_REASON) + AC; - } /* end switch */ + default: + return (stop_inst << IOT_V_REASON) + AC; + } /* end switch */ } /* Unit service */ diff --git a/PDP8/pdp8_rf.c b/PDP8/pdp8_rf.c index 7b0a274c..bd75b3a4 100644 --- a/PDP8/pdp8_rf.c +++ b/PDP8/pdp8_rf.c @@ -332,7 +332,7 @@ do { if ((rf_wlk >> t) & 1) /* write locked? */ rf_sta = rf_sta | RFS_WLS; else { /* not locked */ - fbuf[rf_da] = M[pa]; /* write word */ + fbuf[rf_da] = M[pa]; /* write word */ if (((uint32) rf_da) >= uptr->hwmark) uptr->hwmark = rf_da + 1; } diff --git a/PDP8/pdp8_td.c b/PDP8/pdp8_td.c index adb3eca8..5fd06746 100644 --- a/PDP8/pdp8_td.c +++ b/PDP8/pdp8_td.c @@ -375,16 +375,16 @@ if (new_mving && !prev_mving) { /* start from stop? */ if ((prev_mving && !new_mving) || /* stop from moving? */ (prev_dir != new_dir)) { /* dir chg while moving? */ - if (uptr->STATE >= STA_ACC) { /* not stopping? */ - if (td_setpos (uptr)) /* update pos */ + if (uptr->STATE >= STA_ACC) { /* not stopping? */ + if (td_setpos (uptr)) /* update pos */ return TRUE; - sim_cancel (uptr); /* stop current */ - sim_activate (uptr, td_dctime); /* schedule decel */ - uptr->STATE = STA_DEC | prev_dir; /* set status */ - td_slf = td_qlf = td_qlctr = 0; /* clear state */ - } - return FALSE; - } + sim_cancel (uptr); /* stop current */ + sim_activate (uptr, td_dctime); /* schedule decel */ + uptr->STATE = STA_DEC | prev_dir; /* set status */ + td_slf = td_qlf = td_qlctr = 0; /* clear state */ + } + return FALSE; + } return FALSE; } @@ -445,10 +445,10 @@ if (uptr->STATE & STA_DIR) /* update pos */ else uptr->pos = uptr->pos + delta; if (((int32) uptr->pos < 0) || ((int32) uptr->pos > (DTU_FWDEZ (uptr) + DT_EZLIN))) { - detach_unit (uptr); /* off reel */ - sim_cancel (uptr); /* no timing pulses */ - return TRUE; - } + detach_unit (uptr); /* off reel */ + sim_cancel (uptr); /* no timing pulses */ + return TRUE; + } return FALSE; } diff --git a/SAGE/chip_defs.h b/SAGE/chip_defs.h index 0f068537..6a082757 100644 --- a/SAGE/chip_defs.h +++ b/SAGE/chip_defs.h @@ -55,7 +55,7 @@ /* generic debug tracing support */ #if DBG_MSG==1 -#define ADDRESS_FORMAT "[0x%08x]" +#define ADDRESS_FORMAT "[0x%08x]" #if UNIX_PLATFORM #define NLP "\r\n" #else @@ -63,21 +63,21 @@ #endif #define TRACE_PRINT(level,args)\ - if(sim_deb && chip->dev->dctrl & level) { \ - fprintf(sim_deb,"%-4s: " ADDRESS_FORMAT " ", chip->dev->name, PCX); \ - fprintf args; fputs(NLP,sim_deb); } + if(sim_deb && chip->dev->dctrl & level) { \ + fprintf(sim_deb,"%-4s: " ADDRESS_FORMAT " ", chip->dev->name, PCX); \ + fprintf args; fputs(NLP,sim_deb); } #define TRACE_PRINT0(level,fmt)\ - if(sim_deb && chip->dev->dctrl & level) { \ - fprintf(sim_deb,"%-4s: " ADDRESS_FORMAT " ", chip->dev->name, PCX); \ - fprintf(sim_deb,fmt NLP); } + if(sim_deb && chip->dev->dctrl & level) { \ + fprintf(sim_deb,"%-4s: " ADDRESS_FORMAT " ", chip->dev->name, PCX); \ + fprintf(sim_deb,fmt NLP); } #define TRACE_PRINT1(level,fmt,arg1)\ - if(sim_deb && chip->dev->dctrl & level) { \ - fprintf(sim_deb,"%-4s: " ADDRESS_FORMAT " ", chip->dev->name, PCX); \ - fprintf(sim_deb,fmt NLP,arg1); } + if(sim_deb && chip->dev->dctrl & level) { \ + fprintf(sim_deb,"%-4s: " ADDRESS_FORMAT " ", chip->dev->name, PCX); \ + fprintf(sim_deb,fmt NLP,arg1); } #define TRACE_PRINT2(level,fmt,arg1,arg2)\ - if(sim_deb && chip->dev->dctrl & level) { \ - fprintf(sim_deb,"%-4s: " ADDRESS_FORMAT " ", chip->dev->name, PCX); \ - fprintf(sim_deb,fmt NLP,arg1,arg2); } + if(sim_deb && chip->dev->dctrl & level) { \ + fprintf(sim_deb,"%-4s: " ADDRESS_FORMAT " ", chip->dev->name, PCX); \ + fprintf(sim_deb,fmt NLP,arg1,arg2); } #else #define TRACE_PRINT(level,args) #define TRACE_PRINT0(level,fmt) @@ -90,12 +90,12 @@ *****************************************************************************************/ typedef struct { - int pfirst; - int prate; - TMLN ldsc; - TMXR desc; - UNIT* term; - UNIT* poll; + int pfirst; + int prate; + TMLN ldsc; + TMXR desc; + UNIT* term; + UNIT* poll; } SERMUX; t_stat mux_attach(UNIT*,char*,SERMUX*); t_stat mux_detach(UNIT*,SERMUX*); @@ -103,44 +103,44 @@ t_stat mux_detach(UNIT*,SERMUX*); /***************************************************************************************** * 8259 PIC *****************************************************************************************/ -#define I8259_ICW1 0x10 -#define I8259_ICW1_A765 0xe0 -#define I8259_ICW1_LTIM 0x08 -#define I8259_ICW1_ADI 0x04 -#define I8259_ICW1_SNGL 0x02 -#define I8259_ICW1_IC4 0x01 -#define I8259_ICW4_SFNM 0x10 -#define I8259_ICW4_BUF 0x08 -#define I8259_ICW4_MS 0x04 -#define I8259_ICW4_AEOI 0x02 -#define I8259_ICW4_UPM 0x01 -#define I8259_OCW2_MODE 0xe0 -#define I8259_OCW2_LEVEL 0x07 -#define I8259_OCW3_ESMM 0x40 -#define I8259_OCW3_SMM 0x20 -#define I8259_OCW3 0x08 -#define I8259_OCW3_POLL 0x04 -#define I8259_OCW3_RR 0x02 -#define I8259_OCW3_RIS 0x01 +#define I8259_ICW1 0x10 +#define I8259_ICW1_A765 0xe0 +#define I8259_ICW1_LTIM 0x08 +#define I8259_ICW1_ADI 0x04 +#define I8259_ICW1_SNGL 0x02 +#define I8259_ICW1_IC4 0x01 +#define I8259_ICW4_SFNM 0x10 +#define I8259_ICW4_BUF 0x08 +#define I8259_ICW4_MS 0x04 +#define I8259_ICW4_AEOI 0x02 +#define I8259_ICW4_UPM 0x01 +#define I8259_OCW2_MODE 0xe0 +#define I8259_OCW2_LEVEL 0x07 +#define I8259_OCW3_ESMM 0x40 +#define I8259_OCW3_SMM 0x20 +#define I8259_OCW3 0x08 +#define I8259_OCW3_POLL 0x04 +#define I8259_OCW3_RR 0x02 +#define I8259_OCW3_RIS 0x01 typedef struct i8259 { - PNP_INFO pnp; - DEVICE* dev; /* backlink to device */ - t_stat (*write)(struct i8259* chip,int port,uint32 value); - t_stat (*read)(struct i8259* chip,int port,uint32* value); - t_stat (*reset)(struct i8259* chip); - int state; - int rmode; - int32 imr; - int32 isr; - int32 irr; - int32 icw1; - int32 icw2; - int32 icw4; - int32 prio; /* which IR* has prio 7? */ - t_bool autoint; - int intlevel; - int intvector; + PNP_INFO pnp; + DEVICE* dev; /* backlink to device */ + t_stat (*write)(struct i8259* chip,int port,uint32 value); + t_stat (*read)(struct i8259* chip,int port,uint32* value); + t_stat (*reset)(struct i8259* chip); + int state; + int rmode; + int32 imr; + int32 isr; + int32 irr; + int32 icw1; + int32 icw2; + int32 icw4; + int32 prio; /* which IR* has prio 7? */ + t_bool autoint; + int intlevel; + int intvector; } I8259; extern t_stat i8259_io(IOHANDLER* ioh,uint32* value,uint32 rw,uint32 mask); @@ -159,63 +159,63 @@ extern DEBTAB i8259_dt[]; /***************************************************************************************** * 8251 USART *****************************************************************************************/ -#define I8251_AMODE_STOP 0xc0 -#define I8251_AMODE_S1 0x40 -#define I8251_AMODE_S15 0x80 -#define I8251_AMODE_S2 0xc0 -#define I8251_MODE_EP 0x20 -#define I8251_MODE_PEN 0x10 -#define I8251_AMODE_BITS 0x0c -#define I8251_AMODE_BITS5 0x00 -#define I8251_AMODE_BITS6 0x04 -#define I8251_AMODE_BITS7 0x08 -#define I8251_AMODE_BITS8 0x0c -#define I8251_MODE_BAUD 0x03 -#define I8251_MODE_SYNC 0x00 -#define I8251_AMODE_BAUD1 0x01 -#define I8251_AMODE_BAUD16 0x02 -#define I8251_AMODE_BAUD64 0x03 -#define I8251_SMODE_ESD 0x40 -#define I8251_SMODE_SCS 0x80 -#define I8251_CMD_EH 0x80 -#define I8251_CMD_IR 0x40 -#define I8251_CMD_RTS 0x20 -#define I8251_CMD_ER 0x10 -#define I8251_CMD_SBRK 0x08 -#define I8251_CMD_RXE 0x04 -#define I8251_CMD_DTR 0x02 -#define I8251_CMD_TXEN 0x01 -#define I8251_ST_DSR 0x80 -#define I8251_ST_SYNBRK 0x40 -#define I8251_ST_FE 0x20 -#define I8251_ST_OE 0x10 -#define I8251_ST_PE 0x08 -#define I8251_ST_TXEMPTY 0x04 -#define I8251_ST_RXRDY 0x02 -#define I8251_ST_TXRDY 0x01 +#define I8251_AMODE_STOP 0xc0 +#define I8251_AMODE_S1 0x40 +#define I8251_AMODE_S15 0x80 +#define I8251_AMODE_S2 0xc0 +#define I8251_MODE_EP 0x20 +#define I8251_MODE_PEN 0x10 +#define I8251_AMODE_BITS 0x0c +#define I8251_AMODE_BITS5 0x00 +#define I8251_AMODE_BITS6 0x04 +#define I8251_AMODE_BITS7 0x08 +#define I8251_AMODE_BITS8 0x0c +#define I8251_MODE_BAUD 0x03 +#define I8251_MODE_SYNC 0x00 +#define I8251_AMODE_BAUD1 0x01 +#define I8251_AMODE_BAUD16 0x02 +#define I8251_AMODE_BAUD64 0x03 +#define I8251_SMODE_ESD 0x40 +#define I8251_SMODE_SCS 0x80 +#define I8251_CMD_EH 0x80 +#define I8251_CMD_IR 0x40 +#define I8251_CMD_RTS 0x20 +#define I8251_CMD_ER 0x10 +#define I8251_CMD_SBRK 0x08 +#define I8251_CMD_RXE 0x04 +#define I8251_CMD_DTR 0x02 +#define I8251_CMD_TXEN 0x01 +#define I8251_ST_DSR 0x80 +#define I8251_ST_SYNBRK 0x40 +#define I8251_ST_FE 0x20 +#define I8251_ST_OE 0x10 +#define I8251_ST_PE 0x08 +#define I8251_ST_TXEMPTY 0x04 +#define I8251_ST_RXRDY 0x02 +#define I8251_ST_TXRDY 0x01 typedef struct i8251 { - PNP_INFO pnp; - DEVICE* dev; /* backlink to device */ - t_stat (*write)(struct i8251* chip,int port,uint32 value); - t_stat (*read)(struct i8251* chip,int port,uint32* value); - t_stat (*reset)(struct i8251* chip); - t_stat (*txint)(struct i8251* chip); - t_stat (*rxint)(struct i8251* chip); - UNIT* in; - UNIT* out; - SERMUX* mux; - int init; - int mode; - int sync1; - int sync2; - int cmd; - int ibuf; - int obuf; - int status; - int bitmask; - t_bool oob; /* out-of-band=1 will allow a console to receive CTRL-E even when receiver is disabled */ - int crlf; /* CRLF state machine to suppress NUL bytes */ + PNP_INFO pnp; + DEVICE* dev; /* backlink to device */ + t_stat (*write)(struct i8251* chip,int port,uint32 value); + t_stat (*read)(struct i8251* chip,int port,uint32* value); + t_stat (*reset)(struct i8251* chip); + t_stat (*txint)(struct i8251* chip); + t_stat (*rxint)(struct i8251* chip); + UNIT* in; + UNIT* out; + SERMUX* mux; + int init; + int mode; + int sync1; + int sync2; + int cmd; + int ibuf; + int obuf; + int status; + int bitmask; + t_bool oob; /* out-of-band=1 will allow a console to receive CTRL-E even when receiver is disabled */ + int crlf; /* CRLF state machine to suppress NUL bytes */ } I8251; /* default handlers */ @@ -236,48 +236,48 @@ extern DEBTAB i8251_dt[]; *****************************************************************************************/ /*forward*/ struct i8253; typedef struct { - t_stat (*call)(struct i8253* chip,int rw,uint32* src); - int state; /* the current output state (latching, MSB/LSB out */ - int mode; /* programmed mode */ - int32 latch; /* the latched value of count */ - int32 divider; /* programmed divider value */ - int32 count; /* the real count value as calculated by rcall callback */ + t_stat (*call)(struct i8253* chip,int rw,uint32* src); + int state; /* the current output state (latching, MSB/LSB out */ + int mode; /* programmed mode */ + int32 latch; /* the latched value of count */ + int32 divider; /* programmed divider value */ + int32 count; /* the real count value as calculated by rcall callback */ } I8253CNTR; typedef struct i8253 { - PNP_INFO pnp; - DEVICE* dev; /* backlink to device */ - UNIT* unit; /* backlink to unit */ - t_stat (*reset)(struct i8253* chip); - t_stat (*ckmode)(struct i8253* chip, uint32 value); - I8253CNTR cntr[3]; - int init; + PNP_INFO pnp; + DEVICE* dev; /* backlink to device */ + UNIT* unit; /* backlink to unit */ + t_stat (*reset)(struct i8253* chip); + t_stat (*ckmode)(struct i8253* chip, uint32 value); + I8253CNTR cntr[3]; + int init; } I8253; -#define I8253_SCMASK 0xc0 -#define I8253_SC0 0x00 -#define I8253_SC1 0x40 -#define I8253_SC2 0x80 -#define I8253_RLMASK 0x30 -#define I8253_LATCH 0x00 -#define I8253_LSB 0x10 -#define I8253_MSB 0x20 -#define I8253_BOTH 0x30 -#define I8253_MODEMASK 0xe0 -#define I8253_MODE0 0x00 -#define I8253_MODE1 0x02 -#define I8253_MODE2 0x04 -#define I8253_MODE2a 0x0c -#define I8253_MODE3 0x06 -#define I8253_MODE3a 0x0e -#define I8253_MODE4 0x08 -#define I8253_MODE5 0x0a -#define I8253_MODEBIN 0x00 -#define I8253_MODEBCD 0x01 +#define I8253_SCMASK 0xc0 +#define I8253_SC0 0x00 +#define I8253_SC1 0x40 +#define I8253_SC2 0x80 +#define I8253_RLMASK 0x30 +#define I8253_LATCH 0x00 +#define I8253_LSB 0x10 +#define I8253_MSB 0x20 +#define I8253_BOTH 0x30 +#define I8253_MODEMASK 0xe0 +#define I8253_MODE0 0x00 +#define I8253_MODE1 0x02 +#define I8253_MODE2 0x04 +#define I8253_MODE2a 0x0c +#define I8253_MODE3 0x06 +#define I8253_MODE3a 0x0e +#define I8253_MODE4 0x08 +#define I8253_MODE5 0x0a +#define I8253_MODEBIN 0x00 +#define I8253_MODEBCD 0x01 -#define I8253_ST_LSBNEXT 0x01 -#define I8253_ST_MSBNEXT 0x02 -#define I8253_ST_LATCH 0x08 +#define I8253_ST_LSBNEXT 0x01 +#define I8253_ST_MSBNEXT 0x02 +#define I8253_ST_LATCH 0x08 /* default handlers */ extern t_stat i8253_io(IOHANDLER* ioh,uint32* value,uint32 rw,uint32 mask); @@ -311,20 +311,20 @@ typedef struct { } I8272_DRIVE_INFO; typedef enum i8272state { - S_CMD=1, S_CMDREAD, S_EXEC, S_DATAWRITE, S_SECWRITE, S_SECREAD, S_DATAREAD, S_RESULT + S_CMD=1, S_CMDREAD, S_EXEC, S_DATAWRITE, S_SECWRITE, S_SECREAD, S_DATAREAD, S_RESULT } I8272_STATE; typedef struct i8272 { - PNP_INFO pnp; /* Plug-n-Play Information */ - DEVICE* dev; /* backlink to device */ - t_stat (*write)(struct i8272* chip,int port,uint32 data); - t_stat (*read)(struct i8272* chip,int port,uint32* data); - t_stat (*reset)(struct i8272* chip); - void (*seldrv)(struct i8272* chip,int seldrv); - void (*irq)(struct i8272* chip,int delay); - - I8272_STATE fdc_state; /* internal state machine */ - uint32 fdc_dma_addr;/* DMA Transfer Address */ + PNP_INFO pnp; /* Plug-n-Play Information */ + DEVICE* dev; /* backlink to device */ + t_stat (*write)(struct i8272* chip,int port,uint32 data); + t_stat (*read)(struct i8272* chip,int port,uint32* data); + t_stat (*reset)(struct i8272* chip); + void (*seldrv)(struct i8272* chip,int seldrv); + void (*irq)(struct i8272* chip,int delay); + + I8272_STATE fdc_state; /* internal state machine */ + uint32 fdc_dma_addr;/* DMA Transfer Address */ uint8 fdc_msr; /* 8272 Main Status Register */ uint8 fdc_nd; /* Non-DMA Mode 1=Non-DMA, 0=DMA */ uint8 fdc_head; /* H Head Number */ @@ -340,9 +340,9 @@ typedef struct i8272 { uint8 fdc_seek_end; /* Seek was executed successfully */ int fdc_secsz; /* N Sector Length in bytes: 2^(7 + fdc_sec_len), fdc_sec_len <= I8272_MAX_N */ int fdc_nd_cnt; /* read/write count in non-DMA mode, -1 if start read */ - uint8 fdc_sdata[I8272_MAX_SECTOR_SZ]; /* sector buffer */ - uint8 fdc_fault; /* error code passed from some commands to sense_int */ - + uint8 fdc_sdata[I8272_MAX_SECTOR_SZ]; /* sector buffer */ + uint8 fdc_fault; /* error code passed from some commands to sense_int */ + uint8 cmd_cnt; /* command read count */ uint8 cmd[10]; /* Storage for current command */ uint8 cmd_len; /* FDC Command Length */ @@ -397,22 +397,22 @@ extern DEVICE* i8272_dev; * 8255 PARPORT *****************************************************************************************/ typedef struct i8255 { - PNP_INFO pnp; - DEVICE* dev; /* backlink to device */ - t_stat (*write)(struct i8255* chip,int port,uint32 data); - t_stat (*read)(struct i8255* chip,int port,uint32* data); - t_stat (*reset)(struct i8255* chip); - t_stat (*calla)(struct i8255* chip,int rw); - t_stat (*callb)(struct i8255* chip,int rw); - t_stat (*callc)(struct i8255* chip,int rw); - t_stat (*ckmode)(struct i8255* chip,uint32 data); - uint32 porta; - uint32 last_porta; /* for edge detection */ - uint32 portb; - uint32 last_portb; /* for edge detection */ - uint32 portc; - uint32 last_portc; /* for edge detection */ - uint32 ctrl; + PNP_INFO pnp; + DEVICE* dev; /* backlink to device */ + t_stat (*write)(struct i8255* chip,int port,uint32 data); + t_stat (*read)(struct i8255* chip,int port,uint32* data); + t_stat (*reset)(struct i8255* chip); + t_stat (*calla)(struct i8255* chip,int rw); + t_stat (*callb)(struct i8255* chip,int rw); + t_stat (*callc)(struct i8255* chip,int rw); + t_stat (*ckmode)(struct i8255* chip,uint32 data); + uint32 porta; + uint32 last_porta; /* for edge detection */ + uint32 portb; + uint32 last_portb; /* for edge detection */ + uint32 portc; + uint32 last_portc; /* for edge detection */ + uint32 ctrl; } I8255; extern t_stat i8255_io(IOHANDLER* ioh,uint32* value,uint32 rw,uint32 mask); extern t_stat i8255_read(I8255* chip,int port,uint32* data); diff --git a/SAGE/i8251.c b/SAGE/i8251.c index e36e292c..2ac3e8a4 100644 --- a/SAGE/i8251.c +++ b/SAGE/i8251.c @@ -34,112 +34,112 @@ static int i8251_bitmask[] = { 0x1f, 0x3f, 0x7f, 0xff }; /* Debug Flags */ DEBTAB i8251_dt[] = { - { "READ", DBG_UART_RD }, - { "WRITE", DBG_UART_WR }, - { "IRQ", DBG_UART_IRQ }, - { NULL, 0 } + { "READ", DBG_UART_RD }, + { "WRITE", DBG_UART_WR }, + { "IRQ", DBG_UART_IRQ }, + { NULL, 0 } }; t_stat i8251_io(IOHANDLER* ioh,uint32* value,uint32 rw,uint32 mask) { - int port = ioh->offset; - I8251* chip = (I8251*)ioh->ctxt; - if (rw==MEM_WRITE) { - return chip->write ? chip->write(chip,port,*value) : i8251_write(chip,port,*value); - } else { - return chip->read ? chip->read(chip,port,value) : i8251_read(chip,port,value); - } + int port = ioh->offset; + I8251* chip = (I8251*)ioh->ctxt; + if (rw==MEM_WRITE) { + return chip->write ? chip->write(chip,port,*value) : i8251_write(chip,port,*value); + } else { + return chip->read ? chip->read(chip,port,value) : i8251_read(chip,port,value); + } } t_stat i8251_write(I8251* chip,int port,uint32 value) { - int bits; + int bits; - if (port==0) { /* data port */ - chip->obuf = value & chip->bitmask; - TRACE_PRINT1(DBG_UART_WR,"WR DATA = 0x%02x",chip->obuf); - if (chip->init==3) { /* is fully initialized */ - if ((chip->mode & I8251_MODE_BAUD)==I8251_MODE_SYNC) { - sim_printf("i8251: sync mode not implemented\n"); - return STOP_IMPL; - } - if (chip->cmd & I8251_CMD_TXEN) { - /* transmit data */ - chip->status &= ~(I8251_ST_TXEMPTY|I8251_ST_TXRDY); - sim_activate(chip->out,chip->out->wait); - } - } - return SCPE_OK; - } else { /* control port */ - switch (chip->init) { - case 0: /* expect mode word */ - chip->mode = value; - TRACE_PRINT1(DBG_UART_WR,"WR MODE = 0x%02x",value); - chip->init = (value & I8251_MODE_BAUD)==I8251_MODE_SYNC ? 1 : 3; - bits = (chip->mode & I8251_AMODE_BITS) >> 2; - chip->bitmask = i8251_bitmask[bits]; - break; - case 1: /* expect sync1 */ - chip->sync1 = value; - TRACE_PRINT1(DBG_UART_WR,"WR SYNC1 = 0x%02x",value); - chip->init = 2; - break; - case 2: /* expect sync2 */ - chip->sync2 = value; - TRACE_PRINT1(DBG_UART_WR,"WR SYNC2 = 0x%02x",value); - chip->init = 3; - break; - case 3: /* expect cmd word */ - chip->cmd = value; - TRACE_PRINT1(DBG_UART_WR,"WR CMD = 0x%02x",value); - if (value & I8251_CMD_EH) { - sim_printf("i8251: hunt mode not implemented\n"); - return STOP_IMPL; - } - if (value & I8251_CMD_IR) - chip->init = 0; - if (value & I8251_CMD_ER) - chip->status &= ~(I8251_ST_FE|I8251_ST_OE|I8251_ST_PE); - if (value & I8251_CMD_SBRK) - sim_printf("i8251: BREAK sent\n"); - if (value & I8251_CMD_RXE) { - sim_activate(chip->in,chip->in->wait); - } else { - if (!chip->oob) sim_cancel(chip->in); - } - if (value & I8251_CMD_TXEN) { - if (!(chip->status & I8251_ST_TXEMPTY)) - sim_activate(chip->out,chip->out->wait); - else { - chip->status |= I8251_ST_TXRDY; - if (chip->txint) chip->txint(chip); - } - } else { - chip->status &= ~I8251_ST_TXRDY; - sim_cancel(chip->out); - } - } - return SCPE_OK; - } + if (port==0) { /* data port */ + chip->obuf = value & chip->bitmask; + TRACE_PRINT1(DBG_UART_WR,"WR DATA = 0x%02x",chip->obuf); + if (chip->init==3) { /* is fully initialized */ + if ((chip->mode & I8251_MODE_BAUD)==I8251_MODE_SYNC) { + sim_printf("i8251: sync mode not implemented\n"); + return STOP_IMPL; + } + if (chip->cmd & I8251_CMD_TXEN) { + /* transmit data */ + chip->status &= ~(I8251_ST_TXEMPTY|I8251_ST_TXRDY); + sim_activate(chip->out,chip->out->wait); + } + } + return SCPE_OK; + } else { /* control port */ + switch (chip->init) { + case 0: /* expect mode word */ + chip->mode = value; + TRACE_PRINT1(DBG_UART_WR,"WR MODE = 0x%02x",value); + chip->init = (value & I8251_MODE_BAUD)==I8251_MODE_SYNC ? 1 : 3; + bits = (chip->mode & I8251_AMODE_BITS) >> 2; + chip->bitmask = i8251_bitmask[bits]; + break; + case 1: /* expect sync1 */ + chip->sync1 = value; + TRACE_PRINT1(DBG_UART_WR,"WR SYNC1 = 0x%02x",value); + chip->init = 2; + break; + case 2: /* expect sync2 */ + chip->sync2 = value; + TRACE_PRINT1(DBG_UART_WR,"WR SYNC2 = 0x%02x",value); + chip->init = 3; + break; + case 3: /* expect cmd word */ + chip->cmd = value; + TRACE_PRINT1(DBG_UART_WR,"WR CMD = 0x%02x",value); + if (value & I8251_CMD_EH) { + sim_printf("i8251: hunt mode not implemented\n"); + return STOP_IMPL; + } + if (value & I8251_CMD_IR) + chip->init = 0; + if (value & I8251_CMD_ER) + chip->status &= ~(I8251_ST_FE|I8251_ST_OE|I8251_ST_PE); + if (value & I8251_CMD_SBRK) + sim_printf("i8251: BREAK sent\n"); + if (value & I8251_CMD_RXE) { + sim_activate(chip->in,chip->in->wait); + } else { + if (!chip->oob) sim_cancel(chip->in); + } + if (value & I8251_CMD_TXEN) { + if (!(chip->status & I8251_ST_TXEMPTY)) + sim_activate(chip->out,chip->out->wait); + else { + chip->status |= I8251_ST_TXRDY; + if (chip->txint) chip->txint(chip); + } + } else { + chip->status &= ~I8251_ST_TXRDY; + sim_cancel(chip->out); + } + } + return SCPE_OK; + } } t_stat i8251_read(I8251* chip,int port,uint32* value) { - if (port==0) { /* data read */ - *value = chip->ibuf; - chip->status &= ~I8251_ST_RXRDY; /* mark read buffer as empty */ - TRACE_PRINT1(DBG_UART_RD,"RD DATA = 0x%02x",*value); - } else { /* status read */ - *value = chip->status & 0xff; - TRACE_PRINT1(DBG_UART_RD,"RD STATUS = 0x%02x",*value); - } - return SCPE_OK; + if (port==0) { /* data read */ + *value = chip->ibuf; + chip->status &= ~I8251_ST_RXRDY; /* mark read buffer as empty */ + TRACE_PRINT1(DBG_UART_RD,"RD DATA = 0x%02x",*value); + } else { /* status read */ + *value = chip->status & 0xff; + TRACE_PRINT1(DBG_UART_RD,"RD STATUS = 0x%02x",*value); + } + return SCPE_OK; } t_stat i8251_reset(I8251* chip) { - chip->init = 0; - chip->oob = FALSE; - chip->crlf = 0; - return SCPE_OK; + chip->init = 0; + chip->oob = FALSE; + chip->crlf = 0; + return SCPE_OK; } diff --git a/SAGE/i8253.c b/SAGE/i8253.c index 543616c4..10070e78 100644 --- a/SAGE/i8253.c +++ b/SAGE/i8253.c @@ -41,103 +41,103 @@ static char* rltype[] = { "latch","8bitL","8bitH", "16bit" }; t_stat i8253_write(I8253* chip, int addr, uint32 value) { - I8253CNTR* cntr; - t_stat rc; - int num; - - if (addr==3) { /* mode reg */ - TRACE_PRINT(DBG_TMR_WR,(sim_deb,"WR MODE=%x (SC=%d RL=%s MODE=%d BCD=%d)", - value,(value>>6)&3,rltype[(value>>4)&3],(value>>1)&7,value&1)); - if (chip->ckmode && (rc=chip->ckmode(chip,value))!= SCPE_OK) return rc; - num = (value & I8253_SCMASK)>>6; - cntr = &chip->cntr[num]; - if ((value & I8253_RLMASK)==I8253_LATCH) { - /* calculate current value of count */ - cntr->latch = cntr->count; /* latch it */ - cntr->state |= I8253_ST_LATCH; - } else { - cntr->mode = value; - cntr->state = (value & I8253_RLMASK)==I8253_MSB ? I8253_ST_MSBNEXT : I8253_ST_LSBNEXT; - } - } else { /* write dividers */ - cntr = &chip->cntr[addr]; - switch (cntr->mode & I8253_RLMASK) { - case I8253_MSB: - TRACE_PRINT2(DBG_TMR_WR,"WR CNT=%d DIVMSB=%x",addr,value); - cntr->divider = (cntr->divider & 0x00ff) | ((value<<8) | 0xff); - cntr->state &= ~I8253_ST_LATCH; - cntr->count = cntr->divider; - break; - case I8253_LSB: - TRACE_PRINT2(DBG_TMR_WR,"WR CNT=%d DIVLSB=%x",addr,value); - cntr->divider = (cntr->divider & 0xff00) | (value | 0xff); - cntr->state &= ~I8253_ST_LATCH; - cntr->count = cntr->divider; - break; - case I8253_BOTH: - if (cntr->state & I8253_ST_MSBNEXT) { - TRACE_PRINT2(DBG_TMR_WR,"WR CNT=%d DIV16MSB=%x",addr,value); - cntr->divider = (cntr->divider & 0x00ff) | ((value & 0xff)<<8); - cntr->state = I8253_ST_LSBNEXT; /* reset latch mode and MSB bit */ - cntr->count = cntr->divider; - } else { - TRACE_PRINT2(DBG_TMR_WR,"WR CNT=%d DIV16LSB=%x",addr,value); - cntr->divider = (cntr->divider & 0xff00) | (value & 0xff); - cntr->state = I8253_ST_MSBNEXT; /* reset latch mode and LSB bit */ - } - default: - break; - } - /* execute a registered callback before returning result */ - if (cntr->call && (rc=(*cntr->call)(chip,1,&value)) != SCPE_OK) return rc; - } - return SCPE_OK; + I8253CNTR* cntr; + t_stat rc; + int num; + + if (addr==3) { /* mode reg */ + TRACE_PRINT(DBG_TMR_WR,(sim_deb,"WR MODE=%x (SC=%d RL=%s MODE=%d BCD=%d)", + value,(value>>6)&3,rltype[(value>>4)&3],(value>>1)&7,value&1)); + if (chip->ckmode && (rc=chip->ckmode(chip,value))!= SCPE_OK) return rc; + num = (value & I8253_SCMASK)>>6; + cntr = &chip->cntr[num]; + if ((value & I8253_RLMASK)==I8253_LATCH) { + /* calculate current value of count */ + cntr->latch = cntr->count; /* latch it */ + cntr->state |= I8253_ST_LATCH; + } else { + cntr->mode = value; + cntr->state = (value & I8253_RLMASK)==I8253_MSB ? I8253_ST_MSBNEXT : I8253_ST_LSBNEXT; + } + } else { /* write dividers */ + cntr = &chip->cntr[addr]; + switch (cntr->mode & I8253_RLMASK) { + case I8253_MSB: + TRACE_PRINT2(DBG_TMR_WR,"WR CNT=%d DIVMSB=%x",addr,value); + cntr->divider = (cntr->divider & 0x00ff) | ((value<<8) | 0xff); + cntr->state &= ~I8253_ST_LATCH; + cntr->count = cntr->divider; + break; + case I8253_LSB: + TRACE_PRINT2(DBG_TMR_WR,"WR CNT=%d DIVLSB=%x",addr,value); + cntr->divider = (cntr->divider & 0xff00) | (value | 0xff); + cntr->state &= ~I8253_ST_LATCH; + cntr->count = cntr->divider; + break; + case I8253_BOTH: + if (cntr->state & I8253_ST_MSBNEXT) { + TRACE_PRINT2(DBG_TMR_WR,"WR CNT=%d DIV16MSB=%x",addr,value); + cntr->divider = (cntr->divider & 0x00ff) | ((value & 0xff)<<8); + cntr->state = I8253_ST_LSBNEXT; /* reset latch mode and MSB bit */ + cntr->count = cntr->divider; + } else { + TRACE_PRINT2(DBG_TMR_WR,"WR CNT=%d DIV16LSB=%x",addr,value); + cntr->divider = (cntr->divider & 0xff00) | (value & 0xff); + cntr->state = I8253_ST_MSBNEXT; /* reset latch mode and LSB bit */ + } + default: + break; + } + /* execute a registered callback before returning result */ + if (cntr->call && (rc=(*cntr->call)(chip,1,&value)) != SCPE_OK) return rc; + } + return SCPE_OK; } t_stat i8253_read(I8253* chip,int addr,uint32* value) { - t_stat rc; - I8253CNTR* cntr = &chip->cntr[addr]; - int32 src = cntr->state & I8253_ST_LATCH ? cntr->latch : cntr->count; - if (cntr->call && (rc=(*cntr->call)(chip,0,(uint32*)&src)) != SCPE_OK) return rc; + t_stat rc; + I8253CNTR* cntr = &chip->cntr[addr]; + int32 src = cntr->state & I8253_ST_LATCH ? cntr->latch : cntr->count; + if (cntr->call && (rc=(*cntr->call)(chip,0,(uint32*)&src)) != SCPE_OK) return rc; - switch (cntr->mode & I8253_RLMASK) { - case I8253_MSB: - src >>= 8; - TRACE_PRINT2(DBG_TMR_RD,"RD CNT=%d CNTMSB=%x",addr,src&0xff); - cntr->state &= ~I8253_ST_LATCH; - break; - case I8253_LSB: - cntr->state &= ~I8253_ST_LATCH; - TRACE_PRINT2(DBG_TMR_RD,"RD CNT=%d CNTLSB=%x",addr,src&0xff); - break; - case I8253_BOTH: - if (cntr->state & I8253_ST_MSBNEXT) { - src >>= 8; cntr->state = I8253_ST_LSBNEXT; /* reset latch mode and MSB bit */ - TRACE_PRINT2(DBG_TMR_RD,"RD CNT=%d CNT16MSB=%x",addr,src&0xff); - } else { - TRACE_PRINT2(DBG_TMR_RD,"RD CNT=%d CNT16LSB=%x",addr,src&0xff); - cntr->state |= I8253_ST_MSBNEXT; /* does not reset latch mode if set */ - } - break; - default: - return SCPE_OK; - } - *value = src & 0xff; - return SCPE_OK; + switch (cntr->mode & I8253_RLMASK) { + case I8253_MSB: + src >>= 8; + TRACE_PRINT2(DBG_TMR_RD,"RD CNT=%d CNTMSB=%x",addr,src&0xff); + cntr->state &= ~I8253_ST_LATCH; + break; + case I8253_LSB: + cntr->state &= ~I8253_ST_LATCH; + TRACE_PRINT2(DBG_TMR_RD,"RD CNT=%d CNTLSB=%x",addr,src&0xff); + break; + case I8253_BOTH: + if (cntr->state & I8253_ST_MSBNEXT) { + src >>= 8; cntr->state = I8253_ST_LSBNEXT; /* reset latch mode and MSB bit */ + TRACE_PRINT2(DBG_TMR_RD,"RD CNT=%d CNT16MSB=%x",addr,src&0xff); + } else { + TRACE_PRINT2(DBG_TMR_RD,"RD CNT=%d CNT16LSB=%x",addr,src&0xff); + cntr->state |= I8253_ST_MSBNEXT; /* does not reset latch mode if set */ + } + break; + default: + return SCPE_OK; + } + *value = src & 0xff; + return SCPE_OK; } t_stat i8253_reset(I8253* chip) { - int i; - for (i=0; i<3; i++) chip->cntr[i].state = 0; - return SCPE_OK; + int i; + for (i=0; i<3; i++) chip->cntr[i].state = 0; + return SCPE_OK; } t_stat i8253_io(IOHANDLER* ioh,uint32* value,uint32 rw,uint32 mask) { - int port = ioh->offset; - I8253* chip = (I8253*)ioh->ctxt; - return rw==MEM_WRITE ? i8253_write(chip,port,*value) : i8253_read(chip,port,value); + int port = ioh->offset; + I8253* chip = (I8253*)ioh->ctxt; + return rw==MEM_WRITE ? i8253_write(chip,port,*value) : i8253_read(chip,port,value); } diff --git a/SAGE/i8255.c b/SAGE/i8255.c index c6ff3181..19a1836e 100644 --- a/SAGE/i8255.c +++ b/SAGE/i8255.c @@ -32,75 +32,75 @@ static t_stat i8255_error(const char* err) { - sim_printf("I8255: Missing method '%s'\n",err); - return STOP_IMPL; + sim_printf("I8255: Missing method '%s'\n",err); + return STOP_IMPL; } t_stat i8255_io(IOHANDLER* ioh,uint32* value,uint32 rw,uint32 mask) { - int port = ioh->offset; - I8255* chip = (I8255*)ioh->ctxt; - if (rw==MEM_WRITE) { - return chip->write ? chip->write(chip,port,*value) : i8255_error("write"); - } else { - return chip->read ? chip->read(chip,port,value) : i8255_error("read"); - } + int port = ioh->offset; + I8255* chip = (I8255*)ioh->ctxt; + if (rw==MEM_WRITE) { + return chip->write ? chip->write(chip,port,*value) : i8255_error("write"); + } else { + return chip->read ? chip->read(chip,port,value) : i8255_error("read"); + } } t_stat i8255_read(I8255* chip,int port,uint32* data) { - t_stat rc; - switch (port) { - case 0: - if (chip->calla && (rc=(*chip->calla)(chip,0)) != SCPE_OK) return rc; - *data = chip->porta; - return SCPE_OK; - case 1: - if (chip->callb && (rc=(*chip->callb)(chip,0)) != SCPE_OK) return rc; - *data = chip->portb; - return SCPE_OK; - case 2: - if (chip->callc && (rc=(*chip->callc)(chip,0)) != SCPE_OK) return rc; - *data = chip->portc; - return SCPE_OK; - case 3: - *data = 0xff; /* undefined */ - return SCPE_OK; - default: - return SCPE_IERR; - } + t_stat rc; + switch (port) { + case 0: + if (chip->calla && (rc=(*chip->calla)(chip,0)) != SCPE_OK) return rc; + *data = chip->porta; + return SCPE_OK; + case 1: + if (chip->callb && (rc=(*chip->callb)(chip,0)) != SCPE_OK) return rc; + *data = chip->portb; + return SCPE_OK; + case 2: + if (chip->callc && (rc=(*chip->callc)(chip,0)) != SCPE_OK) return rc; + *data = chip->portc; + return SCPE_OK; + case 3: + *data = 0xff; /* undefined */ + return SCPE_OK; + default: + return SCPE_IERR; + } } t_stat i8255_write(I8255* chip,int port,uint32 data) { - t_stat rc; - uint32 bit; - switch(port) { - case 0: /*port a*/ - chip->last_porta = chip->porta; - chip->porta = data; - return chip->calla ? (*chip->calla)(chip,1) : SCPE_OK; - case 1: /*port b*/ - chip->last_portb = chip->portb; - return chip->callb ? (*chip->callb)(chip,1) : SCPE_OK; - case 2: - chip->last_portc = chip->portc; - chip->portc = data & 0xff; - return chip->callc ? (*chip->callc)(chip,1) : SCPE_OK; - case 3: - if (data & 0x80) { /* mode set mode */ - if (chip->ckmode && (rc=chip->ckmode(chip,data))) return rc; - chip->ctrl = data & 0x7f; - return SCPE_OK; - } else { /* bit set mode */ - chip->last_portc = chip->portc; - bit = 1 << ((data & 0x0e)>>1); - TRACE_PRINT2(DBG_PP_WRC,"WR PORTC %s bit=%x",data&1 ? "SET": "CLR",bit); - if (data & 1) chip->portc |= bit; else chip->portc &= ~bit; - chip->portc &= 0xff; - return chip->callc ? (*chip->callc)(chip,1) : SCPE_OK; - } - default: - return SCPE_IERR; - } + t_stat rc; + uint32 bit; + switch(port) { + case 0: /*port a*/ + chip->last_porta = chip->porta; + chip->porta = data; + return chip->calla ? (*chip->calla)(chip,1) : SCPE_OK; + case 1: /*port b*/ + chip->last_portb = chip->portb; + return chip->callb ? (*chip->callb)(chip,1) : SCPE_OK; + case 2: + chip->last_portc = chip->portc; + chip->portc = data & 0xff; + return chip->callc ? (*chip->callc)(chip,1) : SCPE_OK; + case 3: + if (data & 0x80) { /* mode set mode */ + if (chip->ckmode && (rc=chip->ckmode(chip,data))) return rc; + chip->ctrl = data & 0x7f; + return SCPE_OK; + } else { /* bit set mode */ + chip->last_portc = chip->portc; + bit = 1 << ((data & 0x0e)>>1); + TRACE_PRINT2(DBG_PP_WRC,"WR PORTC %s bit=%x",data&1 ? "SET": "CLR",bit); + if (data & 1) chip->portc |= bit; else chip->portc &= ~bit; + chip->portc &= 0xff; + return chip->callc ? (*chip->callc)(chip,1) : SCPE_OK; + } + default: + return SCPE_IERR; + } } diff --git a/SAGE/i8259.c b/SAGE/i8259.c index 3e0a3cad..c6c807dc 100644 --- a/SAGE/i8259.c +++ b/SAGE/i8259.c @@ -44,201 +44,201 @@ static int32 priomask[] = { 0x0000,0x4000,0x6000,0x7000,0x7800,0x7c00,0x7e00,0x7 t_stat i8259_io(IOHANDLER* ioh,uint32* value,uint32 rw,uint32 mask) { - int port = ioh->offset; - I8259* chip = (I8259*)ioh->ctxt; - if (rw==MEM_WRITE) { - return chip->write ? chip->write(chip,port,*value) : i8259_write(chip,port,*value); - } else { - return chip->read ? chip->read(chip,port,value) : i8259_read(chip,port,value); - } + int port = ioh->offset; + I8259* chip = (I8259*)ioh->ctxt; + if (rw==MEM_WRITE) { + return chip->write ? chip->write(chip,port,*value) : i8259_write(chip,port,*value); + } else { + return chip->read ? chip->read(chip,port,value) : i8259_read(chip,port,value); + } } t_stat i8259_write(I8259* chip,int addr,uint32 value) { - int i, bit; + int i, bit; #if 0 - TRACE_PRINT2(DBG_PIC_WR,"WR addr=%d data=0x%x",addr,value); + TRACE_PRINT2(DBG_PIC_WR,"WR addr=%d data=0x%x",addr,value); #endif - if (addr==1) { - switch (chip->state) { - default: - case 0: /* after reset */ - sim_printf("PIC: write addr=1 without initialization\n"); - return SCPE_IOERR; - case 1: /* expect ICW2 */ - TRACE_PRINT2(DBG_PIC_WR,"WR ICW2: addr=%d data=0x%x",addr,value); - chip->icw2 = value; - if (chip->icw1 & I8259_ICW1_SNGL) { - chip->state = (chip->icw1 & I8259_ICW1_IC4) ? 4 : 5; - } else { - /* attempt to program cascade mode */ - sim_printf("PIC: attempt to program chip for cascade mode - not wired for this!\n"); - chip->state = 0; - return SCPE_IOERR; - } - break; - case 4: /* expect ICW4 */ - TRACE_PRINT2(DBG_PIC_WR,"WR ICW4 addr=%d data=0x%x",addr,value); - chip->icw4 = value; - if (chip->icw4 & I8259_ICW4_AEOI) { - sim_printf("PIC: attempt to program chip for AEOI mode - not wired for this!\n"); - return SCPE_IOERR; - } - if (chip->icw4 & I8259_ICW4_BUF) { - sim_printf("PIC: attempt to program chip for buffered mode - not wired for this!\n"); - return SCPE_IOERR; - } - if (chip->icw4 & I8259_ICW4_SFNM) { - sim_printf("PIC: attempt to program chip for spc nested mode - not wired for this!\n"); - return SCPE_IOERR; - } - chip->state = 5; - break; - case 5: /* ready to accept interrupt requests and ocw commands */ - /* ocw1 */ - TRACE_PRINT2(DBG_PIC_WR,"WR IMR addr=%d data=0x%x",addr,value); - chip->imr = value; - break; - } - } else { - if (value & I8259_ICW1) { /* state initialization sequence */ - TRACE_PRINT2(DBG_PIC_WR,"WR ICW1 addr=%d data=0x%x",addr,value); - chip->icw1 = value; - chip->state = 1; - chip->rmode = 0; - chip->prio = 7; - if ((chip->icw1 & I8259_ICW1_IC4)==0) chip->icw4 = 0; - - return SCPE_OK; - } else { /* ocw2 and ocw3 */ - if (value & I8259_OCW3) { /* ocw3 */ - TRACE_PRINT2(DBG_PIC_WR,"WR OCW3 addr=%d data=0x%x",addr,value); - if (value & I8259_OCW3_ESMM) { - sim_printf("PIC: ESMM not yet supported\n"); - return STOP_IMPL; - } - if (value & I8259_OCW3_POLL) { - chip->rmode |= 2; - return SCPE_OK; - } - if (value & I8259_OCW3_RR) - chip->rmode = (value & I8259_OCW3_RIS) ? 1 /*isr*/ : 0; /* irr */ - } else { /* ocw2 */ - TRACE_PRINT2(DBG_PIC_WR,"WR OCW2 addr=%d data=0x%x",addr,value); - switch (value & I8259_OCW2_MODE) { - case 0xa0: /* rotate on nospecific eoi */ - case 0x20: /* nonspecific eoi */ - bit = 1 << (7 - chip->prio); - for (i=0; i<7; i++) { - if (chip->isr & bit) break; - bit = bit << 1; if (bit==0x100) bit = 1; - } - chip->isr &= ~bit; break; - if ((value & I8259_OCW2_MODE) == 0xa0) { - chip->prio = 7 - i + chip->prio; if (chip->prio>7) chip->prio -= 8; - } - break; - case 0xe0: /* rotate on specific eoi */ - chip->prio = 7 - (value & 7) + chip->prio; if (chip->prio>7) chip->prio -= 8; - /*fallthru*/ - case 0x60: /* specific eoi */ - bit = 1 << (value & 7); - chip->isr = chip->isr & ~bit & 0xff; - break; - case 0x80: /* rotate in autoeoi (set) */ - case 0x00: /* rotate in autoeoi (clear) */ - sim_printf("PIC: AEOI not supported\n"); - return SCPE_IOERR; - case 0xc0: /* set prio */ - chip->prio = value & 7; - return SCPE_OK; - case 0x40: /* nop */ - break; - default: - return SCPE_IERR; - } - } - } - } - return SCPE_OK; + if (addr==1) { + switch (chip->state) { + default: + case 0: /* after reset */ + sim_printf("PIC: write addr=1 without initialization\n"); + return SCPE_IOERR; + case 1: /* expect ICW2 */ + TRACE_PRINT2(DBG_PIC_WR,"WR ICW2: addr=%d data=0x%x",addr,value); + chip->icw2 = value; + if (chip->icw1 & I8259_ICW1_SNGL) { + chip->state = (chip->icw1 & I8259_ICW1_IC4) ? 4 : 5; + } else { + /* attempt to program cascade mode */ + sim_printf("PIC: attempt to program chip for cascade mode - not wired for this!\n"); + chip->state = 0; + return SCPE_IOERR; + } + break; + case 4: /* expect ICW4 */ + TRACE_PRINT2(DBG_PIC_WR,"WR ICW4 addr=%d data=0x%x",addr,value); + chip->icw4 = value; + if (chip->icw4 & I8259_ICW4_AEOI) { + sim_printf("PIC: attempt to program chip for AEOI mode - not wired for this!\n"); + return SCPE_IOERR; + } + if (chip->icw4 & I8259_ICW4_BUF) { + sim_printf("PIC: attempt to program chip for buffered mode - not wired for this!\n"); + return SCPE_IOERR; + } + if (chip->icw4 & I8259_ICW4_SFNM) { + sim_printf("PIC: attempt to program chip for spc nested mode - not wired for this!\n"); + return SCPE_IOERR; + } + chip->state = 5; + break; + case 5: /* ready to accept interrupt requests and ocw commands */ + /* ocw1 */ + TRACE_PRINT2(DBG_PIC_WR,"WR IMR addr=%d data=0x%x",addr,value); + chip->imr = value; + break; + } + } else { + if (value & I8259_ICW1) { /* state initialization sequence */ + TRACE_PRINT2(DBG_PIC_WR,"WR ICW1 addr=%d data=0x%x",addr,value); + chip->icw1 = value; + chip->state = 1; + chip->rmode = 0; + chip->prio = 7; + if ((chip->icw1 & I8259_ICW1_IC4)==0) chip->icw4 = 0; + + return SCPE_OK; + } else { /* ocw2 and ocw3 */ + if (value & I8259_OCW3) { /* ocw3 */ + TRACE_PRINT2(DBG_PIC_WR,"WR OCW3 addr=%d data=0x%x",addr,value); + if (value & I8259_OCW3_ESMM) { + sim_printf("PIC: ESMM not yet supported\n"); + return STOP_IMPL; + } + if (value & I8259_OCW3_POLL) { + chip->rmode |= 2; + return SCPE_OK; + } + if (value & I8259_OCW3_RR) + chip->rmode = (value & I8259_OCW3_RIS) ? 1 /*isr*/ : 0; /* irr */ + } else { /* ocw2 */ + TRACE_PRINT2(DBG_PIC_WR,"WR OCW2 addr=%d data=0x%x",addr,value); + switch (value & I8259_OCW2_MODE) { + case 0xa0: /* rotate on nospecific eoi */ + case 0x20: /* nonspecific eoi */ + bit = 1 << (7 - chip->prio); + for (i=0; i<7; i++) { + if (chip->isr & bit) break; + bit = bit << 1; if (bit==0x100) bit = 1; + } + chip->isr &= ~bit; break; + if ((value & I8259_OCW2_MODE) == 0xa0) { + chip->prio = 7 - i + chip->prio; if (chip->prio>7) chip->prio -= 8; + } + break; + case 0xe0: /* rotate on specific eoi */ + chip->prio = 7 - (value & 7) + chip->prio; if (chip->prio>7) chip->prio -= 8; + /*fallthru*/ + case 0x60: /* specific eoi */ + bit = 1 << (value & 7); + chip->isr = chip->isr & ~bit & 0xff; + break; + case 0x80: /* rotate in autoeoi (set) */ + case 0x00: /* rotate in autoeoi (clear) */ + sim_printf("PIC: AEOI not supported\n"); + return SCPE_IOERR; + case 0xc0: /* set prio */ + chip->prio = value & 7; + return SCPE_OK; + case 0x40: /* nop */ + break; + default: + return SCPE_IERR; + } + } + } + } + return SCPE_OK; } t_stat i8259_read(I8259* chip,int addr, uint32* value) { - int i, bit, num; + int i, bit, num; - if (addr) { - *value = chip->imr; - } else { - switch (chip->rmode) { - case 0: - TRACE_PRINT2(DBG_PIC_RD,"Read IRR addr=%d data=0x%x",addr,chip->irr); - *value = chip->irr; break; - case 1: - TRACE_PRINT2(DBG_PIC_RD,"Read ISR addr=%d data=0x%x",addr,chip->irr); - *value = chip->isr; break; - case 2: - case 3: - TRACE_PRINT2(DBG_PIC_RD,"Read POLL addr=%d data=0x%x",addr,chip->irr); - num = chip->prio; - bit = 1 << chip->prio; - for (i=0; i<8; i++,num--) { - if (chip->isr & bit) { - *value = 0x80 | (num & 7); - TRACE_PRINT2(DBG_PIC_RD,"Read POLL addr=%d data=0x%x",addr,*value); - return SCPE_OK; - } - bit >>= 1; - if (bit==0) { bit = 0x80; num = 7; } - } - chip->rmode &= ~2; - } - } + if (addr) { + *value = chip->imr; + } else { + switch (chip->rmode) { + case 0: + TRACE_PRINT2(DBG_PIC_RD,"Read IRR addr=%d data=0x%x",addr,chip->irr); + *value = chip->irr; break; + case 1: + TRACE_PRINT2(DBG_PIC_RD,"Read ISR addr=%d data=0x%x",addr,chip->irr); + *value = chip->isr; break; + case 2: + case 3: + TRACE_PRINT2(DBG_PIC_RD,"Read POLL addr=%d data=0x%x",addr,chip->irr); + num = chip->prio; + bit = 1 << chip->prio; + for (i=0; i<8; i++,num--) { + if (chip->isr & bit) { + *value = 0x80 | (num & 7); + TRACE_PRINT2(DBG_PIC_RD,"Read POLL addr=%d data=0x%x",addr,*value); + return SCPE_OK; + } + bit >>= 1; + if (bit==0) { bit = 0x80; num = 7; } + } + chip->rmode &= ~2; + } + } #if 0 - TRACE_PRINT2(DBG_PIC_RD,"Read addr=%d data=0x%x",addr,*value); + TRACE_PRINT2(DBG_PIC_RD,"Read addr=%d data=0x%x",addr,*value); #endif - return SCPE_OK; + return SCPE_OK; } t_stat i8259_raiseint(I8259* chip,int level) { - int32 bit, isr, myprio; + int32 bit, isr, myprio; - TRACE_PRINT1(DBG_PIC_II,"Request INT level=%d",level); - - if (chip->state != 5) return SCPE_OK; /* not yet initialized, ignore interrupts */ - bit = 1<imr & bit) return SCPE_OK; /* inhibited */ - chip->isr = (chip->isr | bit) & 0xff; /* request this interrupt level */ - - /* bit7=prio7 => bitN = prioN - bit7=prio6 => bitN = prioN-1 - ... - bit7=prio0 => bitN = prioN-7 - */ - isr = (chip->isr<<8) | chip->isr; /* simple rotation */ - isr = isr << (7-level); /* shift level bit into bit 15 */ - myprio = chip->prio - 7 + level; if (myprio < 0) myprio += 8; - if (!(isr & priomask[myprio])) { /* higher interrupt is pending */ - if (chip->autoint) { - TRACE_PRINT1(DBG_PIC_IO,"Raise AUTOINT level=%d",chip->intlevel); - return m68k_raise_autoint(chip->intlevel); - } else { - TRACE_PRINT2(DBG_PIC_IO,"Raise VECTORINT level=%d vector=%x",chip->intlevel,chip->intvector); - return m68k_raise_vectorint(chip->intlevel,chip->intvector); - } - } - return SCPE_OK; + TRACE_PRINT1(DBG_PIC_II,"Request INT level=%d",level); + + if (chip->state != 5) return SCPE_OK; /* not yet initialized, ignore interrupts */ + bit = 1<imr & bit) return SCPE_OK; /* inhibited */ + chip->isr = (chip->isr | bit) & 0xff; /* request this interrupt level */ + + /* bit7=prio7 => bitN = prioN + bit7=prio6 => bitN = prioN-1 + ... + bit7=prio0 => bitN = prioN-7 + */ + isr = (chip->isr<<8) | chip->isr; /* simple rotation */ + isr = isr << (7-level); /* shift level bit into bit 15 */ + myprio = chip->prio - 7 + level; if (myprio < 0) myprio += 8; + if (!(isr & priomask[myprio])) { /* higher interrupt is pending */ + if (chip->autoint) { + TRACE_PRINT1(DBG_PIC_IO,"Raise AUTOINT level=%d",chip->intlevel); + return m68k_raise_autoint(chip->intlevel); + } else { + TRACE_PRINT2(DBG_PIC_IO,"Raise VECTORINT level=%d vector=%x",chip->intlevel,chip->intvector); + return m68k_raise_vectorint(chip->intlevel,chip->intvector); + } + } + return SCPE_OK; } t_stat i8259_reset(I8259* chip) { - chip->autoint = TRUE; - chip->intlevel = 1; - chip->intvector = 0; - chip->state = 0; - chip->rmode = 0; - chip->imr = 0; - return SCPE_OK; + chip->autoint = TRUE; + chip->intlevel = 1; + chip->intvector = 0; + chip->state = 0; + chip->rmode = 0; + chip->imr = 0; + return SCPE_OK; } diff --git a/SAGE/i8272.c b/SAGE/i8272.c index 0e0737e6..f67a9495 100644 --- a/SAGE/i8272.c +++ b/SAGE/i8272.c @@ -107,7 +107,7 @@ extern uint8 GetByteDMA(const uint32 Addr); #define I8272_READ_DELETED_DATA 0x0C #define I8272_FORMAT_TRACK 0x0D #define I8272_SEEK 0x0F -#define UPD765_VERSION 0x10 +#define UPD765_VERSION 0x10 #define I8272_SCAN_EQUAL 0x11 #define I8272_SCAN_LOW_EQUAL 0x19 #define I8272_SCAN_HIGH_EQUAL 0x1D @@ -148,8 +148,8 @@ DEBTAB i8272_dt[] = { }; static char* states[] = { - "invalid", "S_CMD", "S_CMDREAD", "S_EXEC", "S_DATAWRITE", "S_SECWRITE", - "S_SECREAD", "S_DATAREAD", "S_RESULT" + "invalid", "S_CMD", "S_CMDREAD", "S_EXEC", "S_DATAWRITE", "S_SECWRITE", + "S_SECREAD", "S_DATAREAD", "S_RESULT" }; static char* messages[] = { @@ -164,17 +164,17 @@ static char* messages[] = { }; static int8 cmdsizes[] = { - 1, 1, 9, 3, 2, 9, 9, 2, - 1, 9, 2, 1, 9, 6, 1, 3, - 1, 9, 1, 1, 1, 1, 1, 1, - 1, 9, 1, 1, 1, 9, 1, 1 + 1, 1, 9, 3, 2, 9, 9, 2, + 1, 9, 2, 1, 9, 6, 1, 3, + 1, 9, 1, 1, 1, 1, 1, 1, + 1, 9, 1, 1, 1, 9, 1, 1 }; static int8 resultsizes[] = { - 1, 1, 7, 0, 1, 7, 7, 0, - 2, 7, 7, 1, 7, 7, 1, 0, - 1, 7, 1, 1, 1, 1, 1, 1, - 1, 7, 1, 1, 1, 7, 1, 1 + 1, 1, 7, 0, 1, 7, 7, 0, + 2, 7, 7, 1, 7, 7, 1, 0, + 1, 7, 1, 1, 1, 1, 1, 1, + 1, 7, 1, 1, 1, 7, 1, 1 }; /* default routine to select the drive. @@ -183,7 +183,7 @@ static int8 resultsizes[] = { */ void i8272_seldrv(I8272* chip, int drvnum) { - chip->fdc_curdrv = drvnum & 0x03; + chip->fdc_curdrv = drvnum & 0x03; } /* @@ -298,21 +298,21 @@ t_stat i8272_setDMA(I8272* chip, uint32 dma_addr) t_stat i8272_io(IOHANDLER* ioh,uint32* value,uint32 rw,uint32 mask) { - int port = ioh->offset; - I8272* chip = (I8272*)ioh->ctxt; - if (rw==MEM_WRITE) - return chip->write ? chip->write(chip,port,*value) : i8272_write(chip,port,*value); - else - return chip->read ? chip->read(chip,port,value) : i8272_read(chip,port,value); + int port = ioh->offset; + I8272* chip = (I8272*)ioh->ctxt; + if (rw==MEM_WRITE) + return chip->write ? chip->write(chip,port,*value) : i8272_write(chip,port,*value); + else + return chip->read ? chip->read(chip,port,value) : i8272_read(chip,port,value); } t_stat i8272_reset(I8272* chip) { - NEXTSTATE(S_CMD); - chip->idcount = 0; - chip->fdc_fault = 0; + NEXTSTATE(S_CMD); + chip->idcount = 0; + chip->fdc_fault = 0; - return SCPE_OK; + return SCPE_OK; } static uint8 floorlog2(unsigned int n) @@ -329,13 +329,13 @@ static uint8 floorlog2(unsigned int n) static t_stat i8272_resultphase(I8272* chip,int delay) { - uint8 cmd = chip->cmd[0] & 0x1f; - chip->fdc_msr &= ~I8272_MSR_NON_DMA; - chip->result_len = resultsizes[cmd]; + uint8 cmd = chip->cmd[0] & 0x1f; + chip->fdc_msr &= ~I8272_MSR_NON_DMA; + chip->result_len = resultsizes[cmd]; chip->result_cnt = 0; - NEXTSTATE(S_RESULT); + NEXTSTATE(S_RESULT); if (delay) i8272_interrupt(chip,delay); - return SCPE_OK; + return SCPE_OK; } /* @@ -346,21 +346,21 @@ static t_stat i8272_resultphase(I8272* chip,int delay) */ t_stat i8272_finish(I8272* chip) { - switch (chip->fdc_state) { - case S_DATAREAD: - case S_DATAWRITE: - case S_SECREAD: - case S_SECWRITE: - case S_RESULT: - TRACE_PRINT0(DBG_FD_VERBOSE,"Finish I/O, returning result"); - chip->irqflag = 0; - chip->result[0] &= 0x3f; /* IC=normal termination */ - return i8272_resultphase(chip,0); - default: /* @TODO is this correct? */ - TRACE_PRINT0(DBG_FD_VERBOSE,"Finish I/O, reset to S_CMD state"); - NEXTSTATE(S_CMD); - return SCPE_OK; - } + switch (chip->fdc_state) { + case S_DATAREAD: + case S_DATAWRITE: + case S_SECREAD: + case S_SECWRITE: + case S_RESULT: + TRACE_PRINT0(DBG_FD_VERBOSE,"Finish I/O, returning result"); + chip->irqflag = 0; + chip->result[0] &= 0x3f; /* IC=normal termination */ + return i8272_resultphase(chip,0); + default: /* @TODO is this correct? */ + TRACE_PRINT0(DBG_FD_VERBOSE,"Finish I/O, reset to S_CMD state"); + NEXTSTATE(S_CMD); + return SCPE_OK; + } } /* this routine is called when RDY pin goes to zero, effectively @@ -368,58 +368,58 @@ t_stat i8272_finish(I8272* chip) */ t_stat i8272_abortio(I8272* chip) { - switch (chip->fdc_state) { - case S_DATAREAD: - case S_DATAWRITE: - case S_SECREAD: - case S_SECWRITE: - TRACE_PRINT0(DBG_FD_VERBOSE,"RDY=0 during I/O, aborting and returning result"); - chip->irqflag = 0; - chip->result[0] |= 0xc0; /* notify RDY change condition */ - return i8272_resultphase(chip,0); + switch (chip->fdc_state) { + case S_DATAREAD: + case S_DATAWRITE: + case S_SECREAD: + case S_SECWRITE: + TRACE_PRINT0(DBG_FD_VERBOSE,"RDY=0 during I/O, aborting and returning result"); + chip->irqflag = 0; + chip->result[0] |= 0xc0; /* notify RDY change condition */ + return i8272_resultphase(chip,0); - case S_RESULT: - TRACE_PRINT0(DBG_FD_VERBOSE,"RDY=0, returning result"); - chip->irqflag = 0; - return i8272_resultphase(chip,0); - - default: /* @TODO is this correct? */ - TRACE_PRINT0(DBG_FD_VERBOSE,"Abort I/O, reset to S_CMD state"); - NEXTSTATE(S_CMD); - return SCPE_OK; - } + case S_RESULT: + TRACE_PRINT0(DBG_FD_VERBOSE,"RDY=0, returning result"); + chip->irqflag = 0; + return i8272_resultphase(chip,0); + + default: /* @TODO is this correct? */ + TRACE_PRINT0(DBG_FD_VERBOSE,"Abort I/O, reset to S_CMD state"); + NEXTSTATE(S_CMD); + return SCPE_OK; + } } static t_stat i8272_dataread(I8272* chip,uint32* value) { - if (chip->fdc_nd_cnt < chip->fdc_secsz) { - /* return a single byte */ - chip->irqflag = 0; - *value = chip->fdc_sdata[chip->fdc_nd_cnt]; - TRACE_PRINT2(DBG_FD_RDDATA,"read buffer #%d value=%x", chip->fdc_nd_cnt, *value); - chip->fdc_nd_cnt++; - if (chip->fdc_nd_cnt != chip->fdc_secsz) { - i8272_interrupt(chip,1); /* notify one more byte is ready */ - return SCPE_OK; - } - } - /* more sectors to read? */ - if (chip->fdc_sector <= chip->fdc_eot) { - NEXTSTATE(S_SECREAD); - return SCPE_OK; - } - - /* finished data read */ - TRACE_PRINT0(DBG_FD_RDDATA,"read buffer complete."); - chip->result[0] &= 0x3f; /* clear bits 7,6: terminated correctly */ - return i8272_resultphase(chip,0); + if (chip->fdc_nd_cnt < chip->fdc_secsz) { + /* return a single byte */ + chip->irqflag = 0; + *value = chip->fdc_sdata[chip->fdc_nd_cnt]; + TRACE_PRINT2(DBG_FD_RDDATA,"read buffer #%d value=%x", chip->fdc_nd_cnt, *value); + chip->fdc_nd_cnt++; + if (chip->fdc_nd_cnt != chip->fdc_secsz) { + i8272_interrupt(chip,1); /* notify one more byte is ready */ + return SCPE_OK; + } + } + /* more sectors to read? */ + if (chip->fdc_sector <= chip->fdc_eot) { + NEXTSTATE(S_SECREAD); + return SCPE_OK; + } + + /* finished data read */ + TRACE_PRINT0(DBG_FD_RDDATA,"read buffer complete."); + chip->result[0] &= 0x3f; /* clear bits 7,6: terminated correctly */ + return i8272_resultphase(chip,0); } static I8272_DRIVE_INFO* i8272_select_drive(I8272* chip, uint8 drive) { - I8272_DRIVE_INFO* dip; - + I8272_DRIVE_INFO* dip; + (*chip->seldrv)(chip,drive); dip = &chip->drive[chip->fdc_curdrv]; return dip->uptr == NULL ? NULL : dip; @@ -427,138 +427,138 @@ static I8272_DRIVE_INFO* i8272_select_drive(I8272* chip, uint8 drive) static t_stat i8272_secread(I8272* chip) { - int i; - unsigned int flags = 0; - unsigned int readlen; - I8272_DRIVE_INFO* dip = &chip->drive[chip->fdc_curdrv]; + int i; + unsigned int flags = 0; + unsigned int readlen; + I8272_DRIVE_INFO* dip = &chip->drive[chip->fdc_curdrv]; + + /* finished with sector read? */ + if (chip->fdc_sector > chip->fdc_eot) { + TRACE_PRINT2(DBG_FD_RDDATA,"No more sectors: sec=%d EOT=%d",chip->fdc_sector,chip->fdc_eot); + return i8272_resultphase(chip,10); + } - /* finished with sector read? */ - if (chip->fdc_sector > chip->fdc_eot) { - TRACE_PRINT2(DBG_FD_RDDATA,"No more sectors: sec=%d EOT=%d",chip->fdc_sector,chip->fdc_eot); - return i8272_resultphase(chip,10); - } - /* no, read a buffer */ - TRACE_PRINT(DBG_FD_RDDATA,(sim_deb,"RD Data, C/H/S=%d/%d/%d sector len=%d", - dip->track, chip->fdc_head, chip->fdc_sector, chip->fdc_secsz)); + TRACE_PRINT(DBG_FD_RDDATA,(sim_deb,"RD Data, C/H/S=%d/%d/%d sector len=%d", + dip->track, chip->fdc_head, chip->fdc_sector, chip->fdc_secsz)); - if (dip->imd == NULL) { - sim_printf(".imd is NULL!" NLP); - return SCPE_STOP; - } - - sectRead(dip->imd, dip->track, chip->fdc_head, chip->fdc_sector, + if (dip->imd == NULL) { + sim_printf(".imd is NULL!" NLP); + return SCPE_STOP; + } + + sectRead(dip->imd, dip->track, chip->fdc_head, chip->fdc_sector, chip->fdc_sdata, chip->fdc_secsz, &flags, &readlen); - chip->result[5] = chip->fdc_sector; - chip->result[1] = 0x80; - chip->fdc_sector++; /* prepare next sector */ - - /* DMA mode? */ - if (chip->fdc_nd==0) { /* DMA mode */ - for (i=0; i < chip->fdc_secsz; i++) { - PutByteDMA(chip->fdc_dma_addr, chip->fdc_sdata[i]); - chip->fdc_dma_addr++; - } - TRACE_PRINT(DBG_FD_RDDATA, (sim_deb,"C:%d/H:%d/S:%d/L:%4d: Data transferred to RAM at 0x%06x", - dip->track, chip->fdc_head, chip->fdc_sector, - chip->fdc_secsz, chip->fdc_dma_addr - i)); - } else { - chip->fdc_nd_cnt = 0; /* start buffer transfer */ + chip->result[5] = chip->fdc_sector; + chip->result[1] = 0x80; + chip->fdc_sector++; /* prepare next sector */ + + /* DMA mode? */ + if (chip->fdc_nd==0) { /* DMA mode */ + for (i=0; i < chip->fdc_secsz; i++) { + PutByteDMA(chip->fdc_dma_addr, chip->fdc_sdata[i]); + chip->fdc_dma_addr++; + } + TRACE_PRINT(DBG_FD_RDDATA, (sim_deb,"C:%d/H:%d/S:%d/L:%4d: Data transferred to RAM at 0x%06x", + dip->track, chip->fdc_head, chip->fdc_sector, + chip->fdc_secsz, chip->fdc_dma_addr - i)); + } else { + chip->fdc_nd_cnt = 0; /* start buffer transfer */ TRACE_PRINT0(DBG_FD_RDDATA,"read buffer started."); - /* go to data transfer state */ - NEXTSTATE(S_DATAREAD); - i8272_interrupt(chip,100); - } - return SCPE_OK; + /* go to data transfer state */ + NEXTSTATE(S_DATAREAD); + i8272_interrupt(chip,100); + } + return SCPE_OK; } t_stat i8272_read(I8272* chip,int addr,uint32* value) { - t_stat rc; - I8272_DRIVE_INFO* dip; - if ((dip = &chip->drive[chip->fdc_curdrv]) == NULL) { - sim_printf("i8272_read: chip->drive returns NULL, fdc_curdrv=%d\n",chip->fdc_curdrv); - return SCPE_IERR; - } + t_stat rc; + I8272_DRIVE_INFO* dip; + if ((dip = &chip->drive[chip->fdc_curdrv]) == NULL) { + sim_printf("i8272_read: chip->drive returns NULL, fdc_curdrv=%d\n",chip->fdc_curdrv); + return SCPE_IERR; + } - switch(addr & 0x1) { - case I8272_FDC_MSR: - *value = chip->fdc_msr | I8272_MSR_RQM; - switch (chip->fdc_state) { - case S_CMD: - case S_CMDREAD: - *value &= ~(I8272_MSR_DATA_OUT|I8272_MSR_FDC_BUSY); - return SCPE_OK; - case S_SECREAD: - case S_DATAWRITE: - case S_DATAREAD: - case S_SECWRITE: - case S_EXEC: - *value |= (I8272_MSR_DATA_OUT|I8272_MSR_FDC_BUSY); - break; - - case S_RESULT: - *value |= I8272_MSR_DATA_OUT; - *value &= ~I8272_MSR_FDC_BUSY; - break; - default: - sim_printf("Default case in i8272_read(FDC_MSR): state=%d\n",chip->fdc_state); - return SCPE_IERR; - } - TRACE_PRINT1(DBG_FD_STATUS,"RD FDC MSR = 0x%02x",*value); - return SCPE_OK; + switch(addr & 0x1) { + case I8272_FDC_MSR: + *value = chip->fdc_msr | I8272_MSR_RQM; + switch (chip->fdc_state) { + case S_CMD: + case S_CMDREAD: + *value &= ~(I8272_MSR_DATA_OUT|I8272_MSR_FDC_BUSY); + return SCPE_OK; + case S_SECREAD: + case S_DATAWRITE: + case S_DATAREAD: + case S_SECWRITE: + case S_EXEC: + *value |= (I8272_MSR_DATA_OUT|I8272_MSR_FDC_BUSY); + break; - case I8272_FDC_DATA: - for (;;) { - switch (chip->fdc_state) { - case S_DATAREAD: /* only comes here in non-DMA mode */ - if ((rc=i8272_dataread(chip,value)) != SCPE_OK) return rc; - if (chip->fdc_state == S_RESULT || - chip->fdc_state == S_DATAREAD) return SCPE_OK; - /* otherwise will immediately move to state S_SECREAD */ - break; - - case S_SECREAD: - if ((rc=i8272_secread(chip)) != SCPE_OK) return rc; - if (chip->fdc_state ==S_DATAREAD) return SCPE_OK; - /* will immediately move to state S_RESULT */ - case S_RESULT: - *value = chip->result[chip->result_cnt]; - TRACE_PRINT2(DBG_FD_STATUS, "Result [%d]=0x%02x",chip->result_cnt, *value); - chip->irqflag = 0; - chip->result_cnt ++; - if(chip->result_cnt == chip->result_len) { - TRACE_PRINT0(DBG_FD_STATUS,"Result phase complete.\n"); - NEXTSTATE(S_CMD); - } - + case S_RESULT: + *value |= I8272_MSR_DATA_OUT; + *value &= ~I8272_MSR_FDC_BUSY; + break; + default: + sim_printf("Default case in i8272_read(FDC_MSR): state=%d\n",chip->fdc_state); + return SCPE_IERR; + } + TRACE_PRINT1(DBG_FD_STATUS,"RD FDC MSR = 0x%02x",*value); + return SCPE_OK; + + case I8272_FDC_DATA: + for (;;) { + switch (chip->fdc_state) { + case S_DATAREAD: /* only comes here in non-DMA mode */ + if ((rc=i8272_dataread(chip,value)) != SCPE_OK) return rc; + if (chip->fdc_state == S_RESULT || + chip->fdc_state == S_DATAREAD) return SCPE_OK; + /* otherwise will immediately move to state S_SECREAD */ + break; + + case S_SECREAD: + if ((rc=i8272_secread(chip)) != SCPE_OK) return rc; + if (chip->fdc_state ==S_DATAREAD) return SCPE_OK; + /* will immediately move to state S_RESULT */ + case S_RESULT: + *value = chip->result[chip->result_cnt]; + TRACE_PRINT2(DBG_FD_STATUS, "Result [%d]=0x%02x",chip->result_cnt, *value); + chip->irqflag = 0; + chip->result_cnt ++; + if(chip->result_cnt == chip->result_len) { + TRACE_PRINT0(DBG_FD_STATUS,"Result phase complete.\n"); + NEXTSTATE(S_CMD); + } + #if 0 - else { - i8272_interrupt(chip,5); - } + else { + i8272_interrupt(chip,5); + } #endif - return SCPE_OK; + return SCPE_OK; - case S_CMD: - case S_CMDREAD: - case S_EXEC: - case S_DATAWRITE: - case S_SECWRITE: - *value = chip->result[0]; /* hack, in theory any value should be ok but this makes "format" work */ - TRACE_PRINT1(DBG_FD_VERBOSE,"error, reading data register when not in data phase. Returning 0x%02x",*value); - return SCPE_OK; - - default: - sim_printf("Default case in i8272_read(FDC_DATA): state=%d\n",chip->fdc_state); - return SCPE_IERR; - } - } - return SCPE_OK; - default: - TRACE_PRINT1(DBG_FD_VERBOSE,"Cannot read register %x",addr); - *value = 0xFF; + case S_CMD: + case S_CMDREAD: + case S_EXEC: + case S_DATAWRITE: + case S_SECWRITE: + *value = chip->result[0]; /* hack, in theory any value should be ok but this makes "format" work */ + TRACE_PRINT1(DBG_FD_VERBOSE,"error, reading data register when not in data phase. Returning 0x%02x",*value); + return SCPE_OK; + + default: + sim_printf("Default case in i8272_read(FDC_DATA): state=%d\n",chip->fdc_state); + return SCPE_IERR; + } + } + return SCPE_OK; + default: + TRACE_PRINT1(DBG_FD_VERBOSE,"Cannot read register %x",addr); + *value = 0xFF; } return SCPE_OK; @@ -566,24 +566,24 @@ t_stat i8272_read(I8272* chip,int addr,uint32* value) static t_stat i8272_makeresult(I8272* chip, uint8 s0, uint8 s1, uint8 s2, uint8 s3,uint8 s4, uint8 s5, uint8 s6) { - chip->result[0] = s0; - chip->result[1] = s1; - chip->result[2] = s2; - chip->result[3] = s3; - chip->result[4] = s4; - chip->result[5] = s5; - chip->result[6] = s6; - chip->result_cnt = 0; - chip->fdc_fault = 0; - return SCPE_OK; + chip->result[0] = s0; + chip->result[1] = s1; + chip->result[2] = s2; + chip->result[3] = s3; + chip->result[4] = s4; + chip->result[5] = s5; + chip->result[6] = s6; + chip->result_cnt = 0; + chip->fdc_fault = 0; + return SCPE_OK; } static I8272_DRIVE_INFO* i8272_decodecmdbits(I8272* chip) { - /* note this routine is also used in places where MT or SK bits are irrelevant. - * chip docs imply these bits to be set to 0 - */ - chip->fdc_mt = (chip->cmd[0] & 0x80) >> 7; + /* note this routine is also used in places where MT or SK bits are irrelevant. + * chip docs imply these bits to be set to 0 + */ + chip->fdc_mt = (chip->cmd[0] & 0x80) >> 7; chip->fdc_mfm = (chip->cmd[0] & 0x40) >> 6; chip->fdc_sk = (chip->cmd[0] & 0x20) >> 5; chip->fdc_hds = (chip->cmd[1] & 0x04) ? 1 : 0; @@ -599,10 +599,10 @@ static I8272_DRIVE_INFO* i8272_decodecmdbits(I8272* chip) static t_stat i8272_nodriveerror(I8272* chip,const char* command,int delay) { - uint8 st0; - - TRACE_PRINT1(DBG_FD_ERROR,"%s: no drive or disk\n",command); - st0 = 0x40 | 0x10 | chip->fdc_curdrv; + uint8 st0; + + TRACE_PRINT1(DBG_FD_ERROR,"%s: no drive or disk\n",command); + st0 = 0x40 | 0x10 | chip->fdc_curdrv; i8272_makeresult(chip, st0, 0, 0, 0, 0, 0, 0); return i8272_resultphase(chip,delay); } @@ -610,15 +610,15 @@ static t_stat i8272_nodriveerror(I8272* chip,const char* command,int delay) static t_stat i8272_format(I8272* chip) { - uint8 track, fillbyte, sc, cnt; + uint8 track, fillbyte, sc, cnt; uint8 sectormap[I8272_MAX_SECTOR]; /* Physical to logical sector map for FORMAT TRACK */ - unsigned int flags = 0; + unsigned int flags = 0; int i; - I8272_DRIVE_INFO* dip; + I8272_DRIVE_INFO* dip; - /* get MFM bit, others are irrelevant */ + /* get MFM bit, others are irrelevant */ if ((dip = i8272_decodecmdbits(chip)) == NULL) - return i8272_nodriveerror(chip,"Format",10); + return i8272_nodriveerror(chip,"Format",10); track = dip->track; chip->fdc_seek_end = track != chip->cmd[2] ? 1 : 0; @@ -642,15 +642,15 @@ static t_stat i8272_format(I8272* chip) cnt = 0; i8272_makeresult(chip, - ((chip->fdc_hds & 1) << 2) | chip->fdc_curdrv, - 0, 0, track, - chip->fdc_head, /* AGN for now we cannot format with logicalHead */ - chip->fdc_sector, /* AGN ditto for logicalCyl */ - chip->fdc_sec_len); + ((chip->fdc_hds & 1) << 2) | chip->fdc_curdrv, + 0, 0, track, + chip->fdc_head, /* AGN for now we cannot format with logicalHead */ + chip->fdc_sector, /* AGN ditto for logicalCyl */ + chip->fdc_sec_len); for(i = 1; i <= sc; i++) { - TRACE_PRINT(DBG_FD_CMD, (sim_deb,"Format Track %d, Sector=%d, len=%d", - track, i, chip->fdc_secsz)); + TRACE_PRINT(DBG_FD_CMD, (sim_deb,"Format Track %d, Sector=%d, len=%d", + track, i, chip->fdc_secsz)); if(cnt >= I8272_MAX_SECTOR) { TRACE_PRINT0(DBG_FD_ERROR,"Illegal sector count"); @@ -673,12 +673,12 @@ static t_stat i8272_format(I8272* chip) static t_stat i8272_readid(I8272* chip) { - TRACK_INFO* curtrk; - I8272_DRIVE_INFO* dip; - uint8 hds = chip->fdc_hds; - - if ((dip = i8272_decodecmdbits(chip)) == NULL) - return i8272_nodriveerror(chip,"Readid",10); + TRACK_INFO* curtrk; + I8272_DRIVE_INFO* dip; + uint8 hds = chip->fdc_hds; + + if ((dip = i8272_decodecmdbits(chip)) == NULL) + return i8272_nodriveerror(chip,"Readid",10); curtrk = &dip->imd->track[dip->track][hds]; @@ -687,7 +687,7 @@ static t_stat i8272_readid(I8272* chip) /* The calculation also works for non-standard format disk images with */ /* sectorsizes of 2048, 4096 and 8192 bytes */ chip->fdc_sec_len = floorlog2(curtrk->sectsize) - 7; /* AGN fix to use fdc_hds (was fdc_head)*/ - chip->fdc_secsz = I8272_SEC2SZ(chip->fdc_sec_len); + chip->fdc_secsz = I8272_SEC2SZ(chip->fdc_sec_len); /* HV we cycle the read sectors on each call of READID to emulator disk spinning */ /* Sage BIOS need this to find the highest sector number. */ @@ -696,10 +696,10 @@ static t_stat i8272_readid(I8272* chip) /* This would allow disk analysis programs that use */ /* READID to detect non-standard disk formats. */ if (chip->idcount == 0 || chip->idcount >= curtrk->nsects) { - chip->fdc_sector = curtrk->start_sector; - chip->idcount = 1; + chip->fdc_sector = curtrk->start_sector; + chip->idcount = 1; } else { - chip->fdc_sector++; + chip->fdc_sector++; chip->idcount++; } if((chip->fdc_sec_len == 0xF8) || (chip->fdc_sec_len > I8272_MAX_N)) { /* Error calculating N or N too large */ @@ -710,15 +710,15 @@ static t_stat i8272_readid(I8272* chip) } /* build result */ - i8272_makeresult(chip, - ((hds & 1) << 2) | chip->fdc_curdrv, - 0, 0, - curtrk->logicalCyl[chip->fdc_sector], /* AGN logicalCyl */ - curtrk->logicalHead[chip->fdc_sector], /* AGN logicalHead */ - chip->fdc_sector, - chip->fdc_sec_len); + i8272_makeresult(chip, + ((hds & 1) << 2) | chip->fdc_curdrv, + 0, 0, + curtrk->logicalCyl[chip->fdc_sector], /* AGN logicalCyl */ + curtrk->logicalHead[chip->fdc_sector], /* AGN logicalHead */ + chip->fdc_sector, + chip->fdc_sec_len); - TRACE_PRINT(DBG_FD_CMD, (sim_deb, + TRACE_PRINT(DBG_FD_CMD, (sim_deb, "READ ID Drive %d result ST0=%02x ST1=%02x ST2=%02x C=%d H=%d R=%02x N=%d", chip->fdc_curdrv, chip->result[0], chip->result[1],chip->result[2],chip->result[3], @@ -728,9 +728,9 @@ static t_stat i8272_readid(I8272* chip) static t_stat i8272_seek(I8272* chip) { - I8272_DRIVE_INFO* dip; - if ((dip = i8272_decodecmdbits(chip)) == NULL) - return i8272_nodriveerror(chip,"Seek",10); + I8272_DRIVE_INFO* dip; + if ((dip = i8272_decodecmdbits(chip)) == NULL) + return i8272_nodriveerror(chip,"Seek",10); dip->track = chip->cmd[2]; chip->fdc_head = chip->fdc_hds; /*AGN seek should save the head */ @@ -739,93 +739,93 @@ static t_stat i8272_seek(I8272* chip) chip->fdc_curdrv, msgMT, msgMFM, chip->cmd[2], msgSK, msgHDS)); NEXTSTATE(S_CMD); /* no result phase */ - i8272_interrupt(chip,100); + i8272_interrupt(chip,100); return SCPE_OK; } static t_stat i8272_senseint(I8272* chip) { - I8272_DRIVE_INFO* dip = &chip->drive[chip->fdc_curdrv]; - uint8 st0 = (chip->fdc_seek_end ? 0x20 : 0x00) | chip->fdc_curdrv; - if (chip->fdc_fault) - st0 |= (0x40 | chip->fdc_fault); + I8272_DRIVE_INFO* dip = &chip->drive[chip->fdc_curdrv]; + uint8 st0 = (chip->fdc_seek_end ? 0x20 : 0x00) | chip->fdc_curdrv; + if (chip->fdc_fault) + st0 |= (0x40 | chip->fdc_fault); TRACE_PRINT2(DBG_FD_CMD,"Sense Interrupt Status ST0=0x%x PCN=%d",st0,dip->track); - i8272_makeresult(chip, st0, dip->track, 0,0,0,0,0); + i8272_makeresult(chip, st0, dip->track, 0,0,0,0,0); chip->irqflag = 0; /* clear interrupt flag, don't raise a new one */ - return i8272_resultphase(chip,0); + return i8272_resultphase(chip,0); } static t_stat i8272_sensedrive(I8272* chip) { - uint8 st3; - I8272_DRIVE_INFO* dip; - t_bool track0; - + uint8 st3; + I8272_DRIVE_INFO* dip; + t_bool track0; + if ((dip = i8272_select_drive(chip,chip->cmd[1])) == NULL) { - sim_printf("i8272_sensedrive: i8272_select_drive returns 0\n"); - st3 = DRIVE_STATUS_FAULT; - track0 = FALSE; + sim_printf("i8272_sensedrive: i8272_select_drive returns 0\n"); + st3 = DRIVE_STATUS_FAULT; + track0 = FALSE; } else { - track0 = dip->track == 0; - st3 = dip->ready ? DRIVE_STATUS_READY : 0; /* Drive Ready */ - if(imdGetSides(dip->imd) == 2) { - st3 |= DRIVE_STATUS_TWO_SIDED; /* Two-sided? */ - } - if(imdIsWriteLocked(dip->imd) || (dip->uptr->flags & UNIT_I8272_WLK)) { - st3 |= DRIVE_STATUS_WP; /* Write Protected? */ - } + track0 = dip->track == 0; + st3 = dip->ready ? DRIVE_STATUS_READY : 0; /* Drive Ready */ + if(imdGetSides(dip->imd) == 2) { + st3 |= DRIVE_STATUS_TWO_SIDED; /* Two-sided? */ + } + if(imdIsWriteLocked(dip->imd) || (dip->uptr->flags & UNIT_I8272_WLK)) { + st3 |= DRIVE_STATUS_WP; /* Write Protected? */ + } } st3 |= (chip->fdc_hds & 1) << 2; st3 |= chip->fdc_curdrv; st3 |= track0 ? DRIVE_STATUS_TRACK0 : 0x00; /* Track 0 */ - i8272_makeresult(chip, st3, 0, 0, 0, 0, 0, 0); + i8272_makeresult(chip, st3, 0, 0, 0, 0, 0, 0); TRACE_PRINT1(DBG_FD_CMD,"Sense Drive Status = 0x%02x", st3); - return i8272_resultphase(chip,5); + return i8272_resultphase(chip,5); } static t_stat i8272_recalibrate(I8272* chip) { - I8272_DRIVE_INFO* dip; + I8272_DRIVE_INFO* dip; if ((dip = i8272_select_drive(chip,chip->cmd[1])) == NULL) { - TRACE_PRINT1(DBG_FD_ERROR,"Recalibrate: no drive or disk drive=%x\n",chip->cmd[1]); - chip->fdc_fault = 0x10; /* EC error */ + TRACE_PRINT1(DBG_FD_ERROR,"Recalibrate: no drive or disk drive=%x\n",chip->cmd[1]); + chip->fdc_fault = 0x10; /* EC error */ } else { - dip->track = 0; - chip->idcount = 0; /* initialize the ID cycler (used by READID) */ + dip->track = 0; + chip->idcount = 0; /* initialize the ID cycler (used by READID) */ // chip->fdc_seek_end = 1; - chip->fdc_seek_end = 0; + chip->fdc_seek_end = 0; } TRACE_PRINT2(DBG_FD_SEEK,"Recalibrate: Drive 0x%02x, EC=%d",chip->fdc_curdrv,chip->fdc_fault?1:0); NEXTSTATE(S_CMD); /* No result phase */ - i8272_interrupt(chip,20); + i8272_interrupt(chip,20); return SCPE_OK; } static t_stat i8272_specify(I8272* chip) { - chip->fdc_fault = 0; - chip->fdc_nd = chip->cmd[2] & 0x01; /* DMA/non-DMA mode */ + chip->fdc_fault = 0; + chip->fdc_nd = chip->cmd[2] & 0x01; /* DMA/non-DMA mode */ TRACE_PRINT(DBG_FD_CMD, (sim_deb,"Specify: SRT=%d, HUT=%d, HLT=%d, ND=%s", - 16 - ((chip->cmd[1] & 0xF0) >> 4), /*SRT*/ - (chip->cmd[1] & 0x0F) * 16, /*HUT*/ - ((chip->cmd[2] & 0xFE) >> 1) * 2, /*HLT*/ - msgND)); + 16 - ((chip->cmd[1] & 0xF0) >> 4), /*SRT*/ + (chip->cmd[1] & 0x0F) * 16, /*HUT*/ + ((chip->cmd[2] & 0xFE) >> 1) * 2, /*HLT*/ + msgND)); - NEXTSTATE(S_CMD); /* no result phase */ + NEXTSTATE(S_CMD); /* no result phase */ i8272_interrupt(chip,1); return SCPE_OK; } static t_bool i8272_secrw(I8272* chip,uint8 cmd) { - TRACK_INFO* curtrk; - I8272_DRIVE_INFO* dip; - if ((dip = i8272_decodecmdbits(chip)) == NULL) return FALSE; + TRACK_INFO* curtrk; + I8272_DRIVE_INFO* dip; + if ((dip = i8272_decodecmdbits(chip)) == NULL) return FALSE; - chip->fdc_seek_end = dip->track != chip->cmd[2] ? 1 : 0; + chip->fdc_seek_end = dip->track != chip->cmd[2] ? 1 : 0; if (dip->track != chip->cmd[2]) { TRACE_PRINT(DBG_FD_CMD, (sim_deb, "ERROR: CMD=0x%02x[%s]: Drive: %d, Command wants track %d, but positioner is on track %d.", @@ -856,203 +856,203 @@ static t_bool i8272_secrw(I8272* chip,uint8 cmd) chip->fdc_sec_len, chip->fdc_eot, chip->fdc_gap, chip->fdc_dtl)); i8272_makeresult(chip, - ((chip->fdc_hds & 1) << 2) | chip->fdc_curdrv | 0x40, - 0, 0, - curtrk->logicalCyl[chip->fdc_sector], /* AGN logicalCyl */ - curtrk->logicalHead[chip->fdc_sector], /* AGN logicalHead */ - chip->fdc_sector, - chip->fdc_sec_len); - chip->result_cnt = 0; - chip->fdc_nd_cnt = 0; /* start buffer transfer */ - return TRUE; + ((chip->fdc_hds & 1) << 2) | chip->fdc_curdrv | 0x40, + 0, 0, + curtrk->logicalCyl[chip->fdc_sector], /* AGN logicalCyl */ + curtrk->logicalHead[chip->fdc_sector], /* AGN logicalHead */ + chip->fdc_sector, + chip->fdc_sec_len); + chip->result_cnt = 0; + chip->fdc_nd_cnt = 0; /* start buffer transfer */ + return TRUE; } static t_bool i8272_secwrite(I8272* chip) { - unsigned int readlen; - unsigned int flags = 0; - I8272_DRIVE_INFO* dip = &chip->drive[chip->fdc_curdrv]; - - TRACE_PRINT(DBG_FD_WRDATA, (sim_deb,"SecWrite: C:%d/H:%d/S:%d/L:%4d", - dip->track, chip->fdc_head, chip->fdc_sector, - chip->fdc_secsz)); - sectWrite(dip->imd, dip->track, chip->fdc_head, chip->fdc_sector, - chip->fdc_sdata, chip->fdc_secsz, &flags, &readlen); - chip->fdc_sector++; - if (chip->fdc_sector > chip->fdc_eot) - return i8272_resultphase(chip,200); + unsigned int readlen; + unsigned int flags = 0; + I8272_DRIVE_INFO* dip = &chip->drive[chip->fdc_curdrv]; - NEXTSTATE(S_DATAWRITE); - if (chip->fdc_nd) { /* non-DMA */ - chip->fdc_nd_cnt = 0; - i8272_interrupt(chip,10); /* non-DMA: initiate next sector write */ - return TRUE; - } - return FALSE; + TRACE_PRINT(DBG_FD_WRDATA, (sim_deb,"SecWrite: C:%d/H:%d/S:%d/L:%4d", + dip->track, chip->fdc_head, chip->fdc_sector, + chip->fdc_secsz)); + sectWrite(dip->imd, dip->track, chip->fdc_head, chip->fdc_sector, + chip->fdc_sdata, chip->fdc_secsz, &flags, &readlen); + chip->fdc_sector++; + if (chip->fdc_sector > chip->fdc_eot) + return i8272_resultphase(chip,200); + + NEXTSTATE(S_DATAWRITE); + if (chip->fdc_nd) { /* non-DMA */ + chip->fdc_nd_cnt = 0; + i8272_interrupt(chip,10); /* non-DMA: initiate next sector write */ + return TRUE; + } + return FALSE; } static t_bool i8272_datawrite(I8272* chip,uint32 value,I8272_DRIVE_INFO* dip) { - int i; - - /* finished with sector write? */ - if (chip->fdc_sector > chip->fdc_eot) { - TRACE_PRINT0(DBG_FD_WRDATA,"Finished sector write"); - return i8272_resultphase(chip,200); - } - if (chip->fdc_nd == 0) { /* DMA */ - for (i=0; i< chip->fdc_secsz; i++) { - chip->fdc_sdata[i] = GetByteDMA(chip->fdc_dma_addr); - chip->fdc_dma_addr++; - } - TRACE_PRINT(DBG_FD_WRDATA, (sim_deb,"C:%d/H:%d/S:%d/L:%4d: Data transferred from RAM at 0x%06x", - dip->track, chip->fdc_head, chip->fdc_sector, - chip->fdc_secsz, chip->fdc_dma_addr - i)); - } else { /* non-DMA */ - chip->fdc_msr |= I8272_MSR_NON_DMA; - if ((chip->fdc_nd_cnt+1) < chip->fdc_secsz) { - chip->fdc_sdata[chip->fdc_nd_cnt] = value; - TRACE_PRINT(DBG_FD_WRDATA,(sim_deb,"write buffer #%d value=%x (%c)", chip->fdc_nd_cnt,value,isprint(value)?value:'?')); - chip->fdc_nd_cnt++; - /* not yet finished buffering data, leave writer routine */ - i8272_interrupt(chip,10); - TRACE_PRINT0(DBG_FD_WRDATA,"Expect more data"); - return TRUE; - } - } - TRACE_PRINT0(DBG_FD_WRDATA,"Finished with data write"); - return FALSE; + int i; + + /* finished with sector write? */ + if (chip->fdc_sector > chip->fdc_eot) { + TRACE_PRINT0(DBG_FD_WRDATA,"Finished sector write"); + return i8272_resultphase(chip,200); + } + if (chip->fdc_nd == 0) { /* DMA */ + for (i=0; i< chip->fdc_secsz; i++) { + chip->fdc_sdata[i] = GetByteDMA(chip->fdc_dma_addr); + chip->fdc_dma_addr++; + } + TRACE_PRINT(DBG_FD_WRDATA, (sim_deb,"C:%d/H:%d/S:%d/L:%4d: Data transferred from RAM at 0x%06x", + dip->track, chip->fdc_head, chip->fdc_sector, + chip->fdc_secsz, chip->fdc_dma_addr - i)); + } else { /* non-DMA */ + chip->fdc_msr |= I8272_MSR_NON_DMA; + if ((chip->fdc_nd_cnt+1) < chip->fdc_secsz) { + chip->fdc_sdata[chip->fdc_nd_cnt] = value; + TRACE_PRINT(DBG_FD_WRDATA,(sim_deb,"write buffer #%d value=%x (%c)", chip->fdc_nd_cnt,value,isprint(value)?value:'?')); + chip->fdc_nd_cnt++; + /* not yet finished buffering data, leave writer routine */ + i8272_interrupt(chip,10); + TRACE_PRINT0(DBG_FD_WRDATA,"Expect more data"); + return TRUE; + } + } + TRACE_PRINT0(DBG_FD_WRDATA,"Finished with data write"); + return FALSE; } t_stat i8272_write(I8272* chip, int addr, uint32 value) { - uint8 cmd; - I8272_DRIVE_INFO* dip; - if ((dip = &chip->drive[chip->fdc_curdrv]) == NULL) { - sim_printf("i8272_write: chip->drive returns 0 fdc_curdrv=%d\n",chip->fdc_curdrv); - return SCPE_IERR; - } + uint8 cmd; + I8272_DRIVE_INFO* dip; + if ((dip = &chip->drive[chip->fdc_curdrv]) == NULL) { + sim_printf("i8272_write: chip->drive returns 0 fdc_curdrv=%d\n",chip->fdc_curdrv); + return SCPE_IERR; + } - switch(addr & 0x1) { - case I8272_FDC_MSR: - TRACE_PRINT1(DBG_FD_VERBOSE,"WR Drive Select Reg=%02x", value); - return SCPE_OK; + switch(addr & 0x1) { + case I8272_FDC_MSR: + TRACE_PRINT1(DBG_FD_VERBOSE,"WR Drive Select Reg=%02x", value); + return SCPE_OK; - case I8272_FDC_DATA: - chip->fdc_msr &= 0xF0; - TRACE_PRINT2(DBG_FD_VERBOSE,"WR Data, index=%d value=%x", chip->cmd_cnt,value); - - for (;;) { - switch (chip->fdc_state) { - case S_CMD: - /* first cmd byte */ - cmd = value & 0x1f; - chip->cmd_cnt = 0; - TRACE_PRINT2(DBG_FD_CMD,"CMD=0x%02x[%s]", cmd, msgCMD); - chip->cmd_len = cmdsizes[cmd]; - NEXTSTATE(S_CMDREAD); - /*fallthru*/ - case S_CMDREAD: - /* following cmd bytes */ - chip->cmd[chip->cmd_cnt] = value; - chip->cmd_cnt++; - - if (chip->cmd_cnt == chip->cmd_len) { - chip->fdc_nd_cnt = 0; /* initialize counter for Non-DMA mode */ - chip->cmd_cnt = 0; /* reset index for next CMD */ - NEXTSTATE(S_EXEC); /* continue immediately with S_EXEC code */ - break; - } - return SCPE_OK; - case S_DATAREAD: /* data reading happens in i8272_read */ - return SCPE_OK; - case S_RESULT: /* result polling happens in i8272_read */ - return SCPE_OK; - case S_DATAWRITE: - if (i8272_datawrite(chip,value,dip)) return SCPE_OK; - TRACE_PRINT0(DBG_FD_WRDATA,"Go Sector Write"); - NEXTSTATE(S_SECWRITE); - /*fallthru*/ - case S_SECWRITE: /* write buffer */ - if (i8272_secwrite(chip)) return SCPE_OK; - break; - case S_SECREAD: - return i8272_secread(chip); - case S_EXEC: - cmd = chip->cmd[0] & 0x1f; - switch (cmd) { - case I8272_SPECIFY: - return i8272_specify(chip); + case I8272_FDC_DATA: + chip->fdc_msr &= 0xF0; + TRACE_PRINT2(DBG_FD_VERBOSE,"WR Data, index=%d value=%x", chip->cmd_cnt,value); - case I8272_SENSE_INTR_STATUS: - return i8272_senseint(chip); + for (;;) { + switch (chip->fdc_state) { + case S_CMD: + /* first cmd byte */ + cmd = value & 0x1f; + chip->cmd_cnt = 0; + TRACE_PRINT2(DBG_FD_CMD,"CMD=0x%02x[%s]", cmd, msgCMD); + chip->cmd_len = cmdsizes[cmd]; + NEXTSTATE(S_CMDREAD); + /*fallthru*/ + case S_CMDREAD: + /* following cmd bytes */ + chip->cmd[chip->cmd_cnt] = value; + chip->cmd_cnt++; - case I8272_SENSE_DRIVE_STATUS: /* Setup Status3 Byte */ - return i8272_sensedrive(chip); + if (chip->cmd_cnt == chip->cmd_len) { + chip->fdc_nd_cnt = 0; /* initialize counter for Non-DMA mode */ + chip->cmd_cnt = 0; /* reset index for next CMD */ + NEXTSTATE(S_EXEC); /* continue immediately with S_EXEC code */ + break; + } + return SCPE_OK; + case S_DATAREAD: /* data reading happens in i8272_read */ + return SCPE_OK; + case S_RESULT: /* result polling happens in i8272_read */ + return SCPE_OK; + case S_DATAWRITE: + if (i8272_datawrite(chip,value,dip)) return SCPE_OK; + TRACE_PRINT0(DBG_FD_WRDATA,"Go Sector Write"); + NEXTSTATE(S_SECWRITE); + /*fallthru*/ + case S_SECWRITE: /* write buffer */ + if (i8272_secwrite(chip)) return SCPE_OK; + break; + case S_SECREAD: + return i8272_secread(chip); + case S_EXEC: + cmd = chip->cmd[0] & 0x1f; + switch (cmd) { + case I8272_SPECIFY: + return i8272_specify(chip); + + case I8272_SENSE_INTR_STATUS: + return i8272_senseint(chip); + + case I8272_SENSE_DRIVE_STATUS: /* Setup Status3 Byte */ + return i8272_sensedrive(chip); case I8272_RECALIBRATE: /* RECALIBRATE */ - return i8272_recalibrate(chip); + return i8272_recalibrate(chip); case UPD765_VERSION: - i8272_makeresult(chip, 0x80, 0, 0, 0, 0, 0, 0); - /* signal UPD765A, don't know whether B version (0x90) is relevant */ - return i8272_resultphase(chip,5); + i8272_makeresult(chip, 0x80, 0, 0, 0, 0, 0, 0); + /* signal UPD765A, don't know whether B version (0x90) is relevant */ + return i8272_resultphase(chip,5); - case I8272_SEEK: /* SEEK */ - return i8272_seek(chip); + case I8272_SEEK: /* SEEK */ + return i8272_seek(chip); case I8272_READ_ID: - return i8272_readid(chip); + return i8272_readid(chip); case I8272_FORMAT_TRACK: /* FORMAT A TRACK */ - return i8272_format(chip); + return i8272_format(chip); case I8272_READ_TRACK: sim_printf("I8272: " ADDRESS_FORMAT " Read a track (untested.)" NLP, PCX); chip->fdc_sector = 1; /* Read entire track from sector 1...eot */ case I8272_READ_DATA: case I8272_READ_DELETED_DATA: - if (!i8272_secrw(chip,cmd)) - return i8272_nodriveerror(chip,"I8272_READ_*_DATA",10); + if (!i8272_secrw(chip,cmd)) + return i8272_nodriveerror(chip,"I8272_READ_*_DATA",10); + + /* go directly to secread state */ + NEXTSTATE(S_SECREAD); + break; - /* go directly to secread state */ - NEXTSTATE(S_SECREAD); - break; - case I8272_WRITE_DATA: case I8272_WRITE_DELETED_DATA: - if (!i8272_secrw(chip,cmd)) - return i8272_nodriveerror(chip,"I8272_WRITE_*_DATA",10); + if (!i8272_secrw(chip,cmd)) + return i8272_nodriveerror(chip,"I8272_WRITE_*_DATA",10); - NEXTSTATE(S_DATAWRITE); /* fill buffer */ - if (chip->fdc_nd != 0) { /* non-DMA */ - i8272_interrupt(chip,100); /* request the first data byte */ - return SCPE_OK; - } - break; + NEXTSTATE(S_DATAWRITE); /* fill buffer */ + if (chip->fdc_nd != 0) { /* non-DMA */ + i8272_interrupt(chip,100); /* request the first data byte */ + return SCPE_OK; + } + break; case I8272_SCAN_LOW_EQUAL: case I8272_SCAN_HIGH_EQUAL: case I8272_SCAN_EQUAL: - if (!i8272_secrw(chip,cmd)) - return i8272_nodriveerror(chip,"I8272_SCAN_*",10); + if (!i8272_secrw(chip,cmd)) + return i8272_nodriveerror(chip,"I8272_SCAN_*",10); - TRACE_PRINT0(DBG_FD_CMD,"Scan Data"); + TRACE_PRINT0(DBG_FD_CMD,"Scan Data"); TRACE_PRINT0(DBG_FD_ERROR,"ERROR: Scan not implemented."); return i8272_resultphase(chip,200); - } - } - } - /*NOTREACHED*/ - - default: - return SCPE_OK; - } + } + } + } + /*NOTREACHED*/ + + default: + return SCPE_OK; + } } static void i8272_interrupt(I8272* chip,int delay) { TRACE_PRINT0(DBG_FD_IRQ,"FDC Interrupt"); chip->irqflag = 1; - (*chip->irq)(chip,delay); + (*chip->irq)(chip,delay); } diff --git a/SAGE/m68k_cpu.c b/SAGE/m68k_cpu.c index 30a18152..cd902b4f 100644 --- a/SAGE/m68k_cpu.c +++ b/SAGE/m68k_cpu.c @@ -25,14 +25,14 @@ 04-Oct-09 HV Initial version 25-Apr-10 HV Fixed LSR.W and ROXR.B instructions - 26-Jun-10 HV Incomplete decoding of BCHG d,d instruction - 15-Jul-10 HV IRQ logic loses lower prio interrupts - 17-Jul-10 HV Implement Call/Exit Tracing with symbol table lookup - 17-Jul-10 HV Mustn't grant interrupt at level == IPL - 18-Jul-10 HV Broken address calculation for AIDX and EA_W_RMW, wonder why this didn't pop up earlier. - 20-Jul-10 HV Corrected ADDQ.W/SUBQ.W for EA_ADIR, EOR.[WL] - 23-Jul-10 HV Broken C code sequence in lsl.l - 23-Jul-10 HV RTE didn't set/reset S bit + 26-Jun-10 HV Incomplete decoding of BCHG d,d instruction + 15-Jul-10 HV IRQ logic loses lower prio interrupts + 17-Jul-10 HV Implement Call/Exit Tracing with symbol table lookup + 17-Jul-10 HV Mustn't grant interrupt at level == IPL + 18-Jul-10 HV Broken address calculation for AIDX and EA_W_RMW, wonder why this didn't pop up earlier. + 20-Jul-10 HV Corrected ADDQ.W/SUBQ.W for EA_ADIR, EOR.[WL] + 23-Jul-10 HV Broken C code sequence in lsl.l + 23-Jul-10 HV RTE didn't set/reset S bit */ #include "m68k_cpu.h" @@ -45,40 +45,40 @@ #endif /* status reg flags */ -#define FLAG_C 0x0001 -#define FLAG_V 0x0002 -#define FLAG_Z 0x0004 -#define FLAG_N 0x0008 -#define FLAG_X 0x0010 -#define FLAG_I0 0x0100 -#define FLAG_I1 0x0200 -#define FLAG_I2 0x0400 -#define FLAG_IPL_MASK (FLAG_I0|FLAG_I1|FLAG_I2) -#define FLAG_S 0x2000 -#define FLAG_T 0x8000 -#define FLAG_T1 FLAG_T -#define FLAG_T0 0x4000 +#define FLAG_C 0x0001 +#define FLAG_V 0x0002 +#define FLAG_Z 0x0004 +#define FLAG_N 0x0008 +#define FLAG_X 0x0010 +#define FLAG_I0 0x0100 +#define FLAG_I1 0x0200 +#define FLAG_I2 0x0400 +#define FLAG_IPL_MASK (FLAG_I0|FLAG_I1|FLAG_I2) +#define FLAG_S 0x2000 +#define FLAG_T 0x8000 +#define FLAG_T1 FLAG_T +#define FLAG_T0 0x4000 -#define BIT7 0x80 -#define BIT8 0x100 -#define BIT15 0x8000 -#define BIT16 0x10000 -#define BIT31 0x80000000 -#define BIT32 0x100000000L +#define BIT7 0x80 +#define BIT8 0x100 +#define BIT15 0x8000 +#define BIT16 0x10000 +#define BIT31 0x80000000 +#define BIT32 0x100000000L -#define MASK_0(x) ((x) & 1) -#define MASK_8U(x) ((x) & 0xffffff00) -#define MASK_8L(x) ((x) & 0x000000ff) -#define MASK_8SGN(x) ((x) & BIT7) -#define MASK_9(x) ((x) & BIT8) -#define MASK_16U(x) ((x) & 0xffff0000) -#define MASK_16L(x) ((x) & 0x0000ffff) -#define MASK_16SGN(x) ((x) & BIT15) -#define MASK_17(x) ((x) & BIT16) -#define MASK_32U(x) (0) -#define MASK_32L(x) ((x) & 0xffffffff) -#define MASK_32SGN(x) ((x) & BIT31) -#define MASK_33(x) ((x) & BIT32) +#define MASK_0(x) ((x) & 1) +#define MASK_8U(x) ((x) & 0xffffff00) +#define MASK_8L(x) ((x) & 0x000000ff) +#define MASK_8SGN(x) ((x) & BIT7) +#define MASK_9(x) ((x) & BIT8) +#define MASK_16U(x) ((x) & 0xffff0000) +#define MASK_16L(x) ((x) & 0x0000ffff) +#define MASK_16SGN(x) ((x) & BIT15) +#define MASK_17(x) ((x) & BIT16) +#define MASK_32U(x) (0) +#define MASK_32L(x) ((x) & 0xffffffff) +#define MASK_32SGN(x) ((x) & BIT31) +#define MASK_33(x) ((x) & BIT32) #define COMBINE8(tgt,src) (MASK_8U(tgt) | MASK_8L(src)) #define COMBINE16(tgt,src) (MASK_16U(tgt) | MASK_16L(src)) @@ -87,20 +87,20 @@ extern t_addr addrmask; static t_addr addrmasks[] = { - 0x00ffffff, /*68000*/ - 0x000fffff, /*68008*/ - 0x00ffffff, /*68010*/ - 0xffffffff, /*68020*/ - 0xffffffff /*68030*/ + 0x00ffffff, /*68000*/ + 0x000fffff, /*68008*/ + 0x00ffffff, /*68010*/ + 0xffffffff, /*68020*/ + 0xffffffff /*68030*/ }; int16 cputype = CPU_TYPE_68000 >> UNIT_CPU_V_TYPE; /* CPU data structures - * m68kcpu_dev CPU device descriptor - * m68kcpu_unit CPU unit descriptor - * m68kcpu_reg CPU register list - * m68kcpu_mod CPU modifiers list + * m68kcpu_dev CPU device descriptor + * m68kcpu_unit CPU unit descriptor + * m68kcpu_reg CPU register list + * m68kcpu_mod CPU modifiers list */ UNIT *m68kcpu_unit; /* must be set elsewhere */ @@ -109,38 +109,38 @@ DEVICE *m68kcpu_dev; /* must be set elsewhere */ void (*m68kcpu_trapcallback)(DEVICE* dptr,int trapnum) = 0; /* register set */ -int32 DR[8]; -#define D0 DR[0] -#define D1 DR[1] -#define D2 DR[2] -#define D3 DR[3] -#define D4 DR[4] -#define D5 DR[5] -#define D6 DR[6] -#define D7 DR[7] -t_addr AR[8]; -#define A0 AR[0] -#define A1 AR[1] -#define A2 AR[2] -#define A3 AR[3] -#define A4 AR[4] -#define A5 AR[5] -#define A6 AR[6] -#define A7 AR[7] -t_addr USP; +int32 DR[8]; +#define D0 DR[0] +#define D1 DR[1] +#define D2 DR[2] +#define D3 DR[3] +#define D4 DR[4] +#define D5 DR[5] +#define D6 DR[6] +#define D7 DR[7] +t_addr AR[8]; +#define A0 AR[0] +#define A1 AR[1] +#define A2 AR[2] +#define A3 AR[3] +#define A4 AR[4] +#define A5 AR[5] +#define A6 AR[6] +#define A7 AR[7] +t_addr USP; t_addr *cur_sp; -uint16 SR; -#define CCR_C (SR & FLAG_C) -#define CCR_V (SR & FLAG_V) -#define CCR_Z (SR & FLAG_Z) -#define CCR_N (SR & FLAG_N) -#define CCR_X (SR & FLAG_X) -#define SR_IPL ((SR & FLAG_IPL_MASK)>>8) -#define SR_S (SR & FLAG_S) -#define SR_T (SR & FLAG_T) -#define SR_T0 (SR & FLAG_T0) -#define SR_T1 (SR & FLAG_T1) +uint16 SR; +#define CCR_C (SR & FLAG_C) +#define CCR_V (SR & FLAG_V) +#define CCR_Z (SR & FLAG_Z) +#define CCR_N (SR & FLAG_N) +#define CCR_X (SR & FLAG_X) +#define SR_IPL ((SR & FLAG_IPL_MASK)>>8) +#define SR_S (SR & FLAG_S) +#define SR_T (SR & FLAG_T) +#define SR_T0 (SR & FLAG_T0) +#define SR_T1 (SR & FLAG_T1) #define ONEF(flag) SR |= (flag) #define CLRF(flag) SR &= ~(flag) @@ -151,90 +151,90 @@ uint16 SR; #define SETNZ8(cond) SETZ8(cond); if (MASK_8SGN(cond)) SR |= FLAG_N; else SR &= ~FLAG_N #define SETNZ16(cond) SETZ16(cond); if (MASK_16SGN(cond)) SR |= FLAG_N; else SR &= ~FLAG_N #define SETNZ32(cond) SETZ32(cond); if (MASK_32SGN(cond)) SR |= FLAG_N; else SR &= ~FLAG_N -#define SETV_ADD8(a1,a2,r) SETF(MASK_8SGN(((a1)^(r))&((a2)^(r))),FLAG_V); -#define SETV_ADD16(a1,a2,r) SETF(MASK_16SGN(((a1)^(r))&((a2)^(r))),FLAG_V); -#define SETV_ADD32(a1,a2,r) SETF(MASK_32SGN(((a1)^(r))&((a2)^(r))),FLAG_V); -#define SETV_SUB8(s,d,r) SETF(MASK_8SGN(((s)^(d))&((r)^(d))),FLAG_V) -#define SETV_SUB16(s,d,r) SETF(MASK_16SGN(((s)^(d))&((r)^(d))),FLAG_V) -#define SETV_SUB32(s,d,r) SETF(MASK_32SGN(((s)^(d))&((r)^(d))),FLAG_V) +#define SETV_ADD8(a1,a2,r) SETF(MASK_8SGN(((a1)^(r))&((a2)^(r))),FLAG_V); +#define SETV_ADD16(a1,a2,r) SETF(MASK_16SGN(((a1)^(r))&((a2)^(r))),FLAG_V); +#define SETV_ADD32(a1,a2,r) SETF(MASK_32SGN(((a1)^(r))&((a2)^(r))),FLAG_V); +#define SETV_SUB8(s,d,r) SETF(MASK_8SGN(((s)^(d))&((r)^(d))),FLAG_V) +#define SETV_SUB16(s,d,r) SETF(MASK_16SGN(((s)^(d))&((r)^(d))),FLAG_V) +#define SETV_SUB32(s,d,r) SETF(MASK_32SGN(((s)^(d))&((r)^(d))),FLAG_V) #define ASSERT_PRIV() if (!SR_S) { rc = STOP_PRVIO; break; } #define ASSERT_OK(func) if ((rc=(func)) != SCPE_OK) break #define ASSERT_OKRET(func) if ((rc=(func)) != SCPE_OK) return rc -#define AREG(r) (r==7 ? cur_sp : &AR[r]) +#define AREG(r) (r==7 ? cur_sp : &AR[r]) -uint16 SFC; -uint16 DFC; -uint32 VBR; -t_addr saved_PC; +uint16 SFC; +uint16 DFC; +uint32 VBR; +t_addr saved_PC; static t_bool intpending; static int m68k_sublevel; REG m68kcpu_reg[] = { - { HRDATA (D0, DR[0], 32) }, - { HRDATA (D1, DR[1], 32) }, - { HRDATA (D2, DR[2], 32) }, - { HRDATA (D3, DR[3], 32) }, - { HRDATA (D4, DR[4], 32) }, - { HRDATA (D5, DR[5], 32) }, - { HRDATA (D6, DR[6], 32) }, - { HRDATA (D7, DR[7], 32) }, - { HRDATA (A0, AR[0], 32) }, - { HRDATA (A1, AR[1], 32) }, - { HRDATA (A2, AR[2], 32) }, - { HRDATA (A3, AR[3], 32) }, - { HRDATA (A4, AR[4], 32) }, - { HRDATA (A5, AR[5], 32) }, - { HRDATA (A6, AR[6], 32) }, - { HRDATA (A7, AR[7], 32) }, - { HRDATA (SSP, AR[7], 32) }, - { HRDATA (USP, USP, 32) }, - { HRDATA (PC, saved_PC, 32) }, - { HRDATA (SR, SR, 16) }, - { HRDATA (CCR, SR, 8) }, - { FLDATA (C, SR, 0) }, - { FLDATA (V, SR, 1) }, - { FLDATA (Z, SR, 2) }, - { FLDATA (N, SR, 3) }, - { FLDATA (X, SR, 4) }, - { GRDATA (IPL, SR, 8, 3, 8) }, - { FLDATA (S, SR, 13) }, - { FLDATA (T, SR, 15) }, - { HRDATA (SFC, SFC, 3), REG_HIDDEN }, - { HRDATA (DFC, DFC, 3), REG_HIDDEN }, - { HRDATA (VBR, VBR, 32), REG_RO }, - { FLDATA (IRQPEN, intpending, 0), REG_HIDDEN }, - { NULL } + { HRDATA (D0, DR[0], 32) }, + { HRDATA (D1, DR[1], 32) }, + { HRDATA (D2, DR[2], 32) }, + { HRDATA (D3, DR[3], 32) }, + { HRDATA (D4, DR[4], 32) }, + { HRDATA (D5, DR[5], 32) }, + { HRDATA (D6, DR[6], 32) }, + { HRDATA (D7, DR[7], 32) }, + { HRDATA (A0, AR[0], 32) }, + { HRDATA (A1, AR[1], 32) }, + { HRDATA (A2, AR[2], 32) }, + { HRDATA (A3, AR[3], 32) }, + { HRDATA (A4, AR[4], 32) }, + { HRDATA (A5, AR[5], 32) }, + { HRDATA (A6, AR[6], 32) }, + { HRDATA (A7, AR[7], 32) }, + { HRDATA (SSP, AR[7], 32) }, + { HRDATA (USP, USP, 32) }, + { HRDATA (PC, saved_PC, 32) }, + { HRDATA (SR, SR, 16) }, + { HRDATA (CCR, SR, 8) }, + { FLDATA (C, SR, 0) }, + { FLDATA (V, SR, 1) }, + { FLDATA (Z, SR, 2) }, + { FLDATA (N, SR, 3) }, + { FLDATA (X, SR, 4) }, + { GRDATA (IPL, SR, 8, 3, 8) }, + { FLDATA (S, SR, 13) }, + { FLDATA (T, SR, 15) }, + { HRDATA (SFC, SFC, 3), REG_HIDDEN }, + { HRDATA (DFC, DFC, 3), REG_HIDDEN }, + { HRDATA (VBR, VBR, 32), REG_RO }, + { FLDATA (IRQPEN, intpending, 0), REG_HIDDEN }, + { NULL } }; DEBTAB m68kcpu_dt[] = { - { "EXC", DBG_CPU_EXC }, - { "PC", DBG_CPU_PC }, - { "INT", DBG_CPU_INT }, - { "CTRACE", DBG_CPU_CTRACE }, - { "BTRACE", DBG_CPU_BTRACE }, - { NULL, 0 } + { "EXC", DBG_CPU_EXC }, + { "PC", DBG_CPU_PC }, + { "INT", DBG_CPU_INT }, + { "CTRACE", DBG_CPU_CTRACE }, + { "BTRACE", DBG_CPU_BTRACE }, + { NULL, 0 } }; static char *condnames[] = { - "RA", "SR", "HI", "LS", "CC", "CS", "NE", "EQ", "VC", "VS", "PL", "MI", "GE", "LT", "GT", "LE" + "RA", "SR", "HI", "LS", "CC", "CS", "NE", "EQ", "VC", "VS", "PL", "MI", "GE", "LT", "GT", "LE" }; #if 0 /* sample code */ static MTAB m68kcpu_mod[] = { - M68KCPU_STDMOD, - { 0 } + M68KCPU_STDMOD, + { 0 } }; DEVICE m68kcpu_dev = { - "CPU", &m68kcpu_unit, m68kcpu_reg, m68kcpu_mod, - 1, 16, 32, 2, 16, 16, - &m68kcpu_ex, &m68kcpu_dep, &m68kcpu_reset, - &m68kcpu_boot, NULL, NULL, - NULL, DEV_DEBUG, 0, - m68kcpu_dt, NULL, NULL + "CPU", &m68kcpu_unit, m68kcpu_reg, m68kcpu_mod, + 1, 16, 32, 2, 16, 16, + &m68kcpu_ex, &m68kcpu_dep, &m68kcpu_reset, + &m68kcpu_boot, NULL, NULL, + NULL, DEV_DEBUG, 0, + m68kcpu_dt, NULL, NULL }; #endif @@ -242,18 +242,18 @@ static DEVICE* cpudev_self = 0; t_stat m68kcpu_peripheral_reset() { - t_stat rc; - DEVICE** devs = sim_devices; - DEVICE* dptr; - if (!devs) return SCPE_IERR; - - while ((dptr = *devs) != NULL) { - if (dptr != cpudev_self) { - ASSERT_OKRET(dptr->reset(dptr)); - } - devs++; - } - return SCPE_OK; + t_stat rc; + DEVICE** devs = sim_devices; + DEVICE* dptr; + if (!devs) return SCPE_IERR; + + while ((dptr = *devs) != NULL) { + if (dptr != cpudev_self) { + ASSERT_OKRET(dptr->reset(dptr)); + } + devs++; + } + return SCPE_OK; } /* simple prefetch I cache */ @@ -265,75 +265,75 @@ static uint8 cache_line[CACHE_SIZE]; static t_stat ReadICache(t_addr tpc) { - int i; - t_stat rc; - uint8* mem; + int i; + t_stat rc; + uint8* mem; - ASSERT_OKRET(Mem((tpc+CACHE_SIZE-1)&addrmask,&mem)); - - /* 68000/08/10 do not like unaligned access */ - if (cputype < 3 && (tpc & 1)) return STOP_ERRADR; - - for (i=CACHE_SIZE-1; i>=0; i--) { - cache_line[i] = *mem--; - } -// for (i=0; i<16; i++) printf("icache[%d]=0x%08x\n",i,cache_line[i]); - return SCPE_OK; + ASSERT_OKRET(Mem((tpc+CACHE_SIZE-1)&addrmask,&mem)); + + /* 68000/08/10 do not like unaligned access */ + if (cputype < 3 && (tpc & 1)) return STOP_ERRADR; + + for (i=CACHE_SIZE-1; i>=0; i--) { + cache_line[i] = *mem--; + } +// for (i=0; i<16; i++) printf("icache[%d]=0x%08x\n",i,cache_line[i]); + return SCPE_OK; } static t_stat ReadInstr(t_addr pc,uint32* inst) { - t_stat rc; - t_addr tpc; - IOHANDLER* ioh; - - if ((rc=TranslateAddr(pc & ~CACHE_MASK,&tpc,&ioh,MEM_READ,FALSE,FALSE)) != SCPE_OK) - return rc==SIM_ISIO ? STOP_PCIO : rc; - if (tpc != cache_pc) { - ASSERT_OKRET(ReadICache(tpc)); - } - pc &= CACHE_MASK; - *inst = (cache_line[pc]<<8) | cache_line[pc+1]; - return SCPE_OK; + t_stat rc; + t_addr tpc; + IOHANDLER* ioh; + + if ((rc=TranslateAddr(pc & ~CACHE_MASK,&tpc,&ioh,MEM_READ,FALSE,FALSE)) != SCPE_OK) + return rc==SIM_ISIO ? STOP_PCIO : rc; + if (tpc != cache_pc) { + ASSERT_OKRET(ReadICache(tpc)); + } + pc &= CACHE_MASK; + *inst = (cache_line[pc]<<8) | cache_line[pc+1]; + return SCPE_OK; } static t_stat ReadInstrInc(t_addr* pc,uint32* inst) { - t_stat rc; - ASSERT_OKRET(ReadInstr(*pc,inst)); - *pc += 2; - return SCPE_OK; + t_stat rc; + ASSERT_OKRET(ReadInstr(*pc,inst)); + *pc += 2; + return SCPE_OK; } static t_stat ReadInstrLongInc(t_addr* pc,uint32* inst) { - t_stat rc; - uint32 val1,val2; - ASSERT_OKRET(ReadInstr(*pc,&val1)); - *pc += 2; - ASSERT_OKRET(ReadInstr(*pc,&val2)); - *pc += 2; - *inst = COMBINE16(val1<<16,val2); - return SCPE_OK; + t_stat rc; + uint32 val1,val2; + ASSERT_OKRET(ReadInstr(*pc,&val1)); + *pc += 2; + ASSERT_OKRET(ReadInstr(*pc,&val2)); + *pc += 2; + *inst = COMBINE16(val1<<16,val2); + return SCPE_OK; } void m68k_set_s(t_bool tf) { - if (tf) { - SR |= FLAG_S; - cur_sp = &A7; - } else { - SR &= ~FLAG_S; - cur_sp = &USP; - } + if (tf) { + SR |= FLAG_S; + cur_sp = &A7; + } else { + SR &= ~FLAG_S; + cur_sp = &USP; + } } void m68k_setipl(int ipl) { -// printf("set ipl to %d\n",ipl); - SR &= ~FLAG_IPL_MASK; - SR |= (ipl & 7) << 8; +// printf("set ipl to %d\n",ipl); + SR &= ~FLAG_IPL_MASK; + SR |= (ipl & 7) << 8; } /* interrupt logic */ @@ -341,3012 +341,3012 @@ static int intvectors[8]; static t_stat m68k_irqinit() { - int i; - for (i=0; i<8; i++) intvectors[i] = 0; - intpending = 0; - return SCPE_OK; + int i; + for (i=0; i<8; i++) intvectors[i] = 0; + intpending = 0; + return SCPE_OK; } t_stat m68k_raise_vectorint(int level,int vector) { - int mask = 1<reset(dptr); + return dptr->reset(dptr); } /* for instruction decoder */ -#define IR_1512 (IR&0170000) -#define IR_1109 (IR&0007000) -#define IR_1108 (IR&0007400) -#define IR_1106 (IR&0007700) -#define IR_1103 (IR&0007770) -#define IR_08 (IR&0000400) -#define IR_0806 (IR&0000700) -#define IR_0803 (IR&0000770) -#define IR_0706 (IR&0000300) -#define IR_0703 (IR&0000370) -#define IR_0503 (IR&0000070) -#define IR_080403 (IR&0000430) -#define IR_08060403 (IR&0000730) -#define IR_0200 (IR&0000007) -#define IR_EAMOD (IR&0000070) -#define IR_0503 (IR&0000070) -#define IR_COND (IR&0007400) -#define IR_EA (IR&0000077) -#define IR_EAM12 (IR&0000060) -#define IR_EAREG (IR&0000007) -#define IR_DISP (IR&0000377) +#define IR_1512 (IR&0170000) +#define IR_1109 (IR&0007000) +#define IR_1108 (IR&0007400) +#define IR_1106 (IR&0007700) +#define IR_1103 (IR&0007770) +#define IR_08 (IR&0000400) +#define IR_0806 (IR&0000700) +#define IR_0803 (IR&0000770) +#define IR_0706 (IR&0000300) +#define IR_0703 (IR&0000370) +#define IR_0503 (IR&0000070) +#define IR_080403 (IR&0000430) +#define IR_08060403 (IR&0000730) +#define IR_0200 (IR&0000007) +#define IR_EAMOD (IR&0000070) +#define IR_0503 (IR&0000070) +#define IR_COND (IR&0007400) +#define IR_EA (IR&0000077) +#define IR_EAM12 (IR&0000060) +#define IR_EAREG (IR&0000007) +#define IR_DISP (IR&0000377) #define IR_EATGT ((IR&0000700)>>3) -#define IR_REGX ((IR&0007000)>>9) -#define IR_REGY (IR&0000007) -#define IR_TRAP (IR&0000017) -#define IR_SIZE ((IR&0000300)>>6) -#define IR_DATA (IR&0000377) -#define IRE_DA (IRE&0100000) -#define IRE_REG ((IRE&0070000)>>12) +#define IR_REGX ((IR&0007000)>>9) +#define IR_REGY (IR&0000007) +#define IR_TRAP (IR&0000017) +#define IR_SIZE ((IR&0000300)>>6) +#define IR_DATA (IR&0000377) +#define IRE_DA (IRE&0100000) +#define IRE_REG ((IRE&0070000)>>12) #define IRE_WL (IRE&0004000) -#define IRE_DISP (IRE&0000377) +#define IRE_DISP (IRE&0000377) /* EA modes */ -#define EA_DDIR 0000 -#define EA_ADIR 0010 -#define EA_AIND 0020 -#define EA_API 0030 -#define EA_APD 0040 -#define EA_AIDX 0050 -#define EA_AXIDX 0060 -#define EA_EXT 0070 -#define EA_IMM 0074 -#define EAX_AW 000 -#define EAX_AL 001 -#define EAX_PCIDX 002 -#define EAX_PCXIDX 003 -#define EAX_IMM 004 +#define EA_DDIR 0000 +#define EA_ADIR 0010 +#define EA_AIND 0020 +#define EA_API 0030 +#define EA_APD 0040 +#define EA_AIDX 0050 +#define EA_AXIDX 0060 +#define EA_EXT 0070 +#define EA_IMM 0074 +#define EAX_AW 000 +#define EAX_AL 001 +#define EAX_PCIDX 002 +#define EAX_PCXIDX 003 +#define EAX_IMM 004 -#define EXTB(x) ((int32)((int8)((x)&0xff))) -#define EXTW(x) ((int32)((int16)((x)&0xffff))) +#define EXTB(x) ((int32)((int8)((x)&0xff))) +#define EXTW(x) ((int32)((int16)((x)&0xffff))) -#define DRX DR[IR_REGX] -#define DRY DR[IR_REGY] +#define DRX DR[IR_REGX] +#define DRY DR[IR_REGY] static uint32 quickarg[] = { 8,1,2,3,4,5,6,7 }; static int32 shmask8[] = { 0x00,0x80,0xc0,0xe0,0xf0,0xf8,0xfc,0xfe,0xff }; static int32 shmask16[] = { 0x0000, - 0x8000,0xc000,0xe000,0xf000,0xf800,0xfc00,0xfe00,0xff00, - 0xff80,0xffc0,0xffe0,0xfff0,0xff80,0xffc0,0xffe0,0xffff, - 0xffff }; + 0x8000,0xc000,0xe000,0xf000,0xf800,0xfc00,0xfe00,0xff00, + 0xff80,0xffc0,0xffe0,0xfff0,0xff80,0xffc0,0xffe0,0xffff, + 0xffff }; static int32 shmask32[] = { 0x00000000, - 0x80000000,0xc0000000,0xe0000000,0xf0000000, - 0xf8000000,0xfc000000,0xfe000000,0xff000000, - 0xff800000,0xffc00000,0xffe00000,0xfff00000, - 0xfff80000,0xfffc0000,0xfffe0000,0xffff0000, - 0xffff8000,0xffffc000,0xffffe000,0xfffff000, - 0xfffff800,0xfffffc00,0xfffffe00,0xffffff00, - 0xffffff80,0xffffffc0,0xffffffe0,0xfffffff0, - 0xfffffff8,0xfffffffc,0xfffffffe,0xffffffff, - 0xffffffff }; + 0x80000000,0xc0000000,0xe0000000,0xf0000000, + 0xf8000000,0xfc000000,0xfe000000,0xff000000, + 0xff800000,0xffc00000,0xffe00000,0xfff00000, + 0xfff80000,0xfffc0000,0xfffe0000,0xffff0000, + 0xffff8000,0xffffc000,0xffffe000,0xfffff000, + 0xfffff800,0xfffffc00,0xfffffe00,0xffffff00, + 0xffffff80,0xffffffc0,0xffffffe0,0xfffffff0, + 0xfffffff8,0xfffffffc,0xfffffffe,0xffffffff, + 0xffffffff }; static int32 bitmask[] = { 0x00000000, - 0x00000001,0x00000002,0x00000004,0x00000008, - 0x00000010,0x00000020,0x00000040,0x00000080, - 0x00000100,0x00000200,0x00000400,0x00000800, - 0x00001000,0x00002000,0x00004000,0x00000800, - 0x00010000,0x00020000,0x00040000,0x00008000, - 0x00100000,0x00200000,0x00400000,0x00080000, - 0x01000000,0x02000000,0x04000000,0x00800000, - 0x10000000,0x20000000,0x40000000,0x80000000, - 0x00000000 }; + 0x00000001,0x00000002,0x00000004,0x00000008, + 0x00000010,0x00000020,0x00000040,0x00000080, + 0x00000100,0x00000200,0x00000400,0x00000800, + 0x00001000,0x00002000,0x00004000,0x00000800, + 0x00010000,0x00020000,0x00040000,0x00008000, + 0x00100000,0x00200000,0x00400000,0x00080000, + 0x01000000,0x02000000,0x04000000,0x00800000, + 0x10000000,0x20000000,0x40000000,0x80000000, + 0x00000000 }; static t_addr saved_ea; static t_stat ea_src_b(uint32 eamod,uint32 eareg,uint32* val,t_addr* pc) { - t_stat rc = SCPE_OK; - uint32 reg, regno, IRE; - t_addr *areg; -// printf("src eamod=%x eareg=%x\n",eamod,eareg); - switch (eamod) { - case EA_DDIR: - *val = MASK_8L(DR[eareg]); - return SCPE_OK; - case EA_ADIR: - *val = MASK_8L(*AREG(eareg)); - return SCPE_OK; - case EA_AIND: - return ReadVB(saved_ea = *AREG(eareg),val); - case EA_API: - areg = AREG(eareg); - rc = ReadVB(saved_ea = *areg,val); - *areg += (eareg==7 ? 2 : 1); - return rc; - case EA_APD: - areg = AREG(eareg); - *areg -= (eareg==7 ? 2 : 1); - return ReadVB(saved_ea = *areg,val); - case EA_AIDX: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - return ReadVB(saved_ea = *AREG(eareg)+EXTW(IRE),val); - case EA_AXIDX: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - regno = IRE_REG; - reg = IRE_DA ? *AREG(regno) : DR[regno]; - if (!IRE_WL) reg = EXTW(reg); - return ReadVB(saved_ea = *AREG(eareg) + EXTW(IRE_DISP) + reg, val); - case EA_EXT: - switch (eareg) { - case EAX_AW: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - saved_ea = EXTW(IRE); - rc = ReadVB(saved_ea, val); - return rc; - case EAX_AL: - ASSERT_OKRET(ReadPL(*pc,&IRE)); - *pc += 4; - return ReadVB(saved_ea = IRE, val); - case EAX_PCIDX: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - return ReadVB(saved_ea = *pc-2 + EXTW(IRE), val); - case EAX_PCXIDX: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - regno = IRE_REG; - reg = (IRE_DA) ? *AREG(regno) : DR[regno]; - if (!IRE_WL) reg = EXTW(reg); - return ReadVB(saved_ea = *pc-2 + EXTW(IRE_DISP) + reg, val); - case EAX_IMM: - ASSERT_OKRET(ReadInstrInc(pc,val)); - *val = MASK_8L(*val); - return SCPE_OK; - default: - return STOP_ERROP; - } - default: - return STOP_ERROP; - } + t_stat rc = SCPE_OK; + uint32 reg, regno, IRE; + t_addr *areg; +// printf("src eamod=%x eareg=%x\n",eamod,eareg); + switch (eamod) { + case EA_DDIR: + *val = MASK_8L(DR[eareg]); + return SCPE_OK; + case EA_ADIR: + *val = MASK_8L(*AREG(eareg)); + return SCPE_OK; + case EA_AIND: + return ReadVB(saved_ea = *AREG(eareg),val); + case EA_API: + areg = AREG(eareg); + rc = ReadVB(saved_ea = *areg,val); + *areg += (eareg==7 ? 2 : 1); + return rc; + case EA_APD: + areg = AREG(eareg); + *areg -= (eareg==7 ? 2 : 1); + return ReadVB(saved_ea = *areg,val); + case EA_AIDX: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + return ReadVB(saved_ea = *AREG(eareg)+EXTW(IRE),val); + case EA_AXIDX: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + regno = IRE_REG; + reg = IRE_DA ? *AREG(regno) : DR[regno]; + if (!IRE_WL) reg = EXTW(reg); + return ReadVB(saved_ea = *AREG(eareg) + EXTW(IRE_DISP) + reg, val); + case EA_EXT: + switch (eareg) { + case EAX_AW: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + saved_ea = EXTW(IRE); + rc = ReadVB(saved_ea, val); + return rc; + case EAX_AL: + ASSERT_OKRET(ReadPL(*pc,&IRE)); + *pc += 4; + return ReadVB(saved_ea = IRE, val); + case EAX_PCIDX: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + return ReadVB(saved_ea = *pc-2 + EXTW(IRE), val); + case EAX_PCXIDX: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + regno = IRE_REG; + reg = (IRE_DA) ? *AREG(regno) : DR[regno]; + if (!IRE_WL) reg = EXTW(reg); + return ReadVB(saved_ea = *pc-2 + EXTW(IRE_DISP) + reg, val); + case EAX_IMM: + ASSERT_OKRET(ReadInstrInc(pc,val)); + *val = MASK_8L(*val); + return SCPE_OK; + default: + return STOP_ERROP; + } + default: + return STOP_ERROP; + } } static t_stat ea_src_bs(uint32 eamod,uint32 eareg,uint32* val,t_addr* pc) { - if (eamod==EA_EXT && eareg==EAX_IMM) { - *val = MASK_8L(SR); - return SCPE_OK; - } - return ea_src_b(eamod,eareg,val,pc); + if (eamod==EA_EXT && eareg==EAX_IMM) { + *val = MASK_8L(SR); + return SCPE_OK; + } + return ea_src_b(eamod,eareg,val,pc); } static t_stat ea_src_w(uint32 eamod,uint32 eareg,uint32* val,t_addr* pc) { - t_stat rc = SCPE_OK; - uint32 reg, regno, IRE; - t_addr *areg; - - switch (eamod) { - case EA_DDIR: - *val = MASK_16L(DR[eareg]); - return SCPE_OK; - case EA_ADIR: - *val = MASK_16L(*AREG(eareg)); - return SCPE_OK; - case EA_AIND: - return ReadVW(saved_ea = *AREG(eareg), val); - case EA_API: - areg = AREG(eareg); - rc = ReadVW(saved_ea = *areg, val); - *areg += 2; - return rc; - case EA_APD: - areg = AREG(eareg); - *areg -= 2; - return ReadVW(saved_ea = *areg, val); - case EA_AIDX: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - return ReadVW(saved_ea = *AREG(eareg) + EXTW(IRE), val); - case EA_AXIDX: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - regno = IRE_REG; - reg = IRE_DA ? *AREG(regno) : DR[regno]; - if (!IRE_WL) reg = EXTW(reg); - return ReadVW(saved_ea = *AREG(eareg) + EXTW(IRE_DISP) + reg, val); - case EA_EXT: - switch (eareg) { - case EAX_AW: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - return ReadVW(saved_ea = EXTW(IRE), val); - case EAX_AL: - ASSERT_OKRET(ReadPL(*pc,&IRE)); - *pc += 4; - return ReadVW(saved_ea = IRE, val); - case EAX_PCIDX: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - return ReadVW(saved_ea = *pc-2 + EXTW(IRE), val); - case EAX_PCXIDX: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - regno = IRE_REG; - reg = (IRE_DA) ? *AREG(regno) : DR[regno]; - if (!IRE_WL) reg = EXTW(reg); - return ReadVW(saved_ea = *pc-2 + EXTW(IRE_DISP) + reg, val); - case EAX_IMM: - return ReadInstrInc(pc,val); - default: - return STOP_ERROP; - } - default: - return STOP_ERROP; - } + t_stat rc = SCPE_OK; + uint32 reg, regno, IRE; + t_addr *areg; + + switch (eamod) { + case EA_DDIR: + *val = MASK_16L(DR[eareg]); + return SCPE_OK; + case EA_ADIR: + *val = MASK_16L(*AREG(eareg)); + return SCPE_OK; + case EA_AIND: + return ReadVW(saved_ea = *AREG(eareg), val); + case EA_API: + areg = AREG(eareg); + rc = ReadVW(saved_ea = *areg, val); + *areg += 2; + return rc; + case EA_APD: + areg = AREG(eareg); + *areg -= 2; + return ReadVW(saved_ea = *areg, val); + case EA_AIDX: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + return ReadVW(saved_ea = *AREG(eareg) + EXTW(IRE), val); + case EA_AXIDX: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + regno = IRE_REG; + reg = IRE_DA ? *AREG(regno) : DR[regno]; + if (!IRE_WL) reg = EXTW(reg); + return ReadVW(saved_ea = *AREG(eareg) + EXTW(IRE_DISP) + reg, val); + case EA_EXT: + switch (eareg) { + case EAX_AW: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + return ReadVW(saved_ea = EXTW(IRE), val); + case EAX_AL: + ASSERT_OKRET(ReadPL(*pc,&IRE)); + *pc += 4; + return ReadVW(saved_ea = IRE, val); + case EAX_PCIDX: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + return ReadVW(saved_ea = *pc-2 + EXTW(IRE), val); + case EAX_PCXIDX: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + regno = IRE_REG; + reg = (IRE_DA) ? *AREG(regno) : DR[regno]; + if (!IRE_WL) reg = EXTW(reg); + return ReadVW(saved_ea = *pc-2 + EXTW(IRE_DISP) + reg, val); + case EAX_IMM: + return ReadInstrInc(pc,val); + default: + return STOP_ERROP; + } + default: + return STOP_ERROP; + } } static t_stat ea_src_ws(uint32 eamod,uint32 eareg,uint32* val,t_addr* pc) { - if (eamod==EA_EXT && eareg==EAX_IMM) { - *val = SR; - return SCPE_OK; - } - return ea_src_w(eamod,eareg,val,pc); + if (eamod==EA_EXT && eareg==EAX_IMM) { + *val = SR; + return SCPE_OK; + } + return ea_src_w(eamod,eareg,val,pc); } /* non dereferencing version of ea_src_l, only accepts ea category control */ static t_stat ea_src_l_nd(uint32 eamod,uint32 eareg,uint32* val,t_addr* pc) { - t_stat rc = SCPE_OK; - uint32 reg, regno, IRE; - - switch (eamod) { - case EA_AIND: - *val = *AREG(eareg); - return SCPE_OK; - case EA_AIDX: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - *val = *AREG(eareg) + EXTW(IRE); - return SCPE_OK; - case EA_AXIDX: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - regno = IRE_REG; - reg = IRE_DA ? *AREG(regno) : DR[regno]; - if (!IRE_WL) reg = EXTW(reg); - *val = *AREG(eareg) + EXTW(IRE_DISP) + reg; - return SCPE_OK; - case EA_EXT: - switch (eareg) { - case EAX_AW: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - *val = EXTW(IRE); - return SCPE_OK; - case EAX_AL: - ASSERT_OKRET(ReadPL(*pc,val)); - *pc += 4; - return SCPE_OK; - case EAX_PCIDX: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - *val = *pc-2 + EXTW(IRE); - return SCPE_OK; - case EAX_PCXIDX: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - regno = IRE_REG; - reg = (IRE_DA) ? *AREG(regno) : DR[regno]; - if (!IRE_WL) reg = EXTW(reg); - *val = *pc-2 + EXTW(IRE_DISP) + reg; - return SCPE_OK; - default: - return STOP_ERROP; - } - default: - return STOP_ERROP; - } + t_stat rc = SCPE_OK; + uint32 reg, regno, IRE; + + switch (eamod) { + case EA_AIND: + *val = *AREG(eareg); + return SCPE_OK; + case EA_AIDX: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + *val = *AREG(eareg) + EXTW(IRE); + return SCPE_OK; + case EA_AXIDX: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + regno = IRE_REG; + reg = IRE_DA ? *AREG(regno) : DR[regno]; + if (!IRE_WL) reg = EXTW(reg); + *val = *AREG(eareg) + EXTW(IRE_DISP) + reg; + return SCPE_OK; + case EA_EXT: + switch (eareg) { + case EAX_AW: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + *val = EXTW(IRE); + return SCPE_OK; + case EAX_AL: + ASSERT_OKRET(ReadPL(*pc,val)); + *pc += 4; + return SCPE_OK; + case EAX_PCIDX: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + *val = *pc-2 + EXTW(IRE); + return SCPE_OK; + case EAX_PCXIDX: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + regno = IRE_REG; + reg = (IRE_DA) ? *AREG(regno) : DR[regno]; + if (!IRE_WL) reg = EXTW(reg); + *val = *pc-2 + EXTW(IRE_DISP) + reg; + return SCPE_OK; + default: + return STOP_ERROP; + } + default: + return STOP_ERROP; + } } static t_stat ea_src_l(uint32 eamod,uint32 eareg,uint32* val,t_addr* pc) { - t_stat rc = SCPE_OK; - uint32 reg, regno, IRE; - t_addr *areg; - - switch (eamod) { - case EA_DDIR: - *val = DR[eareg]; - return SCPE_OK; - case EA_ADIR: - *val = *AREG(eareg); - return SCPE_OK; - case EA_AIND: - return ReadVL(saved_ea = *AREG(eareg), val); - case EA_API: - areg = AREG(eareg); - rc = ReadVL(saved_ea = *areg, val); - *areg += 4; - return rc; - case EA_APD: - areg = AREG(eareg); - *areg -= 4; - return ReadVL(saved_ea = *areg, val); - case EA_AIDX: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - return ReadVL(saved_ea = *AREG(eareg) + EXTW(IRE), val); - case EA_AXIDX: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - regno = IRE_REG; - reg = IRE_DA ? *AREG(regno) : DR[regno]; - if (!IRE_WL) reg = EXTW(reg); - return ReadVL(saved_ea = *AREG(eareg) + EXTW(IRE_DISP) + reg, val); - case EA_EXT: - switch (eareg) { - case EAX_AW: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - return ReadVL(saved_ea = EXTW(IRE), val); - case EAX_AL: - ASSERT_OKRET(ReadPL(*pc,&IRE)); - *pc += 4; - return ReadVL(saved_ea = IRE, val); - case EAX_PCIDX: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - return ReadVL(saved_ea = *pc-2 + EXTW(IRE), val); - case EAX_PCXIDX: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - regno = IRE_REG; - reg = (IRE_DA) ? *AREG(regno) : DR[regno]; - if (!IRE_WL) reg = EXTW(reg); - return ReadVL(saved_ea = *pc-2 + EXTW(IRE_DISP) + reg, val); - case EAX_IMM: - ASSERT_OKRET(ReadVL(*pc,val)); - *pc += 4; - return SCPE_OK; - default: - return STOP_ERROP; - } - default: - return STOP_ERROP; - } + t_stat rc = SCPE_OK; + uint32 reg, regno, IRE; + t_addr *areg; + + switch (eamod) { + case EA_DDIR: + *val = DR[eareg]; + return SCPE_OK; + case EA_ADIR: + *val = *AREG(eareg); + return SCPE_OK; + case EA_AIND: + return ReadVL(saved_ea = *AREG(eareg), val); + case EA_API: + areg = AREG(eareg); + rc = ReadVL(saved_ea = *areg, val); + *areg += 4; + return rc; + case EA_APD: + areg = AREG(eareg); + *areg -= 4; + return ReadVL(saved_ea = *areg, val); + case EA_AIDX: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + return ReadVL(saved_ea = *AREG(eareg) + EXTW(IRE), val); + case EA_AXIDX: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + regno = IRE_REG; + reg = IRE_DA ? *AREG(regno) : DR[regno]; + if (!IRE_WL) reg = EXTW(reg); + return ReadVL(saved_ea = *AREG(eareg) + EXTW(IRE_DISP) + reg, val); + case EA_EXT: + switch (eareg) { + case EAX_AW: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + return ReadVL(saved_ea = EXTW(IRE), val); + case EAX_AL: + ASSERT_OKRET(ReadPL(*pc,&IRE)); + *pc += 4; + return ReadVL(saved_ea = IRE, val); + case EAX_PCIDX: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + return ReadVL(saved_ea = *pc-2 + EXTW(IRE), val); + case EAX_PCXIDX: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + regno = IRE_REG; + reg = (IRE_DA) ? *AREG(regno) : DR[regno]; + if (!IRE_WL) reg = EXTW(reg); + return ReadVL(saved_ea = *pc-2 + EXTW(IRE_DISP) + reg, val); + case EAX_IMM: + ASSERT_OKRET(ReadVL(*pc,val)); + *pc += 4; + return SCPE_OK; + default: + return STOP_ERROP; + } + default: + return STOP_ERROP; + } } static t_stat ea_src_l64(uint32 eamod,uint32 eareg,t_uint64* val64,t_addr* pc) { - uint32 val32; - t_stat rc = ea_src_l(eamod,eareg,&val32,pc); - *val64 = (t_uint64)val32; - return rc; + uint32 val32; + t_stat rc = ea_src_l(eamod,eareg,&val32,pc); + *val64 = (t_uint64)val32; + return rc; } t_stat ea_src(uint32 eamod,uint32 eareg,uint32* val,int sz,t_addr* pc) { - switch (sz) { - case SZ_BYTE: - return ea_src_b(eamod,eareg,val,pc); - case SZ_WORD: - return ea_src_w(eamod,eareg,val,pc); - case SZ_LONG: - return ea_src_l(eamod,eareg,val,pc); - default: - return STOP_ERROP; - } + switch (sz) { + case SZ_BYTE: + return ea_src_b(eamod,eareg,val,pc); + case SZ_WORD: + return ea_src_w(eamod,eareg,val,pc); + case SZ_LONG: + return ea_src_l(eamod,eareg,val,pc); + default: + return STOP_ERROP; + } } static t_stat ea_dst_b(uint32 eamod,uint32 eareg,uint32 val,t_addr* pc) { - t_stat rc; - uint32 IRE,reg,regno; - t_addr *areg; + t_stat rc; + uint32 IRE,reg,regno; + t_addr *areg; -// printf("dst: eamod=%x eareg=%x\n",eamod,eareg); -// printf("val=%x\n",val); - switch (eamod) { - case EA_DDIR: - DR[eareg] = COMBINE8(DR[eareg],val); - return SCPE_OK; - case EA_AIND: - return WriteVB(*AREG(eareg), val); - case EA_API: - areg = AREG(eareg); - rc = WriteVB(*areg, val); - *areg += (eareg==7 ? 2 : 1); - return rc; - case EA_APD: - areg = AREG(eareg); - *areg -= (eareg==7 ? 2 : 1); - return WriteVB(*areg, val); - case EA_AIDX: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - return WriteVB(*AREG(eareg) + EXTW(IRE), val); - case EA_AXIDX: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - regno = IRE_REG; - reg = IRE_DA ? *AREG(regno) : DR[regno]; - if (!IRE_WL) reg = EXTW(reg); - return WriteVB(*AREG(eareg) + EXTW(IRE_DISP) + reg, val); - case EA_EXT: - switch (eareg) { - case EAX_AW: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - return WriteVB(EXTW(IRE), val); - case EAX_AL: - ASSERT_OKRET(ReadPL(*pc,&IRE)); - *pc += 4; - return WriteVB(IRE, val); - default: - return STOP_ERROP; - } - case EA_ADIR: - default: - return STOP_ERROP; - } +// printf("dst: eamod=%x eareg=%x\n",eamod,eareg); +// printf("val=%x\n",val); + switch (eamod) { + case EA_DDIR: + DR[eareg] = COMBINE8(DR[eareg],val); + return SCPE_OK; + case EA_AIND: + return WriteVB(*AREG(eareg), val); + case EA_API: + areg = AREG(eareg); + rc = WriteVB(*areg, val); + *areg += (eareg==7 ? 2 : 1); + return rc; + case EA_APD: + areg = AREG(eareg); + *areg -= (eareg==7 ? 2 : 1); + return WriteVB(*areg, val); + case EA_AIDX: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + return WriteVB(*AREG(eareg) + EXTW(IRE), val); + case EA_AXIDX: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + regno = IRE_REG; + reg = IRE_DA ? *AREG(regno) : DR[regno]; + if (!IRE_WL) reg = EXTW(reg); + return WriteVB(*AREG(eareg) + EXTW(IRE_DISP) + reg, val); + case EA_EXT: + switch (eareg) { + case EAX_AW: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + return WriteVB(EXTW(IRE), val); + case EAX_AL: + ASSERT_OKRET(ReadPL(*pc,&IRE)); + *pc += 4; + return WriteVB(IRE, val); + default: + return STOP_ERROP; + } + case EA_ADIR: + default: + return STOP_ERROP; + } } t_stat ea_dst_b_rmw(uint32 eamod,uint32 eareg,uint32 val) { - switch (eamod) { - case EA_DDIR: - DR[eareg] = COMBINE8(DR[eareg],val); - return SCPE_OK; - case EA_AIND: - case EA_API: - case EA_APD: - case EA_AIDX: - case EA_AXIDX: - return WriteVB(saved_ea, val); - case EA_EXT: - switch (eareg) { - case EAX_AW: - case EAX_AL: - return WriteVB(saved_ea, val); - case EAX_IMM: - SR = COMBINE8(SR,val); - return SCPE_OK; - default: - return STOP_ERROP; - } - default: - return STOP_ERROP; - } + switch (eamod) { + case EA_DDIR: + DR[eareg] = COMBINE8(DR[eareg],val); + return SCPE_OK; + case EA_AIND: + case EA_API: + case EA_APD: + case EA_AIDX: + case EA_AXIDX: + return WriteVB(saved_ea, val); + case EA_EXT: + switch (eareg) { + case EAX_AW: + case EAX_AL: + return WriteVB(saved_ea, val); + case EAX_IMM: + SR = COMBINE8(SR,val); + return SCPE_OK; + default: + return STOP_ERROP; + } + default: + return STOP_ERROP; + } } static t_stat ea_dst_w(uint32 eamod,uint32 eareg,uint32 val,t_addr* pc) { - t_stat rc; - uint32 IRE,reg,regno; - t_addr *areg; + t_stat rc; + uint32 IRE,reg,regno; + t_addr *areg; - switch (eamod) { - case EA_DDIR: - DR[eareg] = COMBINE16(DR[eareg],val); - return SCPE_OK; - case EA_ADIR: - *AREG(eareg) = COMBINE16(*AREG(eareg),val); -// *AREG(eareg) = EXTW(val); - return SCPE_OK; - case EA_AIND: - return WriteVW(*AREG(eareg), val); - case EA_API: - areg = AREG(eareg); - rc = WriteVW(*areg, val); - *areg += 2; - return rc; - case EA_APD: - areg = AREG(eareg); - *areg -= 2; - return WriteVW(*areg, val); - case EA_AIDX: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - return WriteVW(*AREG(eareg) + EXTW(IRE), val); - case EA_AXIDX: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - regno = IRE_REG; - reg = IRE_DA ? *AREG(regno) : DR[regno]; - if (!IRE_WL) reg = EXTW(reg); - return WriteVW(*AREG(eareg) + EXTW(IRE_DISP) + reg, val); - case EA_EXT: - switch (eareg) { - case EAX_AW: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - return WriteVW(EXTW(IRE), val); - case EAX_AL: - ASSERT_OKRET(ReadPL(*pc,&IRE)); - *pc += 4; - return WriteVW(IRE, val); - default: - return STOP_ERROP; - } - default: - return STOP_ERROP; - } + switch (eamod) { + case EA_DDIR: + DR[eareg] = COMBINE16(DR[eareg],val); + return SCPE_OK; + case EA_ADIR: + *AREG(eareg) = COMBINE16(*AREG(eareg),val); +// *AREG(eareg) = EXTW(val); + return SCPE_OK; + case EA_AIND: + return WriteVW(*AREG(eareg), val); + case EA_API: + areg = AREG(eareg); + rc = WriteVW(*areg, val); + *areg += 2; + return rc; + case EA_APD: + areg = AREG(eareg); + *areg -= 2; + return WriteVW(*areg, val); + case EA_AIDX: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + return WriteVW(*AREG(eareg) + EXTW(IRE), val); + case EA_AXIDX: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + regno = IRE_REG; + reg = IRE_DA ? *AREG(regno) : DR[regno]; + if (!IRE_WL) reg = EXTW(reg); + return WriteVW(*AREG(eareg) + EXTW(IRE_DISP) + reg, val); + case EA_EXT: + switch (eareg) { + case EAX_AW: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + return WriteVW(EXTW(IRE), val); + case EAX_AL: + ASSERT_OKRET(ReadPL(*pc,&IRE)); + *pc += 4; + return WriteVW(IRE, val); + default: + return STOP_ERROP; + } + default: + return STOP_ERROP; + } } static t_stat ea_dst_w_rmw(uint32 eamod,uint32 eareg,uint32 val) { - switch (eamod) { - case EA_DDIR: - DR[eareg] = COMBINE16(DR[eareg],val); - return SCPE_OK; - case EA_ADIR: - printf("ea_dst_w_rmw EA_ADIR: pc=%x\n",saved_PC); - *AREG(eareg) = val; /* use full 32 bits even for word operand */ - return SCPE_OK; - case EA_AIND: - case EA_API: - case EA_APD: - case EA_AIDX: - case EA_AXIDX: - return WriteVW(saved_ea, val); - case EA_EXT: - switch (eareg) { - case EAX_AW: - case EAX_AL: - return WriteVW(saved_ea, val); - case EAX_IMM: - SR = val; - return SCPE_OK; - default: - return STOP_ERROP; - } - default: - return STOP_ERROP; - } + switch (eamod) { + case EA_DDIR: + DR[eareg] = COMBINE16(DR[eareg],val); + return SCPE_OK; + case EA_ADIR: + printf("ea_dst_w_rmw EA_ADIR: pc=%x\n",saved_PC); + *AREG(eareg) = val; /* use full 32 bits even for word operand */ + return SCPE_OK; + case EA_AIND: + case EA_API: + case EA_APD: + case EA_AIDX: + case EA_AXIDX: + return WriteVW(saved_ea, val); + case EA_EXT: + switch (eareg) { + case EAX_AW: + case EAX_AL: + return WriteVW(saved_ea, val); + case EAX_IMM: + SR = val; + return SCPE_OK; + default: + return STOP_ERROP; + } + default: + return STOP_ERROP; + } } static t_stat ea_dst_l(uint32 eamod,uint32 eareg,uint32 val,t_addr* pc) { - t_stat rc; - uint32 IRE,reg,regno; - t_addr *areg; + t_stat rc; + uint32 IRE,reg,regno; + t_addr *areg; - switch (eamod) { - case EA_DDIR: - DR[eareg] = val; - return SCPE_OK; - case EA_ADIR: - *AREG(eareg) = val; - return SCPE_OK; - case EA_AIND: - return WriteVL(*AREG(eareg), val); - case EA_API: - areg = AREG(eareg); - rc = WriteVL(*areg, val); - *areg += 4; - return rc; - case EA_APD: - areg = AREG(eareg); - *areg -= 4; - return WriteVL(*areg, val); - case EA_AIDX: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - return WriteVL(*AREG(eareg) + EXTW(IRE), val); - case EA_AXIDX: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - regno = IRE_REG; - reg = IRE_DA ? *AREG(regno) : DR[regno]; - if (!IRE_WL) reg = EXTW(reg); - return WriteVL(*AREG(eareg) + EXTW(IRE_DISP) + reg, val); - case EA_EXT: - switch (eareg) { - case EAX_AW: - ASSERT_OKRET(ReadInstrInc(pc,&IRE)); - return WriteVL(EXTW(IRE), val); - case EAX_AL: - ASSERT_OKRET(ReadPL(*pc,&IRE)); - *pc += 4; - return WriteVL(IRE, val); - default: - return STOP_ERROP; - } - default: - return STOP_ERROP; - } + switch (eamod) { + case EA_DDIR: + DR[eareg] = val; + return SCPE_OK; + case EA_ADIR: + *AREG(eareg) = val; + return SCPE_OK; + case EA_AIND: + return WriteVL(*AREG(eareg), val); + case EA_API: + areg = AREG(eareg); + rc = WriteVL(*areg, val); + *areg += 4; + return rc; + case EA_APD: + areg = AREG(eareg); + *areg -= 4; + return WriteVL(*areg, val); + case EA_AIDX: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + return WriteVL(*AREG(eareg) + EXTW(IRE), val); + case EA_AXIDX: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + regno = IRE_REG; + reg = IRE_DA ? *AREG(regno) : DR[regno]; + if (!IRE_WL) reg = EXTW(reg); + return WriteVL(*AREG(eareg) + EXTW(IRE_DISP) + reg, val); + case EA_EXT: + switch (eareg) { + case EAX_AW: + ASSERT_OKRET(ReadInstrInc(pc,&IRE)); + return WriteVL(EXTW(IRE), val); + case EAX_AL: + ASSERT_OKRET(ReadPL(*pc,&IRE)); + *pc += 4; + return WriteVL(IRE, val); + default: + return STOP_ERROP; + } + default: + return STOP_ERROP; + } } t_stat ea_dst_l_rmw(uint32 eamod,uint32 eareg,uint32 val) { - switch (eamod) { - case EA_DDIR: - DR[eareg] = val; - return SCPE_OK; - case EA_ADIR: - *AREG(eareg) = val; - return SCPE_OK; - case EA_AIND: - case EA_API: - case EA_APD: - case EA_AIDX: - case EA_AXIDX: - return WriteVL(saved_ea, val); - case EA_EXT: - switch (eareg) { - case EAX_AW: - case EAX_AL: - return WriteVL(saved_ea, val); - default: - return STOP_ERROP; - } - default: - return STOP_ERROP; - } + switch (eamod) { + case EA_DDIR: + DR[eareg] = val; + return SCPE_OK; + case EA_ADIR: + *AREG(eareg) = val; + return SCPE_OK; + case EA_AIND: + case EA_API: + case EA_APD: + case EA_AIDX: + case EA_AXIDX: + return WriteVL(saved_ea, val); + case EA_EXT: + switch (eareg) { + case EAX_AW: + case EAX_AL: + return WriteVL(saved_ea, val); + default: + return STOP_ERROP; + } + default: + return STOP_ERROP; + } } t_stat ea_dst(uint32 eamod,uint32 eareg,uint32 val,int sz,t_addr* pc) { - switch (sz) { - case SZ_BYTE: - return ea_dst_b(eamod,eareg,val,pc); - case SZ_WORD: - return ea_dst_w(eamod,eareg,val,pc); - case SZ_LONG: - return ea_dst_l(eamod,eareg,val,pc); - default: - return STOP_ERROP; - } + switch (sz) { + case SZ_BYTE: + return ea_dst_b(eamod,eareg,val,pc); + case SZ_WORD: + return ea_dst_w(eamod,eareg,val,pc); + case SZ_LONG: + return ea_dst_l(eamod,eareg,val,pc); + default: + return STOP_ERROP; + } } static t_bool testcond(uint32 c) { - int n,v; - - switch (c) { - case 0x0000: /*T*/ - return TRUE; - case 0x0100: /*F*/ - return FALSE; - case 0x0200: /*HI*/ - return !(CCR_C || CCR_Z); - case 0x0300: /*LS*/ - return CCR_C || CCR_Z; - case 0x0400: /*CC*/ - return !CCR_C; - case 0x0500: /*CS*/ - return CCR_C; - case 0x0600: /*NE*/ - return !CCR_Z; - case 0x0700: /*EQ*/ - return CCR_Z; - case 0x0800: /*VC*/ - return !CCR_V; - case 0x0900: /*VS*/ - return CCR_V; - case 0x0a00: /*PL*/ - return !CCR_N; - case 0x0b00: /*MI*/ - return CCR_N; - case 0x0c00: /*GE*/ - n = CCR_N; v = CCR_V; - return (n && v) || !(n || v); - case 0x0d00: /*LT*/ - n = CCR_N; v = CCR_V; - return (n && !v) || (!n && v); - case 0x0e00: /*GT*/ - n = CCR_N; v = CCR_V; - return !CCR_Z && (n || !v) && (!n || v); - case 0x0f00: /*LE*/ - n = CCR_N; v = CCR_V; - return CCR_Z || (!n && v) || (n && !v); - default: /*notreached*/ - return FALSE; - } + int n,v; + + switch (c) { + case 0x0000: /*T*/ + return TRUE; + case 0x0100: /*F*/ + return FALSE; + case 0x0200: /*HI*/ + return !(CCR_C || CCR_Z); + case 0x0300: /*LS*/ + return CCR_C || CCR_Z; + case 0x0400: /*CC*/ + return !CCR_C; + case 0x0500: /*CS*/ + return CCR_C; + case 0x0600: /*NE*/ + return !CCR_Z; + case 0x0700: /*EQ*/ + return CCR_Z; + case 0x0800: /*VC*/ + return !CCR_V; + case 0x0900: /*VS*/ + return CCR_V; + case 0x0a00: /*PL*/ + return !CCR_N; + case 0x0b00: /*MI*/ + return CCR_N; + case 0x0c00: /*GE*/ + n = CCR_N; v = CCR_V; + return (n && v) || !(n || v); + case 0x0d00: /*LT*/ + n = CCR_N; v = CCR_V; + return (n && !v) || (!n && v); + case 0x0e00: /*GT*/ + n = CCR_N; v = CCR_V; + return !CCR_Z && (n || !v) && (!n || v); + case 0x0f00: /*LE*/ + n = CCR_N; v = CCR_V; + return CCR_Z || (!n && v) || (n && !v); + default: /*notreached*/ + return FALSE; + } } /* push/pop on supervisor sp */ static t_stat m68k_push16(uint32 data) { - A7 -= 2; - return WriteVW(A7,data); + A7 -= 2; + return WriteVW(A7,data); } static t_stat m68k_push32(uint32 data) { - A7 -= 4; - return WriteVL(A7,data); + A7 -= 4; + return WriteVL(A7,data); } static t_stat m68k_pop16(uint32* data) { - A7 += 2; - return ReadVW(A7-2,data); + A7 += 2; + return ReadVW(A7-2,data); } static t_stat m68k_pop32(uint32* data) { - A7 += 4; - return ReadVL(A7-4,data); + A7 += 4; + return ReadVL(A7-4,data); } /* push/pop on current sp */ t_stat m68k_cpush16(uint32 data) { - *cur_sp -= 2; - return WriteVW(*cur_sp,data); + *cur_sp -= 2; + return WriteVW(*cur_sp,data); } static t_stat m68k_cpush32(uint32 data) { - *cur_sp -= 4; - return WriteVL(*cur_sp,data); + *cur_sp -= 4; + return WriteVL(*cur_sp,data); } static t_stat m68k_cpop16(uint32* data) { - *cur_sp += 2; - return ReadVW(*cur_sp-2,data); + *cur_sp += 2; + return ReadVW(*cur_sp-2,data); } static t_stat m68k_cpop32(uint32* data) { - *cur_sp += 4; - return ReadVL(*cur_sp-4,data); + *cur_sp += 4; + return ReadVL(*cur_sp-4,data); } t_stat m68k_gen_exception(int vecno,t_addr* pc) { - t_stat rc; - uint32 dummy; - t_addr oldpc = *pc; - char out[20]; - - /* @TODO VBR! */ - if (cputype<2) { - ASSERT_OKRET(m68k_push32(*pc)); - ASSERT_OKRET(m68k_push16(SR)); - m68k_set_s(TRUE); - CLRF(FLAG_T0|FLAG_T1); - } else { - /* no support for 68010 and above yet */ - return STOP_IMPL; - } + t_stat rc; + uint32 dummy; + t_addr oldpc = *pc; + char out[20]; + + /* @TODO VBR! */ + if (cputype<2) { + ASSERT_OKRET(m68k_push32(*pc)); + ASSERT_OKRET(m68k_push16(SR)); + m68k_set_s(TRUE); + CLRF(FLAG_T0|FLAG_T1); + } else { + /* no support for 68010 and above yet */ + return STOP_IMPL; + } - /* set the new PC */ - ASSERT_OKRET(ReadPL(vecno<<2,pc)); - IFDEBUG(DBG_CPU_EXC,fprintf(sim_deb,"CPU : [0x%08x] Exception: vec=%d to %s\n",oldpc,vecno,m68k_getsym(*pc,XFMT,out))); - return ReadInstr(*pc,&dummy); /* fill prefetch cache */ + /* set the new PC */ + ASSERT_OKRET(ReadPL(vecno<<2,pc)); + IFDEBUG(DBG_CPU_EXC,fprintf(sim_deb,"CPU : [0x%08x] Exception: vec=%d to %s\n",oldpc,vecno,m68k_getsym(*pc,XFMT,out))); + return ReadInstr(*pc,&dummy); /* fill prefetch cache */ } static uint32 m68k_add8(uint32 src1,uint32 src2,uint32 x) { - uint32 res = MASK_8L(src1) + MASK_8L(src2) + x; - SETNZ8(res); - SETF(MASK_9(res),FLAG_C|FLAG_X); - SETV_ADD8(src1,src2,res); - return res; + uint32 res = MASK_8L(src1) + MASK_8L(src2) + x; + SETNZ8(res); + SETF(MASK_9(res),FLAG_C|FLAG_X); + SETV_ADD8(src1,src2,res); + return res; } static uint32 m68k_add16(uint32 src1,uint32 src2,uint32 x,t_bool chgflags) { - uint32 res = MASK_16L(src1) + MASK_16L(src2) + x; - if (chgflags) { - SETNZ16(res); - SETF(MASK_17(res),FLAG_C|FLAG_X); - SETV_ADD16(src1,src2,res); - } - return res; + uint32 res = MASK_16L(src1) + MASK_16L(src2) + x; + if (chgflags) { + SETNZ16(res); + SETF(MASK_17(res),FLAG_C|FLAG_X); + SETV_ADD16(src1,src2,res); + } + return res; } static uint32 m68k_add32(t_uint64 src1,t_uint64 src2,t_uint64 x,t_bool chgflags) { - t_uint64 resx = MASK_32L(src1) + MASK_32L(src2) + x; - if (chgflags) { - SETNZ32(resx); - SETF(MASK_33(resx),FLAG_C|FLAG_X); - SETV_ADD32(src1,src2,resx); - } - return (uint32)resx; + t_uint64 resx = MASK_32L(src1) + MASK_32L(src2) + x; + if (chgflags) { + SETNZ32(resx); + SETF(MASK_33(resx),FLAG_C|FLAG_X); + SETV_ADD32(src1,src2,resx); + } + return (uint32)resx; } static uint32 m68k_sub8(uint32 dst,uint32 src,uint32 x) { - uint32 res = MASK_8L(dst) - MASK_8L(src) - x; - SETNZ8(res); - SETF(MASK_9(res),FLAG_C|FLAG_X); - SETV_SUB8(src,dst,res); - return res; + uint32 res = MASK_8L(dst) - MASK_8L(src) - x; + SETNZ8(res); + SETF(MASK_9(res),FLAG_C|FLAG_X); + SETV_SUB8(src,dst,res); + return res; } static uint32 m68k_sub16(uint32 dst,uint32 src,uint32 x,t_bool chgflags) { - uint32 res = MASK_16L(dst) - MASK_16L(src) - x; - if (chgflags) { - SETNZ16(res); - SETF(MASK_17(res),FLAG_C|FLAG_X); - SETV_SUB16(src,dst,res); - } - return res; + uint32 res = MASK_16L(dst) - MASK_16L(src) - x; + if (chgflags) { + SETNZ16(res); + SETF(MASK_17(res),FLAG_C|FLAG_X); + SETV_SUB16(src,dst,res); + } + return res; } static uint32 m68k_sub32(t_uint64 dst,t_uint64 src, t_uint64 x,t_bool chgflags) { - t_uint64 resx = MASK_32L(dst) - MASK_32L(src) - x; - if (chgflags) { - SETNZ32(resx); - SETF(MASK_33(resx),FLAG_C|FLAG_X); - SETV_SUB32(src,dst,resx); - } - return (uint32)resx; + t_uint64 resx = MASK_32L(dst) - MASK_32L(src) - x; + if (chgflags) { + SETNZ32(resx); + SETF(MASK_33(resx),FLAG_C|FLAG_X); + SETV_SUB32(src,dst,resx); + } + return (uint32)resx; } static uint32* movem_regs[] = { - (uint32*)&D0, (uint32*)&D1, (uint32*)&D2, (uint32*)&D3, (uint32*)&D4, (uint32*)&D5, (uint32*)&D6, (uint32*)&D7, - (uint32*)&A0, (uint32*)&A1, (uint32*)&A2, (uint32*)&A3, (uint32*)&A4, (uint32*)&A5, (uint32*)&A6, 0 + (uint32*)&D0, (uint32*)&D1, (uint32*)&D2, (uint32*)&D3, (uint32*)&D4, (uint32*)&D5, (uint32*)&D6, (uint32*)&D7, + (uint32*)&A0, (uint32*)&A1, (uint32*)&A2, (uint32*)&A3, (uint32*)&A4, (uint32*)&A5, (uint32*)&A6, 0 }; static t_stat m68k_movem_r_pd(t_addr* areg,uint32 regs,t_bool sz) { - int i; - t_stat rc; - t_addr ea = *areg; - movem_regs[15] = cur_sp; - for (i=0; i<16; i++) { - if (regs & (1<=1; i--) { - if (intpending & (1< SR_IPL)) { - /* found a pending irq at level i, that must be serviced now */ - IFDEBUG(DBG_CPU_INT,fprintf(sim_deb,"CPU : [0x%08x] Interrupt: granting level=%d, IPL=%d, pending=%x\n", - *pc,i,SR_IPL,intpending)); - m68k_gen_exception(intvectors[i],pc); /* generate an exception */ - intpending &= ~(1<=1; i--) { + if (intpending & (1< SR_IPL)) { + /* found a pending irq at level i, that must be serviced now */ + IFDEBUG(DBG_CPU_INT,fprintf(sim_deb,"CPU : [0x%08x] Interrupt: granting level=%d, IPL=%d, pending=%x\n", + *pc,i,SR_IPL,intpending)); + m68k_gen_exception(intvectors[i],pc); /* generate an exception */ + intpending &= ~(1<001| bchg,bclr,bset,btst - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 0 0 0 0 | Register | 1 |Opcode | 0 0 1 | Register | movep - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ - case 0x0000: - switch (IR_1103) { - case 0000400: case 0001400: case 0002400: case 0003400: - case 0004400: case 0005400: case 0006400: case 0007400: /* btst d,d */ - cnt = DRX & 0x1f; - goto do_btstd; - case 0004000: /* btst #,d */ - ASSERT_OK(ReadInstrInc(&PC,&IRE)); - cnt = IRE & 0x1f; -do_btstd: SETZ32(DRY & bitmask[cnt+1]); - rc = SCPE_OK; break; - case 0000420: case 0000430: case 0000440: case 0000450: - case 0000460: case 0000470: case 0001420: case 0001430: - case 0001440: case 0001450: case 0001460: case 0001470: - case 0002420: case 0002430: case 0002440: case 0002450: - case 0002460: case 0002470: case 0003420: case 0003430: - case 0003440: case 0003450: case 0003460: case 0003470: - case 0004420: case 0004430: case 0004440: case 0004450: - case 0004460: case 0004470: case 0005420: case 0005430: - case 0005440: case 0005450: case 0005460: case 0005470: - case 0006420: case 0006430: case 0006440: case 0006450: - case 0006460: case 0006470: case 0007420: case 0007430: - case 0007440: case 0007450: case 0007460: case 0007470: /* btst d,ea */ - ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); - cnt = DRX & 7; - goto do_btst8; - case 0004020: case 0004030: case 0004040: case 0004050: - case 0004060: case 0004070: /* btst #,ea */ - ASSERT_OK(ReadInstrInc(&PC,&IRE)); - ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); - cnt = IRE & 7; -do_btst8: SETZ8(src1 & bitmask[cnt+1]); - rc = SCPE_OK; - break; + if (sim_brk_summ && sim_brk_test(PC, E_BKPT_SPC|SWMASK('E'))) { + rc = STOP_IBKPT; + break; + } + + /* opcode fetch */ + ASSERT_OK(ReadInstrInc(&PC,&IR)); + IFDEBUG(DBG_CPU_PC,fprintf(sim_deb,"DEBUG(PC): PC=%x IR=%x\n",PC-2,IR)); + + sim_interval--; + + /* now decode instruction */ + switch (IR_1512) { + /* 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 0 0 0 0 | Opcode | 0 |Length | effective address | addi,andi,cmpi,eori,ori,subi + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 0 0 0 0 | Register | 1 |Opcode | effective address<>001| bchg,bclr,bset,btst + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 0 0 0 0 | Register | 1 |Opcode | 0 0 1 | Register | movep + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ + case 0x0000: + switch (IR_1103) { + case 0000400: case 0001400: case 0002400: case 0003400: + case 0004400: case 0005400: case 0006400: case 0007400: /* btst d,d */ + cnt = DRX & 0x1f; + goto do_btstd; + case 0004000: /* btst #,d */ + ASSERT_OK(ReadInstrInc(&PC,&IRE)); + cnt = IRE & 0x1f; +do_btstd: SETZ32(DRY & bitmask[cnt+1]); + rc = SCPE_OK; break; + case 0000420: case 0000430: case 0000440: case 0000450: + case 0000460: case 0000470: case 0001420: case 0001430: + case 0001440: case 0001450: case 0001460: case 0001470: + case 0002420: case 0002430: case 0002440: case 0002450: + case 0002460: case 0002470: case 0003420: case 0003430: + case 0003440: case 0003450: case 0003460: case 0003470: + case 0004420: case 0004430: case 0004440: case 0004450: + case 0004460: case 0004470: case 0005420: case 0005430: + case 0005440: case 0005450: case 0005460: case 0005470: + case 0006420: case 0006430: case 0006440: case 0006450: + case 0006460: case 0006470: case 0007420: case 0007430: + case 0007440: case 0007450: case 0007460: case 0007470: /* btst d,ea */ + ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); + cnt = DRX & 7; + goto do_btst8; + case 0004020: case 0004030: case 0004040: case 0004050: + case 0004060: case 0004070: /* btst #,ea */ + ASSERT_OK(ReadInstrInc(&PC,&IRE)); + ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); + cnt = IRE & 7; +do_btst8: SETZ8(src1 & bitmask[cnt+1]); + rc = SCPE_OK; + break; - case 0000700: case 0001700: case 0002700: case 0003700: - case 0004700: case 0005700: case 0006700: case 0007700: /* bset d,d */ - cnt = DRX & 0x1f; - src1 = bitmask[cnt+1]; - goto do_bsetd; - case 0004300: /* bset #,d */ - ASSERT_OK(ReadInstrInc(&PC,&IRE)); - src1 = bitmask[(IRE & 0x1f)+1]; -do_bsetd: reg = &DRY; - SETZ32(*reg & src1); - *reg |= src1; - rc = SCPE_OK; break; - case 0000720: case 0000730: case 0000740: case 0000750: - case 0000760: case 0000770: case 0001720: case 0001730: - case 0001740: case 0001750: case 0001760: case 0001770: - case 0002720: case 0002730: case 0002740: case 0002750: - case 0002760: case 0002770: case 0003720: case 0003730: - case 0003740: case 0003750: case 0003760: case 0003770: - case 0004720: case 0004730: case 0004740: case 0004750: - case 0004760: case 0004770: case 0005720: case 0005730: - case 0005740: case 0005750: case 0005760: case 0005770: - case 0006720: case 0006730: case 0006740: case 0006750: - case 0006760: case 0006770: case 0007720: case 0007730: - case 0007740: case 0007750: case 0007760: case 0007770: /* bset d,ea */ - ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&res,&PC)); - cnt = DRY & 7; - src1 = bitmask[cnt+1]; - goto do_bset8; - case 0004320: case 0004330: case 0004340: case 0004350: - case 0004360: case 0004370: /* bset # */ - ASSERT_OK(ReadInstrInc(&PC,&IRE)); - ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&res,&PC)); - src1 = bitmask[(IRE&7)+1]; -do_bset8: SETZ8(res & src1); - rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res | src1); break; - - case 0000500: case 0001500: case 0002500: case 0003500: - case 0004500: case 0005500: case 0006500: case 0007500: /* bchg d,d */ - cnt = DRX & 0x1f; - src1 = bitmask[cnt+1]; - goto do_bchgd; - case 0004100: /* bchg #,d */ - ASSERT_OK(ReadInstrInc(&PC,&IRE)); - src1 = bitmask[(IRE & 0x1f)+1]; -do_bchgd: reg = &DRY; - SETZ32(*reg & src1); - *reg ^= src1; - rc = SCPE_OK; break; - case 0000520: case 0000530: case 0000540: case 0000550: - case 0000560: case 0000570: case 0001520: case 0001530: - case 0001540: case 0001550: case 0001560: case 0001570: - case 0002520: case 0002530: case 0002540: case 0002550: - case 0002560: case 0002570: case 0003520: case 0003530: - case 0003540: case 0003550: case 0003560: case 0003570: - case 0004520: case 0004530: case 0004540: case 0004550: - case 0004560: case 0004570: case 0005520: case 0005530: - case 0005540: case 0005550: case 0005560: case 0005570: - case 0006520: case 0006530: case 0006540: case 0006550: - case 0006560: case 0006570: case 0007520: case 0007530: - case 0007540: case 0007550: case 0007560: case 0007570: /* bchg d,ea */ - ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&res,&PC)); - cnt = DRX & 7; - src1 = bitmask[cnt+1]; - goto do_bchg8; - case 0004120: case 0004130: case 0004140: case 0004150: - case 0004160: case 0004170: /* bchg #,ea */ - ASSERT_OK(ReadInstrInc(&PC,&IRE)); - ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&res,&PC)); - src1 = bitmask[(IRE&7)+1]; -do_bchg8: SETZ8(res & src1); - rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res ^ src1); break; + case 0000700: case 0001700: case 0002700: case 0003700: + case 0004700: case 0005700: case 0006700: case 0007700: /* bset d,d */ + cnt = DRX & 0x1f; + src1 = bitmask[cnt+1]; + goto do_bsetd; + case 0004300: /* bset #,d */ + ASSERT_OK(ReadInstrInc(&PC,&IRE)); + src1 = bitmask[(IRE & 0x1f)+1]; +do_bsetd: reg = &DRY; + SETZ32(*reg & src1); + *reg |= src1; + rc = SCPE_OK; break; + case 0000720: case 0000730: case 0000740: case 0000750: + case 0000760: case 0000770: case 0001720: case 0001730: + case 0001740: case 0001750: case 0001760: case 0001770: + case 0002720: case 0002730: case 0002740: case 0002750: + case 0002760: case 0002770: case 0003720: case 0003730: + case 0003740: case 0003750: case 0003760: case 0003770: + case 0004720: case 0004730: case 0004740: case 0004750: + case 0004760: case 0004770: case 0005720: case 0005730: + case 0005740: case 0005750: case 0005760: case 0005770: + case 0006720: case 0006730: case 0006740: case 0006750: + case 0006760: case 0006770: case 0007720: case 0007730: + case 0007740: case 0007750: case 0007760: case 0007770: /* bset d,ea */ + ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&res,&PC)); + cnt = DRY & 7; + src1 = bitmask[cnt+1]; + goto do_bset8; + case 0004320: case 0004330: case 0004340: case 0004350: + case 0004360: case 0004370: /* bset # */ + ASSERT_OK(ReadInstrInc(&PC,&IRE)); + ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&res,&PC)); + src1 = bitmask[(IRE&7)+1]; +do_bset8: SETZ8(res & src1); + rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res | src1); break; + + case 0000500: case 0001500: case 0002500: case 0003500: + case 0004500: case 0005500: case 0006500: case 0007500: /* bchg d,d */ + cnt = DRX & 0x1f; + src1 = bitmask[cnt+1]; + goto do_bchgd; + case 0004100: /* bchg #,d */ + ASSERT_OK(ReadInstrInc(&PC,&IRE)); + src1 = bitmask[(IRE & 0x1f)+1]; +do_bchgd: reg = &DRY; + SETZ32(*reg & src1); + *reg ^= src1; + rc = SCPE_OK; break; + case 0000520: case 0000530: case 0000540: case 0000550: + case 0000560: case 0000570: case 0001520: case 0001530: + case 0001540: case 0001550: case 0001560: case 0001570: + case 0002520: case 0002530: case 0002540: case 0002550: + case 0002560: case 0002570: case 0003520: case 0003530: + case 0003540: case 0003550: case 0003560: case 0003570: + case 0004520: case 0004530: case 0004540: case 0004550: + case 0004560: case 0004570: case 0005520: case 0005530: + case 0005540: case 0005550: case 0005560: case 0005570: + case 0006520: case 0006530: case 0006540: case 0006550: + case 0006560: case 0006570: case 0007520: case 0007530: + case 0007540: case 0007550: case 0007560: case 0007570: /* bchg d,ea */ + ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&res,&PC)); + cnt = DRX & 7; + src1 = bitmask[cnt+1]; + goto do_bchg8; + case 0004120: case 0004130: case 0004140: case 0004150: + case 0004160: case 0004170: /* bchg #,ea */ + ASSERT_OK(ReadInstrInc(&PC,&IRE)); + ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&res,&PC)); + src1 = bitmask[(IRE&7)+1]; +do_bchg8: SETZ8(res & src1); + rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res ^ src1); break; - case 0000600: case 0001600: case 0002600: case 0003600: - case 0004600: case 0005600: case 0006600: case 0007600: /* bclr d,d */ - cnt = DRX & 0x1f; - src1 = bitmask[cnt+1]; - goto do_bclrd; - case 0004200: /* bclr #,d */ - ASSERT_OK(ReadInstrInc(&PC,&IRE)); - src1 = bitmask[(IRE & 0x1f)+1]; -do_bclrd: reg = &DRY; - SETZ32(*reg & src1); - *reg &= ~src1; - rc = SCPE_OK; break; - case 0000620: case 0000630: case 0000640: case 0000650: - case 0000660: case 0000670: case 0001620: case 0001630: - case 0001640: case 0001650: case 0001660: case 0001670: - case 0002620: case 0002630: case 0002640: case 0002650: - case 0002660: case 0002670: case 0003620: case 0003630: - case 0003640: case 0003650: case 0003660: case 0003670: - case 0004620: case 0004630: case 0004640: case 0004650: - case 0004660: case 0004670: case 0005620: case 0005630: - case 0005640: case 0005650: case 0005660: case 0005670: - case 0006620: case 0006630: case 0006640: case 0006650: - case 0006660: case 0006670: case 0007620: case 0007630: - case 0007640: case 0007650: case 0007660: case 0007670: /* bclr d,ea */ - ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&res,&PC)); - cnt = DRX & 7; - src1 = bitmask[cnt+1]; - goto do_bclr8; - case 0004220: case 0004230: case 0004240: case 0004250: - case 0004260: case 0004270: /* bclr #,ea */ - ASSERT_OK(ReadInstrInc(&PC,&IRE)); - ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&res,&PC)); - src1 = bitmask[(IRE&7)+1]; -do_bclr8: SETZ8(res & src1); - rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res & ~src1); break; - - case 0000410: case 0001410: case 0002410: case 0003410: - case 0004410: case 0005410: case 0006410: case 0007410: /*movep.w m,r*/ - ASSERT_OK(ea_src_l_nd(IR_EAMOD,IR_EAREG,&srca,&PC)); - ASSERT_OK(ReadVB(srca,&src1)); - reg = &DRX; - *reg = src1<<8; - rc = ReadVB(srca+2,&src1); - *reg = COMBINE8(*reg,src1); - break; - case 0000510: case 0001510: case 0002510: case 0003510: - case 0004510: case 0005510: case 0006510: case 0007510: /*movep.l m,r*/ - ASSERT_OK(ea_src_l_nd(IR_EAMOD,IR_EAREG,&srca,&PC)); - ASSERT_OK(ReadVB(srca,&src1)); - reg = &DRX; - *reg = src1<<8; - ASSERT_OK(ReadVB(srca+2,&src1)); - *reg = (COMBINE8(*reg,src1))<<8; - ASSERT_OK(ReadVB(srca+4,&src1)); - *reg = (COMBINE8(*reg,src1))<<8; - rc = ReadVB(srca+6,&src1); - *reg = (COMBINE8(*reg,src1))<<8; - break; - case 0000610: case 0001610: case 0002610: case 0003610: - case 0004610: case 0005610: case 0006610: case 0007610: /*movep.w r,m*/ - ASSERT_OK(ea_src_l_nd(IR_EAMOD,IR_EAREG,&srca,&PC)); - src1 = DRX; - ASSERT_OK(WriteVB(srca,src1>>8)); - rc = WriteVB(srca+2,src1); break; - case 0000710: case 0001710: case 0002710: case 0003710: - case 0004710: case 0005710: case 0006710: case 0007710: /*movep.l r,m*/ - ASSERT_OK(ea_src_l_nd(IR_EAMOD,IR_EAREG,&srca,&PC)); - ASSERT_OK(WriteVB(srca,src1>>24)); - ASSERT_OK(WriteVB(srca+2,src1>>16)); - ASSERT_OK(WriteVB(srca+4,src1>>8)); - rc = WriteVB(srca+6,src1); break; - - case 0000000: case 0000020: case 0000030: case 0000040: - case 0000050: case 0000060: case 0000070: /*ori.b*/ - ASSERT_OK(ReadInstrInc(&PC,&src2)); - ASSERT_OK(ea_src_bs(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = src1 | src2; - if (IR_EA != EA_IMM) { - SETNZ8(res); - CLRF(FLAG_C|FLAG_V); - } - rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res); - tracet0 = SR_T0; break; - case 0000100: case 0000120: case 0000130: case 0000140: - case 0000150: case 0000160: case 0000170: /*ori.w*/ - if (IR_EA == EA_IMM) ASSERT_PRIV(); - ASSERT_OK(ReadInstrInc(&PC,&src2)); - ASSERT_OK(ea_src_ws(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = src1 | src2; - if (IR_EA != EA_IMM) { - SETNZ16(res); - CLRF(FLAG_C|FLAG_V); - } - rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); - tracet0 = SR_T0; break; - case 0000200: case 0000220: case 0000230: case 0000240: - case 0000250: case 0000260: case 0000270: /*ori.l*/ - ASSERT_OK(ReadInstrLongInc(&PC,&src2)); - ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = src1 | src2; - SETNZ32(res); - CLRF(FLAG_C|FLAG_V); - rc = ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res); break; + case 0000600: case 0001600: case 0002600: case 0003600: + case 0004600: case 0005600: case 0006600: case 0007600: /* bclr d,d */ + cnt = DRX & 0x1f; + src1 = bitmask[cnt+1]; + goto do_bclrd; + case 0004200: /* bclr #,d */ + ASSERT_OK(ReadInstrInc(&PC,&IRE)); + src1 = bitmask[(IRE & 0x1f)+1]; +do_bclrd: reg = &DRY; + SETZ32(*reg & src1); + *reg &= ~src1; + rc = SCPE_OK; break; + case 0000620: case 0000630: case 0000640: case 0000650: + case 0000660: case 0000670: case 0001620: case 0001630: + case 0001640: case 0001650: case 0001660: case 0001670: + case 0002620: case 0002630: case 0002640: case 0002650: + case 0002660: case 0002670: case 0003620: case 0003630: + case 0003640: case 0003650: case 0003660: case 0003670: + case 0004620: case 0004630: case 0004640: case 0004650: + case 0004660: case 0004670: case 0005620: case 0005630: + case 0005640: case 0005650: case 0005660: case 0005670: + case 0006620: case 0006630: case 0006640: case 0006650: + case 0006660: case 0006670: case 0007620: case 0007630: + case 0007640: case 0007650: case 0007660: case 0007670: /* bclr d,ea */ + ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&res,&PC)); + cnt = DRX & 7; + src1 = bitmask[cnt+1]; + goto do_bclr8; + case 0004220: case 0004230: case 0004240: case 0004250: + case 0004260: case 0004270: /* bclr #,ea */ + ASSERT_OK(ReadInstrInc(&PC,&IRE)); + ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&res,&PC)); + src1 = bitmask[(IRE&7)+1]; +do_bclr8: SETZ8(res & src1); + rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res & ~src1); break; + + case 0000410: case 0001410: case 0002410: case 0003410: + case 0004410: case 0005410: case 0006410: case 0007410: /*movep.w m,r*/ + ASSERT_OK(ea_src_l_nd(IR_EAMOD,IR_EAREG,&srca,&PC)); + ASSERT_OK(ReadVB(srca,&src1)); + reg = &DRX; + *reg = src1<<8; + rc = ReadVB(srca+2,&src1); + *reg = COMBINE8(*reg,src1); + break; + case 0000510: case 0001510: case 0002510: case 0003510: + case 0004510: case 0005510: case 0006510: case 0007510: /*movep.l m,r*/ + ASSERT_OK(ea_src_l_nd(IR_EAMOD,IR_EAREG,&srca,&PC)); + ASSERT_OK(ReadVB(srca,&src1)); + reg = &DRX; + *reg = src1<<8; + ASSERT_OK(ReadVB(srca+2,&src1)); + *reg = (COMBINE8(*reg,src1))<<8; + ASSERT_OK(ReadVB(srca+4,&src1)); + *reg = (COMBINE8(*reg,src1))<<8; + rc = ReadVB(srca+6,&src1); + *reg = (COMBINE8(*reg,src1))<<8; + break; + case 0000610: case 0001610: case 0002610: case 0003610: + case 0004610: case 0005610: case 0006610: case 0007610: /*movep.w r,m*/ + ASSERT_OK(ea_src_l_nd(IR_EAMOD,IR_EAREG,&srca,&PC)); + src1 = DRX; + ASSERT_OK(WriteVB(srca,src1>>8)); + rc = WriteVB(srca+2,src1); break; + case 0000710: case 0001710: case 0002710: case 0003710: + case 0004710: case 0005710: case 0006710: case 0007710: /*movep.l r,m*/ + ASSERT_OK(ea_src_l_nd(IR_EAMOD,IR_EAREG,&srca,&PC)); + ASSERT_OK(WriteVB(srca,src1>>24)); + ASSERT_OK(WriteVB(srca+2,src1>>16)); + ASSERT_OK(WriteVB(srca+4,src1>>8)); + rc = WriteVB(srca+6,src1); break; + + case 0000000: case 0000020: case 0000030: case 0000040: + case 0000050: case 0000060: case 0000070: /*ori.b*/ + ASSERT_OK(ReadInstrInc(&PC,&src2)); + ASSERT_OK(ea_src_bs(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = src1 | src2; + if (IR_EA != EA_IMM) { + SETNZ8(res); + CLRF(FLAG_C|FLAG_V); + } + rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res); + tracet0 = SR_T0; break; + case 0000100: case 0000120: case 0000130: case 0000140: + case 0000150: case 0000160: case 0000170: /*ori.w*/ + if (IR_EA == EA_IMM) ASSERT_PRIV(); + ASSERT_OK(ReadInstrInc(&PC,&src2)); + ASSERT_OK(ea_src_ws(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = src1 | src2; + if (IR_EA != EA_IMM) { + SETNZ16(res); + CLRF(FLAG_C|FLAG_V); + } + rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); + tracet0 = SR_T0; break; + case 0000200: case 0000220: case 0000230: case 0000240: + case 0000250: case 0000260: case 0000270: /*ori.l*/ + ASSERT_OK(ReadInstrLongInc(&PC,&src2)); + ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = src1 | src2; + SETNZ32(res); + CLRF(FLAG_C|FLAG_V); + rc = ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res); break; - case 0001000: case 0001020: case 0001030: case 0001040: - case 0001050: case 0001060: case 0001070: /*andi.b*/ - ASSERT_OK(ReadInstrInc(&PC,&src2)); - ASSERT_OK(ea_src_bs(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = src1 & src2; - if (IR_EA != EA_IMM) { - SETNZ8(res); - CLRF(FLAG_C|FLAG_V); - } - rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res); - tracet0 = SR_T0; break; - case 0001100: case 0001120: case 0001130: case 0001140: - case 0001150: case 0001160: case 0001170: /*andi.w*/ - if (IR_EA==EA_IMM) ASSERT_PRIV(); - ASSERT_OK(ReadInstrInc(&PC,&src2)); - ASSERT_OK(ea_src_ws(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = src1 & src2; - if (IR_EA != EA_IMM) { - SETNZ16(res); - CLRF(FLAG_C|FLAG_V); - } - rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); - tracet0 = SR_T0; break; - case 0001200: case 0001220: case 0001230: case 0001240: - case 0001250: case 0001260: case 0001270: /*andi.l*/ - ASSERT_OK(ReadInstrLongInc(&PC,&src2)); - ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = src1 & src2; - SETNZ32(res); - CLRF(FLAG_C|FLAG_V); - rc = ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res); - break; + case 0001000: case 0001020: case 0001030: case 0001040: + case 0001050: case 0001060: case 0001070: /*andi.b*/ + ASSERT_OK(ReadInstrInc(&PC,&src2)); + ASSERT_OK(ea_src_bs(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = src1 & src2; + if (IR_EA != EA_IMM) { + SETNZ8(res); + CLRF(FLAG_C|FLAG_V); + } + rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res); + tracet0 = SR_T0; break; + case 0001100: case 0001120: case 0001130: case 0001140: + case 0001150: case 0001160: case 0001170: /*andi.w*/ + if (IR_EA==EA_IMM) ASSERT_PRIV(); + ASSERT_OK(ReadInstrInc(&PC,&src2)); + ASSERT_OK(ea_src_ws(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = src1 & src2; + if (IR_EA != EA_IMM) { + SETNZ16(res); + CLRF(FLAG_C|FLAG_V); + } + rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); + tracet0 = SR_T0; break; + case 0001200: case 0001220: case 0001230: case 0001240: + case 0001250: case 0001260: case 0001270: /*andi.l*/ + ASSERT_OK(ReadInstrLongInc(&PC,&src2)); + ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = src1 & src2; + SETNZ32(res); + CLRF(FLAG_C|FLAG_V); + rc = ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res); + break; - case 0006000: case 0006020: case 0006030: case 0006040: - case 0006050: case 0006060: case 0006070: /*cmpi.b*/ - case 0002000: case 0002020: case 0002030: case 0002040: - case 0002050: case 0002060: case 0002070: /*subi.b*/ - ASSERT_OK(ReadInstrInc(&PC,&src2)); - ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = m68k_sub8(src1,src2,0); - rc = IR_1103 < 0006000 ? ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res) : SCPE_OK; - break; - case 0006100: case 0006120: case 0006130: case 0006140: - case 0006150: case 0006160: case 0006170: /*cmpi.w*/ - case 0002100: case 0002120: case 0002130: case 0002140: - case 0002150: case 0002160: case 0002170: /*subi.w*/ - ASSERT_OK(ReadInstrInc(&PC,&src2)); - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = m68k_sub16(src1,src2,0,TRUE); - rc = IR_1103 < 0006000 ? ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res) : SCPE_OK; - break; - case 0006200: case 0006220: case 0006230: case 0006240: - case 0006250: case 0006260: case 0006270: /*cmpi.l*/ - case 0002200: case 0002220: case 0002230: case 0002240: - case 0002250: case 0002260: case 0002270: /*subi.l*/ - ASSERT_OK(ReadInstrLongInc(&PC,&src2)); - ASSERT_OK(ea_src_l64(IR_EAMOD,IR_EAREG,&srcx1,&PC)); - res = m68k_sub32(srcx1,(t_uint64)src2,0,TRUE); - rc = IR_1103 < 0006000 ? ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res) : SCPE_OK; - break; + case 0006000: case 0006020: case 0006030: case 0006040: + case 0006050: case 0006060: case 0006070: /*cmpi.b*/ + case 0002000: case 0002020: case 0002030: case 0002040: + case 0002050: case 0002060: case 0002070: /*subi.b*/ + ASSERT_OK(ReadInstrInc(&PC,&src2)); + ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = m68k_sub8(src1,src2,0); + rc = IR_1103 < 0006000 ? ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res) : SCPE_OK; + break; + case 0006100: case 0006120: case 0006130: case 0006140: + case 0006150: case 0006160: case 0006170: /*cmpi.w*/ + case 0002100: case 0002120: case 0002130: case 0002140: + case 0002150: case 0002160: case 0002170: /*subi.w*/ + ASSERT_OK(ReadInstrInc(&PC,&src2)); + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = m68k_sub16(src1,src2,0,TRUE); + rc = IR_1103 < 0006000 ? ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res) : SCPE_OK; + break; + case 0006200: case 0006220: case 0006230: case 0006240: + case 0006250: case 0006260: case 0006270: /*cmpi.l*/ + case 0002200: case 0002220: case 0002230: case 0002240: + case 0002250: case 0002260: case 0002270: /*subi.l*/ + ASSERT_OK(ReadInstrLongInc(&PC,&src2)); + ASSERT_OK(ea_src_l64(IR_EAMOD,IR_EAREG,&srcx1,&PC)); + res = m68k_sub32(srcx1,(t_uint64)src2,0,TRUE); + rc = IR_1103 < 0006000 ? ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res) : SCPE_OK; + break; - case 0003000: case 0003020: case 0003030: case 0003040: - case 0003050: case 0003060: case 0003070: /*addi.b*/ - ASSERT_OK(ReadInstrInc(&PC,&src2)); - ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = m68k_add8(src1,src2,0); - rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res); break; - case 0003100: case 0003120: case 0003130: case 0003140: - case 0003150: case 0003160: case 0003170: /*addi.w*/ - ASSERT_OK(ReadInstrInc(&PC,&src2)); - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = m68k_add16(src1,src2,0,TRUE); - rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); break; - case 0003200: case 0003220: case 0003230: case 0003240: - case 0003250: case 0003260: case 0003270: /*addi.l*/ - ASSERT_OK(ReadInstrLongInc(&PC,&src2)); - ASSERT_OK(ea_src_l64(IR_EAMOD,IR_EAREG,&srcx1,&PC)); - res = m68k_add32(srcx1,(t_uint64)src2,0,TRUE); - rc = ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res); - break; - case 0005000: case 0005020: case 0005030: case 0005040: - case 0005050: case 0005060: case 0005070: /*eori.b*/ - ASSERT_OK(ReadInstrInc(&PC,&src2)); - ASSERT_OK(ea_src_bs(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = src1 ^ src2; - if (IR_EA != EA_IMM) { - SETNZ8(res); - CLRF(FLAG_C|FLAG_V); - } - rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res); - tracet0 = SR_T0; break; - case 0005100: case 0005120: case 0005130: case 0005140: - case 0005150: case 0005160: case 0005170: /*eori.w*/ - if (IR_EA==EA_IMM) ASSERT_PRIV(); - ASSERT_OK(ReadInstrInc(&PC,&src2)); - ASSERT_OK(ea_src_ws(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = src1 ^ src2; - if (IR_EA != EA_IMM) { - SETNZ16(res); - CLRF(FLAG_C|FLAG_V); - } - rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); - tracet0 = SR_T0; break; - case 0005200: case 0005220: case 0005230: case 0005240: - case 0005250: case 0005260: case 0005270: /*eori.l*/ - ASSERT_OK(ReadInstrLongInc(&PC,&src2)); - ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = src1 ^ src2; - SETNZ32(res); - CLRF(FLAG_C|FLAG_V); - rc = ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res); break; + case 0003000: case 0003020: case 0003030: case 0003040: + case 0003050: case 0003060: case 0003070: /*addi.b*/ + ASSERT_OK(ReadInstrInc(&PC,&src2)); + ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = m68k_add8(src1,src2,0); + rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res); break; + case 0003100: case 0003120: case 0003130: case 0003140: + case 0003150: case 0003160: case 0003170: /*addi.w*/ + ASSERT_OK(ReadInstrInc(&PC,&src2)); + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = m68k_add16(src1,src2,0,TRUE); + rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); break; + case 0003200: case 0003220: case 0003230: case 0003240: + case 0003250: case 0003260: case 0003270: /*addi.l*/ + ASSERT_OK(ReadInstrLongInc(&PC,&src2)); + ASSERT_OK(ea_src_l64(IR_EAMOD,IR_EAREG,&srcx1,&PC)); + res = m68k_add32(srcx1,(t_uint64)src2,0,TRUE); + rc = ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res); + break; + case 0005000: case 0005020: case 0005030: case 0005040: + case 0005050: case 0005060: case 0005070: /*eori.b*/ + ASSERT_OK(ReadInstrInc(&PC,&src2)); + ASSERT_OK(ea_src_bs(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = src1 ^ src2; + if (IR_EA != EA_IMM) { + SETNZ8(res); + CLRF(FLAG_C|FLAG_V); + } + rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res); + tracet0 = SR_T0; break; + case 0005100: case 0005120: case 0005130: case 0005140: + case 0005150: case 0005160: case 0005170: /*eori.w*/ + if (IR_EA==EA_IMM) ASSERT_PRIV(); + ASSERT_OK(ReadInstrInc(&PC,&src2)); + ASSERT_OK(ea_src_ws(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = src1 ^ src2; + if (IR_EA != EA_IMM) { + SETNZ16(res); + CLRF(FLAG_C|FLAG_V); + } + rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); + tracet0 = SR_T0; break; + case 0005200: case 0005220: case 0005230: case 0005240: + case 0005250: case 0005260: case 0005270: /*eori.l*/ + ASSERT_OK(ReadInstrLongInc(&PC,&src2)); + ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = src1 ^ src2; + SETNZ32(res); + CLRF(FLAG_C|FLAG_V); + rc = ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res); break; - default: - rc = STOP_ERROP; - } - break; + default: + rc = STOP_ERROP; + } + break; - /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 0 0 |Length2| TargetReg | TargetMode| SourceMode| SourceReg | move - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 0 0 |Length2| TargetReg | 0 0 1 | SourceMode| SourceReg | movea - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ - case 0x1000: - ea = IR_EATGT; - ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); - if (ea == EA_ADIR) - rc = STOP_ERROP; /* movea.b */ - else { - ASSERT_OK(ea_dst_b(ea,IR_REGX,src1,&PC)); - SETNZ8(src1); - } - break; - case 0x2000: - ea = IR_EATGT; - ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&src1,&PC)); - if (ea==EA_ADIR) { /* movea.l */ - *AREG(IR_REGX) = src1; - rc = SCPE_OK; - } else { - rc = ea_dst_l(ea,IR_REGX,src1,&PC); - SETNZ32(src1); - } - break; - case 0x3000: - ea = IR_EATGT; - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - if (ea==EA_ADIR) { /* movea.w */ - *AREG(IR_REGX) = EXTW(src1); - rc = SCPE_OK; - } else { - rc = ea_dst_w(ea,IR_REGX,src1,&PC); - SETNZ16(src1); - } - break; + /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 0 0 |Length2| TargetReg | TargetMode| SourceMode| SourceReg | move + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 0 0 |Length2| TargetReg | 0 0 1 | SourceMode| SourceReg | movea + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ + case 0x1000: + ea = IR_EATGT; + ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); + if (ea == EA_ADIR) + rc = STOP_ERROP; /* movea.b */ + else { + ASSERT_OK(ea_dst_b(ea,IR_REGX,src1,&PC)); + SETNZ8(src1); + } + break; + case 0x2000: + ea = IR_EATGT; + ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&src1,&PC)); + if (ea==EA_ADIR) { /* movea.l */ + *AREG(IR_REGX) = src1; + rc = SCPE_OK; + } else { + rc = ea_dst_l(ea,IR_REGX,src1,&PC); + SETNZ32(src1); + } + break; + case 0x3000: + ea = IR_EATGT; + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + if (ea==EA_ADIR) { /* movea.w */ + *AREG(IR_REGX) = EXTW(src1); + rc = SCPE_OK; + } else { + rc = ea_dst_w(ea,IR_REGX,src1,&PC); + SETNZ16(src1); + } + break; - /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 0 1 0 0 | Opcode | 0 |Length | effective address | clr,neg,negx,not,tst - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 0 1 0 0 | Opcode | 0 | 1 1 | effective address | moveccr,movesr - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 0 1 0 0 | Opcode | 0 |Mode | 0 0 0 | Register | ext - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 0 1 0 0 | Opcode | 0 |Opcode | effective address | jmp,jsr,movem,nbcd,pea,tas - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 0 1 0 0 | Opcode | 0 |Opcode | Vector | trap - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 0 1 0 0 | Opcode | 0 |Opcode | Register | link,moveusp,swap,unlink - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 0 1 0 0 | Opcode | 0 |Opcode | illegal,nop,reset,rte,rtr,rts,stop,trapv - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 0 1 0 0 | Register | 1 |Opcode | effective address | chk,lea - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ - case 0x4000: - switch (IR_1106) { - case 000600: case 001600: case 002600: case 003600: - case 004600: case 005600: case 006600: case 007600: /*chk*/ - src1 = DRX; - SETF(src1 < 0,FLAG_N); - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&res,&PC)); - rc = CCR_N || src1 > res ? m68k_gen_exception(6,&PC) : SCPE_OK; - break; - case 000700: case 001700: case 002700: case 003700: - case 004700: case 005700: case 006700: case 007700: /*lea*/ - ASSERT_OK(ea_src_l_nd(IR_EAMOD,IR_EAREG,&srca,&PC)); - *AREG(IR_REGX) = srca; - rc = SCPE_OK; - break; - - case 000300: /*move from sr*/ - rc = ea_dst_w(IR_EAMOD,IR_EAREG,SR,&PC); - break; + /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 0 1 0 0 | Opcode | 0 |Length | effective address | clr,neg,negx,not,tst + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 0 1 0 0 | Opcode | 0 | 1 1 | effective address | moveccr,movesr + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 0 1 0 0 | Opcode | 0 |Mode | 0 0 0 | Register | ext + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 0 1 0 0 | Opcode | 0 |Opcode | effective address | jmp,jsr,movem,nbcd,pea,tas + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 0 1 0 0 | Opcode | 0 |Opcode | Vector | trap + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 0 1 0 0 | Opcode | 0 |Opcode | Register | link,moveusp,swap,unlink + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 0 1 0 0 | Opcode | 0 |Opcode | illegal,nop,reset,rte,rtr,rts,stop,trapv + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 0 1 0 0 | Register | 1 |Opcode | effective address | chk,lea + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ + case 0x4000: + switch (IR_1106) { + case 000600: case 001600: case 002600: case 003600: + case 004600: case 005600: case 006600: case 007600: /*chk*/ + src1 = DRX; + SETF(src1 < 0,FLAG_N); + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&res,&PC)); + rc = CCR_N || src1 > res ? m68k_gen_exception(6,&PC) : SCPE_OK; + break; + case 000700: case 001700: case 002700: case 003700: + case 004700: case 005700: case 006700: case 007700: /*lea*/ + ASSERT_OK(ea_src_l_nd(IR_EAMOD,IR_EAREG,&srca,&PC)); + *AREG(IR_REGX) = srca; + rc = SCPE_OK; + break; + + case 000300: /*move from sr*/ + rc = ea_dst_w(IR_EAMOD,IR_EAREG,SR,&PC); + break; - case 001000: /*clr.b*/ - ONEF(FLAG_Z); - CLRF(FLAG_N|FLAG_C|FLAG_V); - rc = ea_dst_b(IR_EAMOD,IR_EAREG,0,&PC); - break; - case 001100: /*clr.w*/ - ONEF(FLAG_Z); - CLRF(FLAG_N|FLAG_C|FLAG_V); - rc = ea_dst_w(IR_EAMOD,IR_EAREG,0,&PC); - break; - case 001200: /*clr.l*/ - ONEF(FLAG_Z); - CLRF(FLAG_N|FLAG_C|FLAG_V); - rc = ea_dst_l(IR_EAMOD,IR_EAREG,0,&PC); - break; + case 001000: /*clr.b*/ + ONEF(FLAG_Z); + CLRF(FLAG_N|FLAG_C|FLAG_V); + rc = ea_dst_b(IR_EAMOD,IR_EAREG,0,&PC); + break; + case 001100: /*clr.w*/ + ONEF(FLAG_Z); + CLRF(FLAG_N|FLAG_C|FLAG_V); + rc = ea_dst_w(IR_EAMOD,IR_EAREG,0,&PC); + break; + case 001200: /*clr.l*/ + ONEF(FLAG_Z); + CLRF(FLAG_N|FLAG_C|FLAG_V); + rc = ea_dst_l(IR_EAMOD,IR_EAREG,0,&PC); + break; - case 000000: /*negx.b*/ - ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); - src1 += (CCR_X ? 1 : 0); - goto do_neg8; - case 002000: /*neg.b*/ - ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); -do_neg8: res = m68k_sub8(0,src1,0); - rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res); - break; + case 000000: /*negx.b*/ + ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); + src1 += (CCR_X ? 1 : 0); + goto do_neg8; + case 002000: /*neg.b*/ + ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); +do_neg8: res = m68k_sub8(0,src1,0); + rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res); + break; - case 000100: /*negx.w*/ - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - src1 += (CCR_X ? 1 : 0); - goto do_neg16; - case 002100: /*neg.w*/ - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); -do_neg16: res = m68k_sub16(0,src1,0,TRUE); - rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); - break; + case 000100: /*negx.w*/ + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + src1 += (CCR_X ? 1 : 0); + goto do_neg16; + case 002100: /*neg.w*/ + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); +do_neg16: res = m68k_sub16(0,src1,0,TRUE); + rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); + break; - case 000200: /*negx.l*/ - ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&src1,&PC)); - srcx1 = (t_uint64)src1 + (CCR_X ? 1 : 0); - goto do_neg32; - case 002200: /*neg.l*/ - ASSERT_OK(ea_src_l64(IR_EAMOD,IR_EAREG,&srcx1,&PC)); -do_neg32: res = m68k_sub32(0,srcx1,0,TRUE); - rc = ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res); - break; + case 000200: /*negx.l*/ + ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&src1,&PC)); + srcx1 = (t_uint64)src1 + (CCR_X ? 1 : 0); + goto do_neg32; + case 002200: /*neg.l*/ + ASSERT_OK(ea_src_l64(IR_EAMOD,IR_EAREG,&srcx1,&PC)); +do_neg32: res = m68k_sub32(0,srcx1,0,TRUE); + rc = ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res); + break; - case 002300: /*move to ccr*/ - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - SR = COMBINE8(SR,src1); - break; + case 002300: /*move to ccr*/ + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + SR = COMBINE8(SR,src1); + break; - case 003000: /*not.b*/ - ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = ~src1; - SETNZ8(res); - CLRF(FLAG_C|FLAG_V); - rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res); - break; - case 003100: /*not.w*/ - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = ~src1; - SETNZ16(res); - CLRF(FLAG_C|FLAG_V); - rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); - break; - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - case 003200: /*not.l*/ - ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = ~src1; - SETNZ32(res); - CLRF(FLAG_C|FLAG_V); - rc = ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res); - break; + case 003000: /*not.b*/ + ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = ~src1; + SETNZ8(res); + CLRF(FLAG_C|FLAG_V); + rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res); + break; + case 003100: /*not.w*/ + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = ~src1; + SETNZ16(res); + CLRF(FLAG_C|FLAG_V); + rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); + break; + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + case 003200: /*not.l*/ + ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = ~src1; + SETNZ32(res); + CLRF(FLAG_C|FLAG_V); + rc = ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res); + break; - case 003300: /*move to sr*/ - ASSERT_PRIV(); - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - SR = src1; - tracet0 = SR_T0; - break; + case 003300: /*move to sr*/ + ASSERT_PRIV(); + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + SR = src1; + tracet0 = SR_T0; + break; - case 004000: /*nbcd*/ - rc = STOP_IMPL; - break; - - case 004100: /*pea or swap*/ - if (IR_0503==000) { /*swap*/ - reg = &DRY; - src1 = *reg << 16; - res = *reg >> 16; - *reg = COMBINE16(src1,res); - SETNZ32(*reg); - CLRF(FLAG_C|FLAG_V); - rc = SCPE_OK; - } else { /*pea*/ - ASSERT_OK(ea_src_l_nd(IR_EAMOD,IR_EAREG,&srca,&PC)); - ASSERT_OK(m68k_cpush32(srca)); - } - break; - case 004200: /*movem.w or ext*/ - if (IR_0503==000) { /*ext.w*/ - reg = &DRY; - res = EXTB(*reg); - *reg = COMBINE16(*reg,res); - SETNZ16(res); - CLRF(FLAG_C|FLAG_V); - rc = SCPE_OK; - } else { /*movem.w regs,ea*/ - ASSERT_OK(ReadInstrInc(&PC,&IRE)); - if (IR_EAMOD==EA_APD) - rc = m68k_movem_r_pd(AREG(IR_REGY),IRE,FALSE); - else { - ASSERT_OK(ea_src_l_nd(IR_EAMOD,IR_EAREG,&srca,&PC)); - rc = m68k_movem_r_ea(srca,IRE,FALSE); - } - } - break; - case 004300: /*movem or ext*/ - if (IR_0503==000) { /*ext.l*/ - reg = &DRY; - *reg = EXTW(*reg); - SETNZ32(*reg); - CLRF(FLAG_C|FLAG_V); - rc = SCPE_OK; - } else { /*movem.l regs,ea */ - ASSERT_OK(ReadInstrInc(&PC,&IRE)); - if (IR_EAMOD==EA_APD) - rc = m68k_movem_r_pd(AREG(IR_REGY),IRE,TRUE); - else { - ASSERT_OK(ea_src_l_nd(IR_EAMOD,IR_EAREG,&srca,&PC)); - rc = m68k_movem_r_ea(srca,IRE,TRUE); - } - } - break; - case 005000: /*tst.b*/ - ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); - SETNZ8(src1); - CLRF(FLAG_V|FLAG_C); - break; - case 005100: /*tst.w*/ - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - SETNZ16(src1); - CLRF(FLAG_V|FLAG_C); - break; - case 005200: /*tst.l*/ - ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&src1,&PC)); - SETNZ32(src1); - CLRF(FLAG_V|FLAG_C); - break; - - case 005300: /*tas or illegal*/ - if (IR==045374) { /*illegal*/ - rc = STOP_ERROP; - } else { /*tas*/ - rc = STOP_IMPL; - } - break; - case 006200: /*movem.w ea,regs*/ - ASSERT_OK(ReadInstrInc(&PC,&IRE)); - if (IR_EAMOD==EA_API) - rc = m68k_movem_pi_r(AREG(IR_REGY),IRE,FALSE); - else { - ASSERT_OK(ea_src_l_nd(IR_EAMOD,IR_EAREG,&srca,&PC)); - rc = m68k_movem_ea_r(srca,IRE,FALSE); - } - break; - case 006300: /*movem.l ea,regs*/ - ASSERT_OK(ReadInstrInc(&PC,&IRE)); - if (IR_EAMOD==EA_API) - rc = m68k_movem_pi_r(AREG(IR_REGY),IRE,TRUE); - else { - ASSERT_OK(ea_src_l_nd(IR_EAMOD,IR_EAREG,&srca,&PC)); - rc = m68k_movem_ea_r(srca,IRE,TRUE); - } - break; - case 007100: - switch(IR_0503) { - case 000000: - case 000010: /*trap*/ - (*m68kcpu_trapcallback)(m68kcpu_dev,IR_TRAP); - rc = m68k_gen_exception(32+IR_TRAP,&PC); - break; - case 000020: /*link*/ - ASSERT_OK(ReadInstrInc(&PC,&IRE)); - if (IR_REGY==7) { - *cur_sp -= 4; - ASSERT_OK(WriteVL(*cur_sp,*cur_sp)); - } else { - areg = AREG(IR_REGY); - ASSERT_OK(m68k_cpush32(*areg)); - *areg = *cur_sp; - } - *cur_sp += EXTW(IRE); - break; - case 000030: /*unlk*/ - if (IR_REGY==7) { - ASSERT_OK(ReadVL(*cur_sp,&srca)); - *cur_sp = srca; - } else { - areg = AREG(IR_REGY); - *cur_sp = *areg; - ASSERT_OK(m68k_cpop32(areg)); - } - break; - case 000040: /*move to usp*/ - ASSERT_PRIV(); - USP = AR[IR_REGY]; - tracet0 = SR_T0; - rc = SCPE_OK; - break; - case 000050: /*move from usp*/ - ASSERT_PRIV(); - AR[IR_REGY] = USP; - rc = SCPE_OK; - break; - case 000060: - switch(IR_0200) { - case 000000: /*reset*/ - ASSERT_PRIV(); - rc = m68kcpu_peripheral_reset(); - break; - case 000001: /*nop*/ - rc = SCPE_OK; - tracet0 = SR_T0; - break; - case 000002: /*stop*/ - ASSERT_PRIV(); - ASSERT_OKRET(ReadInstrInc(&PC,&IRE)); - SR = (uint16)IRE; - rc = STOP_HALT; - tracet0 = SR_T0; - break; - case 000003: /*rte*/ - ASSERT_PRIV(); - ASSERT_OK(m68k_pop16(&src1)); - SR = src1; - m68k_set_s(SR_S != 0); - oldpc = PC; - rc = m68k_pop32(&PC); - tracet0 = SR_T0; - IFDEBUG(DBG_CPU_EXC,fprintf(sim_deb,"CPU : [0x%08x] RTE to 0x%08x, IPL=%d S=%d\n", - oldpc-2,PC,SR_IPL,SR_S?1:0)); - break; - case 000005: /*rts*/ - oldpc = PC; - rc = m68k_cpop32(&PC); - m68k_sublevel--; - IFDEBUG(DBG_CPU_CTRACE,fprintf(sim_deb,"CPU : [0x%08x] <<< RTS to 0x%08x (level=%d)\n", - oldpc-2,PC,m68k_sublevel)); - tracet0 = SR_T0; - break; - case 000006: /*trapv*/ - rc = CCR_V ? m68k_gen_exception(7,&PC) : SCPE_OK; - break; - case 000007: /*rtr*/ - ASSERT_OK(m68k_cpop16(&src1)); - SR = COMBINE8(SR,src1); - oldpc = PC; - rc = m68k_cpop32(&PC); - tracet0 = SR_T0; - IFDEBUG(DBG_CPU_EXC,fprintf(sim_deb,"CPU : [0x%08x] RTR to 0x%08x\n",oldpc-2,PC)); - break; - default: - rc = STOP_ERROP; - } - break; - default: - rc = STOP_ERROP; - } - break; - case 007200: /*jsr*/ - oldpc = PC; - ASSERT_OK(ea_src_l_nd(IR_EAMOD,IR_EAREG,&srca,&PC)); - ASSERT_OK(m68k_cpush32(PC)); - IFDEBUG(DBG_CPU_CTRACE,fprintf(sim_deb,"CPU : [0x%08x] >>> JSR %s (level=%d)\n", - oldpc-2,m68k_getsym(srca,XFMT,out),m68k_sublevel)); - PC = srca; - m68k_sublevel++; - tracet0 = SR_T0; - break; - case 007300: /*jmp*/ - oldpc = PC; - ASSERT_OK(ea_src_l_nd(IR_EAMOD,IR_EAREG,&srca,&PC)); - IFDEBUG(DBG_CPU_BTRACE,fprintf(sim_deb,"CPU : [0x%08x] ||| JMP %s\n", - oldpc-2,m68k_getsym(srca,XFMT,out))); - PC = srca; - tracet0 = SR_T0; - break; - default: - rc = STOP_ERROP; - } - break; + case 004000: /*nbcd*/ + rc = STOP_IMPL; + break; + + case 004100: /*pea or swap*/ + if (IR_0503==000) { /*swap*/ + reg = &DRY; + src1 = *reg << 16; + res = *reg >> 16; + *reg = COMBINE16(src1,res); + SETNZ32(*reg); + CLRF(FLAG_C|FLAG_V); + rc = SCPE_OK; + } else { /*pea*/ + ASSERT_OK(ea_src_l_nd(IR_EAMOD,IR_EAREG,&srca,&PC)); + ASSERT_OK(m68k_cpush32(srca)); + } + break; + case 004200: /*movem.w or ext*/ + if (IR_0503==000) { /*ext.w*/ + reg = &DRY; + res = EXTB(*reg); + *reg = COMBINE16(*reg,res); + SETNZ16(res); + CLRF(FLAG_C|FLAG_V); + rc = SCPE_OK; + } else { /*movem.w regs,ea*/ + ASSERT_OK(ReadInstrInc(&PC,&IRE)); + if (IR_EAMOD==EA_APD) + rc = m68k_movem_r_pd(AREG(IR_REGY),IRE,FALSE); + else { + ASSERT_OK(ea_src_l_nd(IR_EAMOD,IR_EAREG,&srca,&PC)); + rc = m68k_movem_r_ea(srca,IRE,FALSE); + } + } + break; + case 004300: /*movem or ext*/ + if (IR_0503==000) { /*ext.l*/ + reg = &DRY; + *reg = EXTW(*reg); + SETNZ32(*reg); + CLRF(FLAG_C|FLAG_V); + rc = SCPE_OK; + } else { /*movem.l regs,ea */ + ASSERT_OK(ReadInstrInc(&PC,&IRE)); + if (IR_EAMOD==EA_APD) + rc = m68k_movem_r_pd(AREG(IR_REGY),IRE,TRUE); + else { + ASSERT_OK(ea_src_l_nd(IR_EAMOD,IR_EAREG,&srca,&PC)); + rc = m68k_movem_r_ea(srca,IRE,TRUE); + } + } + break; + case 005000: /*tst.b*/ + ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); + SETNZ8(src1); + CLRF(FLAG_V|FLAG_C); + break; + case 005100: /*tst.w*/ + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + SETNZ16(src1); + CLRF(FLAG_V|FLAG_C); + break; + case 005200: /*tst.l*/ + ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&src1,&PC)); + SETNZ32(src1); + CLRF(FLAG_V|FLAG_C); + break; + + case 005300: /*tas or illegal*/ + if (IR==045374) { /*illegal*/ + rc = STOP_ERROP; + } else { /*tas*/ + rc = STOP_IMPL; + } + break; + case 006200: /*movem.w ea,regs*/ + ASSERT_OK(ReadInstrInc(&PC,&IRE)); + if (IR_EAMOD==EA_API) + rc = m68k_movem_pi_r(AREG(IR_REGY),IRE,FALSE); + else { + ASSERT_OK(ea_src_l_nd(IR_EAMOD,IR_EAREG,&srca,&PC)); + rc = m68k_movem_ea_r(srca,IRE,FALSE); + } + break; + case 006300: /*movem.l ea,regs*/ + ASSERT_OK(ReadInstrInc(&PC,&IRE)); + if (IR_EAMOD==EA_API) + rc = m68k_movem_pi_r(AREG(IR_REGY),IRE,TRUE); + else { + ASSERT_OK(ea_src_l_nd(IR_EAMOD,IR_EAREG,&srca,&PC)); + rc = m68k_movem_ea_r(srca,IRE,TRUE); + } + break; + case 007100: + switch(IR_0503) { + case 000000: + case 000010: /*trap*/ + (*m68kcpu_trapcallback)(m68kcpu_dev,IR_TRAP); + rc = m68k_gen_exception(32+IR_TRAP,&PC); + break; + case 000020: /*link*/ + ASSERT_OK(ReadInstrInc(&PC,&IRE)); + if (IR_REGY==7) { + *cur_sp -= 4; + ASSERT_OK(WriteVL(*cur_sp,*cur_sp)); + } else { + areg = AREG(IR_REGY); + ASSERT_OK(m68k_cpush32(*areg)); + *areg = *cur_sp; + } + *cur_sp += EXTW(IRE); + break; + case 000030: /*unlk*/ + if (IR_REGY==7) { + ASSERT_OK(ReadVL(*cur_sp,&srca)); + *cur_sp = srca; + } else { + areg = AREG(IR_REGY); + *cur_sp = *areg; + ASSERT_OK(m68k_cpop32(areg)); + } + break; + case 000040: /*move to usp*/ + ASSERT_PRIV(); + USP = AR[IR_REGY]; + tracet0 = SR_T0; + rc = SCPE_OK; + break; + case 000050: /*move from usp*/ + ASSERT_PRIV(); + AR[IR_REGY] = USP; + rc = SCPE_OK; + break; + case 000060: + switch(IR_0200) { + case 000000: /*reset*/ + ASSERT_PRIV(); + rc = m68kcpu_peripheral_reset(); + break; + case 000001: /*nop*/ + rc = SCPE_OK; + tracet0 = SR_T0; + break; + case 000002: /*stop*/ + ASSERT_PRIV(); + ASSERT_OKRET(ReadInstrInc(&PC,&IRE)); + SR = (uint16)IRE; + rc = STOP_HALT; + tracet0 = SR_T0; + break; + case 000003: /*rte*/ + ASSERT_PRIV(); + ASSERT_OK(m68k_pop16(&src1)); + SR = src1; + m68k_set_s(SR_S != 0); + oldpc = PC; + rc = m68k_pop32(&PC); + tracet0 = SR_T0; + IFDEBUG(DBG_CPU_EXC,fprintf(sim_deb,"CPU : [0x%08x] RTE to 0x%08x, IPL=%d S=%d\n", + oldpc-2,PC,SR_IPL,SR_S?1:0)); + break; + case 000005: /*rts*/ + oldpc = PC; + rc = m68k_cpop32(&PC); + m68k_sublevel--; + IFDEBUG(DBG_CPU_CTRACE,fprintf(sim_deb,"CPU : [0x%08x] <<< RTS to 0x%08x (level=%d)\n", + oldpc-2,PC,m68k_sublevel)); + tracet0 = SR_T0; + break; + case 000006: /*trapv*/ + rc = CCR_V ? m68k_gen_exception(7,&PC) : SCPE_OK; + break; + case 000007: /*rtr*/ + ASSERT_OK(m68k_cpop16(&src1)); + SR = COMBINE8(SR,src1); + oldpc = PC; + rc = m68k_cpop32(&PC); + tracet0 = SR_T0; + IFDEBUG(DBG_CPU_EXC,fprintf(sim_deb,"CPU : [0x%08x] RTR to 0x%08x\n",oldpc-2,PC)); + break; + default: + rc = STOP_ERROP; + } + break; + default: + rc = STOP_ERROP; + } + break; + case 007200: /*jsr*/ + oldpc = PC; + ASSERT_OK(ea_src_l_nd(IR_EAMOD,IR_EAREG,&srca,&PC)); + ASSERT_OK(m68k_cpush32(PC)); + IFDEBUG(DBG_CPU_CTRACE,fprintf(sim_deb,"CPU : [0x%08x] >>> JSR %s (level=%d)\n", + oldpc-2,m68k_getsym(srca,XFMT,out),m68k_sublevel)); + PC = srca; + m68k_sublevel++; + tracet0 = SR_T0; + break; + case 007300: /*jmp*/ + oldpc = PC; + ASSERT_OK(ea_src_l_nd(IR_EAMOD,IR_EAREG,&srca,&PC)); + IFDEBUG(DBG_CPU_BTRACE,fprintf(sim_deb,"CPU : [0x%08x] ||| JMP %s\n", + oldpc-2,m68k_getsym(srca,XFMT,out))); + PC = srca; + tracet0 = SR_T0; + break; + default: + rc = STOP_ERROP; + } + break; - /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 0 1 0 1 | Quickdata |Opc|Length | effective address<>001| addq,subq - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 0 1 0 1 | Condition | 1 1 0 0 1 | Register | dbcc - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 0 1 0 1 | Condition | 1 1 | effective address<>001| scc - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ - case 0x5000: - switch (IR_0806) { - case 0000300: - case 0000700: - if (IR_0503==010) { /*dbcc*/ - if (!IR_COND || !testcond(IR_COND)) { /* dbt is a NOP */ - reg = &DRY; - src1 = MASK_16L((*reg-1)); - *reg = MASK_16U(*reg) | src1; - if (src1 != 0xffff) { - ASSERT_OK(ReadInstr(PC,&IRE)); - PC += (EXTW(IRE)); - rc = SCPE_OK; - tracet0 = SR_T0; - break; - } /* else loop terminated */ - } - /* loop cond not met or dbt */ - PC += 2; - rc = SCPE_OK; - } else { /*scc*/ - src1 = testcond(IR_COND) ? 0xff : 0x00; - rc = ea_dst_b(IR_EAMOD,IR_EAREG,src1,&PC); - } - break; - case 0000000: /*addq.b*/ - ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = m68k_add8(src1,quickarg[IR_REGX],0); - rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res); - break; - case 0000100: /*addq.w*/ - if (IR_EAMOD == EA_ADIR) { - *AREG(IR_REGY) += EXTW(quickarg[IR_REGX]); - rc = SCPE_OK; - } else { - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = m68k_add16(src1,quickarg[IR_REGX],0,TRUE); - rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); - } - break; - case 0000200: /*addq.l*/ - ASSERT_OK(ea_src_l64(IR_EAMOD,IR_EAREG,&srcx1,&PC)); - res = m68k_add32(srcx1,(t_uint64)quickarg[IR_REGX],0,IR_EAMOD!=EA_ADIR); - rc = ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res); - break; - case 0000400: /*subq.b*/ - ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = m68k_sub8(src1,quickarg[IR_REGX],0); - rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res); - break; - case 0000500: /*subq.w*/ - if (IR_EAMOD == EA_ADIR) { - *AREG(IR_REGY) -= EXTW(quickarg[IR_REGX]); - rc = SCPE_OK; - } else { - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = m68k_sub16(src1,quickarg[IR_REGX],0,TRUE); - rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); - } - break; - case 0000600: /*subq.l*/ - ASSERT_OK(ea_src_l64(IR_EAMOD,IR_EAREG,&srcx1,&PC)); - res = m68k_sub32(srcx1,(t_uint64)quickarg[IR_REGX],0,IR_EAMOD!=EA_ADIR); - rc = ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res); - break; - } - break; + /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 0 1 0 1 | Quickdata |Opc|Length | effective address<>001| addq,subq + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 0 1 0 1 | Condition | 1 1 0 0 1 | Register | dbcc + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 0 1 0 1 | Condition | 1 1 | effective address<>001| scc + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ + case 0x5000: + switch (IR_0806) { + case 0000300: + case 0000700: + if (IR_0503==010) { /*dbcc*/ + if (!IR_COND || !testcond(IR_COND)) { /* dbt is a NOP */ + reg = &DRY; + src1 = MASK_16L((*reg-1)); + *reg = MASK_16U(*reg) | src1; + if (src1 != 0xffff) { + ASSERT_OK(ReadInstr(PC,&IRE)); + PC += (EXTW(IRE)); + rc = SCPE_OK; + tracet0 = SR_T0; + break; + } /* else loop terminated */ + } + /* loop cond not met or dbt */ + PC += 2; + rc = SCPE_OK; + } else { /*scc*/ + src1 = testcond(IR_COND) ? 0xff : 0x00; + rc = ea_dst_b(IR_EAMOD,IR_EAREG,src1,&PC); + } + break; + case 0000000: /*addq.b*/ + ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = m68k_add8(src1,quickarg[IR_REGX],0); + rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res); + break; + case 0000100: /*addq.w*/ + if (IR_EAMOD == EA_ADIR) { + *AREG(IR_REGY) += EXTW(quickarg[IR_REGX]); + rc = SCPE_OK; + } else { + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = m68k_add16(src1,quickarg[IR_REGX],0,TRUE); + rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); + } + break; + case 0000200: /*addq.l*/ + ASSERT_OK(ea_src_l64(IR_EAMOD,IR_EAREG,&srcx1,&PC)); + res = m68k_add32(srcx1,(t_uint64)quickarg[IR_REGX],0,IR_EAMOD!=EA_ADIR); + rc = ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res); + break; + case 0000400: /*subq.b*/ + ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = m68k_sub8(src1,quickarg[IR_REGX],0); + rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res); + break; + case 0000500: /*subq.w*/ + if (IR_EAMOD == EA_ADIR) { + *AREG(IR_REGY) -= EXTW(quickarg[IR_REGX]); + rc = SCPE_OK; + } else { + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = m68k_sub16(src1,quickarg[IR_REGX],0,TRUE); + rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); + } + break; + case 0000600: /*subq.l*/ + ASSERT_OK(ea_src_l64(IR_EAMOD,IR_EAREG,&srcx1,&PC)); + res = m68k_sub32(srcx1,(t_uint64)quickarg[IR_REGX],0,IR_EAMOD!=EA_ADIR); + rc = ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res); + break; + } + break; - /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 0 1 1 0 | Condition | Displacement | Bcc,bra,bsr - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ - case 0x6000: - isbsr = IR_COND==0x100; /* is bsr */ - iscond = isbsr || testcond(IR_COND); /* condition matched */ - if (IR_DISP) { - if (iscond) { - if (isbsr) { - IFDEBUG(DBG_CPU_CTRACE,fprintf(sim_deb,"CPU : [0x%08x] >>> BSR %s (level=%d\n", - PC-2,m68k_getsym(PC+EXTB(IR_DISP),XFMT,out),m68k_sublevel)); - ASSERT_OK(m68k_cpush32(PC)); /* save PC for BSR */ - m68k_sublevel++; - } else { - IFDEBUG(DBG_CPU_BTRACE,fprintf(sim_deb,"CPU : [0x%08x] ||| B%s %s\n", - PC-2,condnames[IR_COND>>8],m68k_getsym(PC+EXTB(IR_DISP),XFMT,out))); - } - PC += EXTB(IR_DISP); /* go to new location */ - } /* else condition not matched */ - } else { /* 16 bit ext word */ - if (iscond) { - ASSERT_OK(ReadInstr(PC,&IRE)); /* get extension word */ - if (isbsr) { - IFDEBUG(DBG_CPU_CTRACE,fprintf(sim_deb,"CPU : [0x%08x] >>> BSR %s (level=%d)\n", - PC-2,m68k_getsym(PC+EXTW(IRE),XFMT,out),m68k_sublevel)); - ASSERT_OK(m68k_cpush32(PC+2)); /* save PC for BSR */ - m68k_sublevel++; - } else { - IFDEBUG(DBG_CPU_BTRACE,fprintf(sim_deb,"CPU : [0x%08x] ||| B%s %s\n", - PC-2,condnames[IR_COND>>8],m68k_getsym(PC+EXTW(IRE),XFMT,out))); - } - PC += EXTW(IRE); /* go to new location */ - } else { - PC += 2; /* condition not matched */ - } - } - tracet0 = SR_T0; - break; + /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 0 1 1 0 | Condition | Displacement | Bcc,bra,bsr + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ + case 0x6000: + isbsr = IR_COND==0x100; /* is bsr */ + iscond = isbsr || testcond(IR_COND); /* condition matched */ + if (IR_DISP) { + if (iscond) { + if (isbsr) { + IFDEBUG(DBG_CPU_CTRACE,fprintf(sim_deb,"CPU : [0x%08x] >>> BSR %s (level=%d\n", + PC-2,m68k_getsym(PC+EXTB(IR_DISP),XFMT,out),m68k_sublevel)); + ASSERT_OK(m68k_cpush32(PC)); /* save PC for BSR */ + m68k_sublevel++; + } else { + IFDEBUG(DBG_CPU_BTRACE,fprintf(sim_deb,"CPU : [0x%08x] ||| B%s %s\n", + PC-2,condnames[IR_COND>>8],m68k_getsym(PC+EXTB(IR_DISP),XFMT,out))); + } + PC += EXTB(IR_DISP); /* go to new location */ + } /* else condition not matched */ + } else { /* 16 bit ext word */ + if (iscond) { + ASSERT_OK(ReadInstr(PC,&IRE)); /* get extension word */ + if (isbsr) { + IFDEBUG(DBG_CPU_CTRACE,fprintf(sim_deb,"CPU : [0x%08x] >>> BSR %s (level=%d)\n", + PC-2,m68k_getsym(PC+EXTW(IRE),XFMT,out),m68k_sublevel)); + ASSERT_OK(m68k_cpush32(PC+2)); /* save PC for BSR */ + m68k_sublevel++; + } else { + IFDEBUG(DBG_CPU_BTRACE,fprintf(sim_deb,"CPU : [0x%08x] ||| B%s %s\n", + PC-2,condnames[IR_COND>>8],m68k_getsym(PC+EXTW(IRE),XFMT,out))); + } + PC += EXTW(IRE); /* go to new location */ + } else { + PC += 2; /* condition not matched */ + } + } + tracet0 = SR_T0; + break; - /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 0 1 1 1 | Register | 0 | Data | moveq - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ - case 0x7000: - src1 = DRX = EXTB(IR_DATA); - SETNZ32(src1); - CLRF(FLAG_C|FLAG_V); - rc = SCPE_OK; break; + /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 0 1 1 1 | Register | 0 | Data | moveq + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ + case 0x7000: + src1 = DRX = EXTB(IR_DATA); + SETNZ32(src1); + CLRF(FLAG_C|FLAG_V); + rc = SCPE_OK; break; - /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 1 0 0 0 | Register |Opc|Length | effective address<>00x| or - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 1 0 0 0 | Reg X | 1 0 0 | 0 0 |R/M| Reg Y | sbcd - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 1 0 0 0 | Register |Opc| 1 1 | effective address | divs,divu - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ - case 0x8000: - switch(IR_0803) { - case 0000300: case 0000320: case 0000330: case 0000340: - case 0000350: case 0000360: case 0000370: /*divu.w*/ - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - rc = m68k_divu_w(src1,&DR[IR_REGX], &PC); - break; - case 0000700: case 0000720: case 0000730: case 0000740: - case 0000750: case 0000760: case 0000770: /*divs.w*/ - rc = m68k_divs_w(src1,&DR[IR_REGX], &PC); - break; - case 0000400: /*sbcd d*/ - rc = STOP_IMPL; break; - case 0000410: /*sbcd a*/ - rc = STOP_IMPL; break; - case 0000000: case 0000020: case 0000030: case 0000040: - case 0000050: case 0000060: case 0000070: /*or.b ->d*/ - ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = MASK_8L(src1 | DRX); - SETNZ8(res); - CLRF(FLAG_C|FLAG_V); - rc = ea_dst_b(EA_DDIR,IR_REGX,res,&PC); - break; - case 0000100: case 0000120: case 0000130: case 0000140: - case 0000150: case 0000160: case 0000170: /*or.w ->d*/ - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = MASK_16L(src1 | DRX); - SETNZ16(res); - CLRF(FLAG_C|FLAG_V); - rc = ea_dst_b(EA_DDIR,IR_REGX,res,&PC); - break; - case 0000200: case 0000220: case 0000230: case 0000240: - case 0000250: case 0000260: case 0000270: /*or.l ->d*/ - ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = src1 & DRX; - SETNZ32(res); - CLRF(FLAG_C|FLAG_V); - rc = ea_dst_l(EA_DDIR,IR_REGX,res,&PC); - break; - case 0000420: case 0000430: case 0000440: case 0000450: - case 0000460: case 0000470: /*or.b ->ea*/ - ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = src1 | DRX; - SETNZ8(res); - CLRF(FLAG_V|FLAG_C); - rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res); - break; - case 0000520: case 0000530: case 0000540: case 0000550: - case 0000560: case 0000570: /*or.w ->ea*/ - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = src1 | DRX; - SETNZ16(res); - CLRF(FLAG_V|FLAG_C); - rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); - break; - case 0000620: case 0000630: case 0000640: case 0000650: - case 0000660: case 0000670: /*or.l ->ea*/ - ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = src1 | DRX; - SETNZ32(res); - CLRF(FLAG_V|FLAG_C); - rc = ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res); - break; - default: - rc = STOP_ERROP; break; - } - break; + /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 1 0 0 0 | Register |Opc|Length | effective address<>00x| or + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 1 0 0 0 | Reg X | 1 0 0 | 0 0 |R/M| Reg Y | sbcd + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 1 0 0 0 | Register |Opc| 1 1 | effective address | divs,divu + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ + case 0x8000: + switch(IR_0803) { + case 0000300: case 0000320: case 0000330: case 0000340: + case 0000350: case 0000360: case 0000370: /*divu.w*/ + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + rc = m68k_divu_w(src1,&DR[IR_REGX], &PC); + break; + case 0000700: case 0000720: case 0000730: case 0000740: + case 0000750: case 0000760: case 0000770: /*divs.w*/ + rc = m68k_divs_w(src1,&DR[IR_REGX], &PC); + break; + case 0000400: /*sbcd d*/ + rc = STOP_IMPL; break; + case 0000410: /*sbcd a*/ + rc = STOP_IMPL; break; + case 0000000: case 0000020: case 0000030: case 0000040: + case 0000050: case 0000060: case 0000070: /*or.b ->d*/ + ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = MASK_8L(src1 | DRX); + SETNZ8(res); + CLRF(FLAG_C|FLAG_V); + rc = ea_dst_b(EA_DDIR,IR_REGX,res,&PC); + break; + case 0000100: case 0000120: case 0000130: case 0000140: + case 0000150: case 0000160: case 0000170: /*or.w ->d*/ + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = MASK_16L(src1 | DRX); + SETNZ16(res); + CLRF(FLAG_C|FLAG_V); + rc = ea_dst_b(EA_DDIR,IR_REGX,res,&PC); + break; + case 0000200: case 0000220: case 0000230: case 0000240: + case 0000250: case 0000260: case 0000270: /*or.l ->d*/ + ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = src1 & DRX; + SETNZ32(res); + CLRF(FLAG_C|FLAG_V); + rc = ea_dst_l(EA_DDIR,IR_REGX,res,&PC); + break; + case 0000420: case 0000430: case 0000440: case 0000450: + case 0000460: case 0000470: /*or.b ->ea*/ + ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = src1 | DRX; + SETNZ8(res); + CLRF(FLAG_V|FLAG_C); + rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res); + break; + case 0000520: case 0000530: case 0000540: case 0000550: + case 0000560: case 0000570: /*or.w ->ea*/ + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = src1 | DRX; + SETNZ16(res); + CLRF(FLAG_V|FLAG_C); + rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); + break; + case 0000620: case 0000630: case 0000640: case 0000650: + case 0000660: case 0000670: /*or.l ->ea*/ + ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = src1 | DRX; + SETNZ32(res); + CLRF(FLAG_V|FLAG_C); + rc = ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res); + break; + default: + rc = STOP_ERROP; break; + } + break; - /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 1 0 0 1 | Register |Opc|Length | effective address<>00x| sub - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 1 0 0 1 | Register |Opc| 1 1 | effective address | suba - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 1 0 0 1 | Reg X | 1 |Length | 0 0 |R/M| Reg Y | subx - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ - case 0x9000: - switch (IR_0803) { - case 0000300: case 0000310: case 0000320: case 0000330: - case 0000340: case 0000350: case 0000360: case 0000370: /* suba.w */ - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&srca,&PC)); - *AREG(IR_REGX) -= EXTW(srca); /* note: no flag changes! */ - break; - case 0000700: case 0000710: case 0000720: case 0000730: - case 0000740: case 0000750: case 0000760: case 0000770: /* suba.l */ - ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&srca,&PC)); - *AREG(IR_REGX) -= srca; /* note: no flag changes! */ - break; - case 0000400: /*subx.b d*/ - res = m68k_sub8(MASK_8L(DRY),DRX,CCR_X?1:0); - rc = ea_dst_b(EA_DDIR,IR_REGX,res,&PC); - break; - case 0000410: /*subx.b -a*/ - ASSERT_OK(ea_src_b(EA_APD,IR_REGY,&src1,&PC)); - ASSERT_OK(ea_src_b(EA_APD,IR_REGX,&src2,&PC)); - res = m68k_sub8(src1,src2,CCR_X?1:0); - rc = ea_dst_b_rmw(EA_APD,IR_REGX,res); - break; - case 0000500: /*subx.w d*/ - res = m68k_sub16(MASK_16L(DRY),DRX,CCR_X?1:0,TRUE); - rc = ea_dst_w(EA_DDIR,IR_REGX,res,&PC); - break; - case 0000510: /*subx.w -a*/ - ASSERT_OK(ea_src_w(EA_APD,IR_REGY,&src1,&PC)); - ASSERT_OK(ea_src_w(EA_APD,IR_REGX,&src2,&PC)); - res = m68k_sub16(src1,src2,CCR_X?1:0,TRUE); - rc = ea_dst_w_rmw(EA_APD,IR_REGX,res); - break; - case 0000600: /*subx.l d*/ - res = m68k_sub32((t_uint64)DRY,(t_uint64)DRX,CCR_X?1:0,TRUE); - rc = ea_dst_l(EA_DDIR,IR_REGX,res,&PC); - break; - case 0000610: /*subx.l -a*/ - ASSERT_OK(ea_src_l64(EA_APD,IR_REGY,&srcx1,&PC)); - ASSERT_OK(ea_src_l64(EA_APD,IR_REGX,&srcx2,&PC)); - res = m68k_sub32(srcx1,srcx2,CCR_X?1:0,TRUE); - rc = ea_dst_l_rmw(EA_APD,IR_REGX,res); - break; - case 0000000: case 0000020: case 0000030: case 0000040: - case 0000050: case 0000060: case 0000070: /* sub.b ->d */ - ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = m68k_sub8(DRX,src1,0); - rc = ea_dst_b(EA_DDIR,IR_REGX,res,&PC); - break; - case 0000100: case 0000110: case 0000120: case 0000130: - case 0000140: case 0000150: case 0000160: case 0000170: /* sub.w ->d */ - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = m68k_sub16(DRX,src1,0,TRUE); - rc = ea_dst_w(EA_DDIR,IR_REGX,res,&PC); - break; - case 0000200: case 0000210: case 0000220: case 0000230: - case 0000240: case 0000250: case 0000260: case 0000270: /* sub.l ->d */ - ASSERT_OK(ea_src_l64(IR_EAMOD,IR_EAREG,&srcx1,&PC)); - res = m68k_sub32((t_uint64)DRX,srcx1,0,TRUE); - rc = ea_dst_l(EA_DDIR,IR_REGX,res,&PC); - break; - case 0000420: case 0000430: case 0000440: case 0000450: - case 0000460: case 0000470: /* sub.b ->ea */ - ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = m68k_sub8(src1,DRX,0); - rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res); - break; - case 0000520: case 0000530: case 0000540: case 0000550: - case 0000560: case 0000570: /* sub.w ->ea */ - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = m68k_sub16(src1,DRX,0,TRUE); - rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); - break; - case 0000620: case 0000630: case 0000640: case 0000650: - case 0000660: case 0000670: /* sub.l ->ea */ - ASSERT_OK(ea_src_l64(IR_EAMOD,IR_EAREG,&srcx1,&PC)); - res = m68k_sub32(srcx1,(t_uint64)DRX,0,TRUE); - rc = ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res); - break; - default: - rc = STOP_ERROP; - } - break; + /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 1 0 0 1 | Register |Opc|Length | effective address<>00x| sub + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 1 0 0 1 | Register |Opc| 1 1 | effective address | suba + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 1 0 0 1 | Reg X | 1 |Length | 0 0 |R/M| Reg Y | subx + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ + case 0x9000: + switch (IR_0803) { + case 0000300: case 0000310: case 0000320: case 0000330: + case 0000340: case 0000350: case 0000360: case 0000370: /* suba.w */ + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&srca,&PC)); + *AREG(IR_REGX) -= EXTW(srca); /* note: no flag changes! */ + break; + case 0000700: case 0000710: case 0000720: case 0000730: + case 0000740: case 0000750: case 0000760: case 0000770: /* suba.l */ + ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&srca,&PC)); + *AREG(IR_REGX) -= srca; /* note: no flag changes! */ + break; + case 0000400: /*subx.b d*/ + res = m68k_sub8(MASK_8L(DRY),DRX,CCR_X?1:0); + rc = ea_dst_b(EA_DDIR,IR_REGX,res,&PC); + break; + case 0000410: /*subx.b -a*/ + ASSERT_OK(ea_src_b(EA_APD,IR_REGY,&src1,&PC)); + ASSERT_OK(ea_src_b(EA_APD,IR_REGX,&src2,&PC)); + res = m68k_sub8(src1,src2,CCR_X?1:0); + rc = ea_dst_b_rmw(EA_APD,IR_REGX,res); + break; + case 0000500: /*subx.w d*/ + res = m68k_sub16(MASK_16L(DRY),DRX,CCR_X?1:0,TRUE); + rc = ea_dst_w(EA_DDIR,IR_REGX,res,&PC); + break; + case 0000510: /*subx.w -a*/ + ASSERT_OK(ea_src_w(EA_APD,IR_REGY,&src1,&PC)); + ASSERT_OK(ea_src_w(EA_APD,IR_REGX,&src2,&PC)); + res = m68k_sub16(src1,src2,CCR_X?1:0,TRUE); + rc = ea_dst_w_rmw(EA_APD,IR_REGX,res); + break; + case 0000600: /*subx.l d*/ + res = m68k_sub32((t_uint64)DRY,(t_uint64)DRX,CCR_X?1:0,TRUE); + rc = ea_dst_l(EA_DDIR,IR_REGX,res,&PC); + break; + case 0000610: /*subx.l -a*/ + ASSERT_OK(ea_src_l64(EA_APD,IR_REGY,&srcx1,&PC)); + ASSERT_OK(ea_src_l64(EA_APD,IR_REGX,&srcx2,&PC)); + res = m68k_sub32(srcx1,srcx2,CCR_X?1:0,TRUE); + rc = ea_dst_l_rmw(EA_APD,IR_REGX,res); + break; + case 0000000: case 0000020: case 0000030: case 0000040: + case 0000050: case 0000060: case 0000070: /* sub.b ->d */ + ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = m68k_sub8(DRX,src1,0); + rc = ea_dst_b(EA_DDIR,IR_REGX,res,&PC); + break; + case 0000100: case 0000110: case 0000120: case 0000130: + case 0000140: case 0000150: case 0000160: case 0000170: /* sub.w ->d */ + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = m68k_sub16(DRX,src1,0,TRUE); + rc = ea_dst_w(EA_DDIR,IR_REGX,res,&PC); + break; + case 0000200: case 0000210: case 0000220: case 0000230: + case 0000240: case 0000250: case 0000260: case 0000270: /* sub.l ->d */ + ASSERT_OK(ea_src_l64(IR_EAMOD,IR_EAREG,&srcx1,&PC)); + res = m68k_sub32((t_uint64)DRX,srcx1,0,TRUE); + rc = ea_dst_l(EA_DDIR,IR_REGX,res,&PC); + break; + case 0000420: case 0000430: case 0000440: case 0000450: + case 0000460: case 0000470: /* sub.b ->ea */ + ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = m68k_sub8(src1,DRX,0); + rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res); + break; + case 0000520: case 0000530: case 0000540: case 0000550: + case 0000560: case 0000570: /* sub.w ->ea */ + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = m68k_sub16(src1,DRX,0,TRUE); + rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); + break; + case 0000620: case 0000630: case 0000640: case 0000650: + case 0000660: case 0000670: /* sub.l ->ea */ + ASSERT_OK(ea_src_l64(IR_EAMOD,IR_EAREG,&srcx1,&PC)); + res = m68k_sub32(srcx1,(t_uint64)DRX,0,TRUE); + rc = ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res); + break; + default: + rc = STOP_ERROP; + } + break; - /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 1 0 1 0 | Opcode | trapa - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ - case 0xa000: - rc = m68k_gen_exception(10,&PC); - break; + /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 1 0 1 0 | Opcode | trapa + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ + case 0xa000: + rc = m68k_gen_exception(10,&PC); + break; - /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 1 0 1 1 | Register | 0 |Length | effective address | cmp,cmpa - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 1 0 1 1 | Register | 1 |Length | effective address<>001| eor - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 1 0 1 1 | Reg X | 1 |Length | 0 0 1 | Reg Y | cmpm - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ - case 0xb000: - switch (IR_0803) { - case 0000410: /*cmpm.b*/ - rc = STOP_IMPL; break; - case 0000510: /*cmpm.w*/ - rc = STOP_IMPL; break; - case 0000610: /*cmpm.l*/ - rc = STOP_IMPL; break; - case 0000400: case 0000420: case 0000430: case 0000440: - case 0000450: case 0000460: case 0000470: /*eor.b*/ - ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = src1 ^ DRX; - SETNZ8(res); - CLRF(FLAG_V|FLAG_C); - rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res); - break; - case 0000500: case 0000520: case 0000530: case 0000540: - case 0000550: case 0000560: case 0000570: /*eor.w*/ - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = src1 ^ DRX; - SETNZ16(res); - CLRF(FLAG_V|FLAG_C); - rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); - break; - case 0000600: case 0000620: case 0000630: case 0000640: - case 0000650: case 0000660: case 0000670: /*eor.l*/ - ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = src1 ^ DRX; - SETNZ32(res); - CLRF(FLAG_V|FLAG_C); - rc = ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res); - break; - case 0000000: case 0000020: case 0000030: case 0000040: - case 0000050: case 0000060: case 0000070: /*cmp.b*/ - ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); - (void)m68k_sub8(DRX,src1,0); - break; - case 0000100: case 0000110: case 0000120: case 0000130: - case 0000140: case 0000150: case 0000160: case 0000170: /*cmp.w*/ - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - (void)m68k_sub16(DRX,src1,0,TRUE); - break; - case 0000200: case 0000210: case 0000220: case 0000230: - case 0000240: case 0000250: case 0000260: case 0000270: /*cmp.l*/ - ASSERT_OK(ea_src_l64(IR_EAMOD,IR_EAREG,&srcx1,&PC)); - (void)m68k_sub32((t_uint64)DRX,srcx1,0,TRUE); - break; - case 0000300: case 0000310: case 0000320: case 0000330: - case 0000340: case 0000350: case 0000360: case 0000370: /*cmpa.w*/ - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - areg = AREG(IR_REGX); - (void)m68k_sub32((t_uint64)EXTW(*areg),(t_uint64)src1,0,TRUE); - break; + /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 1 0 1 1 | Register | 0 |Length | effective address | cmp,cmpa + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 1 0 1 1 | Register | 1 |Length | effective address<>001| eor + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 1 0 1 1 | Reg X | 1 |Length | 0 0 1 | Reg Y | cmpm + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ + case 0xb000: + switch (IR_0803) { + case 0000410: /*cmpm.b*/ + rc = STOP_IMPL; break; + case 0000510: /*cmpm.w*/ + rc = STOP_IMPL; break; + case 0000610: /*cmpm.l*/ + rc = STOP_IMPL; break; + case 0000400: case 0000420: case 0000430: case 0000440: + case 0000450: case 0000460: case 0000470: /*eor.b*/ + ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = src1 ^ DRX; + SETNZ8(res); + CLRF(FLAG_V|FLAG_C); + rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res); + break; + case 0000500: case 0000520: case 0000530: case 0000540: + case 0000550: case 0000560: case 0000570: /*eor.w*/ + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = src1 ^ DRX; + SETNZ16(res); + CLRF(FLAG_V|FLAG_C); + rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); + break; + case 0000600: case 0000620: case 0000630: case 0000640: + case 0000650: case 0000660: case 0000670: /*eor.l*/ + ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = src1 ^ DRX; + SETNZ32(res); + CLRF(FLAG_V|FLAG_C); + rc = ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res); + break; + case 0000000: case 0000020: case 0000030: case 0000040: + case 0000050: case 0000060: case 0000070: /*cmp.b*/ + ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); + (void)m68k_sub8(DRX,src1,0); + break; + case 0000100: case 0000110: case 0000120: case 0000130: + case 0000140: case 0000150: case 0000160: case 0000170: /*cmp.w*/ + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + (void)m68k_sub16(DRX,src1,0,TRUE); + break; + case 0000200: case 0000210: case 0000220: case 0000230: + case 0000240: case 0000250: case 0000260: case 0000270: /*cmp.l*/ + ASSERT_OK(ea_src_l64(IR_EAMOD,IR_EAREG,&srcx1,&PC)); + (void)m68k_sub32((t_uint64)DRX,srcx1,0,TRUE); + break; + case 0000300: case 0000310: case 0000320: case 0000330: + case 0000340: case 0000350: case 0000360: case 0000370: /*cmpa.w*/ + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + areg = AREG(IR_REGX); + (void)m68k_sub32((t_uint64)EXTW(*areg),(t_uint64)src1,0,TRUE); + break; - case 0000700: case 0000710: case 0000720: case 0000730: - case 0000740: case 0000750: case 0000760: case 0000770: /*cmpa.l*/ - ASSERT_OK(ea_src_l64(IR_EAMOD,IR_EAREG,&srcx1,&PC)); - (void)m68k_sub32((t_uint64)*AREG(IR_REGX),srcx1,0,TRUE); - break; - default: - rc = STOP_ERROP; - } - break; + case 0000700: case 0000710: case 0000720: case 0000730: + case 0000740: case 0000750: case 0000760: case 0000770: /*cmpa.l*/ + ASSERT_OK(ea_src_l64(IR_EAMOD,IR_EAREG,&srcx1,&PC)); + (void)m68k_sub32((t_uint64)*AREG(IR_REGX),srcx1,0,TRUE); + break; + default: + rc = STOP_ERROP; + } + break; - /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 1 1 0 0 | Register |Opc|Length | effective address<>00x| and - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 1 1 0 0 | Reg X | 1 0 0 | 0 0 |R/M| Reg Y | abcd - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 1 1 0 0 | Reg X | 1 |Opcode | 0 0 |Opc| Reg Y | exg - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 1 1 0 0 | Register |Opc| 1 1 | effective address | muls,mulu - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ - case 0xc000: - switch(IR_0803) { - case 0000300: case 0000310: case 0000320: case 0000330: - case 0000340: case 0000350: case 0000360: case 0000370: /*mulu*/ - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = (uint16)MASK_16L(src1) * (uint16)MASK_16L(DRX); - DRX = res; - SETNZ32(res); - CLRF(FLAG_C|FLAG_V); - break; - case 0000700: case 0000710: case 0000720: case 0000730: - case 0000740: case 0000750: case 0000760: case 0000770: /*muls*/ - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - sres = (int16)MASK_16L(src1) * (int16)MASK_16L(DRX); - DRX = (uint32)sres; - SETNZ32(sres); - CLRF(FLAG_C|FLAG_V); - break; - case 0000500: /* exg d,d */ - res = DRX; DRX = DRY; DRY = res; - rc = SCPE_OK; break; - case 0000510: /* exg a,a */ - srca = *AREG(IR_REGX); *AREG(IR_REGX) = *AREG(IR_REGY); *AREG(IR_REGY) = srca; - rc = SCPE_OK; break; - case 0000610: /* exg a,d */ - res = DRX; DRX = (uint32)*AREG(IR_REGY); *AREG(IR_REGY) = (t_addr)res; - rc = SCPE_OK; break; - case 0000400: /* abcd d */ - rc = STOP_IMPL; break; - case 0000410: /* abcd a */ - rc = STOP_IMPL; break; - case 0000000: case 00000020: case 0000030: case 0000040: - case 0000050: case 00000060: case 0000070: /* and.b -> d*/ - ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = src1 & DRX; - SETNZ8(res); - CLRF(FLAG_C|FLAG_V); - rc = ea_dst_b(EA_DDIR,IR_REGX,res,&PC); - break; - case 0000100: case 00000120: case 0000130: case 0000140: - case 0000150: case 00000160: case 0000170: /* and.w -> d*/ - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = src1 & DRX; - SETNZ16(res); - CLRF(FLAG_C|FLAG_V); - rc = ea_dst_w(EA_DDIR,IR_REGX,res,&PC); - break; - rc = STOP_IMPL; break; - case 0000200: case 00000220: case 0000230: case 0000240: - case 0000250: case 00000260: case 0000270: /* and.l -> d*/ - ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = src1 & DRX; - SETNZ32(res); - CLRF(FLAG_C|FLAG_V); - rc = ea_dst_l(EA_DDIR,IR_REGX,res,&PC); - break; - case 0000420: case 00000430: case 0000440: case 0000450: - case 0000460: case 00000470: /* and.b -> ea*/ - ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = DRX & src1; - SETNZ8(res); - CLRF(FLAG_C|FLAG_V); - rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res); - break; - case 0000520: case 00000530: case 0000540: case 0000550: - case 0000560: case 00000570: /* and.w -> ea*/ - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = DRX & src1; - SETNZ16(res); - CLRF(FLAG_C|FLAG_V); - rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); - break; - case 0000620: case 00000630: case 0000640: case 0000650: - case 0000660: case 00000670: /* and.l -> ea*/ - ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = DRX & src1; - SETNZ32(res); - CLRF(FLAG_C|FLAG_V); - rc = ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res); - break; - default: - rc = STOP_ERROP; - } - break; + /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 1 1 0 0 | Register |Opc|Length | effective address<>00x| and + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 1 1 0 0 | Reg X | 1 0 0 | 0 0 |R/M| Reg Y | abcd + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 1 1 0 0 | Reg X | 1 |Opcode | 0 0 |Opc| Reg Y | exg + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 1 1 0 0 | Register |Opc| 1 1 | effective address | muls,mulu + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ + case 0xc000: + switch(IR_0803) { + case 0000300: case 0000310: case 0000320: case 0000330: + case 0000340: case 0000350: case 0000360: case 0000370: /*mulu*/ + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = (uint16)MASK_16L(src1) * (uint16)MASK_16L(DRX); + DRX = res; + SETNZ32(res); + CLRF(FLAG_C|FLAG_V); + break; + case 0000700: case 0000710: case 0000720: case 0000730: + case 0000740: case 0000750: case 0000760: case 0000770: /*muls*/ + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + sres = (int16)MASK_16L(src1) * (int16)MASK_16L(DRX); + DRX = (uint32)sres; + SETNZ32(sres); + CLRF(FLAG_C|FLAG_V); + break; + case 0000500: /* exg d,d */ + res = DRX; DRX = DRY; DRY = res; + rc = SCPE_OK; break; + case 0000510: /* exg a,a */ + srca = *AREG(IR_REGX); *AREG(IR_REGX) = *AREG(IR_REGY); *AREG(IR_REGY) = srca; + rc = SCPE_OK; break; + case 0000610: /* exg a,d */ + res = DRX; DRX = (uint32)*AREG(IR_REGY); *AREG(IR_REGY) = (t_addr)res; + rc = SCPE_OK; break; + case 0000400: /* abcd d */ + rc = STOP_IMPL; break; + case 0000410: /* abcd a */ + rc = STOP_IMPL; break; + case 0000000: case 00000020: case 0000030: case 0000040: + case 0000050: case 00000060: case 0000070: /* and.b -> d*/ + ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = src1 & DRX; + SETNZ8(res); + CLRF(FLAG_C|FLAG_V); + rc = ea_dst_b(EA_DDIR,IR_REGX,res,&PC); + break; + case 0000100: case 00000120: case 0000130: case 0000140: + case 0000150: case 00000160: case 0000170: /* and.w -> d*/ + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = src1 & DRX; + SETNZ16(res); + CLRF(FLAG_C|FLAG_V); + rc = ea_dst_w(EA_DDIR,IR_REGX,res,&PC); + break; + rc = STOP_IMPL; break; + case 0000200: case 00000220: case 0000230: case 0000240: + case 0000250: case 00000260: case 0000270: /* and.l -> d*/ + ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = src1 & DRX; + SETNZ32(res); + CLRF(FLAG_C|FLAG_V); + rc = ea_dst_l(EA_DDIR,IR_REGX,res,&PC); + break; + case 0000420: case 00000430: case 0000440: case 0000450: + case 0000460: case 00000470: /* and.b -> ea*/ + ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = DRX & src1; + SETNZ8(res); + CLRF(FLAG_C|FLAG_V); + rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res); + break; + case 0000520: case 00000530: case 0000540: case 0000550: + case 0000560: case 00000570: /* and.w -> ea*/ + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = DRX & src1; + SETNZ16(res); + CLRF(FLAG_C|FLAG_V); + rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); + break; + case 0000620: case 00000630: case 0000640: case 0000650: + case 0000660: case 00000670: /* and.l -> ea*/ + ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = DRX & src1; + SETNZ32(res); + CLRF(FLAG_C|FLAG_V); + rc = ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res); + break; + default: + rc = STOP_ERROP; + } + break; - /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 1 1 0 1 | Register |Opc| 1 1 | effective address<>00x| add,adda - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 1 1 0 1 | Reg X | 1 |Length | 0 0 |R/M| Reg Y | addx - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ - case 0xd000: - switch (IR_0803) { - case 0000300: case 0000310: case 0000320: case 0000330: - case 0000340: case 0000350: case 0000360: case 0000370: /*adda.w*/ - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&srca,&PC)); - *AREG(IR_REGX) += EXTW(srca); /* note: no flag changes! */ - break; - case 0000700: case 0000710: case 0000720: case 0000730: - case 0000740: case 0000750: case 0000760: case 0000770: /*adda.l*/ - ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&srca,&PC)); - *AREG(IR_REGX) += srca; /* note: no flag changes! */ - break; - case 0000400: /* addx.b d*/ - res = m68k_add8(MASK_8L(DRY),DRX,CCR_X?1:0); - rc = ea_dst_b(EA_DDIR,IR_REGX,res,&PC); - break; - case 0000410: /* addx.b -a*/ - ASSERT_OK(ea_src_b(EA_APD,IR_REGY,&src1,&PC)); - ASSERT_OK(ea_src_b(EA_APD,IR_REGX,&src2,&PC)); - res = m68k_add8(src1,src2,CCR_X?1:0); - rc = ea_dst_b_rmw(EA_APD,IR_REGX,res); - break; - case 0000500: /* addx.w d*/ - res = m68k_add16(MASK_16L(DRY),DRX,CCR_X?1:0,TRUE); - rc = ea_dst_w(EA_DDIR,IR_REGX,res,&PC); - break; - case 0000510: /* addx.w -a*/ - ASSERT_OK(ea_src_w(EA_APD,IR_REGY,&src1,&PC)); - ASSERT_OK(ea_src_w(EA_APD,IR_REGX,&src2,&PC)); - res = m68k_add16(src1,src2,CCR_X?1:0,TRUE); - rc = ea_dst_w_rmw(EA_APD,IR_REGX,res); - break; - case 0000600: /* addx.l d*/ - res = m68k_add32((t_uint64)DRY,(t_uint64)DRX,CCR_X?1:0,TRUE); - rc = ea_dst_l(EA_DDIR,IR_REGX,res,&PC); - break; - case 0000610: /* addx.l -a*/ - ASSERT_OK(ea_src_l64(EA_APD,IR_REGY,&srcx1,&PC)); - ASSERT_OK(ea_src_l64(EA_APD,IR_REGX,&srcx2,&PC)); - res = m68k_add32(srcx1,srcx2,CCR_X?1:0,TRUE); - rc = ea_dst_l_rmw(EA_APD,IR_REGX,res); - break; - case 0000000: case 0000010: case 0000020: case 0000030: - case 0000040: case 0000050: case 0000060: case 0000070: /*add.b ->d*/ - ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = m68k_add8(src1,DRX,0); - rc = ea_dst_b(EA_DDIR,IR_REGX,res,&PC); - break; - case 0000100: case 0000110: case 0000120: case 0000130: - case 0000140: case 0000150: case 0000160: case 0000170: /*add.w ->d*/ - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = m68k_add16(src1,DRX,0,TRUE); - rc = ea_dst_w(EA_DDIR,IR_REGX,res,&PC); - break; - case 0000200: case 0000210: case 0000220: case 0000230: - case 0000240: case 0000250: case 0000260: case 0000270: /*add.l ->d*/ - ASSERT_OK(ea_src_l64(IR_EAMOD,IR_EAREG,&srcx1,&PC)); - res = m68k_add32(srcx1,(t_uint64)DRX,0,TRUE); - rc = ea_dst_l(EA_DDIR,IR_REGX,res,&PC); - break; - case 0000420: case 0000430: case 0000440: case 0000450: - case 0000460: case 0000470: /*add.b ->ea*/ - ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = m68k_add8(src1,DRX,0); - rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res); - break; - case 0000520: case 0000530: case 0000540: case 0000550: - case 0000560: case 0000570: /*add.w ->ea*/ - ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = m68k_add16(src1,DRX,0,TRUE); - rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); - break; - case 0000620: case 0000630: case 0000640: case 0000650: - case 0000660: case 0000670: /*add.l ->ea*/ - ASSERT_OK(ea_src_l64(IR_EAMOD,IR_EAREG,&srcx1,&PC)); - res = m68k_add32(srcx1,(t_uint64)DRX,0,TRUE); - rc = ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res); - break; - default: - rc = STOP_ERROP; - } - break; + /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 1 1 0 1 | Register |Opc| 1 1 | effective address<>00x| add,adda + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 1 1 0 1 | Reg X | 1 |Length | 0 0 |R/M| Reg Y | addx + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ + case 0xd000: + switch (IR_0803) { + case 0000300: case 0000310: case 0000320: case 0000330: + case 0000340: case 0000350: case 0000360: case 0000370: /*adda.w*/ + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&srca,&PC)); + *AREG(IR_REGX) += EXTW(srca); /* note: no flag changes! */ + break; + case 0000700: case 0000710: case 0000720: case 0000730: + case 0000740: case 0000750: case 0000760: case 0000770: /*adda.l*/ + ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&srca,&PC)); + *AREG(IR_REGX) += srca; /* note: no flag changes! */ + break; + case 0000400: /* addx.b d*/ + res = m68k_add8(MASK_8L(DRY),DRX,CCR_X?1:0); + rc = ea_dst_b(EA_DDIR,IR_REGX,res,&PC); + break; + case 0000410: /* addx.b -a*/ + ASSERT_OK(ea_src_b(EA_APD,IR_REGY,&src1,&PC)); + ASSERT_OK(ea_src_b(EA_APD,IR_REGX,&src2,&PC)); + res = m68k_add8(src1,src2,CCR_X?1:0); + rc = ea_dst_b_rmw(EA_APD,IR_REGX,res); + break; + case 0000500: /* addx.w d*/ + res = m68k_add16(MASK_16L(DRY),DRX,CCR_X?1:0,TRUE); + rc = ea_dst_w(EA_DDIR,IR_REGX,res,&PC); + break; + case 0000510: /* addx.w -a*/ + ASSERT_OK(ea_src_w(EA_APD,IR_REGY,&src1,&PC)); + ASSERT_OK(ea_src_w(EA_APD,IR_REGX,&src2,&PC)); + res = m68k_add16(src1,src2,CCR_X?1:0,TRUE); + rc = ea_dst_w_rmw(EA_APD,IR_REGX,res); + break; + case 0000600: /* addx.l d*/ + res = m68k_add32((t_uint64)DRY,(t_uint64)DRX,CCR_X?1:0,TRUE); + rc = ea_dst_l(EA_DDIR,IR_REGX,res,&PC); + break; + case 0000610: /* addx.l -a*/ + ASSERT_OK(ea_src_l64(EA_APD,IR_REGY,&srcx1,&PC)); + ASSERT_OK(ea_src_l64(EA_APD,IR_REGX,&srcx2,&PC)); + res = m68k_add32(srcx1,srcx2,CCR_X?1:0,TRUE); + rc = ea_dst_l_rmw(EA_APD,IR_REGX,res); + break; + case 0000000: case 0000010: case 0000020: case 0000030: + case 0000040: case 0000050: case 0000060: case 0000070: /*add.b ->d*/ + ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = m68k_add8(src1,DRX,0); + rc = ea_dst_b(EA_DDIR,IR_REGX,res,&PC); + break; + case 0000100: case 0000110: case 0000120: case 0000130: + case 0000140: case 0000150: case 0000160: case 0000170: /*add.w ->d*/ + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = m68k_add16(src1,DRX,0,TRUE); + rc = ea_dst_w(EA_DDIR,IR_REGX,res,&PC); + break; + case 0000200: case 0000210: case 0000220: case 0000230: + case 0000240: case 0000250: case 0000260: case 0000270: /*add.l ->d*/ + ASSERT_OK(ea_src_l64(IR_EAMOD,IR_EAREG,&srcx1,&PC)); + res = m68k_add32(srcx1,(t_uint64)DRX,0,TRUE); + rc = ea_dst_l(EA_DDIR,IR_REGX,res,&PC); + break; + case 0000420: case 0000430: case 0000440: case 0000450: + case 0000460: case 0000470: /*add.b ->ea*/ + ASSERT_OK(ea_src_b(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = m68k_add8(src1,DRX,0); + rc = ea_dst_b_rmw(IR_EAMOD,IR_EAREG,res); + break; + case 0000520: case 0000530: case 0000540: case 0000550: + case 0000560: case 0000570: /*add.w ->ea*/ + ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = m68k_add16(src1,DRX,0,TRUE); + rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); + break; + case 0000620: case 0000630: case 0000640: case 0000650: + case 0000660: case 0000670: /*add.l ->ea*/ + ASSERT_OK(ea_src_l64(IR_EAMOD,IR_EAREG,&srcx1,&PC)); + res = m68k_add32(srcx1,(t_uint64)DRX,0,TRUE); + rc = ea_dst_l_rmw(IR_EAMOD,IR_EAREG,res); + break; + default: + rc = STOP_ERROP; + } + break; - /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 1 1 1 0 |Size/Reg X |dir|Length |i/r|Opcode2| Reg Y | asl,asr,lsl,lsr,rol,ror,roxl,roxr - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 1 1 1 0 | Opcode |dir| 1 1 | effective address | asl,asr,lsl,lsr,rol,ror,roxl,roxr - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ - case 0xe000: - switch (IR_1103) { - case 000040: case 001040: case 002040: case 003040: - case 004040: case 005040: case 006040: case 007040: /*asr.b r*/ - cnt = DRX & 077; - goto do_asr8; - case 000000: case 001000: case 002000: case 003000: - case 004000: case 005000: case 006000: case 007000: /*asr.b #*/ - cnt = quickarg[IR_REGX]; -do_asr8: reg = DR+IR_REGY; - res = src1 = MASK_8L(*reg); - if (cnt) { - if (cnt<8) { - res >>= cnt; - if (MASK_8SGN(src1)) res |= shmask8[cnt]; - SETF(src1&bitmask[cnt],FLAG_C|FLAG_X); - } else { - res = MASK_8SGN(src1) ? 0xff : 0x00; - SETF(res,FLAG_C|FLAG_X); - } - *reg = COMBINE8(*reg,res); - } else - CLRF(FLAG_C); - SETNZ8(res); - CLRF(FLAG_V); - rc =SCPE_OK; break; + /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 1 1 1 0 |Size/Reg X |dir|Length |i/r|Opcode2| Reg Y | asl,asr,lsl,lsr,rol,ror,roxl,roxr + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 1 1 1 0 | Opcode |dir| 1 1 | effective address | asl,asr,lsl,lsr,rol,ror,roxl,roxr + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ + case 0xe000: + switch (IR_1103) { + case 000040: case 001040: case 002040: case 003040: + case 004040: case 005040: case 006040: case 007040: /*asr.b r*/ + cnt = DRX & 077; + goto do_asr8; + case 000000: case 001000: case 002000: case 003000: + case 004000: case 005000: case 006000: case 007000: /*asr.b #*/ + cnt = quickarg[IR_REGX]; +do_asr8: reg = DR+IR_REGY; + res = src1 = MASK_8L(*reg); + if (cnt) { + if (cnt<8) { + res >>= cnt; + if (MASK_8SGN(src1)) res |= shmask8[cnt]; + SETF(src1&bitmask[cnt],FLAG_C|FLAG_X); + } else { + res = MASK_8SGN(src1) ? 0xff : 0x00; + SETF(res,FLAG_C|FLAG_X); + } + *reg = COMBINE8(*reg,res); + } else + CLRF(FLAG_C); + SETNZ8(res); + CLRF(FLAG_V); + rc =SCPE_OK; break; - case 000320: case 000330: case 000340: case 000350: - case 000360: case 000370: /*asr*/ - cnt = 1; - goto do_asr16; - case 000140: case 001140: case 002140: case 003140: - case 004140: case 005140: case 006140: case 007140: /*asr.w r*/ - cnt = DRX & 077; - IR = EA_DDIR | IR_REGY; - goto do_asr16; - case 000100: case 001100: case 002100: case 003100: - case 004100: case 005100: case 006100: case 007100: /*asr.w #*/ - cnt = quickarg[IR_REGX]; - IR = EA_DDIR | IR_REGY; -do_asr16: ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - if (cnt) { - if (cnt<16) { - res = src1 >> cnt; - if (MASK_16SGN(src1)) res |= shmask16[cnt]; - SETF(src1&bitmask[cnt],FLAG_C|FLAG_X); - } else { - res = MASK_16SGN(src1) ? 0xffff : 0x0000; - SETF(res,FLAG_C|FLAG_X); - } - rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); - } else { - CLRF(FLAG_C); - res = src1; - rc = SCPE_OK; - } - SETNZ16(res); - CLRF(FLAG_V); - break; + case 000320: case 000330: case 000340: case 000350: + case 000360: case 000370: /*asr*/ + cnt = 1; + goto do_asr16; + case 000140: case 001140: case 002140: case 003140: + case 004140: case 005140: case 006140: case 007140: /*asr.w r*/ + cnt = DRX & 077; + IR = EA_DDIR | IR_REGY; + goto do_asr16; + case 000100: case 001100: case 002100: case 003100: + case 004100: case 005100: case 006100: case 007100: /*asr.w #*/ + cnt = quickarg[IR_REGX]; + IR = EA_DDIR | IR_REGY; +do_asr16: ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + if (cnt) { + if (cnt<16) { + res = src1 >> cnt; + if (MASK_16SGN(src1)) res |= shmask16[cnt]; + SETF(src1&bitmask[cnt],FLAG_C|FLAG_X); + } else { + res = MASK_16SGN(src1) ? 0xffff : 0x0000; + SETF(res,FLAG_C|FLAG_X); + } + rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); + } else { + CLRF(FLAG_C); + res = src1; + rc = SCPE_OK; + } + SETNZ16(res); + CLRF(FLAG_V); + break; - case 000240: case 001240: case 002240: case 003240: - case 004240: case 005240: case 006240: case 007240: /*asr.l r*/ - cnt = DRX & 077; - goto do_asr32; - case 000200: case 001200: case 002200: case 003200: - case 004200: case 005200: case 006200: case 007200: /*asr.l #*/ - cnt = quickarg[IR_REGX]; -do_asr32: reg = DR+IR_REGY; - res = src1 = *reg; - if (cnt) { - if (cnt < 32) { - res >>= cnt; - if (MASK_32SGN(src1)) res |= shmask32[cnt]; - SETF(src1&bitmask[cnt],FLAG_C|FLAG_X); - } else { - res = MASK_32SGN(src1) ? 0xffffffff : 0x00000000; - SETF(res,FLAG_C|FLAG_X); - } - *reg = res; - } else CLRF(FLAG_C); - SETNZ32(res); - CLRF(FLAG_V); - rc = SCPE_OK; break; + case 000240: case 001240: case 002240: case 003240: + case 004240: case 005240: case 006240: case 007240: /*asr.l r*/ + cnt = DRX & 077; + goto do_asr32; + case 000200: case 001200: case 002200: case 003200: + case 004200: case 005200: case 006200: case 007200: /*asr.l #*/ + cnt = quickarg[IR_REGX]; +do_asr32: reg = DR+IR_REGY; + res = src1 = *reg; + if (cnt) { + if (cnt < 32) { + res >>= cnt; + if (MASK_32SGN(src1)) res |= shmask32[cnt]; + SETF(src1&bitmask[cnt],FLAG_C|FLAG_X); + } else { + res = MASK_32SGN(src1) ? 0xffffffff : 0x00000000; + SETF(res,FLAG_C|FLAG_X); + } + *reg = res; + } else CLRF(FLAG_C); + SETNZ32(res); + CLRF(FLAG_V); + rc = SCPE_OK; break; - case 000440: case 001440: case 002440: case 003440: - case 004440: case 005440: case 006440: case 007440: /*asl.b r*/ - cnt = DRX & 077; - goto do_asl8; - case 000400: case 001400: case 002400: case 003400: - case 004400: case 005400: case 006400: case 007400: /*asl.b #*/ - cnt = quickarg[IR_REGX]; -do_asl8: reg = DR+IR_REGY; - res = src1 = MASK_8L(*reg); - if (cnt) { - if (cnt<8) { - res = src1 << cnt; - SETF(MASK_9(res),FLAG_C|FLAG_X); - src1 &= shmask8[cnt+1]; - SETF(src1 && src1 != shmask8[cnt+1],FLAG_V); - } else { - res = 0; - SETF(cnt==8?(src1 & 1):0,FLAG_C|FLAG_X); - SETF(src1,FLAG_V); - } - *reg = COMBINE8(*reg,res); - } else CLRF(FLAG_C|FLAG_V); - SETNZ8(res); - rc = SCPE_OK; break; - - case 000720: case 000730: case 000740: case 000750: - case 000760: case 000770: /*asl*/ - cnt = 1; - goto do_asl16; - case 000540: case 001540: case 002540: case 003540: - case 004540: case 005540: case 006540: case 007540: /*asl.w r*/ - cnt = DRX & 077; - IR = EA_DDIR | IR_REGY; - goto do_asl16; - case 000500: case 001500: case 002500: case 003500: - case 004500: case 005500: case 006500: case 007500: /*asl.w #*/ - cnt = quickarg[IR_REGX]; - IR = EA_DDIR | IR_REGY; -do_asl16: ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - if (cnt) { - if (cnt<16) { - res = src1 << cnt; - SETF(MASK_17(res),FLAG_C|FLAG_X); - src1 &= shmask16[cnt+1]; - SETF(src1 && src1 != shmask16[cnt+1],FLAG_V); - } else { - res = 0; - SETF(cnt==16?(src1 & 1):0,FLAG_C|FLAG_X); - SETF(src1,FLAG_V); - } - rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); - } else { - CLRF(FLAG_C|FLAG_V); - rc = SCPE_OK; - } - SETNZ16(res); - break; + case 000440: case 001440: case 002440: case 003440: + case 004440: case 005440: case 006440: case 007440: /*asl.b r*/ + cnt = DRX & 077; + goto do_asl8; + case 000400: case 001400: case 002400: case 003400: + case 004400: case 005400: case 006400: case 007400: /*asl.b #*/ + cnt = quickarg[IR_REGX]; +do_asl8: reg = DR+IR_REGY; + res = src1 = MASK_8L(*reg); + if (cnt) { + if (cnt<8) { + res = src1 << cnt; + SETF(MASK_9(res),FLAG_C|FLAG_X); + src1 &= shmask8[cnt+1]; + SETF(src1 && src1 != shmask8[cnt+1],FLAG_V); + } else { + res = 0; + SETF(cnt==8?(src1 & 1):0,FLAG_C|FLAG_X); + SETF(src1,FLAG_V); + } + *reg = COMBINE8(*reg,res); + } else CLRF(FLAG_C|FLAG_V); + SETNZ8(res); + rc = SCPE_OK; break; + + case 000720: case 000730: case 000740: case 000750: + case 000760: case 000770: /*asl*/ + cnt = 1; + goto do_asl16; + case 000540: case 001540: case 002540: case 003540: + case 004540: case 005540: case 006540: case 007540: /*asl.w r*/ + cnt = DRX & 077; + IR = EA_DDIR | IR_REGY; + goto do_asl16; + case 000500: case 001500: case 002500: case 003500: + case 004500: case 005500: case 006500: case 007500: /*asl.w #*/ + cnt = quickarg[IR_REGX]; + IR = EA_DDIR | IR_REGY; +do_asl16: ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + if (cnt) { + if (cnt<16) { + res = src1 << cnt; + SETF(MASK_17(res),FLAG_C|FLAG_X); + src1 &= shmask16[cnt+1]; + SETF(src1 && src1 != shmask16[cnt+1],FLAG_V); + } else { + res = 0; + SETF(cnt==16?(src1 & 1):0,FLAG_C|FLAG_X); + SETF(src1,FLAG_V); + } + rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); + } else { + CLRF(FLAG_C|FLAG_V); + rc = SCPE_OK; + } + SETNZ16(res); + break; - case 000640: case 001640: case 002640: case 003640: - case 004640: case 005640: case 006640: case 007640: /*asl.l r*/ - cnt = DRX & 077; - goto do_asl32; - case 000600: case 001600: case 002600: case 003600: - case 004600: case 005600: case 006600: case 007600: /*asl.l #*/ - cnt = quickarg[IR_REGX]; -do_asl32: reg = DR+IR_REGY; - res = src1 = *reg; - if (cnt) { - if (cnt<32) { - res <<= cnt; - SETF(src1 & bitmask[32-cnt],FLAG_C|FLAG_X); - src1 &= shmask32[cnt+1]; - SETF(src1 && src1 != shmask32[cnt+1],FLAG_V); - } else { - res = 0; - SETF(cnt==16?(src1 & 1):0,FLAG_C|FLAG_X); - SETF(src1,FLAG_V); - } - *reg = res; - } else CLRF(FLAG_C|FLAG_V); - SETNZ32(res); - rc = SCPE_OK; break; - - case 000050: case 001050: case 002050: case 003050: - case 004050: case 005050: case 006050: case 007050: /*lsr.b r*/ - cnt = DRX & 077; - goto do_lsr8; - case 000010: case 001010: case 002010: case 003010: - case 004010: case 005010: case 006010: case 007010: /*lsr.b #*/ - cnt = quickarg[IR_REGX]; -do_lsr8: reg = DR+IR_REGY; - res = src1 = MASK_8L(*reg); - if (cnt) { - if (cnt <= 8) { - res = src1 >> cnt; - SETF(src1&bitmask[cnt],FLAG_C|FLAG_X); - } else { - res = 0; - CLRF(FLAG_X|FLAG_C); - } - *reg = COMBINE8(*reg,res); - } else CLRF(FLAG_C); - CLRF(FLAG_V); - SETNZ8(res); - rc = SCPE_OK; break; - - case 001320: case 001330: case 001340: case 001350: - case 001360: case 001370: /*lsr*/ - cnt = 1; - goto do_lsr16; - case 000150: case 001150: case 002150: case 003150: - case 004150: case 005150: case 006150: case 007150: /*lsr.w r*/ - cnt = DRX & 077; - IR = EA_DDIR | IR_REGY; - goto do_lsr16; - case 000110: case 001110: case 002110: case 003110: - case 004110: case 005110: case 006110: case 007110: /*lsr.w #*/ - cnt = quickarg[IR_REGX]; - IR = EA_DDIR | IR_REGY; -do_lsr16: ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - if (cnt) { - if (cnt <= 16) { - res = src1 >> cnt; - SETF(src1&bitmask[cnt],FLAG_C|FLAG_X); - } else { - res = 0; - CLRF(FLAG_X|FLAG_C); - } - rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); - } else { - CLRF(FLAG_C); - rc = SCPE_OK; - } - CLRF(FLAG_V); - SETNZ16(res); - break; + case 000640: case 001640: case 002640: case 003640: + case 004640: case 005640: case 006640: case 007640: /*asl.l r*/ + cnt = DRX & 077; + goto do_asl32; + case 000600: case 001600: case 002600: case 003600: + case 004600: case 005600: case 006600: case 007600: /*asl.l #*/ + cnt = quickarg[IR_REGX]; +do_asl32: reg = DR+IR_REGY; + res = src1 = *reg; + if (cnt) { + if (cnt<32) { + res <<= cnt; + SETF(src1 & bitmask[32-cnt],FLAG_C|FLAG_X); + src1 &= shmask32[cnt+1]; + SETF(src1 && src1 != shmask32[cnt+1],FLAG_V); + } else { + res = 0; + SETF(cnt==16?(src1 & 1):0,FLAG_C|FLAG_X); + SETF(src1,FLAG_V); + } + *reg = res; + } else CLRF(FLAG_C|FLAG_V); + SETNZ32(res); + rc = SCPE_OK; break; + + case 000050: case 001050: case 002050: case 003050: + case 004050: case 005050: case 006050: case 007050: /*lsr.b r*/ + cnt = DRX & 077; + goto do_lsr8; + case 000010: case 001010: case 002010: case 003010: + case 004010: case 005010: case 006010: case 007010: /*lsr.b #*/ + cnt = quickarg[IR_REGX]; +do_lsr8: reg = DR+IR_REGY; + res = src1 = MASK_8L(*reg); + if (cnt) { + if (cnt <= 8) { + res = src1 >> cnt; + SETF(src1&bitmask[cnt],FLAG_C|FLAG_X); + } else { + res = 0; + CLRF(FLAG_X|FLAG_C); + } + *reg = COMBINE8(*reg,res); + } else CLRF(FLAG_C); + CLRF(FLAG_V); + SETNZ8(res); + rc = SCPE_OK; break; + + case 001320: case 001330: case 001340: case 001350: + case 001360: case 001370: /*lsr*/ + cnt = 1; + goto do_lsr16; + case 000150: case 001150: case 002150: case 003150: + case 004150: case 005150: case 006150: case 007150: /*lsr.w r*/ + cnt = DRX & 077; + IR = EA_DDIR | IR_REGY; + goto do_lsr16; + case 000110: case 001110: case 002110: case 003110: + case 004110: case 005110: case 006110: case 007110: /*lsr.w #*/ + cnt = quickarg[IR_REGX]; + IR = EA_DDIR | IR_REGY; +do_lsr16: ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + if (cnt) { + if (cnt <= 16) { + res = src1 >> cnt; + SETF(src1&bitmask[cnt],FLAG_C|FLAG_X); + } else { + res = 0; + CLRF(FLAG_X|FLAG_C); + } + rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); + } else { + CLRF(FLAG_C); + rc = SCPE_OK; + } + CLRF(FLAG_V); + SETNZ16(res); + break; - case 000250: case 001250: case 002250: case 003250: - case 004250: case 005250: case 006250: case 007250: /*lsr.l r*/ - cnt = DRX & 077; - goto do_lsr32; - case 000210: case 001210: case 002210: case 003210: - case 004210: case 005210: case 006210: case 007210: /*lsr.l #*/ - cnt = quickarg[IR_REGX]; -do_lsr32: reg = DR+IR_REGY; - res = src1 = *reg; - if (cnt) { - if (cnt <= 32) { - res = src1 >> cnt; - SETF(src1&bitmask[cnt],FLAG_C|FLAG_X); - } else { - res = 0; - CLRF(FLAG_X|FLAG_C); - } - *reg = res; - } else CLRF(FLAG_C); - CLRF(FLAG_V); - SETNZ32(res); - rc = SCPE_OK; - break; + case 000250: case 001250: case 002250: case 003250: + case 004250: case 005250: case 006250: case 007250: /*lsr.l r*/ + cnt = DRX & 077; + goto do_lsr32; + case 000210: case 001210: case 002210: case 003210: + case 004210: case 005210: case 006210: case 007210: /*lsr.l #*/ + cnt = quickarg[IR_REGX]; +do_lsr32: reg = DR+IR_REGY; + res = src1 = *reg; + if (cnt) { + if (cnt <= 32) { + res = src1 >> cnt; + SETF(src1&bitmask[cnt],FLAG_C|FLAG_X); + } else { + res = 0; + CLRF(FLAG_X|FLAG_C); + } + *reg = res; + } else CLRF(FLAG_C); + CLRF(FLAG_V); + SETNZ32(res); + rc = SCPE_OK; + break; - case 000450: case 001450: case 002450: case 003450: - case 004450: case 005450: case 006450: case 007450: /*lsl.b r*/ - cnt = DRX & 077; - goto do_lsl8; - case 000410: case 001410: case 002410: case 003410: - case 004410: case 005410: case 006410: case 007410: /*lsl.b #*/ - cnt = quickarg[IR_REGX]; -do_lsl8: reg = DR+IR_REGY; - res = src1 = MASK_8L(*reg); - if (cnt) { - if (cnt <= 8) { - res = src1 << cnt; - SETF(src1&bitmask[9-cnt],FLAG_C|FLAG_X); - } else { - res = 0; - CLRF(FLAG_X|FLAG_C); - } - *reg = COMBINE8(*reg,res); - } else CLRF(FLAG_C); - SETNZ8(res); - CLRF(FLAG_V); - rc = SCPE_OK; break; - - case 001720: case 001730: case 001740: case 001750: - case 001760: case 001770: /*lsl*/ - cnt = 1; - goto do_lsl16; - case 000550: case 001550: case 002550: case 003550: - case 004550: case 005550: case 006550: case 007550: /*lsl.w r*/ - cnt = DRX & 077; - IR = EA_DDIR | IR_REGY; - goto do_lsl16; - case 000510: case 001510: case 002510: case 003510: - case 004510: case 005510: case 006510: case 007510: /*lsl.w #*/ - cnt = quickarg[IR_REGX]; - IR = EA_DDIR | IR_REGY; -do_lsl16: ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); - res = src1; - if (cnt) { - if (cnt <= 16) { - res = src1 << cnt; - SETF(src1&bitmask[17-cnt],FLAG_C|FLAG_X); - } else { - res = 0; - CLRF(FLAG_X|FLAG_C); - } - rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); - } else { - CLRF(FLAG_C); - rc = SCPE_OK; - } - SETNZ16(res); - CLRF(FLAG_V); - break; + case 000450: case 001450: case 002450: case 003450: + case 004450: case 005450: case 006450: case 007450: /*lsl.b r*/ + cnt = DRX & 077; + goto do_lsl8; + case 000410: case 001410: case 002410: case 003410: + case 004410: case 005410: case 006410: case 007410: /*lsl.b #*/ + cnt = quickarg[IR_REGX]; +do_lsl8: reg = DR+IR_REGY; + res = src1 = MASK_8L(*reg); + if (cnt) { + if (cnt <= 8) { + res = src1 << cnt; + SETF(src1&bitmask[9-cnt],FLAG_C|FLAG_X); + } else { + res = 0; + CLRF(FLAG_X|FLAG_C); + } + *reg = COMBINE8(*reg,res); + } else CLRF(FLAG_C); + SETNZ8(res); + CLRF(FLAG_V); + rc = SCPE_OK; break; + + case 001720: case 001730: case 001740: case 001750: + case 001760: case 001770: /*lsl*/ + cnt = 1; + goto do_lsl16; + case 000550: case 001550: case 002550: case 003550: + case 004550: case 005550: case 006550: case 007550: /*lsl.w r*/ + cnt = DRX & 077; + IR = EA_DDIR | IR_REGY; + goto do_lsl16; + case 000510: case 001510: case 002510: case 003510: + case 004510: case 005510: case 006510: case 007510: /*lsl.w #*/ + cnt = quickarg[IR_REGX]; + IR = EA_DDIR | IR_REGY; +do_lsl16: ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&src1,&PC)); + res = src1; + if (cnt) { + if (cnt <= 16) { + res = src1 << cnt; + SETF(src1&bitmask[17-cnt],FLAG_C|FLAG_X); + } else { + res = 0; + CLRF(FLAG_X|FLAG_C); + } + rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); + } else { + CLRF(FLAG_C); + rc = SCPE_OK; + } + SETNZ16(res); + CLRF(FLAG_V); + break; - case 000650: case 001650: case 002650: case 003650: - case 004650: case 005650: case 006650: case 007650: /*lsl.l r*/ - cnt = DRX & 077; - goto do_lsl32; - case 000610: case 001610: case 002610: case 003610: - case 004610: case 005610: case 006610: case 007610: /*lsl.l #*/ - cnt = quickarg[IR_REGX]; - IR = EA_DDIR | IR_REGY; -do_lsl32: reg = DR+IR_REGY; - res = src1 = *reg; - if (cnt) { - if (cnt <= 32) { - res = src1 << cnt; - SETF(src1&bitmask[33-cnt],FLAG_C|FLAG_X); - } else { - res = 0; - CLRF(FLAG_X|FLAG_C); - } - *reg = res; - } else { - CLRF(FLAG_C); - rc = SCPE_OK; - } - SETNZ32(res); - CLRF(FLAG_V); - break; - - case 000060: case 001060: case 002060: case 003060: - case 004060: case 005060: case 006060: case 007060: /*roxr.b r*/ - cnt = DRX & 077; - goto do_roxr8; - case 000020: case 001020: case 002020: case 003020: - case 004020: case 005020: case 006020: case 007020: /*roxr.b #*/ - cnt = quickarg[IR_REGX]; -do_roxr8: reg = DR+IR_REGY; - res = MASK_8L(*reg); - if (cnt) { - cnt %= 9; - if (CCR_X) res |= BIT8; - res = (res>>cnt) | (res<<(9-cnt)); - *reg = COMBINE8(*reg,res); - SETF(MASK_9(res),FLAG_X|FLAG_C); - } else SETF(CCR_X,FLAG_C); - SETNZ8(res); - CLRF(FLAG_V); - rc = SCPE_OK; break; - - case 002320: case 002330: case 002340: case 002350: - case 002360: case 002370: /*roxr*/ - cnt = 1; - goto do_roxr16; - case 000160: case 001160: case 002160: case 003160: - case 004160: case 005160: case 006160: case 007160: /*roxr.w r*/ - cnt = DRX & 077; - IR = EA_DDIR | IR_REGY; - goto do_roxr16; - case 000120: case 001120: case 002120: case 003120: - case 004120: case 005120: case 006120: case 007120: /*roxr.w #*/ - cnt = quickarg[IR_REGX]; - IR = EA_DDIR | IR_REGY; -do_roxr16: ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&res,&PC)); - if (cnt) { - cnt %= 17; - if (CCR_X) res |= BIT16; - res = (res>>cnt) | (res<<(17-cnt)); - rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); - SETF(MASK_17(res),FLAG_X|FLAG_C); - } else { - SETF(CCR_X,FLAG_C); - rc = SCPE_OK; - } - SETNZ16(res); - CLRF(FLAG_V); - break; + case 000650: case 001650: case 002650: case 003650: + case 004650: case 005650: case 006650: case 007650: /*lsl.l r*/ + cnt = DRX & 077; + goto do_lsl32; + case 000610: case 001610: case 002610: case 003610: + case 004610: case 005610: case 006610: case 007610: /*lsl.l #*/ + cnt = quickarg[IR_REGX]; + IR = EA_DDIR | IR_REGY; +do_lsl32: reg = DR+IR_REGY; + res = src1 = *reg; + if (cnt) { + if (cnt <= 32) { + res = src1 << cnt; + SETF(src1&bitmask[33-cnt],FLAG_C|FLAG_X); + } else { + res = 0; + CLRF(FLAG_X|FLAG_C); + } + *reg = res; + } else { + CLRF(FLAG_C); + rc = SCPE_OK; + } + SETNZ32(res); + CLRF(FLAG_V); + break; + + case 000060: case 001060: case 002060: case 003060: + case 004060: case 005060: case 006060: case 007060: /*roxr.b r*/ + cnt = DRX & 077; + goto do_roxr8; + case 000020: case 001020: case 002020: case 003020: + case 004020: case 005020: case 006020: case 007020: /*roxr.b #*/ + cnt = quickarg[IR_REGX]; +do_roxr8: reg = DR+IR_REGY; + res = MASK_8L(*reg); + if (cnt) { + cnt %= 9; + if (CCR_X) res |= BIT8; + res = (res>>cnt) | (res<<(9-cnt)); + *reg = COMBINE8(*reg,res); + SETF(MASK_9(res),FLAG_X|FLAG_C); + } else SETF(CCR_X,FLAG_C); + SETNZ8(res); + CLRF(FLAG_V); + rc = SCPE_OK; break; + + case 002320: case 002330: case 002340: case 002350: + case 002360: case 002370: /*roxr*/ + cnt = 1; + goto do_roxr16; + case 000160: case 001160: case 002160: case 003160: + case 004160: case 005160: case 006160: case 007160: /*roxr.w r*/ + cnt = DRX & 077; + IR = EA_DDIR | IR_REGY; + goto do_roxr16; + case 000120: case 001120: case 002120: case 003120: + case 004120: case 005120: case 006120: case 007120: /*roxr.w #*/ + cnt = quickarg[IR_REGX]; + IR = EA_DDIR | IR_REGY; +do_roxr16: ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&res,&PC)); + if (cnt) { + cnt %= 17; + if (CCR_X) res |= BIT16; + res = (res>>cnt) | (res<<(17-cnt)); + rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); + SETF(MASK_17(res),FLAG_X|FLAG_C); + } else { + SETF(CCR_X,FLAG_C); + rc = SCPE_OK; + } + SETNZ16(res); + CLRF(FLAG_V); + break; - case 000260: case 001260: case 002260: case 003260: - case 004260: case 005260: case 006260: case 007260: /*roxr.l r*/ - cnt = DRX & 077; - goto do_roxr32; - case 000220: case 001220: case 002220: case 003220: - case 004220: case 005220: case 006220: case 007220: /*roxr.l #*/ - cnt = quickarg[IR_REGX]; -do_roxr32: reg = DR+IR_REGY; - resx = *reg; - if (cnt) { - cnt %= 33; - if (CCR_X) resx |= BIT32; - resx = (resx>>cnt) | (resx<<(33-cnt)); - *reg = MASK_32L(resx); - SETF(MASK_33(res),FLAG_X|FLAG_C); - } else SETF(CCR_X,FLAG_C); - SETNZ32(resx); - CLRF(FLAG_V); - rc = SCPE_OK; break; - - case 000460: case 001460: case 002460: case 003460: - case 004460: case 005460: case 006460: case 007460: /*roxl.b r*/ - cnt = DRX & 077; - goto do_roxl8; - case 000420: case 001420: case 002420: case 003420: - case 004420: case 005420: case 006420: case 007420: /*roxl.b #*/ - cnt = quickarg[IR_REGX]; -do_roxl8: reg = DR+IR_REGY; - res = MASK_8L(*reg); - if (cnt) { - cnt %= 9; - if (CCR_X) res |= BIT8; - res = (res<>(9-cnt)); - *reg = COMBINE8(*reg,res); - SETF(MASK_9(res),FLAG_X|FLAG_C); - } else SETF(CCR_X,FLAG_C); - SETNZ8(res); - CLRF(FLAG_V); - rc = SCPE_OK; break; + case 000260: case 001260: case 002260: case 003260: + case 004260: case 005260: case 006260: case 007260: /*roxr.l r*/ + cnt = DRX & 077; + goto do_roxr32; + case 000220: case 001220: case 002220: case 003220: + case 004220: case 005220: case 006220: case 007220: /*roxr.l #*/ + cnt = quickarg[IR_REGX]; +do_roxr32: reg = DR+IR_REGY; + resx = *reg; + if (cnt) { + cnt %= 33; + if (CCR_X) resx |= BIT32; + resx = (resx>>cnt) | (resx<<(33-cnt)); + *reg = MASK_32L(resx); + SETF(MASK_33(res),FLAG_X|FLAG_C); + } else SETF(CCR_X,FLAG_C); + SETNZ32(resx); + CLRF(FLAG_V); + rc = SCPE_OK; break; + + case 000460: case 001460: case 002460: case 003460: + case 004460: case 005460: case 006460: case 007460: /*roxl.b r*/ + cnt = DRX & 077; + goto do_roxl8; + case 000420: case 001420: case 002420: case 003420: + case 004420: case 005420: case 006420: case 007420: /*roxl.b #*/ + cnt = quickarg[IR_REGX]; +do_roxl8: reg = DR+IR_REGY; + res = MASK_8L(*reg); + if (cnt) { + cnt %= 9; + if (CCR_X) res |= BIT8; + res = (res<>(9-cnt)); + *reg = COMBINE8(*reg,res); + SETF(MASK_9(res),FLAG_X|FLAG_C); + } else SETF(CCR_X,FLAG_C); + SETNZ8(res); + CLRF(FLAG_V); + rc = SCPE_OK; break; - case 002720: case 002730: case 002740: case 002750: - case 002760: case 002770: /*roxl*/ - cnt = 1; - goto do_roxl16; - case 000560: case 001560: case 002560: case 003560: - case 004560: case 005560: case 006560: case 007560: /*roxl.w r*/ - cnt = DRX & 077; - IR = EA_DDIR | IR_REGY; - goto do_roxl16; - case 000520: case 001520: case 002520: case 003520: - case 004520: case 005520: case 006520: case 007520: /*roxl.w #*/ - cnt = quickarg[IR_REGX]; - IR = EA_DDIR | IR_REGY; -do_roxl16: ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&res,&PC)); - if (cnt) { - cnt %= 17; - if (CCR_X) res |= BIT16; - res = (res<>(17-cnt)); - SETF(MASK_17(res),FLAG_X|FLAG_C); - rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); - } else { - SETF(CCR_X,FLAG_C); - rc = SCPE_OK; - } - SETNZ16(res); - CLRF(FLAG_V); - break; - - case 000660: case 001660: case 002660: case 003660: - case 004660: case 005660: case 006660: case 007660: /*roxl.l r*/ - cnt = DRX & 077; - goto do_roxl32; - case 000620: case 001620: case 002620: case 003620: - case 004620: case 005620: case 006620: case 007620: /*roxl.l #*/ - cnt = quickarg[IR_REGX]; -do_roxl32: reg = DR+IR_REGY; - resx = *reg; - if (cnt) { - cnt %= 33; - if (CCR_X) resx |= BIT32; - resx = (resx<>(33-cnt)); - SETF(MASK_33(resx),FLAG_X|FLAG_C); - *reg = MASK_32L(resx); - } else SETF(CCR_X,FLAG_C); - SETNZ32(resx); - CLRF(FLAG_V); - rc = SCPE_OK; break; - - case 000070: case 001070: case 002070: case 003070: - case 004070: case 005070: case 006070: case 007070: /*ror.b r*/ - cnt = DRX & 077; - goto do_ror8; - case 000030: case 001030: case 002030: case 003030: - case 004030: case 005030: case 006030: case 007030: /*ror.b #*/ - cnt = quickarg[IR_REGX]; -do_ror8: reg = DR+IR_REGY; - res = MASK_8L(*reg); - if (cnt) { - cnt &= 7; - res = (res>>cnt) | (res<<(8-cnt)); - SETF(MASK_9(res),FLAG_C); - *reg = COMBINE8(*reg,res); - } else CLRF(FLAG_C); - SETNZ8(res); - CLRF(FLAG_V); - rc = SCPE_OK; break; + case 002720: case 002730: case 002740: case 002750: + case 002760: case 002770: /*roxl*/ + cnt = 1; + goto do_roxl16; + case 000560: case 001560: case 002560: case 003560: + case 004560: case 005560: case 006560: case 007560: /*roxl.w r*/ + cnt = DRX & 077; + IR = EA_DDIR | IR_REGY; + goto do_roxl16; + case 000520: case 001520: case 002520: case 003520: + case 004520: case 005520: case 006520: case 007520: /*roxl.w #*/ + cnt = quickarg[IR_REGX]; + IR = EA_DDIR | IR_REGY; +do_roxl16: ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&res,&PC)); + if (cnt) { + cnt %= 17; + if (CCR_X) res |= BIT16; + res = (res<>(17-cnt)); + SETF(MASK_17(res),FLAG_X|FLAG_C); + rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); + } else { + SETF(CCR_X,FLAG_C); + rc = SCPE_OK; + } + SETNZ16(res); + CLRF(FLAG_V); + break; + + case 000660: case 001660: case 002660: case 003660: + case 004660: case 005660: case 006660: case 007660: /*roxl.l r*/ + cnt = DRX & 077; + goto do_roxl32; + case 000620: case 001620: case 002620: case 003620: + case 004620: case 005620: case 006620: case 007620: /*roxl.l #*/ + cnt = quickarg[IR_REGX]; +do_roxl32: reg = DR+IR_REGY; + resx = *reg; + if (cnt) { + cnt %= 33; + if (CCR_X) resx |= BIT32; + resx = (resx<>(33-cnt)); + SETF(MASK_33(resx),FLAG_X|FLAG_C); + *reg = MASK_32L(resx); + } else SETF(CCR_X,FLAG_C); + SETNZ32(resx); + CLRF(FLAG_V); + rc = SCPE_OK; break; + + case 000070: case 001070: case 002070: case 003070: + case 004070: case 005070: case 006070: case 007070: /*ror.b r*/ + cnt = DRX & 077; + goto do_ror8; + case 000030: case 001030: case 002030: case 003030: + case 004030: case 005030: case 006030: case 007030: /*ror.b #*/ + cnt = quickarg[IR_REGX]; +do_ror8: reg = DR+IR_REGY; + res = MASK_8L(*reg); + if (cnt) { + cnt &= 7; + res = (res>>cnt) | (res<<(8-cnt)); + SETF(MASK_9(res),FLAG_C); + *reg = COMBINE8(*reg,res); + } else CLRF(FLAG_C); + SETNZ8(res); + CLRF(FLAG_V); + rc = SCPE_OK; break; - case 003320: case 003330: case 003340: case 003350: - case 003360: case 003370: /*ror*/ - cnt = 1; - goto do_ror16; - case 000170: case 001170: case 002170: case 003170: - case 004170: case 005170: case 006170: case 007170: /*ror.w r*/ - cnt = DRX & 077; - IR = EA_DDIR | IR_REGY; - goto do_ror16; - case 000130: case 001130: case 002130: case 003130: - case 004130: case 005130: case 006130: case 007130: /*ror.w #*/ - cnt = quickarg[IR_REGX]; - IR = EA_DDIR | IR_REGY; -do_ror16: ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&res,&PC)); - if (cnt) { - cnt &= 15; - res = (res>>cnt) | (res<<(16-cnt)); - SETF(MASK_17(res),FLAG_C); - rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); - } else { - CLRF(FLAG_C); - rc = SCPE_OK; - } - SETNZ16(res); - CLRF(FLAG_V); - break; + case 003320: case 003330: case 003340: case 003350: + case 003360: case 003370: /*ror*/ + cnt = 1; + goto do_ror16; + case 000170: case 001170: case 002170: case 003170: + case 004170: case 005170: case 006170: case 007170: /*ror.w r*/ + cnt = DRX & 077; + IR = EA_DDIR | IR_REGY; + goto do_ror16; + case 000130: case 001130: case 002130: case 003130: + case 004130: case 005130: case 006130: case 007130: /*ror.w #*/ + cnt = quickarg[IR_REGX]; + IR = EA_DDIR | IR_REGY; +do_ror16: ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&res,&PC)); + if (cnt) { + cnt &= 15; + res = (res>>cnt) | (res<<(16-cnt)); + SETF(MASK_17(res),FLAG_C); + rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); + } else { + CLRF(FLAG_C); + rc = SCPE_OK; + } + SETNZ16(res); + CLRF(FLAG_V); + break; - case 000270: case 001270: case 002270: case 003270: - case 004270: case 005270: case 006270: case 007270: /*ror.l r*/ - cnt = DRX & 077; - goto do_ror32; - case 000230: case 001230: case 002230: case 003230: - case 004230: case 005230: case 006230: case 007230: /*ror.l #*/ - cnt = quickarg[IR_REGX]; -do_ror32: reg = DR+IR_REGY; - resx = *reg; - if (cnt) { - cnt &= 31; - resx = (resx>>cnt) | (resx<<(32-cnt)); - SETF(MASK_33(res),FLAG_C); - *reg = (int32)resx; - } else { - CLRF(FLAG_C); - rc = SCPE_OK; - } - SETNZ32(resx); - CLRF(FLAG_V); - rc = SCPE_OK; break; + case 000270: case 001270: case 002270: case 003270: + case 004270: case 005270: case 006270: case 007270: /*ror.l r*/ + cnt = DRX & 077; + goto do_ror32; + case 000230: case 001230: case 002230: case 003230: + case 004230: case 005230: case 006230: case 007230: /*ror.l #*/ + cnt = quickarg[IR_REGX]; +do_ror32: reg = DR+IR_REGY; + resx = *reg; + if (cnt) { + cnt &= 31; + resx = (resx>>cnt) | (resx<<(32-cnt)); + SETF(MASK_33(res),FLAG_C); + *reg = (int32)resx; + } else { + CLRF(FLAG_C); + rc = SCPE_OK; + } + SETNZ32(resx); + CLRF(FLAG_V); + rc = SCPE_OK; break; - case 000470: case 001470: case 002470: case 003470: - case 004470: case 005470: case 006470: case 007470: /*rol.b r*/ - cnt = DRX & 077; - goto do_rol8; - case 000430: case 001430: case 002430: case 003430: - case 004430: case 005430: case 006430: case 007430: /*rol.b #*/ - cnt = quickarg[IR_REGX]; -do_rol8: reg = DR+IR_REGY; - res = MASK_8L(*reg); - if (cnt) { - cnt &= 7; - res = (res<>(8-cnt)); - SETF(MASK_9(res),FLAG_C); - *reg = COMBINE8(*reg,res); - } else CLRF(FLAG_C); - SETNZ8(res); - CLRF(FLAG_V); - rc = SCPE_OK; break; - - case 003720: case 003730: case 003740: case 003750: - case 003760: case 003770: /*rol*/ - cnt = 1; - goto do_rol16; - case 000570: case 001570: case 002570: case 003570: - case 004570: case 005570: case 006570: case 007570: /*rol.w r*/ - cnt = DRX & 077; - IR = EA_DDIR | IR_REGY; - goto do_rol16; - case 000530: case 001530: case 002530: case 003530: - case 004530: case 005530: case 006530: case 007530: /*rol.w #*/ - cnt = quickarg[IR_REGX]; - IR = EA_DDIR | IR_REGY; -do_rol16: ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&res,&PC)); - if (cnt) { - cnt &= 15; - res = (res<>(16-cnt)); - SETF(MASK_17(res),FLAG_C); - rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); - } else { - CLRF(FLAG_C); - rc = SCPE_OK; - } - SETNZ16(res); - CLRF(FLAG_V); - break; + case 000470: case 001470: case 002470: case 003470: + case 004470: case 005470: case 006470: case 007470: /*rol.b r*/ + cnt = DRX & 077; + goto do_rol8; + case 000430: case 001430: case 002430: case 003430: + case 004430: case 005430: case 006430: case 007430: /*rol.b #*/ + cnt = quickarg[IR_REGX]; +do_rol8: reg = DR+IR_REGY; + res = MASK_8L(*reg); + if (cnt) { + cnt &= 7; + res = (res<>(8-cnt)); + SETF(MASK_9(res),FLAG_C); + *reg = COMBINE8(*reg,res); + } else CLRF(FLAG_C); + SETNZ8(res); + CLRF(FLAG_V); + rc = SCPE_OK; break; + + case 003720: case 003730: case 003740: case 003750: + case 003760: case 003770: /*rol*/ + cnt = 1; + goto do_rol16; + case 000570: case 001570: case 002570: case 003570: + case 004570: case 005570: case 006570: case 007570: /*rol.w r*/ + cnt = DRX & 077; + IR = EA_DDIR | IR_REGY; + goto do_rol16; + case 000530: case 001530: case 002530: case 003530: + case 004530: case 005530: case 006530: case 007530: /*rol.w #*/ + cnt = quickarg[IR_REGX]; + IR = EA_DDIR | IR_REGY; +do_rol16: ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&res,&PC)); + if (cnt) { + cnt &= 15; + res = (res<>(16-cnt)); + SETF(MASK_17(res),FLAG_C); + rc = ea_dst_w_rmw(IR_EAMOD,IR_EAREG,res); + } else { + CLRF(FLAG_C); + rc = SCPE_OK; + } + SETNZ16(res); + CLRF(FLAG_V); + break; - case 000670: case 001670: case 002670: case 003670: - case 004670: case 005670: case 006670: case 007670: /*rol.l r*/ - cnt = DRX & 077; - goto do_rol32; - case 000630: case 001630: case 002630: case 003630: - case 004630: case 005630: case 006630: case 007630: /*rol.l #*/ - cnt = quickarg[IR_REGX]; -do_rol32: reg = DR+IR_REGY; - resx = (uint32)*reg; - if (cnt) { - cnt &= 31; - resx = (resx<>(32-cnt)); - SETF(MASK_32L(resx),FLAG_C); - *reg = MASK_32L(resx); - } else CLRF(FLAG_C); - SETNZ32(resx); - CLRF(FLAG_V); - rc = SCPE_OK; break; - - default: - rc = STOP_ERROP; - } - break; + case 000670: case 001670: case 002670: case 003670: + case 004670: case 005670: case 006670: case 007670: /*rol.l r*/ + cnt = DRX & 077; + goto do_rol32; + case 000630: case 001630: case 002630: case 003630: + case 004630: case 005630: case 006630: case 007630: /*rol.l #*/ + cnt = quickarg[IR_REGX]; +do_rol32: reg = DR+IR_REGY; + resx = (uint32)*reg; + if (cnt) { + cnt &= 31; + resx = (resx<>(32-cnt)); + SETF(MASK_32L(resx),FLAG_C); + *reg = MASK_32L(resx); + } else CLRF(FLAG_C); + SETNZ32(resx); + CLRF(FLAG_V); + rc = SCPE_OK; break; + + default: + rc = STOP_ERROP; + } + break; - /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ - * | 1 1 1 1 | Opcode | trapf - * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ - case 0xf000: - rc = m68k_gen_exception(11,&PC); break; + /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ + * | 1 1 1 1 | Opcode | trapf + * +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---*/ + case 0xf000: + rc = m68k_gen_exception(11,&PC); break; - /* unreachable */ - default: - rc = STOP_ERROP; break; - } - - /* handle tracing */ - if (tracet0 || SR_T1) { - if (m68kcpu_unit->flags & UNIT_CPU_TRACE) { - /* leave loop */ - sim_interval = -1; - rc = STOP_TRACE; - break; - } - IFDEBUG(DBG_CPU_EXC,fprintf(sim_deb,"CPU : [0x%08x] Exception: Tracebit set\n",PC)); - ASSERT_OK(m68k_gen_exception(9,&PC)); - /* remain in loop */ - } - tracet0 = 0; + /* unreachable */ + default: + rc = STOP_ERROP; break; + } + + /* handle tracing */ + if (tracet0 || SR_T1) { + if (m68kcpu_unit->flags & UNIT_CPU_TRACE) { + /* leave loop */ + sim_interval = -1; + rc = STOP_TRACE; + break; + } + IFDEBUG(DBG_CPU_EXC,fprintf(sim_deb,"CPU : [0x%08x] Exception: Tracebit set\n",PC)); + ASSERT_OK(m68k_gen_exception(9,&PC)); + /* remain in loop */ + } + tracet0 = 0; - /* handle interrupts (sets/resets intpending) */ - m68k_checkints(&PC); - - /* handle STOP instr */ - if (rc==STOP_HALT) { - if (m68kcpu_unit->flags & UNIT_CPU_STOP) { - PC -= 4; /* correct PC to point to STOP instr */ - break; - } - if ((rc = m68k_stop(&PC)) != SCPE_OK) - break; /* does not return until interrupt occurs, will react to CTRL-E */ - } - } + /* handle interrupts (sets/resets intpending) */ + m68k_checkints(&PC); + + /* handle STOP instr */ + if (rc==STOP_HALT) { + if (m68kcpu_unit->flags & UNIT_CPU_STOP) { + PC -= 4; /* correct PC to point to STOP instr */ + break; + } + if ((rc = m68k_stop(&PC)) != SCPE_OK) + break; /* does not return until interrupt occurs, will react to CTRL-E */ + } + } - /* handle various exit codes */ - switch (rc) { - case STOP_ERRADR: /* address error */ - if ((m68kcpu_unit->flags & UNIT_CPU_EXC)==0) { - IFDEBUG(DBG_CPU_EXC,fprintf(sim_deb,"CPU : [0x%08x] Exception: Address error\n",PC)); - if ((rc = m68k_gen_exception(3,&PC)) != SCPE_OK) { - /* double bus fault */ - rc = STOP_DBF; /* cannot be masked, will stop simulator */ - } - } - return rc; - case STOP_PCIO: /* cannot be masked, will stop simulator */ - return rc; - case STOP_ERRIO: /* bus error */ - if ((m68kcpu_unit->flags & UNIT_CPU_EXC)==0) { - IFDEBUG(DBG_CPU_EXC,fprintf(sim_deb,"CPU : [0x%08x] Exception: Bus error\n",PC)); - if ((rc = m68k_gen_exception(2,&PC)) != SCPE_OK) { - /* double bus fault */ - rc = STOP_DBF; /* cannot be masked, will stop simulator */ - } - } - return rc; - case STOP_ERROP: /* illegal opcode */ - if (!(m68kcpu_unit->flags & UNIT_CPU_EXC)) { - IFDEBUG(DBG_CPU_EXC,fprintf(sim_deb,"CPU : [0x%08x] Exception: Illegal opcode\n",PC)); - rc = m68k_gen_exception(4,&PC); - } - return rc; - case STOP_PRVIO: /* privilege violation */ - if (!(m68kcpu_unit->flags & UNIT_CPU_PRVIO)) { - IFDEBUG(DBG_CPU_EXC,fprintf(sim_deb,"CPU : [0x%08x] Exception: Privilege violation\n",PC)); - rc = m68k_gen_exception(8,&PC); - } - break; - case STOP_IMPL: - return rc; /* leave sim_instr */ - default: - return rc; /* leave sim_instr */ - } + /* handle various exit codes */ + switch (rc) { + case STOP_ERRADR: /* address error */ + if ((m68kcpu_unit->flags & UNIT_CPU_EXC)==0) { + IFDEBUG(DBG_CPU_EXC,fprintf(sim_deb,"CPU : [0x%08x] Exception: Address error\n",PC)); + if ((rc = m68k_gen_exception(3,&PC)) != SCPE_OK) { + /* double bus fault */ + rc = STOP_DBF; /* cannot be masked, will stop simulator */ + } + } + return rc; + case STOP_PCIO: /* cannot be masked, will stop simulator */ + return rc; + case STOP_ERRIO: /* bus error */ + if ((m68kcpu_unit->flags & UNIT_CPU_EXC)==0) { + IFDEBUG(DBG_CPU_EXC,fprintf(sim_deb,"CPU : [0x%08x] Exception: Bus error\n",PC)); + if ((rc = m68k_gen_exception(2,&PC)) != SCPE_OK) { + /* double bus fault */ + rc = STOP_DBF; /* cannot be masked, will stop simulator */ + } + } + return rc; + case STOP_ERROP: /* illegal opcode */ + if (!(m68kcpu_unit->flags & UNIT_CPU_EXC)) { + IFDEBUG(DBG_CPU_EXC,fprintf(sim_deb,"CPU : [0x%08x] Exception: Illegal opcode\n",PC)); + rc = m68k_gen_exception(4,&PC); + } + return rc; + case STOP_PRVIO: /* privilege violation */ + if (!(m68kcpu_unit->flags & UNIT_CPU_PRVIO)) { + IFDEBUG(DBG_CPU_EXC,fprintf(sim_deb,"CPU : [0x%08x] Exception: Privilege violation\n",PC)); + rc = m68k_gen_exception(8,&PC); + } + break; + case STOP_IMPL: + return rc; /* leave sim_instr */ + default: + return rc; /* leave sim_instr */ + } - /* save state */ - saved_PC = PC; + /* save state */ + saved_PC = PC; - return rc; + return rc; } diff --git a/SAGE/m68k_cpu.h b/SAGE/m68k_cpu.h index 4c7a6666..a8cf07e9 100644 --- a/SAGE/m68k_cpu.h +++ b/SAGE/m68k_cpu.h @@ -46,13 +46,13 @@ extern DEVICE* m68kcpu_dev; extern REG m68kcpu_reg[]; /* debug flags */ -#define DBG_CPU_EXC (1 << 0) -#define DBG_CPU_PC (1 << 1) -#define DBG_CPU_INT (1 << 2) -#define DBG_CPU_CTRACE (1 << 3) -#define DBG_CPU_BTRACE (1 << 4) -#define DBG_CPU_CUSTOM1 (1 << 5) /* reserved for custom debugging */ -#define DBG_CPU_CUSTOM2 (1 << 6) /* reserved for custom debugging */ +#define DBG_CPU_EXC (1 << 0) +#define DBG_CPU_PC (1 << 1) +#define DBG_CPU_INT (1 << 2) +#define DBG_CPU_CTRACE (1 << 3) +#define DBG_CPU_BTRACE (1 << 4) +#define DBG_CPU_CUSTOM1 (1 << 5) /* reserved for custom debugging */ +#define DBG_CPU_CUSTOM2 (1 << 6) /* reserved for custom debugging */ extern DEBTAB m68kcpu_dt[]; #if DBG_MSG==1 #define IFDEBUG(flag,func) if ((m68kcpu_dev->dctrl & flag) && sim_deb) { (void)(func); fflush(sim_deb); } @@ -60,60 +60,60 @@ extern DEBTAB m68kcpu_dt[]; #define IFDEBUG(flag,func) #endif -#define SIM_EMAX 16 /* ? */ -#define MAXMEMORY (256*256*256) /* 2^24 bytes */ -#define MINMEMORY (256*256) /* reserve 64k by default */ -#define MEMORYSIZE (m68kcpu_unit->capac) /* actual memory size */ -#define KB 1024 /* kilobyte */ +#define SIM_EMAX 16 /* ? */ +#define MAXMEMORY (256*256*256) /* 2^24 bytes */ +#define MINMEMORY (256*256) /* reserve 64k by default */ +#define MEMORYSIZE (m68kcpu_unit->capac) /* actual memory size */ +#define KB 1024 /* kilobyte */ /* simulator stop codes */ -#define STOP_IBKPT 1 /* pc breakpoint */ -#define STOP_MEM 2 /* memory breakpoint */ -#define STOP_ERROP 3 /* invalid opcode, normally exception 4 */ -#define STOP_ERRIO 4 /* invalid I/O address, normally exception 2 */ -#define STOP_ERRADR 5 /* invalid memory address, normally exception 3 */ -#define STOP_IMPL 6 /* not yet implemented (should disappear) */ -#define SIM_ISIO 7 /* internal indicator that I/O dispatch is required */ -#define SIM_NOMEM 8 /* allows to signal that there is no memory at that location */ -#define STOP_PCIO 9 /* code error, PC steps on I/O address */ -#define STOP_PRVIO 10 /* internal indicator: privileged instruction */ -#define STOP_TRACE 11 /* halt on trace */ -#define STOP_HALT 12 /* STOP instruction */ -#define STOP_DBF 13 /* double bus fault */ -#define STOP_OFFLINE 14 /* printer offline */ +#define STOP_IBKPT 1 /* pc breakpoint */ +#define STOP_MEM 2 /* memory breakpoint */ +#define STOP_ERROP 3 /* invalid opcode, normally exception 4 */ +#define STOP_ERRIO 4 /* invalid I/O address, normally exception 2 */ +#define STOP_ERRADR 5 /* invalid memory address, normally exception 3 */ +#define STOP_IMPL 6 /* not yet implemented (should disappear) */ +#define SIM_ISIO 7 /* internal indicator that I/O dispatch is required */ +#define SIM_NOMEM 8 /* allows to signal that there is no memory at that location */ +#define STOP_PCIO 9 /* code error, PC steps on I/O address */ +#define STOP_PRVIO 10 /* internal indicator: privileged instruction */ +#define STOP_TRACE 11 /* halt on trace */ +#define STOP_HALT 12 /* STOP instruction */ +#define STOP_DBF 13 /* double bus fault */ +#define STOP_OFFLINE 14 /* printer offline */ -#define UNIT_CPU_M_TYPE 017 -#define UNIT_CPU_V_TYPE (UNIT_V_UF+0) /* CPUTYPE */ -#define UNIT_CPU_TYPE (1 << UNIT_CPU_V_CPU) -#define UNIT_CPU_V_EXC (UNIT_V_UF+4) /* halt on exception 2..4 */ -#define UNIT_CPU_EXC (1 << UNIT_CPU_V_EXC) -#define UNIT_CPU_V_STOP (UNIT_V_UF+5) /* halt on STOP instruction */ -#define UNIT_CPU_STOP (1 << UNIT_CPU_V_STOP) -#define UNIT_CPU_V_PRVIO (UNIT_V_UF+6) /* halt on privilege violation */ -#define UNIT_CPU_PRVIO (1 << UNIT_CPU_V_PRVIO) -#define UNIT_CPU_V_TRACE (UNIT_V_UF+7) /* halt on TRACE exception */ -#define UNIT_CPU_TRACE (1 << UNIT_CPU_V_TRACE) -#define UNIT_CPU_V_FPU (UNIT_V_UF+8) /* has FPU */ -#define UNIT_CPU_FPU (1 << UNIT_CPU_V_FPU) -#define UNIT_CPU_V_MMU (UNIT_V_UF+9) /* has MMU */ -#define UNIT_CPU_MMU (1 << UNIT_CPU_V_MMU) -#define UNIT_CPU_V_MSIZE (UNIT_V_UF+10) /* set memsize */ -#define UNIT_CPU_MSIZE (1 << UNIT_CPU_V_MSIZE) +#define UNIT_CPU_M_TYPE 017 +#define UNIT_CPU_V_TYPE (UNIT_V_UF+0) /* CPUTYPE */ +#define UNIT_CPU_TYPE (1 << UNIT_CPU_V_CPU) +#define UNIT_CPU_V_EXC (UNIT_V_UF+4) /* halt on exception 2..4 */ +#define UNIT_CPU_EXC (1 << UNIT_CPU_V_EXC) +#define UNIT_CPU_V_STOP (UNIT_V_UF+5) /* halt on STOP instruction */ +#define UNIT_CPU_STOP (1 << UNIT_CPU_V_STOP) +#define UNIT_CPU_V_PRVIO (UNIT_V_UF+6) /* halt on privilege violation */ +#define UNIT_CPU_PRVIO (1 << UNIT_CPU_V_PRVIO) +#define UNIT_CPU_V_TRACE (UNIT_V_UF+7) /* halt on TRACE exception */ +#define UNIT_CPU_TRACE (1 << UNIT_CPU_V_TRACE) +#define UNIT_CPU_V_FPU (UNIT_V_UF+8) /* has FPU */ +#define UNIT_CPU_FPU (1 << UNIT_CPU_V_FPU) +#define UNIT_CPU_V_MMU (UNIT_V_UF+9) /* has MMU */ +#define UNIT_CPU_MMU (1 << UNIT_CPU_V_MMU) +#define UNIT_CPU_V_MSIZE (UNIT_V_UF+10) /* set memsize */ +#define UNIT_CPU_MSIZE (1 << UNIT_CPU_V_MSIZE) -#define UNIT_CPU_V_FREE (UNIT_V_UF+11) /* next free bit */ +#define UNIT_CPU_V_FREE (UNIT_V_UF+11) /* next free bit */ /* the various CPUs */ -#define UNIT_CPUTYPE_MASK (UNIT_CPU_M_TYPE << UNIT_CPU_V_TYPE) -#define CPU_TYPE_68000 (0 << UNIT_CPU_V_TYPE) -#define CPU_TYPE_68008 (1 << UNIT_CPU_V_TYPE) -#define CPU_TYPE_68010 (2 << UNIT_CPU_V_TYPE) /* not yet! */ -#define CPU_TYPE_68020 (3 << UNIT_CPU_V_TYPE) /* not yet! */ -#define CPU_TYPE_68030 (4 << UNIT_CPU_V_TYPE) /* not yet! */ +#define UNIT_CPUTYPE_MASK (UNIT_CPU_M_TYPE << UNIT_CPU_V_TYPE) +#define CPU_TYPE_68000 (0 << UNIT_CPU_V_TYPE) +#define CPU_TYPE_68008 (1 << UNIT_CPU_V_TYPE) +#define CPU_TYPE_68010 (2 << UNIT_CPU_V_TYPE) /* not yet! */ +#define CPU_TYPE_68020 (3 << UNIT_CPU_V_TYPE) /* not yet! */ +#define CPU_TYPE_68030 (4 << UNIT_CPU_V_TYPE) /* not yet! */ -extern uint8 *M; -extern int16 cputype; +extern uint8 *M; +extern int16 cputype; extern t_addr saved_PC; -#define PCX saved_PC +#define PCX saved_PC /* breakpoint space for data accesses (R=read, W=write) */ #define E_BKPT_SPC (0) @@ -121,7 +121,7 @@ extern t_addr saved_PC; #define W_BKPT_SPC (2<flags |= value; - - /* TODO initialize the MMU */ - TranslateAddr = &m68k_translateaddr; - return SCPE_OK; + uptr->flags |= value; + + /* TODO initialize the MMU */ + TranslateAddr = &m68k_translateaddr; + return SCPE_OK; } t_stat m68k_set_nommu(UNIT *uptr, int32 value, char *cptr, void *desc) { - uptr->flags &= ~value; + uptr->flags &= ~value; - /* initialize NO MMU */ - TranslateAddr = &m68k_translateaddr; - return SCPE_OK; + /* initialize NO MMU */ + TranslateAddr = &m68k_translateaddr; + return SCPE_OK; } #endif @@ -82,59 +82,59 @@ t_stat m68k_set_nommu(UNIT *uptr, int32 value, char *cptr, void *desc) */ t_stat m68k_ioinit() { - if (iohash == NULL) { - iohash = (IOHANDLER**)calloc(IOHASHSIZE,sizeof(IOHANDLER*)); - if (iohash == NULL) return SCPE_MEM; - } - return SCPE_OK; + if (iohash == NULL) { + iohash = (IOHANDLER**)calloc(IOHASHSIZE,sizeof(IOHANDLER*)); + if (iohash == NULL) return SCPE_MEM; + } + return SCPE_OK; } t_stat add_iohandler(UNIT* u,void* ctxt, - t_stat (*io)(struct _iohandler* ioh,uint32* value,uint32 rw,uint32 mask)) + t_stat (*io)(struct _iohandler* ioh,uint32* value,uint32 rw,uint32 mask)) { - PNP_INFO* pnp = (PNP_INFO*)ctxt; - IOHANDLER* ioh; - uint32 i,k; - - if (!pnp) return SCPE_IERR; - for (k=i=0; iio_size; i+=pnp->io_incr,k++) { - t_addr p = (pnp->io_base+i) & addrmask; - t_addr idx = MAKEIOHASH(p); - ioh = iohash[idx]; - while (ioh != NULL && ioh->port != p) ioh = ioh->next; - if (ioh) continue; /* already registered */ - -// printf("Register IO for address %x offset=%d\n",p,k); - ioh = (IOHANDLER*)malloc(sizeof(IOHANDLER)); - if (ioh == NULL) return SCPE_MEM; - ioh->ctxt = ctxt; - ioh->port = p; - ioh->offset = k; - ioh->u = u; - ioh->io = io; - ioh->next = iohash[idx]; - iohash[idx] = ioh; - } - return SCPE_OK; + PNP_INFO* pnp = (PNP_INFO*)ctxt; + IOHANDLER* ioh; + uint32 i,k; + + if (!pnp) return SCPE_IERR; + for (k=i=0; iio_size; i+=pnp->io_incr,k++) { + t_addr p = (pnp->io_base+i) & addrmask; + t_addr idx = MAKEIOHASH(p); + ioh = iohash[idx]; + while (ioh != NULL && ioh->port != p) ioh = ioh->next; + if (ioh) continue; /* already registered */ + +// printf("Register IO for address %x offset=%d\n",p,k); + ioh = (IOHANDLER*)malloc(sizeof(IOHANDLER)); + if (ioh == NULL) return SCPE_MEM; + ioh->ctxt = ctxt; + ioh->port = p; + ioh->offset = k; + ioh->u = u; + ioh->io = io; + ioh->next = iohash[idx]; + iohash[idx] = ioh; + } + return SCPE_OK; } t_stat del_iohandler(void* ctxt) { - uint32 i; - PNP_INFO* pnp = (PNP_INFO*)ctxt; - - if (!pnp) return SCPE_IERR; - for (i=0; iio_size; i += pnp->io_incr) { - t_addr p = (pnp->io_base+i) & addrmask; - t_addr idx = MAKEIOHASH(p); - IOHANDLER **ioh = &iohash[idx]; - while (*ioh != NULL && (*ioh)->port != p) ioh = &((*ioh)->next); - if (*ioh) { - IOHANDLER *e = *ioh; - *ioh = (*ioh)->next; - free((void*)e); - } - } - return SCPE_OK; + uint32 i; + PNP_INFO* pnp = (PNP_INFO*)ctxt; + + if (!pnp) return SCPE_IERR; + for (i=0; iio_size; i += pnp->io_incr) { + t_addr p = (pnp->io_base+i) & addrmask; + t_addr idx = MAKEIOHASH(p); + IOHANDLER **ioh = &iohash[idx]; + while (*ioh != NULL && (*ioh)->port != p) ioh = &((*ioh)->next); + if (*ioh) { + IOHANDLER *e = *ioh; + *ioh = (*ioh)->next; + free((void*)e); + } + } + return SCPE_OK; } /*********************************************************************************************** @@ -156,26 +156,26 @@ t_stat del_iohandler(void* ctxt) /* default handler */ t_stat m68k_translateaddr(t_addr in,t_addr* out, IOHANDLER** ioh,int rw,int fc,int dma) { - t_addr ma = in & addrmask; - t_addr idx = MAKEIOHASH(ma); - IOHANDLER* i = iohash[idx]; + t_addr ma = in & addrmask; + t_addr idx = MAKEIOHASH(ma); + IOHANDLER* i = iohash[idx]; - *out = ma; - *ioh = 0; - while (i != NULL && i->port != ma) i = i->next; - if (i) { - *ioh = i; - return SIM_ISIO; - } else - return SCPE_OK; + *out = ma; + *ioh = 0; + while (i != NULL && i->port != ma) i = i->next; + if (i) { + *ioh = i; + return SIM_ISIO; + } else + return SCPE_OK; } /* default memory pointer */ t_stat m68k_mem(t_addr addr,uint8** mem) { - if (addr > MEMORYSIZE) return STOP_ERRADR; - *mem = M+addr; - return SCPE_OK; + if (addr > MEMORYSIZE) return STOP_ERRADR; + *mem = M+addr; + return SCPE_OK; } t_stat (*TranslateAddr)(t_addr in,t_addr* out,IOHANDLER** ioh,int rw,int fc,int dma) = &m68k_translateaddr; @@ -193,233 +193,233 @@ t_stat (*Mem)(t_addr addr,uint8** mem) = &m68k_mem; */ t_stat ReadPB(t_addr a, uint32* val) { - uint8* mem; + uint8* mem; - t_stat rc = Mem(a & addrmask,&mem); - switch (rc) { - default: - return rc; - case SIM_NOMEM: - *val = 0xff; - return SCPE_OK; - case SCPE_OK: - *val = *mem & BMASK; - return SCPE_OK; - } + t_stat rc = Mem(a & addrmask,&mem); + switch (rc) { + default: + return rc; + case SIM_NOMEM: + *val = 0xff; + return SCPE_OK; + case SCPE_OK: + *val = *mem & BMASK; + return SCPE_OK; + } } t_stat ReadPW(t_addr a, uint32* val) { - uint8* mem; - uint32 dat1,dat2; + uint8* mem; + uint32 dat1,dat2; - t_stat rc = Mem((a+1)&addrmask,&mem); - switch (rc) { - default: - return rc; - case SIM_NOMEM: - *val = 0xffff; - return SCPE_OK; - case SCPE_OK: - /* 68000/08/10 do not like unaligned access */ - if (cputype < 3 && (a & 1)) return STOP_ERRADR; - dat1 = (*(mem-1) & BMASK) << 8; - dat2 = *mem & BMASK; - *val = (dat1 | dat2) & WMASK; - return SCPE_OK; - } + t_stat rc = Mem((a+1)&addrmask,&mem); + switch (rc) { + default: + return rc; + case SIM_NOMEM: + *val = 0xffff; + return SCPE_OK; + case SCPE_OK: + /* 68000/08/10 do not like unaligned access */ + if (cputype < 3 && (a & 1)) return STOP_ERRADR; + dat1 = (*(mem-1) & BMASK) << 8; + dat2 = *mem & BMASK; + *val = (dat1 | dat2) & WMASK; + return SCPE_OK; + } } t_stat ReadPL(t_addr a, uint32* val) { - uint8* mem; - uint32 dat1,dat2,dat3,dat4; + uint8* mem; + uint32 dat1,dat2,dat3,dat4; - t_stat rc = Mem((a+3)&addrmask,&mem); - switch (rc) { - default: - return rc; - case SIM_NOMEM: - *val = 0xffffffff; - return SCPE_OK; - case SCPE_OK: - /* 68000/08/10 do not like unaligned access */ - if (cputype < 3 && (a & 1)) return STOP_ERRADR; - dat1 = *(mem-3) & BMASK; - dat2 = *(mem-2) & BMASK; - dat3 = *(mem-1) & BMASK; - dat4 = *mem & BMASK; - *val = (((((dat1 << 8) | dat2) << 8) | dat3) << 8) | dat4; - return SCPE_OK; - } + t_stat rc = Mem((a+3)&addrmask,&mem); + switch (rc) { + default: + return rc; + case SIM_NOMEM: + *val = 0xffffffff; + return SCPE_OK; + case SCPE_OK: + /* 68000/08/10 do not like unaligned access */ + if (cputype < 3 && (a & 1)) return STOP_ERRADR; + dat1 = *(mem-3) & BMASK; + dat2 = *(mem-2) & BMASK; + dat3 = *(mem-1) & BMASK; + dat4 = *mem & BMASK; + *val = (((((dat1 << 8) | dat2) << 8) | dat3) << 8) | dat4; + return SCPE_OK; + } } t_stat WritePB(t_addr a, uint32 val) { - uint8* mem; - - t_stat rc = Mem(a&addrmask,&mem); - switch (rc) { - default: - return rc; - case SCPE_OK: - *mem = val & BMASK; - /*fallthru*/ - case SIM_NOMEM: - return SCPE_OK; - } + uint8* mem; + + t_stat rc = Mem(a&addrmask,&mem); + switch (rc) { + default: + return rc; + case SCPE_OK: + *mem = val & BMASK; + /*fallthru*/ + case SIM_NOMEM: + return SCPE_OK; + } } t_stat WritePW(t_addr a, uint32 val) { - uint8* mem; - t_stat rc = Mem((a+1)&addrmask,&mem); - switch (rc) { - default: - return rc; - case SCPE_OK: - /* 68000/08/10 do not like unaligned access */ - if (cputype < 3 && (a & 1)) return STOP_ERRADR; - *(mem-1) = (val >> 8) & BMASK; - *mem = val & BMASK; - /*fallthru*/ - case SIM_NOMEM: - return SCPE_OK; - } + uint8* mem; + t_stat rc = Mem((a+1)&addrmask,&mem); + switch (rc) { + default: + return rc; + case SCPE_OK: + /* 68000/08/10 do not like unaligned access */ + if (cputype < 3 && (a & 1)) return STOP_ERRADR; + *(mem-1) = (val >> 8) & BMASK; + *mem = val & BMASK; + /*fallthru*/ + case SIM_NOMEM: + return SCPE_OK; + } } t_stat WritePL(t_addr a, uint32 val) { - uint8* mem; + uint8* mem; - t_stat rc = Mem((a+3)&addrmask,&mem); - switch (rc) { - default: - return rc; - case SCPE_OK: - /* 68000/08/10 do not like unaligned access */ - if (cputype < 3 && (a & 1)) return STOP_ERRADR; - *(mem-3) = (val >> 24) & BMASK; - *(mem-2) = (val >> 16) & BMASK; - *(mem-1) = (val >> 8) & BMASK; - *mem = val & BMASK; - /*fallthru*/ - case SIM_NOMEM: - return SCPE_OK; - } + t_stat rc = Mem((a+3)&addrmask,&mem); + switch (rc) { + default: + return rc; + case SCPE_OK: + /* 68000/08/10 do not like unaligned access */ + if (cputype < 3 && (a & 1)) return STOP_ERRADR; + *(mem-3) = (val >> 24) & BMASK; + *(mem-2) = (val >> 16) & BMASK; + *(mem-1) = (val >> 8) & BMASK; + *mem = val & BMASK; + /*fallthru*/ + case SIM_NOMEM: + return SCPE_OK; + } } t_stat ReadVB(t_addr a, uint32* val) { - t_addr addr; - IOHANDLER* ioh; - t_stat rc = TranslateAddr(a,&addr,&ioh,MEM_READ,m68k_fcode,m68k_dma); - switch (rc) { - case SIM_NOMEM: - /* note this is a hack to persuade memory testing code that there is no memory: - * writing to such an address is a bit bucket, - * and reading from it will return some arbitrary value. - * - * SIM_NOMEM has to be defined for systems without a strict memory handling that will - * result in reading out anything without trapping a memory fault - */ - *val = 0xff; - return SCPE_OK; - case SIM_ISIO: - return ioh->io(ioh,val,IO_READ,BMASK); - case SCPE_OK: - return ReadPB(addr,val); - default: - return rc; - } + t_addr addr; + IOHANDLER* ioh; + t_stat rc = TranslateAddr(a,&addr,&ioh,MEM_READ,m68k_fcode,m68k_dma); + switch (rc) { + case SIM_NOMEM: + /* note this is a hack to persuade memory testing code that there is no memory: + * writing to such an address is a bit bucket, + * and reading from it will return some arbitrary value. + * + * SIM_NOMEM has to be defined for systems without a strict memory handling that will + * result in reading out anything without trapping a memory fault + */ + *val = 0xff; + return SCPE_OK; + case SIM_ISIO: + return ioh->io(ioh,val,IO_READ,BMASK); + case SCPE_OK: + return ReadPB(addr,val); + default: + return rc; + } } t_stat ReadVW(t_addr a, uint32* val) { - t_addr addr; - IOHANDLER* ioh; - t_stat rc = TranslateAddr(a,&addr,&ioh,MEM_READ,m68k_fcode,m68k_dma); - switch (rc) { - case SIM_NOMEM: - *val = 0xffff; - return SCPE_OK; - case SIM_ISIO: - return ioh->io(ioh,val,IO_READ,WMASK); - case SCPE_OK: - return ReadPW(addr,val); - default: - return rc; - } + t_addr addr; + IOHANDLER* ioh; + t_stat rc = TranslateAddr(a,&addr,&ioh,MEM_READ,m68k_fcode,m68k_dma); + switch (rc) { + case SIM_NOMEM: + *val = 0xffff; + return SCPE_OK; + case SIM_ISIO: + return ioh->io(ioh,val,IO_READ,WMASK); + case SCPE_OK: + return ReadPW(addr,val); + default: + return rc; + } } t_stat ReadVL(t_addr a, uint32* val) { - t_addr addr; - IOHANDLER* ioh; - t_stat rc = TranslateAddr(a,&addr,&ioh,MEM_READ,m68k_fcode,m68k_dma); - switch (rc) { - case SIM_NOMEM: - *val = 0xffffffff; - return SCPE_OK; - case SIM_ISIO: - return ioh->io(ioh,val,IO_READ,LMASK); - case SCPE_OK: - return ReadPL(addr,val); - default: - return rc; - } + t_addr addr; + IOHANDLER* ioh; + t_stat rc = TranslateAddr(a,&addr,&ioh,MEM_READ,m68k_fcode,m68k_dma); + switch (rc) { + case SIM_NOMEM: + *val = 0xffffffff; + return SCPE_OK; + case SIM_ISIO: + return ioh->io(ioh,val,IO_READ,LMASK); + case SCPE_OK: + return ReadPL(addr,val); + default: + return rc; + } } t_stat WriteVB(t_addr a, uint32 val) { - t_addr addr; - IOHANDLER* ioh; - t_stat rc = TranslateAddr(a,&addr,&ioh,MEM_WRITE,m68k_fcode,m68k_dma); - switch (rc) { - case SIM_NOMEM: - /* part 2 of hack for less strict memory handling: ignore anything written - * to a nonexisting address - */ - return SCPE_OK; - case SIM_ISIO: - return ioh->io(ioh,&val,IO_WRITE,BMASK); - case SCPE_OK: - return WritePB(addr,val); - default: - return rc; - } + t_addr addr; + IOHANDLER* ioh; + t_stat rc = TranslateAddr(a,&addr,&ioh,MEM_WRITE,m68k_fcode,m68k_dma); + switch (rc) { + case SIM_NOMEM: + /* part 2 of hack for less strict memory handling: ignore anything written + * to a nonexisting address + */ + return SCPE_OK; + case SIM_ISIO: + return ioh->io(ioh,&val,IO_WRITE,BMASK); + case SCPE_OK: + return WritePB(addr,val); + default: + return rc; + } } t_stat WriteVW(t_addr a, uint32 val) { - t_addr addr; - IOHANDLER* ioh; - t_stat rc = TranslateAddr(a,&addr,&ioh,MEM_WRITE,m68k_fcode,m68k_dma); - switch (rc) { - case SIM_NOMEM: - return SCPE_OK; - case SIM_ISIO: - return ioh->io(ioh,&val,IO_WRITE,WMASK); - case SCPE_OK: - return WritePW(addr,val); - default: - return rc; - } + t_addr addr; + IOHANDLER* ioh; + t_stat rc = TranslateAddr(a,&addr,&ioh,MEM_WRITE,m68k_fcode,m68k_dma); + switch (rc) { + case SIM_NOMEM: + return SCPE_OK; + case SIM_ISIO: + return ioh->io(ioh,&val,IO_WRITE,WMASK); + case SCPE_OK: + return WritePW(addr,val); + default: + return rc; + } } t_stat WriteVL(t_addr a, uint32 val) { - t_addr addr; - IOHANDLER* ioh; - t_stat rc = TranslateAddr(a,&addr,&ioh,MEM_WRITE,m68k_fcode,m68k_dma); - switch (rc) { - case SIM_NOMEM: - return SCPE_OK; - case SIM_ISIO: - return ioh->io(ioh,&val,IO_WRITE,LMASK); - case SCPE_OK: - return WritePL(addr,val); - default: - return rc; - } + t_addr addr; + IOHANDLER* ioh; + t_stat rc = TranslateAddr(a,&addr,&ioh,MEM_WRITE,m68k_fcode,m68k_dma); + switch (rc) { + case SIM_NOMEM: + return SCPE_OK; + case SIM_ISIO: + return ioh->io(ioh,&val,IO_WRITE,LMASK); + case SCPE_OK: + return WritePL(addr,val); + default: + return rc; + } } diff --git a/SAGE/m68k_parse.tab.c b/SAGE/m68k_parse.tab.c index 5492e71e..8e26039c 100644 --- a/SAGE/m68k_parse.tab.c +++ b/SAGE/m68k_parse.tab.c @@ -403,28 +403,28 @@ #endif struct _ea { - int ea; - int cnt; - t_value arg[10]; + int ea; + int cnt; + t_value arg[10]; }; struct _rea { - int reg; - struct _ea ea; + int reg; + struct _ea ea; }; struct _mask { - int x; - int d; + int x; + int d; }; struct _brop { - int opc; - int len; + int opc; + int len; }; static int oplen; static int movemx[] = { 0x0100, 0x0200, 0x0400, 0x0800, 0x1000, 0x2000, 0x4000, 0x8000, - 0x0001, 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080 }; + 0x0001, 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080 }; static int movemd[] = { 0x0080, 0x0040, 0x0020, 0x0010, 0x0008, 0x0004, 0x0002, 0x0001, - 0x8000, 0x4000, 0x2000, 0x1000, 0x0800, 0x0400, 0x0200, 0x0100 }; + 0x8000, 0x4000, 0x2000, 0x1000, 0x0800, 0x0400, 0x0200, 0x0100 }; static int yyrc; static int yyerrc; extern int yylex(); @@ -458,19 +458,19 @@ static void yyerror(char* s); typedef union YYSTYPE #line 74 "m68k_parse.y" { - int rc; - int reg; - int wl; - int opc; - struct _ea ea; - t_value num; - struct _rea rea; - struct _mask mask; - struct _brop brop; + int rc; + int reg; + int wl; + int opc; + struct _ea ea; + t_value num; + struct _rea rea; + struct _mask mask; + struct _brop brop; } /* Line 187 of yacc.c. */ #line 473 "m68k_parse.tab.c" - YYSTYPE; + YYSTYPE; # define yystype YYSTYPE /* obsolescent; will be withdrawn */ # define YYSTYPE_IS_DECLARED 1 # define YYSTYPE_IS_TRIVIAL 1 @@ -614,7 +614,7 @@ YYID (i) # endif # if (defined __cplusplus && ! defined _STDLIB_H \ && ! ((defined YYMALLOC || defined malloc) \ - && (defined YYFREE || defined free))) + && (defined YYFREE || defined free))) # include /* INFRINGES ON USER NAME SPACE */ # ifndef _STDLIB_H # define _STDLIB_H 1 @@ -640,7 +640,7 @@ void free (void *); /* INFRINGES ON USER NAME SPACE */ #if (! defined yyoverflow \ && (! defined __cplusplus \ - || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL))) + || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL))) /* A type that is properly aligned for any stack member. */ union yyalloc @@ -665,13 +665,13 @@ union yyalloc # define YYCOPY(To, From, Count) \ __builtin_memcpy (To, From, (Count) * sizeof (*(From))) # else -# define YYCOPY(To, From, Count) \ - do \ - { \ - YYSIZE_T yyi; \ - for (yyi = 0; yyi < (Count); yyi++) \ - (To)[yyi] = (From)[yyi]; \ - } \ +# define YYCOPY(To, From, Count) \ + do \ + { \ + YYSIZE_T yyi; \ + for (yyi = 0; yyi < (Count); yyi++) \ + (To)[yyi] = (From)[yyi]; \ + } \ while (YYID (0)) # endif # endif @@ -681,15 +681,15 @@ union yyalloc elements in the stack, and YYPTR gives the new location of the stack. Advance YYPTR to a properly aligned location for the next stack. */ -# define YYSTACK_RELOCATE(Stack) \ - do \ - { \ - YYSIZE_T yynewbytes; \ - YYCOPY (&yyptr->Stack, Stack, yysize); \ - Stack = &yyptr->Stack; \ - yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \ - yyptr += yynewbytes / sizeof (*yyptr); \ - } \ +# define YYSTACK_RELOCATE(Stack) \ + do \ + { \ + YYSIZE_T yynewbytes; \ + YYCOPY (&yyptr->Stack, Stack, yysize); \ + Stack = &yyptr->Stack; \ + yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \ + yyptr += yynewbytes / sizeof (*yyptr); \ + } \ while (YYID (0)) #endif @@ -712,7 +712,7 @@ union yyalloc #define YYUNDEFTOK 2 #define YYMAXUTOK 401 -#define YYTRANSLATE(YYX) \ +#define YYTRANSLATE(YYX) \ ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK) /* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */ @@ -1415,44 +1415,44 @@ static const yytype_uint8 yystos[] = 152, 152 }; -#define yyerrok (yyerrstatus = 0) -#define yyclearin (yychar = YYEMPTY) -#define YYEMPTY (-2) -#define YYEOF 0 +#define yyerrok (yyerrstatus = 0) +#define yyclearin (yychar = YYEMPTY) +#define YYEMPTY (-2) +#define YYEOF 0 -#define YYACCEPT goto yyacceptlab -#define YYABORT goto yyabortlab -#define YYERROR goto yyerrorlab +#define YYACCEPT goto yyacceptlab +#define YYABORT goto yyabortlab +#define YYERROR goto yyerrorlab /* Like YYERROR except do call yyerror. This remains here temporarily to ease the transition to the new meaning of YYERROR, for GCC. Once GCC version 2 has supplanted version 1, this can go. */ -#define YYFAIL goto yyerrlab +#define YYFAIL goto yyerrlab #define YYRECOVERING() (!!yyerrstatus) -#define YYBACKUP(Token, Value) \ -do \ - if (yychar == YYEMPTY && yylen == 1) \ - { \ - yychar = (Token); \ - yylval = (Value); \ - yytoken = YYTRANSLATE (yychar); \ - YYPOPSTACK (1); \ - goto yybackup; \ - } \ - else \ - { \ +#define YYBACKUP(Token, Value) \ +do \ + if (yychar == YYEMPTY && yylen == 1) \ + { \ + yychar = (Token); \ + yylval = (Value); \ + yytoken = YYTRANSLATE (yychar); \ + YYPOPSTACK (1); \ + goto yybackup; \ + } \ + else \ + { \ yyerror (YY_("syntax error: cannot back up")); \ - YYERROR; \ - } \ + YYERROR; \ + } \ while (YYID (0)) -#define YYTERROR 1 -#define YYERRCODE 256 +#define YYTERROR 1 +#define YYERRCODE 256 /* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N]. @@ -1461,22 +1461,22 @@ while (YYID (0)) #define YYRHSLOC(Rhs, K) ((Rhs)[K]) #ifndef YYLLOC_DEFAULT -# define YYLLOC_DEFAULT(Current, Rhs, N) \ - do \ +# define YYLLOC_DEFAULT(Current, Rhs, N) \ + do \ if (YYID (N)) \ - { \ - (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \ - (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \ - (Current).last_line = YYRHSLOC (Rhs, N).last_line; \ - (Current).last_column = YYRHSLOC (Rhs, N).last_column; \ - } \ - else \ - { \ - (Current).first_line = (Current).last_line = \ - YYRHSLOC (Rhs, 0).last_line; \ - (Current).first_column = (Current).last_column = \ - YYRHSLOC (Rhs, 0).last_column; \ - } \ + { \ + (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \ + (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \ + (Current).last_line = YYRHSLOC (Rhs, N).last_line; \ + (Current).last_column = YYRHSLOC (Rhs, N).last_column; \ + } \ + else \ + { \ + (Current).first_line = (Current).last_line = \ + YYRHSLOC (Rhs, 0).last_line; \ + (Current).first_column = (Current).last_column = \ + YYRHSLOC (Rhs, 0).last_column; \ + } \ while (YYID (0)) #endif @@ -1487,10 +1487,10 @@ while (YYID (0)) #ifndef YY_LOCATION_PRINT # if YYLTYPE_IS_TRIVIAL -# define YY_LOCATION_PRINT(File, Loc) \ - fprintf (File, "%d.%d-%d.%d", \ - (Loc).first_line, (Loc).first_column, \ - (Loc).last_line, (Loc).last_column) +# define YY_LOCATION_PRINT(File, Loc) \ + fprintf (File, "%d.%d-%d.%d", \ + (Loc).first_line, (Loc).first_column, \ + (Loc).last_line, (Loc).last_column) # else # define YY_LOCATION_PRINT(File, Loc) ((void) 0) # endif @@ -1513,21 +1513,21 @@ while (YYID (0)) # define YYFPRINTF fprintf # endif -# define YYDPRINTF(Args) \ -do { \ - if (yydebug) \ - YYFPRINTF Args; \ +# define YYDPRINTF(Args) \ +do { \ + if (yydebug) \ + YYFPRINTF Args; \ } while (YYID (0)) -# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \ -do { \ - if (yydebug) \ - { \ - YYFPRINTF (stderr, "%s ", Title); \ - yy_symbol_print (stderr, \ - Type, Value); \ - YYFPRINTF (stderr, "\n"); \ - } \ +# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \ +do { \ + if (yydebug) \ + { \ + YYFPRINTF (stderr, "%s ", Title); \ + yy_symbol_print (stderr, \ + Type, Value); \ + YYFPRINTF (stderr, "\n"); \ + } \ } while (YYID (0)) @@ -1559,7 +1559,7 @@ yy_symbol_value_print (yyoutput, yytype, yyvaluep) switch (yytype) { default: - break; + break; } } @@ -1611,10 +1611,10 @@ yy_stack_print (bottom, top) YYFPRINTF (stderr, "\n"); } -# define YY_STACK_PRINT(Bottom, Top) \ -do { \ - if (yydebug) \ - yy_stack_print ((Bottom), (Top)); \ +# define YY_STACK_PRINT(Bottom, Top) \ +do { \ + if (yydebug) \ + yy_stack_print ((Bottom), (Top)); \ } while (YYID (0)) @@ -1637,21 +1637,21 @@ yy_reduce_print (yyvsp, yyrule) int yyi; unsigned long int yylno = yyrline[yyrule]; YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n", - yyrule - 1, yylno); + yyrule - 1, yylno); /* The symbols being reduced. */ for (yyi = 0; yyi < yynrhs; yyi++) { fprintf (stderr, " $%d = ", yyi + 1); yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi], - &(yyvsp[(yyi + 1) - (yynrhs)]) - ); + &(yyvsp[(yyi + 1) - (yynrhs)]) + ); fprintf (stderr, "\n"); } } -# define YY_REDUCE_PRINT(Rule) \ -do { \ - if (yydebug) \ +# define YY_REDUCE_PRINT(Rule) \ +do { \ + if (yydebug) \ yy_reduce_print (yyvsp, Rule); \ } while (YYID (0)) @@ -1667,7 +1667,7 @@ int yydebug; /* YYINITDEPTH -- initial size of the parser's stacks. */ -#ifndef YYINITDEPTH +#ifndef YYINITDEPTH # define YYINITDEPTH 200 #endif @@ -1754,27 +1754,27 @@ yytnamerr (char *yyres, const char *yystr) char const *yyp = yystr; for (;;) - switch (*++yyp) - { - case '\'': - case ',': - goto do_not_strip_quotes; + switch (*++yyp) + { + case '\'': + case ',': + goto do_not_strip_quotes; - case '\\': - if (*++yyp != '\\') - goto do_not_strip_quotes; - /* Fall through. */ - default: - if (yyres) - yyres[yyn] = *yyp; - yyn++; - break; + case '\\': + if (*++yyp != '\\') + goto do_not_strip_quotes; + /* Fall through. */ + default: + if (yyres) + yyres[yyn] = *yyp; + yyn++; + break; - case '"': - if (yyres) - yyres[yyn] = '\0'; - return yyn; - } + case '"': + if (yyres) + yyres[yyn] = '\0'; + return yyn; + } do_not_strip_quotes: ; } @@ -1812,7 +1812,7 @@ yysyntax_error (char *yyresult, int yystate, int yychar) # if 0 /* This is so xgettext sees the translatable formats that are - constructed on the fly. */ + constructed on the fly. */ YY_("syntax error, unexpected %s"); YY_("syntax error, unexpected %s, expecting %s"); YY_("syntax error, unexpected %s, expecting %s or %s"); @@ -1825,13 +1825,13 @@ yysyntax_error (char *yyresult, int yystate, int yychar) static char const yyexpecting[] = ", expecting %s"; static char const yyor[] = " or %s"; char yyformat[sizeof yyunexpected - + sizeof yyexpecting - 1 - + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2) - * (sizeof yyor - 1))]; + + sizeof yyexpecting - 1 + + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2) + * (sizeof yyor - 1))]; char const *yyprefix = yyexpecting; /* Start YYX at -YYN if negative to avoid negative indexes in - YYCHECK. */ + YYCHECK. */ int yyxbegin = yyn < 0 ? -yyn : 0; /* Stay within bounds of both yycheck and yytname. */ @@ -1843,22 +1843,22 @@ yysyntax_error (char *yyresult, int yystate, int yychar) yyfmt = yystpcpy (yyformat, yyunexpected); for (yyx = yyxbegin; yyx < yyxend; ++yyx) - if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR) - { - if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM) - { - yycount = 1; - yysize = yysize0; - yyformat[sizeof yyunexpected - 1] = '\0'; - break; - } - yyarg[yycount++] = yytname[yyx]; - yysize1 = yysize + yytnamerr (0, yytname[yyx]); - yysize_overflow |= (yysize1 < yysize); - yysize = yysize1; - yyfmt = yystpcpy (yyfmt, yyprefix); - yyprefix = yyor; - } + if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR) + { + if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM) + { + yycount = 1; + yysize = yysize0; + yyformat[sizeof yyunexpected - 1] = '\0'; + break; + } + yyarg[yycount++] = yytname[yyx]; + yysize1 = yysize + yytnamerr (0, yytname[yyx]); + yysize_overflow |= (yysize1 < yysize); + yysize = yysize1; + yyfmt = yystpcpy (yyfmt, yyprefix); + yyprefix = yyor; + } yyf = YY_(yyformat); yysize1 = yysize + yystrlen (yyf); @@ -1866,29 +1866,29 @@ yysyntax_error (char *yyresult, int yystate, int yychar) yysize = yysize1; if (yysize_overflow) - return YYSIZE_MAXIMUM; + return YYSIZE_MAXIMUM; if (yyresult) - { - /* Avoid sprintf, as that infringes on the user's name space. - Don't have undefined behavior even if the translation - produced a string with the wrong number of "%s"s. */ - char *yyp = yyresult; - int yyi = 0; - while ((*yyp = *yyf) != '\0') - { - if (*yyp == '%' && yyf[1] == 's' && yyi < yycount) - { - yyp += yytnamerr (yyp, yyarg[yyi++]); - yyf += 2; - } - else - { - yyp++; - yyf++; - } - } - } + { + /* Avoid sprintf, as that infringes on the user's name space. + Don't have undefined behavior even if the translation + produced a string with the wrong number of "%s"s. */ + char *yyp = yyresult; + int yyi = 0; + while ((*yyp = *yyf) != '\0') + { + if (*yyp == '%' && yyf[1] == 's' && yyi < yycount) + { + yyp += yytnamerr (yyp, yyarg[yyi++]); + yyf += 2; + } + else + { + yyp++; + yyf++; + } + } + } return yysize; } } @@ -1922,7 +1922,7 @@ yydestruct (yymsg, yytype, yyvaluep) { default: - break; + break; } } @@ -2035,7 +2035,7 @@ yyparse () yystate = 0; yyerrstatus = 0; yynerrs = 0; - yychar = YYEMPTY; /* Cause a token to be read. */ + yychar = YYEMPTY; /* Cause a token to be read. */ /* Initialize stack pointers. Waste one element of value and location stack @@ -2065,25 +2065,25 @@ yyparse () #ifdef yyoverflow { - /* Give user a chance to reallocate the stack. Use copies of - these so that the &'s don't force the real ones into - memory. */ - YYSTYPE *yyvs1 = yyvs; - yytype_int16 *yyss1 = yyss; + /* Give user a chance to reallocate the stack. Use copies of + these so that the &'s don't force the real ones into + memory. */ + YYSTYPE *yyvs1 = yyvs; + yytype_int16 *yyss1 = yyss; - /* Each stack pointer address is followed by the size of the - data in use in that stack, in bytes. This used to be a - conditional around just the two extra args, but that might - be undefined if yyoverflow is a macro. */ - yyoverflow (YY_("memory exhausted"), - &yyss1, yysize * sizeof (*yyssp), - &yyvs1, yysize * sizeof (*yyvsp), + /* Each stack pointer address is followed by the size of the + data in use in that stack, in bytes. This used to be a + conditional around just the two extra args, but that might + be undefined if yyoverflow is a macro. */ + yyoverflow (YY_("memory exhausted"), + &yyss1, yysize * sizeof (*yyssp), + &yyvs1, yysize * sizeof (*yyvsp), - &yystacksize); + &yystacksize); - yyss = yyss1; - yyvs = yyvs1; + yyss = yyss1; + yyvs = yyvs1; } #else /* no yyoverflow */ # ifndef YYSTACK_RELOCATE @@ -2091,23 +2091,23 @@ yyparse () # else /* Extend the stack our own way. */ if (YYMAXDEPTH <= yystacksize) - goto yyexhaustedlab; + goto yyexhaustedlab; yystacksize *= 2; if (YYMAXDEPTH < yystacksize) - yystacksize = YYMAXDEPTH; + yystacksize = YYMAXDEPTH; { - yytype_int16 *yyss1 = yyss; - union yyalloc *yyptr = - (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize)); - if (! yyptr) - goto yyexhaustedlab; - YYSTACK_RELOCATE (yyss); - YYSTACK_RELOCATE (yyvs); + yytype_int16 *yyss1 = yyss; + union yyalloc *yyptr = + (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize)); + if (! yyptr) + goto yyexhaustedlab; + YYSTACK_RELOCATE (yyss); + YYSTACK_RELOCATE (yyvs); # undef YYSTACK_RELOCATE - if (yyss1 != yyssa) - YYSTACK_FREE (yyss1); + if (yyss1 != yyssa) + YYSTACK_FREE (yyss1); } # endif #endif /* no yyoverflow */ @@ -2117,10 +2117,10 @@ yyparse () YYDPRINTF ((stderr, "Stack size increased to %lu\n", - (unsigned long int) yystacksize)); + (unsigned long int) yystacksize)); if (yyss + yystacksize - 1 <= yyssp) - YYABORT; + YYABORT; } YYDPRINTF ((stderr, "Entering state %d\n", yystate)); @@ -2169,7 +2169,7 @@ yybackup: if (yyn <= 0) { if (yyn == 0 || yyn == YYTABLE_NINF) - goto yyerrlab; + goto yyerrlab; yyn = -yyn; goto yyreduce; } @@ -2239,7 +2239,7 @@ yyreduce: case 4: #line 117 "m68k_parse.y" { _genop((yyvsp[(1) - (5)].opc) | (yyvsp[(5) - (5)].ea).ea); if (oplen==0) { _genop((yyvsp[(3) - (5)].num) & 0xff); yyrc = _genea((yyvsp[(5) - (5)].ea)) - 3; } - else if (oplen==1) { _genop((yyvsp[(3) - (5)].num)); yyrc = _genea((yyvsp[(5) - (5)].ea)) - 3; } else { _genop((yyvsp[(3) - (5)].num)>>16); _genop((yyvsp[(3) - (5)].num) & 0xffff); yyrc = _genea((yyvsp[(5) - (5)].ea))-5; } ;} + else if (oplen==1) { _genop((yyvsp[(3) - (5)].num)); yyrc = _genea((yyvsp[(5) - (5)].ea)) - 3; } else { _genop((yyvsp[(3) - (5)].num)>>16); _genop((yyvsp[(3) - (5)].num) & 0xffff); yyrc = _genea((yyvsp[(5) - (5)].ea))-5; } ;} break; case 5: @@ -2250,7 +2250,7 @@ yyreduce: case 6: #line 120 "m68k_parse.y" { _genop((yyvsp[(1) - (5)].opc) | (yyvsp[(5) - (5)].ea).ea); if (oplen==0) { _genop((yyvsp[(3) - (5)].num) & 0xff); yyrc = _genea((yyvsp[(5) - (5)].ea)) - 3; } - else if (oplen==1) { _genop((yyvsp[(3) - (5)].num)); yyrc = _genea((yyvsp[(5) - (5)].ea)) - 3; } else { _genop((yyvsp[(3) - (5)].num)>>16); _genop((yyvsp[(3) - (5)].num) & 0xffff); yyrc = _genea((yyvsp[(5) - (5)].ea))-5; } ;} + else if (oplen==1) { _genop((yyvsp[(3) - (5)].num)); yyrc = _genea((yyvsp[(5) - (5)].ea)) - 3; } else { _genop((yyvsp[(3) - (5)].num)>>16); _genop((yyvsp[(3) - (5)].num) & 0xffff); yyrc = _genea((yyvsp[(5) - (5)].ea))-5; } ;} break; case 7: @@ -2361,8 +2361,8 @@ yyreduce: case 28: #line 143 "m68k_parse.y" { if ((yyvsp[(5) - (5)].ea).ea==074) { _genop(0x44c0 | ((yyvsp[(5) - (5)].ea).cnt==1?0x0200:0x0000) | (yyvsp[(3) - (5)].ea).ea); yyrc = _genea((yyvsp[(3) - (5)].ea)) - 1; } - else { int tmp = (((yyvsp[(5) - (5)].ea).ea&070)>>3)|(((yyvsp[(5) - (5)].ea).ea&7)<<3); _genop(0x0000 | ((yyvsp[(2) - (5)].wl)<<12) | (tmp<<6) | (yyvsp[(3) - (5)].ea).ea); - yyrc = _genea((yyvsp[(3) - (5)].ea)) - 1; yyrc += _genea((yyvsp[(5) - (5)].ea)); } ;} + else { int tmp = (((yyvsp[(5) - (5)].ea).ea&070)>>3)|(((yyvsp[(5) - (5)].ea).ea&7)<<3); _genop(0x0000 | ((yyvsp[(2) - (5)].wl)<<12) | (tmp<<6) | (yyvsp[(3) - (5)].ea).ea); + yyrc = _genea((yyvsp[(3) - (5)].ea)) - 1; yyrc += _genea((yyvsp[(5) - (5)].ea)); } ;} break; case 29: @@ -3073,8 +3073,8 @@ yyreduce: case 170: #line 334 "m68k_parse.y" { if (((yyvsp[(3) - (3)].ea).ea & 070)==0) { /* dx,dy must be swapped */ - (yyval.rea).reg = ((yyvsp[(3) - (3)].ea).ea & 7)<<9; (yyvsp[(3) - (3)].ea).ea = (yyvsp[(1) - (3)].reg) & 7; (yyval.rea).ea = (yyvsp[(3) - (3)].ea); } - else { (yyval.rea).reg = ((yyvsp[(1) - (3)].reg)<<9) | 0x100; (yyval.rea).ea = (yyvsp[(3) - (3)].ea); } ;} + (yyval.rea).reg = ((yyvsp[(3) - (3)].ea).ea & 7)<<9; (yyvsp[(3) - (3)].ea).ea = (yyvsp[(1) - (3)].reg) & 7; (yyval.rea).ea = (yyvsp[(3) - (3)].ea); } + else { (yyval.rea).reg = ((yyvsp[(1) - (3)].reg)<<9) | 0x100; (yyval.rea).ea = (yyvsp[(3) - (3)].ea); } ;} break; case 171: @@ -3240,13 +3240,13 @@ yyreduce: case 203: #line 387 "m68k_parse.y" { int i,l=(yyvsp[(1) - (3)].reg),h=(yyvsp[(3) - (3)].reg); if (l>h) { l=(yyvsp[(3) - (3)].reg); h=(yyvsp[(1) - (3)].reg); } (yyval.mask).x = (yyval.mask).d = 0; - for (i=l; i<=h; i++) { (yyval.mask).d |= movemx[i]; (yyval.mask).d |= movemd[i]; } ;} + for (i=l; i<=h; i++) { (yyval.mask).d |= movemx[i]; (yyval.mask).d |= movemd[i]; } ;} break; case 204: #line 389 "m68k_parse.y" { int i,l=(yyvsp[(1) - (3)].reg),h=(yyvsp[(3) - (3)].reg); if (l>h) { l=(yyvsp[(3) - (3)].reg); h=(yyvsp[(1) - (3)].reg); } (yyval.mask).x = (yyval.mask).d = 0; - for (i=l; i<=h; i++) { (yyval.mask).x |= movemx[i+8]; (yyval.mask).d |= movemd[i+8]; } ;} + for (i=l; i<=h; i++) { (yyval.mask).x |= movemx[i+8]; (yyval.mask).d |= movemd[i+8]; } ;} break; case 260: @@ -3292,13 +3292,13 @@ yyreduce: case 268: #line 421 "m68k_parse.y" { if ((yyvsp[(4) - (4)].wl)==0) { (yyval.ea).ea = 070; (yyval.ea).cnt = 1; (yyval.ea).arg[0] = (yyvsp[(2) - (4)].num); } - else { (yyval.ea).ea = 071; (yyval.ea).cnt = 2; (yyval.ea).arg[0] = (yyvsp[(2) - (4)].num) >> 16; (yyval.ea).arg[1] = (yyvsp[(2) - (4)].num) & 0xffff; } ;} + else { (yyval.ea).ea = 071; (yyval.ea).cnt = 2; (yyval.ea).arg[0] = (yyvsp[(2) - (4)].num) >> 16; (yyval.ea).arg[1] = (yyvsp[(2) - (4)].num) & 0xffff; } ;} break; case 269: #line 423 "m68k_parse.y" { int tmp = ((yyvsp[(2) - (3)].num)>>15) & 0x1ffff; if (tmp==0 || tmp==0x1ffff) { (yyval.ea).ea = 070; (yyval.ea).cnt = 1; (yyval.ea).arg[0] = (yyvsp[(2) - (3)].num); } - else { (yyval.ea).ea = 070; (yyval.ea).cnt = 2; (yyval.ea).arg[0] = (yyvsp[(2) - (3)].num) >> 16; (yyval.ea).arg[1] = (yyvsp[(2) - (3)].num) & 0xffff; } ;} + else { (yyval.ea).ea = 070; (yyval.ea).cnt = 2; (yyval.ea).arg[0] = (yyvsp[(2) - (3)].num) >> 16; (yyval.ea).arg[1] = (yyvsp[(2) - (3)].num) & 0xffff; } ;} break; case 270: @@ -3324,8 +3324,8 @@ yyreduce: case 274: #line 434 "m68k_parse.y" { (yyval.ea).ea = 074; if (oplen==0) { (yyval.ea).cnt = 1; (yyval.ea).arg[0] = (yyvsp[(2) - (2)].num) & 0xff; } - else if (oplen==1) { (yyval.ea).cnt = 1; (yyval.ea).arg[0] = (yyvsp[(2) - (2)].num) & 0xffff; } - else { (yyval.ea).cnt = 2; (yyval.ea).arg[0] = (yyvsp[(2) - (2)].num) >> 16; (yyval.ea).arg[1] = (yyvsp[(2) - (2)].num) & 0xffff; } ;} + else if (oplen==1) { (yyval.ea).cnt = 1; (yyval.ea).arg[0] = (yyvsp[(2) - (2)].num) & 0xffff; } + else { (yyval.ea).cnt = 2; (yyval.ea).arg[0] = (yyvsp[(2) - (2)].num) >> 16; (yyval.ea).arg[1] = (yyvsp[(2) - (2)].num) & 0xffff; } ;} break; case 275: @@ -3379,35 +3379,35 @@ yyerrlab: yyerror (YY_("syntax error")); #else { - YYSIZE_T yysize = yysyntax_error (0, yystate, yychar); - if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM) - { - YYSIZE_T yyalloc = 2 * yysize; - if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM)) - yyalloc = YYSTACK_ALLOC_MAXIMUM; - if (yymsg != yymsgbuf) - YYSTACK_FREE (yymsg); - yymsg = (char *) YYSTACK_ALLOC (yyalloc); - if (yymsg) - yymsg_alloc = yyalloc; - else - { - yymsg = yymsgbuf; - yymsg_alloc = sizeof yymsgbuf; - } - } + YYSIZE_T yysize = yysyntax_error (0, yystate, yychar); + if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM) + { + YYSIZE_T yyalloc = 2 * yysize; + if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM)) + yyalloc = YYSTACK_ALLOC_MAXIMUM; + if (yymsg != yymsgbuf) + YYSTACK_FREE (yymsg); + yymsg = (char *) YYSTACK_ALLOC (yyalloc); + if (yymsg) + yymsg_alloc = yyalloc; + else + { + yymsg = yymsgbuf; + yymsg_alloc = sizeof yymsgbuf; + } + } - if (0 < yysize && yysize <= yymsg_alloc) - { - (void) yysyntax_error (yymsg, yystate, yychar); - yyerror (yymsg); - } - else - { - yyerror (YY_("syntax error")); - if (yysize != 0) - goto yyexhaustedlab; - } + if (0 < yysize && yysize <= yymsg_alloc) + { + (void) yysyntax_error (yymsg, yystate, yychar); + yyerror (yymsg); + } + else + { + yyerror (YY_("syntax error")); + if (yysize != 0) + goto yyexhaustedlab; + } } #endif } @@ -3417,20 +3417,20 @@ yyerrlab: if (yyerrstatus == 3) { /* If just tried and failed to reuse look-ahead token after an - error, discard it. */ + error, discard it. */ if (yychar <= YYEOF) - { - /* Return failure if at end of input. */ - if (yychar == YYEOF) - YYABORT; - } + { + /* Return failure if at end of input. */ + if (yychar == YYEOF) + YYABORT; + } else - { - yydestruct ("Error: discarding", - yytoken, &yylval); - yychar = YYEMPTY; - } + { + yydestruct ("Error: discarding", + yytoken, &yylval); + yychar = YYEMPTY; + } } /* Else will try to reuse look-ahead token after shifting the error @@ -3462,29 +3462,29 @@ yyerrorlab: | yyerrlab1 -- common code for both syntax error and YYERROR. | `-------------------------------------------------------------*/ yyerrlab1: - yyerrstatus = 3; /* Each real token shifted decrements this. */ + yyerrstatus = 3; /* Each real token shifted decrements this. */ for (;;) { yyn = yypact[yystate]; if (yyn != YYPACT_NINF) - { - yyn += YYTERROR; - if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR) - { - yyn = yytable[yyn]; - if (0 < yyn) - break; - } - } + { + yyn += YYTERROR; + if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR) + { + yyn = yytable[yyn]; + if (0 < yyn) + break; + } + } /* Pop the current state because it cannot handle the error token. */ if (yyssp == yyss) - YYABORT; + YYABORT; yydestruct ("Error: popping", - yystos[yystate], yyvsp); + yystos[yystate], yyvsp); YYPOPSTACK (1); yystate = *yyssp; YY_STACK_PRINT (yyss, yyssp); @@ -3530,7 +3530,7 @@ yyexhaustedlab: yyreturn: if (yychar != YYEOF && yychar != YYEMPTY) yydestruct ("Cleanup: discarding lookahead", - yytoken, &yylval); + yytoken, &yylval); /* Do not reclaim the symbols of the rule which action triggered this YYABORT or YYACCEPT. */ YYPOPSTACK (yylen); @@ -3538,7 +3538,7 @@ yyreturn: while (yyssp != yyss) { yydestruct ("Cleanup: popping", - yystos[*yyssp], yyvsp); + yystos[*yyssp], yyvsp); YYPOPSTACK (1); } #ifndef yyoverflow @@ -3559,57 +3559,57 @@ yyreturn: static void yyerror(char* s) { - /* do not emit anything, but set error flag */ - yyerrc = 1; + /* do not emit anything, but set error flag */ + yyerrc = 1; } struct _optable { - char* mnem; - int token; + char* mnem; + int token; }; static struct _optable ops[] = { - { "abcd", ABCD }, { "add", ADD }, { "adda", ADDA }, { "addi", ADDI }, - { "addq", ADDQ }, { "addx", ADDX }, { "and", AND }, { "andi", ANDI }, - { "asl", ASL }, { "asr", ASR }, { "bcc", BCC }, { "bcs", BCS }, - { "beq", BEQ }, { "bge", BGE }, { "bgt", BGT }, { "bhi", BHI }, - { "ble", BLE }, { "bls", BLS }, { "blt", BLT }, { "bmi", BMI }, - { "bne", BNE }, { "bpl", BPL }, { "bvc", BVC }, { "bvs", BVS }, - { "bchg", BCHG }, { "bclr", BCLR }, { "bra", BRA }, { "bset", BSET }, - { "bsr", BSR }, { "btst", BTST }, { "chk", CHK }, { "clr", CLR }, - { "cmp", CMP }, { "cmpa", CMPA }, { "cmpi", CMPI }, { "cmpm", CMPM }, - { "dbcc", DBCC }, { "dbcs", DBCS }, { "dbeq", DBEQ }, { "dbf", DBF }, - { "dbge", DBGE }, { "dbgt", DBGT }, { "dbhi", DBHI }, { "dble", DBLE }, - { "dbls", DBLS }, { "dblt", DBLT }, { "dbmi", DBMI }, { "dbne", DBNE }, - { "dbpl", DBPL }, { "dbt", DBT }, { "dbvc", DBVC }, { "dbvs", DBVS }, - { "divs", DIVS }, { "divu", DIVU }, { "eor", EOR }, { "eori", EORI }, - { "exg", EXG }, { "ext", EXT }, { "illegal",ILLEGAL }, { "jmp", JMP }, - { "jsr", JSR }, { "lea", LEA }, { "link", LINK }, { "lsl", LSL }, - { "lsr", LSR }, { "move", MOVE }, { "movea", MOVEA }, { "movem", MOVEM }, - { "movep", MOVEP }, { "moveq", MOVEQ }, { "muls", MULS }, { "mulu", MULU }, - { "nbcd", NBCD }, { "neg", NEG }, { "negx", NEGX }, { "nop", NOP }, - { "not", NOT }, { "or", OR }, { "ori", ORI }, { "pea", PEA }, - { "reset", RESET }, { "rol", ROL }, { "ror", ROR }, { "roxl", ROXL }, - { "roxr", ROXR }, { "rte", RTE }, { "rtr", RTR }, - { "rts", RTS }, { "scc", SCC }, { "scs", SCS }, { "seq", SEQ }, - { "sf", SF }, { "sge", SGE }, { "sgt", SGT }, { "shi", SHI }, - { "sle", SLE }, { "sls", SLS }, { "slt", SLT }, { "smi", SMI }, - { "sne", SNE }, { "spl", SPL }, { "st", ST }, { "svc", SVC }, - { "svs", SVS }, { "stop", STOP }, { "sub", SUB }, { "suba", SUBA }, - { "subi", SUBI }, { "subq", SUBQ }, { "subx", SUBX }, { "swap", SWAP }, - { "tas", TAS }, { "trap", TRAP }, { "trapv", TRAPV }, { "tst", TST }, - { "unlk", UNLK }, { "a0", A0 }, { "a1", A1 }, { "a2", A2 }, - { "a3", A3 }, { "a4", A4 }, { "a5", A5 }, { "a6", A6 }, - { "a7", A7 }, { "d0", D0 }, { "d1", D1 }, { "d2", D2 }, - { "d3", D3 }, { "d4", D4 }, { "d5", D5 }, { "d6", D6 }, - { "d7", D7 }, { "ccr", CCR }, { "sr", SR }, { "usp", USP }, - { "pc", PC }, - { 0, 0 } + { "abcd", ABCD }, { "add", ADD }, { "adda", ADDA }, { "addi", ADDI }, + { "addq", ADDQ }, { "addx", ADDX }, { "and", AND }, { "andi", ANDI }, + { "asl", ASL }, { "asr", ASR }, { "bcc", BCC }, { "bcs", BCS }, + { "beq", BEQ }, { "bge", BGE }, { "bgt", BGT }, { "bhi", BHI }, + { "ble", BLE }, { "bls", BLS }, { "blt", BLT }, { "bmi", BMI }, + { "bne", BNE }, { "bpl", BPL }, { "bvc", BVC }, { "bvs", BVS }, + { "bchg", BCHG }, { "bclr", BCLR }, { "bra", BRA }, { "bset", BSET }, + { "bsr", BSR }, { "btst", BTST }, { "chk", CHK }, { "clr", CLR }, + { "cmp", CMP }, { "cmpa", CMPA }, { "cmpi", CMPI }, { "cmpm", CMPM }, + { "dbcc", DBCC }, { "dbcs", DBCS }, { "dbeq", DBEQ }, { "dbf", DBF }, + { "dbge", DBGE }, { "dbgt", DBGT }, { "dbhi", DBHI }, { "dble", DBLE }, + { "dbls", DBLS }, { "dblt", DBLT }, { "dbmi", DBMI }, { "dbne", DBNE }, + { "dbpl", DBPL }, { "dbt", DBT }, { "dbvc", DBVC }, { "dbvs", DBVS }, + { "divs", DIVS }, { "divu", DIVU }, { "eor", EOR }, { "eori", EORI }, + { "exg", EXG }, { "ext", EXT }, { "illegal",ILLEGAL }, { "jmp", JMP }, + { "jsr", JSR }, { "lea", LEA }, { "link", LINK }, { "lsl", LSL }, + { "lsr", LSR }, { "move", MOVE }, { "movea", MOVEA }, { "movem", MOVEM }, + { "movep", MOVEP }, { "moveq", MOVEQ }, { "muls", MULS }, { "mulu", MULU }, + { "nbcd", NBCD }, { "neg", NEG }, { "negx", NEGX }, { "nop", NOP }, + { "not", NOT }, { "or", OR }, { "ori", ORI }, { "pea", PEA }, + { "reset", RESET }, { "rol", ROL }, { "ror", ROR }, { "roxl", ROXL }, + { "roxr", ROXR }, { "rte", RTE }, { "rtr", RTR }, + { "rts", RTS }, { "scc", SCC }, { "scs", SCS }, { "seq", SEQ }, + { "sf", SF }, { "sge", SGE }, { "sgt", SGT }, { "shi", SHI }, + { "sle", SLE }, { "sls", SLS }, { "slt", SLT }, { "smi", SMI }, + { "sne", SNE }, { "spl", SPL }, { "st", ST }, { "svc", SVC }, + { "svs", SVS }, { "stop", STOP }, { "sub", SUB }, { "suba", SUBA }, + { "subi", SUBI }, { "subq", SUBQ }, { "subx", SUBX }, { "swap", SWAP }, + { "tas", TAS }, { "trap", TRAP }, { "trapv", TRAPV }, { "tst", TST }, + { "unlk", UNLK }, { "a0", A0 }, { "a1", A1 }, { "a2", A2 }, + { "a3", A3 }, { "a4", A4 }, { "a5", A5 }, { "a6", A6 }, + { "a7", A7 }, { "d0", D0 }, { "d1", D1 }, { "d2", D2 }, + { "d3", D3 }, { "d4", D4 }, { "d5", D5 }, { "d6", D6 }, + { "d7", D7 }, { "ccr", CCR }, { "sr", SR }, { "usp", USP }, + { "pc", PC }, + { 0, 0 } }; typedef struct _ophash { - struct _ophash* next; - struct _optable* op; + struct _ophash* next; + struct _optable* op; } OPHASH; #define OPHASHSIZE 97 @@ -3617,98 +3617,98 @@ static OPHASH **ophash = 0; static int getophash(const char* s) { - int h = 0; - while (*s++) h += (int)*s; - return h % OPHASHSIZE; + int h = 0; + while (*s++) h += (int)*s; + return h % OPHASHSIZE; } static int oplookup(const char* s) { - int idx = getophash(s); - OPHASH* oph = ophash[idx]; - if (oph) { - if (oph->next) { - while (oph) { - if (!strcmp(s,oph->op->mnem)) return oph->op->token; - oph = oph->next; - } - return 0; - } - return oph->op->token; - } - return 0; + int idx = getophash(s); + OPHASH* oph = ophash[idx]; + if (oph) { + if (oph->next) { + while (oph) { + if (!strcmp(s,oph->op->mnem)) return oph->op->token; + oph = oph->next; + } + return 0; + } + return oph->op->token; + } + return 0; } static void init_ophash() { - struct _optable* op = ops; - OPHASH* oph; - ophash = (OPHASH**)calloc(sizeof(OPHASH*),OPHASHSIZE); - while (op->mnem) { - int idx = getophash(op->mnem); - oph = (OPHASH*)malloc(sizeof(OPHASH)); - oph->next = ophash[idx]; - oph->op = op; - ophash[idx] = oph; - op++; - } + struct _optable* op = ops; + OPHASH* oph; + ophash = (OPHASH**)calloc(sizeof(OPHASH*),OPHASHSIZE); + while (op->mnem) { + int idx = getophash(op->mnem); + oph = (OPHASH*)malloc(sizeof(OPHASH)); + oph->next = ophash[idx]; + oph->op = op; + ophash[idx] = oph; + op++; + } } static char* yystream; int yylex() { - char ident[30]; - char *p = ident; - char c = yystream[0]; - - while (c != 0 && (c=='\t' || c==' ')) { - c = *++yystream; - } - if (c==0) return EOF; - - if (isalpha(c)) { - while (isalnum(c) && (p-ident)<28) { - *p++ = tolower(c); c = *++yystream; - } - *p = 0; - if (p>ident) { return oplookup(ident); } - return EOF; - } else if (isdigit(c)) { - *p++ = c; - if (yystream[1]=='x' || yystream[1]=='X') { *p++ = 'x'; yystream++; } - c = *++yystream; - while ((isdigit(c) || isxdigit(c)) && (p-ident)<28) { - *p++ = c; c = *++yystream; - } - *p = 0; - yylval.num = strtol(ident,0,0); - return NUMBER; + char ident[30]; + char *p = ident; + char c = yystream[0]; + + while (c != 0 && (c=='\t' || c==' ')) { + c = *++yystream; + } + if (c==0) return EOF; + + if (isalpha(c)) { + while (isalnum(c) && (p-ident)<28) { + *p++ = tolower(c); c = *++yystream; + } + *p = 0; + if (p>ident) { return oplookup(ident); } + return EOF; + } else if (isdigit(c)) { + *p++ = c; + if (yystream[1]=='x' || yystream[1]=='X') { *p++ = 'x'; yystream++; } + c = *++yystream; + while ((isdigit(c) || isxdigit(c)) && (p-ident)<28) { + *p++ = c; c = *++yystream; + } + *p = 0; + yylval.num = strtol(ident,0,0); + return NUMBER; } else if (c=='$') { - if (isdigit(yystream[1]) || isxdigit(yystream[1])) { - c = *++yystream; - while ((isdigit(c) || isxdigit(c)) && (p-ident)<28) { - *p++ = c; c = *++yystream; - } - *p = 0; - yylval.num = strtol(ident,0,16); - return NUMBER; - } else return '$'; - } else if (c == '-' && yystream[1] == '(') { - yystream += 2; return PREDEC; - } else if (c == ')' && yystream[1] == '+') { - yystream += 2; return POSTINC; - } else if (c == '.') { - switch (yystream[1]) { - case 'b': yystream += 2; return BSIZE; - case 'w': yystream += 2; return WSIZE; - case 'l': yystream += 2; return LSIZE; - case 's': yystream += 2; return SSIZE; - default: yystream++; return '.'; - } - } else { - ++yystream; return c; - } + if (isdigit(yystream[1]) || isxdigit(yystream[1])) { + c = *++yystream; + while ((isdigit(c) || isxdigit(c)) && (p-ident)<28) { + *p++ = c; c = *++yystream; + } + *p = 0; + yylval.num = strtol(ident,0,16); + return NUMBER; + } else return '$'; + } else if (c == '-' && yystream[1] == '(') { + yystream += 2; return PREDEC; + } else if (c == ')' && yystream[1] == '+') { + yystream += 2; return POSTINC; + } else if (c == '.') { + switch (yystream[1]) { + case 'b': yystream += 2; return BSIZE; + case 'w': yystream += 2; return WSIZE; + case 'l': yystream += 2; return LSIZE; + case 's': yystream += 2; return SSIZE; + default: yystream++; return '.'; + } + } else { + ++yystream; return c; + } } static t_value *yyvalptr; @@ -3716,71 +3716,71 @@ static t_addr yyaddr; t_stat parse_sym(char* c, t_addr a, UNIT* u, t_value* val, int32 sw) { - char ch; - - if (!ophash) init_ophash(); + char ch; + + if (!ophash) init_ophash(); - yyvalptr = val; - yyaddr = a; + yyvalptr = val; + yyaddr = a; - yystream = c; - yyerrc = 0; - - ch = *yystream; - while (ch != 0 && (ch=='\t' || ch==' ')) { - ch = *++yystream; - } - if (ch == 0) return 0; + yystream = c; + yyerrc = 0; + + ch = *yystream; + while (ch != 0 && (ch=='\t' || ch==' ')) { + ch = *++yystream; + } + if (ch == 0) return 0; - if (sw & SWMASK('Y')) yydebug = 1 - yydebug; - if ((sw & SWMASK('A')) || ch=='\'') { - if ((ch = yystream[1])) { - val[0] = (uint32)ch; - return SCPE_OK; - } else return SCPE_ARG; - } - if ((sw & SWMASK('C')) || ch=='"') { - if ((ch = yystream[1])) { - val[0] = ((uint32)ch << 8) | (uint32)yystream[1]; - return SCPE_OK; - } else return SCPE_ARG; - } - - yyparse(); - printf("rc=%d\n",yyrc); - if (yyerrc) return SCPE_ARG; - return yyrc; + if (sw & SWMASK('Y')) yydebug = 1 - yydebug; + if ((sw & SWMASK('A')) || ch=='\'') { + if ((ch = yystream[1])) { + val[0] = (uint32)ch; + return SCPE_OK; + } else return SCPE_ARG; + } + if ((sw & SWMASK('C')) || ch=='"') { + if ((ch = yystream[1])) { + val[0] = ((uint32)ch << 8) | (uint32)yystream[1]; + return SCPE_OK; + } else return SCPE_ARG; + } + + yyparse(); + printf("rc=%d\n",yyrc); + if (yyerrc) return SCPE_ARG; + return yyrc; } static int _genop(t_value arg) { -// printf("_genop(%x)@%x\n",arg,(int)yyvalptr); - *yyvalptr = arg; - yyvalptr++; - return -1; +// printf("_genop(%x)@%x\n",arg,(int)yyvalptr); + *yyvalptr = arg; + yyvalptr++; + return -1; } static int _genea(struct _ea arg) { - int i; - for (i=0; innext; - free(n->name); - free(n); - } - symbyname[i].nnext = symbyval[i].vnext = 0; - } - return; + int i; + SYMHASH *p,*n; + + if (!symbyname) return; + for (i=0; innext; + free(n->name); + free(n); + } + symbyname[i].nnext = symbyval[i].vnext = 0; + } + return; } static void m68k_sim_init(void) { - int i; - sim_vm_cmd = m68k_sim_cmds; + int i; + sim_vm_cmd = m68k_sim_cmds; - sym_clearall(); - symbyname = (SYMHASH*)calloc(sizeof(SYMHASH),SYMHASHSIZE); - symbyval = (SYMHASH*)calloc(sizeof(SYMHASH),SYMHASHSIZE); - for (i=0; iname)) p = p->nnext; - *n = p; - return p != 0; + int hash = getnhash(name); + SYMHASH *p = symbyname[hash].nnext; + while (p && strcmp(name,p->name)) p = p->nnext; + *n = p; + return p != 0; } static t_bool sym_lookupval(t_addr val, SYMHASH **v) { - int hash = getvhash(val); - SYMHASH *p = symbyval[hash].vnext; - while (p && p->val != val) p = p->vnext; - *v = p; - return p != 0; + int hash = getvhash(val); + SYMHASH *p = symbyval[hash].vnext; + while (p && p->val != val) p = p->vnext; + *v = p; + return p != 0; } static t_bool sym_enter(const char* name,t_addr val) { - int nhash = getnhash(name); - int vhash = getvhash(val); - SYMHASH *v, *n, *e; - - if (sym_lookupname(name,&n) || sym_lookupval(val,&v)) return FALSE; - n = symbyname[nhash].nnext; - v = symbyval[vhash].vnext; - e = (SYMHASH*)malloc(sizeof(SYMHASH)); - e->nnext = n; - e->vnext = v; - e->name = malloc(strlen(name)+1); - strcpy(e->name,name); - e->val = val; - symbyname[nhash].nnext = symbyval[vhash].vnext = e; - return TRUE; + int nhash = getnhash(name); + int vhash = getvhash(val); + SYMHASH *v, *n, *e; + + if (sym_lookupname(name,&n) || sym_lookupval(val,&v)) return FALSE; + n = symbyname[nhash].nnext; + v = symbyval[vhash].vnext; + e = (SYMHASH*)malloc(sizeof(SYMHASH)); + e->nnext = n; + e->vnext = v; + e->name = malloc(strlen(name)+1); + strcpy(e->name,name); + e->val = val; + symbyname[nhash].nnext = symbyval[vhash].vnext = e; + return TRUE; } static t_bool sym_delete(const char* name) { - int hash = getnhash(name); - SYMHASH *p, *q, **n, **v; - n = &symbyname[hash].nnext; - while ((p = *n) != 0) { - if (!strcmp(p->name,name)) { /*found*/ - hash = getvhash(p->val); - v = &symbyval[hash].vnext; - while ((q = *v) != 0) { - if (q->val == p->val) { /*found*/ - *v = q->vnext; - break; - } - v = &(q->vnext); - } - *n = p->nnext; - free(p->name); - free(p); - return TRUE; - } - } - return FALSE; + int hash = getnhash(name); + SYMHASH *p, *q, **n, **v; + n = &symbyname[hash].nnext; + while ((p = *n) != 0) { + if (!strcmp(p->name,name)) { /*found*/ + hash = getvhash(p->val); + v = &symbyval[hash].vnext; + while ((q = *v) != 0) { + if (q->val == p->val) { /*found*/ + *v = q->vnext; + break; + } + v = &(q->vnext); + } + *n = p->nnext; + free(p->name); + free(p); + return TRUE; + } + } + return FALSE; } static t_stat symset_cmd(int32 arg,char* buf) { - char *name,*vstr; - t_addr val; + char *name,*vstr; + t_addr val; - if ((name = strtok(buf, "= ")) == 0) return SCPE_2FARG; - if ((vstr = strtok(NULL, " \t\n")) == 0) return SCPE_2FARG; - val = strtol(vstr, 0, 16); - if (!sym_enter(name, val)) - printf("Name or value already exists\n"); - return SCPE_OK; + if ((name = strtok(buf, "= ")) == 0) return SCPE_2FARG; + if ((vstr = strtok(NULL, " \t\n")) == 0) return SCPE_2FARG; + val = strtol(vstr, 0, 16); + if (!sym_enter(name, val)) + printf("Name or value already exists\n"); + return SCPE_OK; } static t_stat symclr_cmd(int32 arg,char* buf) { - char* token; - if (buf[0] == '-' && buf[1]=='a') { - sym_clearall(); - return SCPE_OK; - } else { - token = strtok(buf," \t\n"); - if (!token) return SCPE_2FARG; - return sym_delete(token) ? SCPE_OK : SCPE_ARG; - } + char* token; + if (buf[0] == '-' && buf[1]=='a') { + sym_clearall(); + return SCPE_OK; + } else { + token = strtok(buf," \t\n"); + if (!token) return SCPE_2FARG; + return sym_delete(token) ? SCPE_OK : SCPE_ARG; + } } static t_stat symlist_cmd(int32 arg,char* buf) { - int i; - SYMHASH* n; - char *name; - t_bool found = FALSE; - - name = strtok(buf," \t\n"); - if (name) { - if (sym_lookupname(name,&n)) - printf(" %s = 0x%08x\n",n->name,n->val); - else - printf("Unknown\n"); - } else { - for (i=0; iname,n->val); - n = n->nnext; - found = TRUE; - } - } - if (!found) printf("Symbol table is empty\n"); - } - return SCPE_OK; + int i; + SYMHASH* n; + char *name; + t_bool found = FALSE; + + name = strtok(buf," \t\n"); + if (name) { + if (sym_lookupname(name,&n)) + printf(" %s = 0x%08x\n",n->name,n->val); + else + printf("Unknown\n"); + } else { + for (i=0; iname,n->val); + n = n->nnext; + found = TRUE; + } + } + if (!found) printf("Symbol table is empty\n"); + } + return SCPE_OK; } static t_stat symtrace_cmd(int32 arg,char* buf) { - if (!*buf) - symtrace = arg ? TRUE : FALSE; + if (!*buf) + symtrace = arg ? TRUE : FALSE; - printf("Symbolic tracing %sabled\n",symtrace ? "en" : "dis"); - return SCPE_OK; + printf("Symbolic tracing %sabled\n",symtrace ? "en" : "dis"); + return SCPE_OK; } static void putascii(uint32* buf) { - int i; - putchar('|'); - for (i=0; i<16; i++) { - if (isprint(buf[i])) putchar(buf[i]); - else putchar('.'); - } - putchar('|'); + int i; + putchar('|'); + for (i=0; i<16; i++) { + if (isprint(buf[i])) putchar(buf[i]); + else putchar('.'); + } + putchar('|'); } static t_stat hdump_cmd(int32 arg, char* buf) { - int i; - t_addr low, high, base, top; - char *token; - uint32 byte[16]; - t_bool ascii = FALSE; - t_bool first = TRUE; - - if (buf[0]=='-' && buf[1]=='a') { - ascii = TRUE; - buf += 2; - while (*buf && isspace(*buf)) buf++; - } - memset(byte,0,sizeof(uint32)*16); - - token = strtok(buf,"- \t\n"); - if (!token) return SCPE_2FARG; - low = strtol(token,0,16); - token = strtok(NULL,"- \t\n"); - if (!token) return SCPE_2FARG; - high = strtol(token,0,16); - - base = low - (low % 16); - top = (high + 15) - ((high+15) % 16); - for (; base high) printf(" "); - else { - i = base %16; - if (ReadPB(base,byte+i) != SCPE_OK) printf("?? "); - else printf("%02x ",byte[i] & 0xff); - } - } - if (!first && ascii) putascii(byte); - putchar('\n'); - return SCPE_OK; + int i; + t_addr low, high, base, top; + char *token; + uint32 byte[16]; + t_bool ascii = FALSE; + t_bool first = TRUE; + + if (buf[0]=='-' && buf[1]=='a') { + ascii = TRUE; + buf += 2; + while (*buf && isspace(*buf)) buf++; + } + memset(byte,0,sizeof(uint32)*16); + + token = strtok(buf,"- \t\n"); + if (!token) return SCPE_2FARG; + low = strtol(token,0,16); + token = strtok(NULL,"- \t\n"); + if (!token) return SCPE_2FARG; + high = strtol(token,0,16); + + base = low - (low % 16); + top = (high + 15) - ((high+15) % 16); + for (; base high) printf(" "); + else { + i = base %16; + if (ReadPB(base,byte+i) != SCPE_OK) printf("?? "); + else printf("%02x ",byte[i] & 0xff); + } + } + if (!first && ascii) putascii(byte); + putchar('\n'); + return SCPE_OK; } char* m68k_getsym(t_addr val,const char* fmt, char* outbuf) { - SYMHASH *v; - if (symtrace && sym_lookupval(val,&v)) - return v->name; - else { - sprintf(outbuf,fmt,val); - return outbuf; - } + SYMHASH *v; + if (symtrace && sym_lookupval(val,&v)) + return v->name; + else { + sprintf(outbuf,fmt,val); + return outbuf; + } } diff --git a/SAGE/m68k_sys.c b/SAGE/m68k_sys.c index a2d9ca5f..70fc5cee 100644 --- a/SAGE/m68k_sys.c +++ b/SAGE/m68k_sys.c @@ -24,11 +24,11 @@ in this Software without prior written authorization from Holger Veit et al. 04-Oct-09 HV Initial version - 15-Mar-10 HV fix 2nd arg bug in disassembling btst - 24-Apr-10 HV fix _fsymea for jsr.l - 27-Apr-10 HV fix stop instr - 27-Jun-10 HV improve error handling in Motorola S0 reader - 20-Jul-10 HV fix disassemble error for LINK + 15-Mar-10 HV fix 2nd arg bug in disassembling btst + 24-Apr-10 HV fix _fsymea for jsr.l + 27-Apr-10 HV fix stop instr + 27-Jun-10 HV improve error handling in Motorola S0 reader + 20-Jul-10 HV fix disassemble error for LINK */ #include "m68k_cpu.h" @@ -43,15 +43,15 @@ t_stat set_iobase(UNIT *uptr, int32 val, char *cptr, void *desc) { - DEVICE* dptr; - PNP_INFO* pnp; - t_stat rc; - uint16 newbase; + DEVICE* dptr; + PNP_INFO* pnp; + t_stat rc; + uint16 newbase; - if (!cptr) return SCPE_ARG; - if (!uptr) return SCPE_IERR; - if (!(dptr = find_dev_from_unit(uptr))) return SCPE_IERR; - if (!(pnp = (PNP_INFO*)dptr->ctxt)) return SCPE_IERR; + if (!cptr) return SCPE_ARG; + if (!uptr) return SCPE_IERR; + if (!(dptr = find_dev_from_unit(uptr))) return SCPE_IERR; + if (!(pnp = (PNP_INFO*)dptr->ctxt)) return SCPE_IERR; newbase = get_uint (cptr, 16, 0xFF, &rc); if (rc != SCPE_OK) return rc; @@ -71,209 +71,209 @@ t_stat set_iobase(UNIT *uptr, int32 val, char *cptr, void *desc) t_stat show_iobase(FILE *st, UNIT *uptr, int32 val, void *desc) { - DEVICE *dptr; - PNP_INFO *pnp; + DEVICE *dptr; + PNP_INFO *pnp; - if (!uptr) return SCPE_IERR; - if (!(dptr = find_dev_from_unit(uptr))) return SCPE_IERR; - if (!(pnp = (PNP_INFO *) dptr->ctxt)) return SCPE_IERR; + if (!uptr) return SCPE_IERR; + if (!(dptr = find_dev_from_unit(uptr))) return SCPE_IERR; + if (!(pnp = (PNP_INFO *) dptr->ctxt)) return SCPE_IERR; fprintf(st, "I/O=0x%02X-0x%02X", pnp->io_base, pnp->io_base + pnp->io_size - pnp->io_incr); - return SCPE_OK; + return SCPE_OK; } t_stat m68k_set_cpu(UNIT *uptr, int32 value, char *cptr, void *desc) { - if (value < 0 || value > CPU_TYPE_68030) - return SCPE_ARG; - - cputype = (value & UNIT_CPUTYPE_MASK) >> UNIT_CPU_V_TYPE; - uptr->flags &= ~UNIT_CPUTYPE_MASK; - uptr->flags |= value; - return SCPE_OK; + if (value < 0 || value > CPU_TYPE_68030) + return SCPE_ARG; + + cputype = (value & UNIT_CPUTYPE_MASK) >> UNIT_CPU_V_TYPE; + uptr->flags &= ~UNIT_CPUTYPE_MASK; + uptr->flags |= value; + return SCPE_OK; } t_stat m68k_show_cpu(FILE* st,UNIT *uptr, int32 value, void *desc) { - fprintf(st,"TYPE=%s",(char*)desc); - return SCPE_OK; + fprintf(st,"TYPE=%s",(char*)desc); + return SCPE_OK; } t_stat m68k_alloc_mem() { - if (M == NULL) - M = (uint8*)calloc(MEMORYSIZE, 1); - else - M = (uint8*)realloc(M, MEMORYSIZE); - return M == NULL ? SCPE_MEM : SCPE_OK; + if (M == NULL) + M = (uint8*)calloc(MEMORYSIZE, 1); + else + M = (uint8*)realloc(M, MEMORYSIZE); + return M == NULL ? SCPE_MEM : SCPE_OK; } t_stat m68k_set_size(UNIT *uptr, int32 value, char *cptr, void *desc) { - t_stat rc; - uptr->capac = value; - if ((rc=m68k_alloc_mem()) != SCPE_OK) return rc; - return SCPE_OK; + t_stat rc; + uptr->capac = value; + if ((rc=m68k_alloc_mem()) != SCPE_OK) return rc; + return SCPE_OK; } t_stat m68k_set_fpu(UNIT *uptr, int32 value, char *cptr, void *desc) { - uptr->flags |= value; - return SCPE_OK; + uptr->flags |= value; + return SCPE_OK; } t_stat m68k_set_nofpu(UNIT *uptr, int32 value, char *cptr, void *desc) { - uptr->flags |= value; - return SCPE_OK; + uptr->flags |= value; + return SCPE_OK; } t_stat m68kcpu_set_flag(UNIT *uptr, int32 value, char *cptr, void *desc) { - uptr->flags |= value; - return SCPE_OK; + uptr->flags |= value; + return SCPE_OK; } t_stat m68kcpu_set_noflag(UNIT *uptr, int32 value, char *cptr, void *desc) { - uptr->flags &= ~value; - return SCPE_OK; + uptr->flags &= ~value; + return SCPE_OK; } t_stat m68kcpu_ex(t_value* eval_array, t_addr addr, UNIT* uptr, int32 sw) { - uint32 val = 0; - t_stat rc = (sw & SWMASK('V')) ? ReadVW(addr,&val) : ReadPW(addr,&val); - if (rc==SCPE_OK) *eval_array = val; - return rc; + uint32 val = 0; + t_stat rc = (sw & SWMASK('V')) ? ReadVW(addr,&val) : ReadPW(addr,&val); + if (rc==SCPE_OK) *eval_array = val; + return rc; } t_stat m68kcpu_dep(t_value value, t_addr addr, UNIT* uptr, int32 sw) { - return (sw & SWMASK('V')) ? WriteVW(addr,value) : WritePW(addr,value); + return (sw & SWMASK('V')) ? WriteVW(addr,value) : WritePW(addr,value); } static int getHex(FILE* fptr,int* chksum) { - char buf[3]; - int c; - if ((c = fgetc(fptr))==EOF) return EOF; - buf[0] = c; - if ((c = fgetc(fptr))==EOF) return EOF; - buf[1] = c; - buf[2] = 0; - return strtol(buf,0,16); + char buf[3]; + int c; + if ((c = fgetc(fptr))==EOF) return EOF; + buf[0] = c; + if ((c = fgetc(fptr))==EOF) return EOF; + buf[1] = c; + buf[2] = 0; + return strtol(buf,0,16); } /* Motorola S-Record reader * Format: - * type 2 Bytes (S0, S1, S2, S3, S5, S7, S8, S9) - * reclength 2 Bytes - * address 4,6,8 Bytes + * type 2 Bytes (S0, S1, S2, S3, S5, S7, S8, S9) + * reclength 2 Bytes + * address 4,6,8 Bytes * data 0...2n * checksum 2 Bytes (lsb of 1'comp of fields reclength-data */ static t_stat m68k_sread(FILE* fptr) { - int typ; - t_addr addr=0, a; - int d, len, chksum, i; - int end = FALSE; - int line = 0; - - fseek(fptr,0l,SEEK_SET); - for(;;) { - while ((i = fgetc(fptr)) == '\r' || i == '\n'); - line++; - if (end && i == EOF) return SCPE_OK; - if (i != 'S') { printf("Line %d: expected S but did not find one (found %x)\n",line,i); return SCPE_FMT; } + int typ; + t_addr addr=0, a; + int d, len, chksum, i; + int end = FALSE; + int line = 0; + + fseek(fptr,0l,SEEK_SET); + for(;;) { + while ((i = fgetc(fptr)) == '\r' || i == '\n'); + line++; + if (end && i == EOF) return SCPE_OK; + if (i != 'S') { printf("Line %d: expected S but did not find one (found %x)\n",line,i); return SCPE_FMT; } - typ = fgetc(fptr); - chksum = 0; - len = getHex(fptr,&chksum); - addr = getHex(fptr,&chksum); - a = getHex(fptr,&chksum); - if (len==EOF || addr==EOF || a==EOF) { typ = 'X'; goto error; } - addr = (addr << 8) | a; - i = 3; - - switch (typ) { - case '0': - for (i=2; i>12) & 7) + '0'; - char wl = (rest[0] & 0x800) ? 'l' : 'w'; - - switch (eamod) { - case 000: fprintf(of,"d%c",eareg); return 0; - case 010: fprintf(of,"a%c",eareg); return 0; - case 020: fprintf(of,"(a%c)",eareg); return 0; - case 030: fprintf(of,"(a%c)+",eareg); return 0; - case 040: fprintf(of,"-(a%c)",eareg); return 0; - case 050: fprintf(of,"($%x,a%c)",offw,eareg); return -2; - case 060: - if (offb) - fprintf(of,"($%x,a%c,%c%c.%c)",offb,eareg,da,xreg,wl); - else - fprintf(of,"(a%c,%c%c.%c)",eareg,da,xreg,wl); - return -2; - case 070: - switch (eareg) { - case '0': fprintf(of,"($%x).w",(uint32)((uint16)offw)); return -2; - case '1': - if (offw) - fprintf(of,"($%x%04x).l",offw,offw2); - else - fprintf(of,"($%x).l",offw2); - return -4; - case '2': //fprintf(of,"($%x,pc)",offw); - if (offw & 0x8000) offw |= 0xffff0000; - fprintf(of,"$%x",addr+offw+2); - return -2; - case '3': - if (offb) - fprintf(of,"($%x,pc,%c%c.%c)",offb,da,xreg,wl); - else - fprintf(of,"(pc,%c%c.%c)",da,xreg,wl); - return -2; - case '4': - switch(oplen) { - case 0: fprintf(of,"#$%x",offb); return -2; - case 1: fprintf(of,"#$%x",offw); return -2; - case 2: - if (offw) - fprintf(of,"#$%x%04x",offw,offw2); - else - fprintf(of,"#$%x",offw2); - return -4; - case 3: fprintf(of,"ccr"); return 0; - case 4: fprintf(of,"sr"); return 0; - default: return SCPE_ARG; - } - default: return SCPE_ARG; - } - default: return SCPE_ARG; - } + int eamod = EAMOD_FIELD(ea); + char eareg = REG0_CHAR(ea); + t_value offb = DATA_B(rest[0]); + t_value offw = DATA_W(rest[0]); + t_value offw2 = DATA_W(rest[1]); + char da = (rest[0] & 0x8000)? 'a' : 'd'; + char xreg = ((rest[0]>>12) & 7) + '0'; + char wl = (rest[0] & 0x800) ? 'l' : 'w'; + + switch (eamod) { + case 000: fprintf(of,"d%c",eareg); return 0; + case 010: fprintf(of,"a%c",eareg); return 0; + case 020: fprintf(of,"(a%c)",eareg); return 0; + case 030: fprintf(of,"(a%c)+",eareg); return 0; + case 040: fprintf(of,"-(a%c)",eareg); return 0; + case 050: fprintf(of,"($%x,a%c)",offw,eareg); return -2; + case 060: + if (offb) + fprintf(of,"($%x,a%c,%c%c.%c)",offb,eareg,da,xreg,wl); + else + fprintf(of,"(a%c,%c%c.%c)",eareg,da,xreg,wl); + return -2; + case 070: + switch (eareg) { + case '0': fprintf(of,"($%x).w",(uint32)((uint16)offw)); return -2; + case '1': + if (offw) + fprintf(of,"($%x%04x).l",offw,offw2); + else + fprintf(of,"($%x).l",offw2); + return -4; + case '2': //fprintf(of,"($%x,pc)",offw); + if (offw & 0x8000) offw |= 0xffff0000; + fprintf(of,"$%x",addr+offw+2); + return -2; + case '3': + if (offb) + fprintf(of,"($%x,pc,%c%c.%c)",offb,da,xreg,wl); + else + fprintf(of,"(pc,%c%c.%c)",da,xreg,wl); + return -2; + case '4': + switch(oplen) { + case 0: fprintf(of,"#$%x",offb); return -2; + case 1: fprintf(of,"#$%x",offw); return -2; + case 2: + if (offw) + fprintf(of,"#$%x%04x",offw,offw2); + else + fprintf(of,"#$%x",offw2); + return -4; + case 3: fprintf(of,"ccr"); return 0; + case 4: fprintf(of,"sr"); return 0; + default: return SCPE_ARG; + } + default: return SCPE_ARG; + } + default: return SCPE_ARG; + } } static t_stat _fsymead(FILE* of,int dir,char reg9,t_addr addr,int ea,int oplen,t_value* rest) { - int rc; - if (dir) { - fprintf(of,"d%c,",reg9); rc = _fsymea(of,addr,ea,oplen,rest); - } else { - rc = _fsymea(of,addr,ea,oplen,rest); ONERR_QUIT(); fprintf(of,",d%c",reg9); - } - return rc-1; + int rc; + if (dir) { + fprintf(of,"d%c,",reg9); rc = _fsymea(of,addr,ea,oplen,rest); + } else { + rc = _fsymea(of,addr,ea,oplen,rest); ONERR_QUIT(); fprintf(of,",d%c",reg9); + } + return rc-1; } static t_stat _fsymimm(FILE* of,int oplen,t_value* rest) { - t_value offb = rest[0] & 0xff; - t_value offw = rest[0] & 0xffff; - t_value offw2 = rest[1] & 0xffff; - switch(oplen) { - case 0: fprintf(of,"#$%x",offb); return 1; - case 1: fprintf(of,"#$%x",offw); return 1; - case 2: fprintf(of,"#$%x%04x",offw,offw2); return 2; - default: return SCPE_ARG; - } + t_value offb = rest[0] & 0xff; + t_value offw = rest[0] & 0xffff; + t_value offw2 = rest[1] & 0xffff; + switch(oplen) { + case 0: fprintf(of,"#$%x",offb); return 1; + case 1: fprintf(of,"#$%x",offw); return 1; + case 2: fprintf(of,"#$%x%04x",offw,offw2); return 2; + default: return SCPE_ARG; + } } static t_stat _fsym0(FILE* of,t_value inst,t_addr addr,t_value* rest) { - int rc; - int oplen = OPLEN_FIELD(inst); - char bwl = BWL_CHAR(oplen); - char reg9 = REG9_CHAR(inst); - char reg0 = REG0_CHAR(inst); - int bitnum= DATA_B(rest[0]); - int ea = EA_FIELD(inst); - int eamod = EAMOD_FIELD(inst); - char* s = 0; + int rc; + int oplen = OPLEN_FIELD(inst); + char bwl = BWL_CHAR(oplen); + char reg9 = REG9_CHAR(inst); + char reg0 = REG0_CHAR(inst); + int bitnum= DATA_B(rest[0]); + int ea = EA_FIELD(inst); + int eamod = EAMOD_FIELD(inst); + char* s = 0; - switch (inst & 000700) { - case 000400: - if (eamod==010) { - fprintf(of,"movep.w $%x(a%c),d%c",rest[0],reg0,reg9); return -3; - } else s = "btst"; - break; - case 000500: - if (eamod==010) { - fprintf(of,"movep.l $%x(a%c),d%c",rest[0],reg0,reg9); return -3; - } else s = "bchg"; - break; - case 000600: - if (eamod==010) { - fprintf(of,"movep.w d%c,$%x(a%c)",reg9,rest[0],reg0); return -3; - } else s = "bclr"; - break; - case 000700: - if (eamod==010) { - fprintf(of,"movep.l d%c,$%x(a%c)",reg9,rest[0],reg0); return -3; - } else s = "bset"; - break; - } - if (s) { - fprintf(of,"%s d%c,",s,reg9); rc = _fsymea(of,addr,ea,3,rest); ONERR_QUIT(); return rc-1; - } - - switch (inst & 007000) { - case 000000: - s = "ori"; break; - case 001000: - s = "andi"; break; - case 002000: - s = "subi"; break; - case 003000: - s = "addi"; break; - case 004000: - switch (inst & 000700) { - case 000000: - s = "btst"; break; - case 000100: - s = "bchg"; break; - case 000200: - s = "bclr"; break; - case 000300: - s = "bset"; break; - default: - return SCPE_ARG; - } - fprintf(of,"%s #%x,",s,bitnum); rc = _fsymea(of,addr,ea,0,rest+1); ONERR_QUIT(); return rc-3; - case 005000: - s = "eori"; break; - case 006000: - s = "cmpi"; break; - default: - return SCPE_ARG; - } - - fprintf(of,"%s.%c ",s,bwl); rc = _fsymimm(of,oplen,rest); ONERR_QUIT(); - fputc(',',of); rc = _fsymea(of,addr,ea,oplen+3,rest+rc); - return rc - 3 - ((oplen==2) ? 2 : 0); + switch (inst & 000700) { + case 000400: + if (eamod==010) { + fprintf(of,"movep.w $%x(a%c),d%c",rest[0],reg0,reg9); return -3; + } else s = "btst"; + break; + case 000500: + if (eamod==010) { + fprintf(of,"movep.l $%x(a%c),d%c",rest[0],reg0,reg9); return -3; + } else s = "bchg"; + break; + case 000600: + if (eamod==010) { + fprintf(of,"movep.w d%c,$%x(a%c)",reg9,rest[0],reg0); return -3; + } else s = "bclr"; + break; + case 000700: + if (eamod==010) { + fprintf(of,"movep.l d%c,$%x(a%c)",reg9,rest[0],reg0); return -3; + } else s = "bset"; + break; + } + if (s) { + fprintf(of,"%s d%c,",s,reg9); rc = _fsymea(of,addr,ea,3,rest); ONERR_QUIT(); return rc-1; + } + + switch (inst & 007000) { + case 000000: + s = "ori"; break; + case 001000: + s = "andi"; break; + case 002000: + s = "subi"; break; + case 003000: + s = "addi"; break; + case 004000: + switch (inst & 000700) { + case 000000: + s = "btst"; break; + case 000100: + s = "bchg"; break; + case 000200: + s = "bclr"; break; + case 000300: + s = "bset"; break; + default: + return SCPE_ARG; + } + fprintf(of,"%s #%x,",s,bitnum); rc = _fsymea(of,addr,ea,0,rest+1); ONERR_QUIT(); return rc-3; + case 005000: + s = "eori"; break; + case 006000: + s = "cmpi"; break; + default: + return SCPE_ARG; + } + + fprintf(of,"%s.%c ",s,bwl); rc = _fsymimm(of,oplen,rest); ONERR_QUIT(); + fputc(',',of); rc = _fsymea(of,addr,ea,oplen+3,rest+rc); + return rc - 3 - ((oplen==2) ? 2 : 0); } static t_stat _fsym123(FILE* of,t_value inst,t_addr addr,t_value* rest,char w,int oplen) { - int rc, rc2; - int eas = inst & 077; - int eat = ((inst>>9)&7)|((inst&0700)>>3); - char *s = ((eat&070)==010) ? "movea" : "move"; - fprintf(of,"%s.%c ",s,w); - rc = _fsymea(of,addr,eas,oplen,rest); ONERR_QUIT(); rc2 = rc; - fputc(',',of); - rc = _fsymea(of,addr,eat,oplen,rest-rc2/2); ONERR_QUIT(); - return rc2 + rc -1; + int rc, rc2; + int eas = inst & 077; + int eat = ((inst>>9)&7)|((inst&0700)>>3); + char *s = ((eat&070)==010) ? "movea" : "move"; + fprintf(of,"%s.%c ",s,w); + rc = _fsymea(of,addr,eas,oplen,rest); ONERR_QUIT(); rc2 = rc; + fputc(',',of); + rc = _fsymea(of,addr,eat,oplen,rest-rc2/2); ONERR_QUIT(); + return rc2 + rc -1; } static char* moveregs[] = { - "d0","d1","d2","d3","d4","d5","d6","d7","a0","a1","a2","a3","a4","a5","a6","a7" + "d0","d1","d2","d3","d4","d5","d6","d7","a0","a1","a2","a3","a4","a5","a6","a7" }; static char* moveregsp[] = { - "a7","a6","a5","a4","a3","a2","a1","a0","d7","d6","d5","d4","d3","d2","d1","d0" + "a7","a6","a5","a4","a3","a2","a1","a0","d7","d6","d5","d4","d3","d2","d1","d0" }; #define BITEMIT() if (sl) fputc('/',of); sl = 1; \ - if (hi==lo) fprintf(of,"%s",regs[lo]); \ - else if (ispredec) fprintf(of,"%s-%s",regs[hi],regs[lo]); \ - else fprintf(of,"%s-%s",regs[lo],regs[hi]); \ - lo = hi = -1; + if (hi==lo) fprintf(of,"%s",regs[lo]); \ + else if (ispredec) fprintf(of,"%s-%s",regs[hi],regs[lo]); \ + else fprintf(of,"%s-%s",regs[lo],regs[hi]); \ + lo = hi = -1; #define BITSEQ() bit = regset & 1; regset >>= 1; \ - if (bit && lo == -1) lo = i; \ - if (bit == 0 && lo != -1) { hi = i-1; BITEMIT(); } + if (bit && lo == -1) lo = i; \ + if (bit == 0 && lo != -1) { hi = i-1; BITEMIT(); } static void _fsymregs(FILE* of, int regset,int ispredec) { - int lo, hi, bit, sl, i; - char** regs = ispredec ? moveregsp : moveregs; + int lo, hi, bit, sl, i; + char** regs = ispredec ? moveregsp : moveregs; //printf("regset=%x\n",regset); - sl = 0; - bit = lo = hi = -1; - for (i=0; i<8; i++) { BITSEQ(); } - if (lo != -1) { hi = 7; BITEMIT(); } - bit = -1; - for (i=8; i<16; i++) { BITSEQ(); } - if (lo != -1) { hi = 15; BITEMIT(); } + sl = 0; + bit = lo = hi = -1; + for (i=0; i<8; i++) { BITSEQ(); } + if (lo != -1) { hi = 7; BITEMIT(); } + bit = -1; + for (i=8; i<16; i++) { BITSEQ(); } + if (lo != -1) { hi = 15; BITEMIT(); } } static t_stat _fsym4(FILE* of,t_value inst,t_addr addr,t_value* rest) { - t_stat rc; - char reg9 = REG9_CHAR(inst); - int ea = EA_FIELD(inst); - int eamod = EAMOD_FIELD(inst); - char reg0 = REG0_CHAR(inst); - int oplen = OPLEN_FIELD(inst); - char* s; - - switch (inst & 000700) { - case 000600: - fprintf(of,"chk "); rc = _fsymea(of,addr,ea,1,rest); ONERR_QUIT(); - fprintf(of,",d%c",reg9); return rc-1; - case 000700: - fprintf(of,"lea "); rc = _fsymea(of,addr,ea,2,rest); ONERR_QUIT(); - fprintf(of,",a%c",reg9); return rc-1; - case 000000: - switch (inst & 007000) { - case 000000: - s = "negx.b "; break; - case 001000: - s = "clr.b "; break; - case 002000: - s = "neg.b "; break; - case 003000: - s = "not.b "; break; - case 004000: - s = "nbcd "; break; - case 005000: - s = "tst.b "; break; - default: - return SCPE_ARG; - } - fputs(s,of); rc = _fsymea(of,addr,ea,0,rest); ONERR_QUIT(); return rc-1; - case 000100: - switch (inst & 007000) { - case 007000: - switch (inst & 000070) { - case 000000: - case 000010: - fprintf(of,"trap #$%x",inst & 0xf); return -1; - case 000020: - fprintf(of,"link a%c,#$%x",reg0,rest[0]); return -3; - case 000030: - fprintf(of,"unlk a%c",reg0); return -1; - case 000040: - fprintf(of,"move a%c,usp",reg0); return -1; - case 000050: - fprintf(of,"move usp,a%c",reg0); return -1; - case 000060: - switch (inst & 000007) { - case 000000: - s = "reset"; break; - case 000001: - s = "nop"; break; - case 000002: - fprintf(of,"stop #%x",DATA_W(rest[0])); return -3; - case 000003: - s = "rte"; break; - case 000005: - s = "rts"; break; - case 000006: - s = "trapv"; break; - case 000007: - s = "rtr"; break; - default: - return SCPE_ARG; - } - fputs(s,of); return -1; - default: - return SCPE_ARG; - } - case 000000: - s = "negx.w "; break; - case 001000: - s = "clr.w "; break; - case 002000: - s = "neg.w "; break; - case 003000: - s = "not.w "; break; - case 005000: - s = "tst.w "; break; - case 004000: - if (eamod==0) { - fprintf(of,"swap d%c",reg0); return -1; - } else { - fputs("pea ",of); rc = _fsymea(of,addr,ea,2,rest); ONERR_QUIT(); return rc-1; - } - default: - return SCPE_ARG; - } - fputs(s,of); rc = _fsymea(of,addr,ea,1,rest); ONERR_QUIT(); return rc-1; - - case 000200: - switch (inst & 007000) { - case 000000: - s = "negx.l "; break; - case 001000: - s = "clr.l "; break; - case 002000: - s = "neg.l "; break; - case 003000: - s = "not.l "; break; - case 004000: - if (eamod==0) { - fprintf(of,"ext.w d%c",reg0); return -1; - } else { - fprintf(of,"movem.w "); _fsymregs(of,rest[0],eamod==040); - fputc(',',of); rc = _fsymea(of,addr,ea,oplen==2?1:2,rest+1); return rc-3; - } - case 005000: - s = "tst.l "; break; - case 006000: - fprintf(of,"movem.w "); rc = _fsymea(of,addr,ea,oplen==2?1:2,rest+1); - fputc(',',of); _fsymregs(of,rest[0],0); return rc-3; - case 007000: - s = "jsr "; break; - default: - return SCPE_ARG; - } - fputs(s,of); rc = _fsymea(of,addr,ea,2,rest); ONERR_QUIT(); return rc-1; + t_stat rc; + char reg9 = REG9_CHAR(inst); + int ea = EA_FIELD(inst); + int eamod = EAMOD_FIELD(inst); + char reg0 = REG0_CHAR(inst); + int oplen = OPLEN_FIELD(inst); + char* s; + + switch (inst & 000700) { + case 000600: + fprintf(of,"chk "); rc = _fsymea(of,addr,ea,1,rest); ONERR_QUIT(); + fprintf(of,",d%c",reg9); return rc-1; + case 000700: + fprintf(of,"lea "); rc = _fsymea(of,addr,ea,2,rest); ONERR_QUIT(); + fprintf(of,",a%c",reg9); return rc-1; + case 000000: + switch (inst & 007000) { + case 000000: + s = "negx.b "; break; + case 001000: + s = "clr.b "; break; + case 002000: + s = "neg.b "; break; + case 003000: + s = "not.b "; break; + case 004000: + s = "nbcd "; break; + case 005000: + s = "tst.b "; break; + default: + return SCPE_ARG; + } + fputs(s,of); rc = _fsymea(of,addr,ea,0,rest); ONERR_QUIT(); return rc-1; + case 000100: + switch (inst & 007000) { + case 007000: + switch (inst & 000070) { + case 000000: + case 000010: + fprintf(of,"trap #$%x",inst & 0xf); return -1; + case 000020: + fprintf(of,"link a%c,#$%x",reg0,rest[0]); return -3; + case 000030: + fprintf(of,"unlk a%c",reg0); return -1; + case 000040: + fprintf(of,"move a%c,usp",reg0); return -1; + case 000050: + fprintf(of,"move usp,a%c",reg0); return -1; + case 000060: + switch (inst & 000007) { + case 000000: + s = "reset"; break; + case 000001: + s = "nop"; break; + case 000002: + fprintf(of,"stop #%x",DATA_W(rest[0])); return -3; + case 000003: + s = "rte"; break; + case 000005: + s = "rts"; break; + case 000006: + s = "trapv"; break; + case 000007: + s = "rtr"; break; + default: + return SCPE_ARG; + } + fputs(s,of); return -1; + default: + return SCPE_ARG; + } + case 000000: + s = "negx.w "; break; + case 001000: + s = "clr.w "; break; + case 002000: + s = "neg.w "; break; + case 003000: + s = "not.w "; break; + case 005000: + s = "tst.w "; break; + case 004000: + if (eamod==0) { + fprintf(of,"swap d%c",reg0); return -1; + } else { + fputs("pea ",of); rc = _fsymea(of,addr,ea,2,rest); ONERR_QUIT(); return rc-1; + } + default: + return SCPE_ARG; + } + fputs(s,of); rc = _fsymea(of,addr,ea,1,rest); ONERR_QUIT(); return rc-1; + + case 000200: + switch (inst & 007000) { + case 000000: + s = "negx.l "; break; + case 001000: + s = "clr.l "; break; + case 002000: + s = "neg.l "; break; + case 003000: + s = "not.l "; break; + case 004000: + if (eamod==0) { + fprintf(of,"ext.w d%c",reg0); return -1; + } else { + fprintf(of,"movem.w "); _fsymregs(of,rest[0],eamod==040); + fputc(',',of); rc = _fsymea(of,addr,ea,oplen==2?1:2,rest+1); return rc-3; + } + case 005000: + s = "tst.l "; break; + case 006000: + fprintf(of,"movem.w "); rc = _fsymea(of,addr,ea,oplen==2?1:2,rest+1); + fputc(',',of); _fsymregs(of,rest[0],0); return rc-3; + case 007000: + s = "jsr "; break; + default: + return SCPE_ARG; + } + fputs(s,of); rc = _fsymea(of,addr,ea,2,rest); ONERR_QUIT(); return rc-1; - case 000300: - switch (inst & 007000) { - case 000000: - fprintf(of,"move sr,"); rc = _fsymea(of,addr,ea,1,rest); ONERR_QUIT(); return rc-1; - case 003000: - fprintf(of,"move "); rc = _fsymea(of,addr,ea,1,rest); ONERR_QUIT(); fputs(",sr",of); return rc-1; - case 002000: - fprintf(of,"move "); rc = _fsymea(of,addr,ea,1,rest); ONERR_QUIT(); fputs(",ccr",of); return rc-1; - case 004000: - if (eamod==0) { - fprintf(of,"ext.l d%c",reg0); return -1; - } else { - fprintf(of,"movem.l "); _fsymregs(of,rest[0],eamod==040); - fputc(',',of); rc = _fsymea(of,addr,ea,oplen==2?1:2,rest+1); return rc-3; - } - case 005000: - switch (inst & 000077) { - case 000074: - fputs("illegal",of); return -1; - default: - fprintf(of,"tas "); rc = _fsymea(of,addr,ea,0,rest); return rc-1; - } - case 006000: - fprintf(of,"movem.l "); rc = _fsymea(of,addr,ea,oplen==2?1:2,rest+1); - fputc(',',of); _fsymregs(of,rest[0],0); return rc-3; - case 007000: - fputs("jmp ",of); rc = _fsymea(of,addr,ea,2,rest); ONERR_QUIT(); return rc-1; - default: - return SCPE_ARG; - } - default: - return SCPE_ARG; - } + case 000300: + switch (inst & 007000) { + case 000000: + fprintf(of,"move sr,"); rc = _fsymea(of,addr,ea,1,rest); ONERR_QUIT(); return rc-1; + case 003000: + fprintf(of,"move "); rc = _fsymea(of,addr,ea,1,rest); ONERR_QUIT(); fputs(",sr",of); return rc-1; + case 002000: + fprintf(of,"move "); rc = _fsymea(of,addr,ea,1,rest); ONERR_QUIT(); fputs(",ccr",of); return rc-1; + case 004000: + if (eamod==0) { + fprintf(of,"ext.l d%c",reg0); return -1; + } else { + fprintf(of,"movem.l "); _fsymregs(of,rest[0],eamod==040); + fputc(',',of); rc = _fsymea(of,addr,ea,oplen==2?1:2,rest+1); return rc-3; + } + case 005000: + switch (inst & 000077) { + case 000074: + fputs("illegal",of); return -1; + default: + fprintf(of,"tas "); rc = _fsymea(of,addr,ea,0,rest); return rc-1; + } + case 006000: + fprintf(of,"movem.l "); rc = _fsymea(of,addr,ea,oplen==2?1:2,rest+1); + fputc(',',of); _fsymregs(of,rest[0],0); return rc-3; + case 007000: + fputs("jmp ",of); rc = _fsymea(of,addr,ea,2,rest); ONERR_QUIT(); return rc-1; + default: + return SCPE_ARG; + } + default: + return SCPE_ARG; + } } static char* conds[] = { "ra","sr","hi","ls","cc","cs","ne","eq","vc","vs","pl","mi","ge","lt","gt","le" }; @@ -674,331 +674,331 @@ static char* conds2[] = { "t", "f","hi","ls","cc","cs","ne","eq","vc","vs","pl", static t_stat _fsym5(FILE* of,t_value inst,t_addr addr,t_value* rest) { - t_stat rc; - int ea = EA_FIELD(inst); - int eamod = EAMOD_FIELD(inst); - int reg0 = REG0_CHAR(inst); - int oplen = OPLEN_FIELD(inst); - char bwl = BWL_CHAR(oplen); - t_addr a; + t_stat rc; + int ea = EA_FIELD(inst); + int eamod = EAMOD_FIELD(inst); + int reg0 = REG0_CHAR(inst); + int oplen = OPLEN_FIELD(inst); + char bwl = BWL_CHAR(oplen); + t_addr a; - if (oplen==3) { - char* cond = conds2[(inst>>8)&0xf]; - if (eamod==010) { - a = rest[0] & 0xffff; - if (a & 0x8000) a |= 0xffff0000; - //printf("addr=%x a=%x sum=%x\n",addr,a,addr+a+2); - fprintf(of,"db%s d%c,$%x",cond,reg0,addr+a+2); - return -3; - } else { - fprintf(of,"s%s ",cond); rc = _fsymea(of,addr,ea,0,rest); return rc-3; - } - } else { - int data = (inst>>9) & 07; - char *s = (inst & 0x0100) ? "subq" : "addq"; + if (oplen==3) { + char* cond = conds2[(inst>>8)&0xf]; + if (eamod==010) { + a = rest[0] & 0xffff; + if (a & 0x8000) a |= 0xffff0000; + //printf("addr=%x a=%x sum=%x\n",addr,a,addr+a+2); + fprintf(of,"db%s d%c,$%x",cond,reg0,addr+a+2); + return -3; + } else { + fprintf(of,"s%s ",cond); rc = _fsymea(of,addr,ea,0,rest); return rc-3; + } + } else { + int data = (inst>>9) & 07; + char *s = (inst & 0x0100) ? "subq" : "addq"; if (data==0) data = 8; - fprintf(of,"%s.%c #%d,",s,bwl,data); rc = _fsymea(of,addr,ea,oplen,rest); ONERR_QUIT(); return rc-1; - } - + fprintf(of,"%s.%c #%d,",s,bwl,data); rc = _fsymea(of,addr,ea,oplen,rest); ONERR_QUIT(); return rc-1; + } + } static t_stat _fsym6(FILE* of,t_value inst,t_addr addr,t_value* rest) { - char* cond = conds[(inst>>8)&0xf]; - t_addr a = inst & 0xff; - if (a) { - if (a & 0x80) a |= 0xffffff00; - fprintf(of,"b%s.s $%x",cond,addr+a+2); return -1; - } else { - a = rest[0] & 0xffff; - if (a & 0x8000) a |= 0xffff0000; - fprintf(of,"b%s.w $%x",cond,addr+a+2); return -3; - } + char* cond = conds[(inst>>8)&0xf]; + t_addr a = inst & 0xff; + if (a) { + if (a & 0x80) a |= 0xffffff00; + fprintf(of,"b%s.s $%x",cond,addr+a+2); return -1; + } else { + a = rest[0] & 0xffff; + if (a & 0x8000) a |= 0xffff0000; + fprintf(of,"b%s.w $%x",cond,addr+a+2); return -3; + } } static t_stat _fsym7(FILE* of,t_value inst,t_addr addr,t_value* rest) { - int reg9 = REG9_CHAR(inst); - switch (inst & 000400) { - case 000000: - fprintf(of,"moveq #$%x,d%c",(int32)((int8)(inst&0xff)),reg9); return -1; - default: - return SCPE_ARG; - } + int reg9 = REG9_CHAR(inst); + switch (inst & 000400) { + case 000000: + fprintf(of,"moveq #$%x,d%c",(int32)((int8)(inst&0xff)),reg9); return -1; + default: + return SCPE_ARG; + } } static t_stat _fsym8(FILE* of,t_value inst,t_addr addr,t_value* rest) { - t_stat rc; - int oplen = OPLEN_FIELD(inst); - int eamod = EAMOD_FIELD(inst); - int ea = EA_FIELD(inst); - char reg9 = REG9_CHAR(inst); - char reg0 = REG0_CHAR(inst); - char bwl = BWL_CHAR(oplen); + t_stat rc; + int oplen = OPLEN_FIELD(inst); + int eamod = EAMOD_FIELD(inst); + int ea = EA_FIELD(inst); + char reg9 = REG9_CHAR(inst); + char reg0 = REG0_CHAR(inst); + char bwl = BWL_CHAR(oplen); - switch (inst & 000700) { - case 000000: - case 000100: - case 000200: - fprintf(of,"or.%c ",bwl); rc = _fsymea(of,addr,ea,oplen,rest); ONERR_QUIT(); - fprintf(of,",d%c",reg9); return rc-1; - case 000300: - fprintf(of,"divu.w "); rc = _fsymea(of,addr,ea,1,rest); ONERR_QUIT(); - fprintf(of,",d%c",reg9); return rc-1; - case 000400: - switch (eamod) { - case 000: - fprintf(of,"sbcd d%c,d%c",reg0,reg9); return -1; - case 010: - fprintf(of,"sbcd -(a%c),-(a%c)",reg0,reg9); return -1; - default: - fprintf(of,"or.%c d%c,",bwl,reg9); rc = _fsymea(of,addr,ea,oplen,rest); ONERR_QUIT(); - return rc-1; - } - case 000500: - case 000600: - fprintf(of,"or.%c d%c,",bwl,reg9); rc = _fsymea(of,addr,ea,oplen,rest); ONERR_QUIT(); - return rc-1; - case 000700: - fprintf(of,"divs.w "); rc = _fsymea(of,addr,ea,1,rest); ONERR_QUIT(); - fprintf(of,",d%c",reg9); return rc-1; - } - return SCPE_ARG; /* Not reached, but silence agressive compiler warnings */ + switch (inst & 000700) { + case 000000: + case 000100: + case 000200: + fprintf(of,"or.%c ",bwl); rc = _fsymea(of,addr,ea,oplen,rest); ONERR_QUIT(); + fprintf(of,",d%c",reg9); return rc-1; + case 000300: + fprintf(of,"divu.w "); rc = _fsymea(of,addr,ea,1,rest); ONERR_QUIT(); + fprintf(of,",d%c",reg9); return rc-1; + case 000400: + switch (eamod) { + case 000: + fprintf(of,"sbcd d%c,d%c",reg0,reg9); return -1; + case 010: + fprintf(of,"sbcd -(a%c),-(a%c)",reg0,reg9); return -1; + default: + fprintf(of,"or.%c d%c,",bwl,reg9); rc = _fsymea(of,addr,ea,oplen,rest); ONERR_QUIT(); + return rc-1; + } + case 000500: + case 000600: + fprintf(of,"or.%c d%c,",bwl,reg9); rc = _fsymea(of,addr,ea,oplen,rest); ONERR_QUIT(); + return rc-1; + case 000700: + fprintf(of,"divs.w "); rc = _fsymea(of,addr,ea,1,rest); ONERR_QUIT(); + fprintf(of,",d%c",reg9); return rc-1; + } + return SCPE_ARG; /* Not reached, but silence agressive compiler warnings */ } static t_stat _fsym9(FILE* of,t_value inst,t_addr addr,t_value* rest) { - t_stat rc; - int oplen = OPLEN_FIELD(inst); - char reg9 = REG9_CHAR(inst); - char reg0 = REG0_CHAR(inst); - char bwl = BWL_CHAR(oplen); - int ea = EA_FIELD(inst); - int eamod = EAMOD_FIELD(inst); - - switch (inst & 000700) { - case 000000: - case 000100: - case 000200: - fprintf(of,"sub.%c ",bwl); rc = _fsymea(of,addr,ea,oplen,rest); ONERR_QUIT(); - fprintf(of,",d%c",reg9);return rc-1; - case 000300: - fprintf(of,"suba.w "); rc = _fsymea(of,addr,ea,1,rest); ONERR_QUIT(); - fprintf(of,",a%c",reg9);return rc-1; - case 000400: - switch (eamod) { - case 000: - fprintf(of,"subx.%c d%c,d%c",bwl,reg9,reg0); return -1; - case 001: - fprintf(of,"subx.%c d%c,d%c",bwl,reg9,reg0); return -1; - default: - fprintf(of,"sub.%c d%c,",bwl,reg9); rc = _fsymea(of,addr,ea,oplen,rest); ONERR_QUIT(); return rc-1; - } - case 000500: - case 000600: - fprintf(of,"sub.%c d%c,",bwl,reg9); rc = _fsymea(of,addr,ea,oplen,rest); ONERR_QUIT(); return rc-1; - case 000700: - fprintf(of,"suba.l "); rc = _fsymea(of,addr,ea,2,rest); ONERR_QUIT(); - fprintf(of,",a%c",reg9);return rc-1; - default: - return SCPE_ARG; - } + t_stat rc; + int oplen = OPLEN_FIELD(inst); + char reg9 = REG9_CHAR(inst); + char reg0 = REG0_CHAR(inst); + char bwl = BWL_CHAR(oplen); + int ea = EA_FIELD(inst); + int eamod = EAMOD_FIELD(inst); + + switch (inst & 000700) { + case 000000: + case 000100: + case 000200: + fprintf(of,"sub.%c ",bwl); rc = _fsymea(of,addr,ea,oplen,rest); ONERR_QUIT(); + fprintf(of,",d%c",reg9);return rc-1; + case 000300: + fprintf(of,"suba.w "); rc = _fsymea(of,addr,ea,1,rest); ONERR_QUIT(); + fprintf(of,",a%c",reg9);return rc-1; + case 000400: + switch (eamod) { + case 000: + fprintf(of,"subx.%c d%c,d%c",bwl,reg9,reg0); return -1; + case 001: + fprintf(of,"subx.%c d%c,d%c",bwl,reg9,reg0); return -1; + default: + fprintf(of,"sub.%c d%c,",bwl,reg9); rc = _fsymea(of,addr,ea,oplen,rest); ONERR_QUIT(); return rc-1; + } + case 000500: + case 000600: + fprintf(of,"sub.%c d%c,",bwl,reg9); rc = _fsymea(of,addr,ea,oplen,rest); ONERR_QUIT(); return rc-1; + case 000700: + fprintf(of,"suba.l "); rc = _fsymea(of,addr,ea,2,rest); ONERR_QUIT(); + fprintf(of,",a%c",reg9);return rc-1; + default: + return SCPE_ARG; + } } static t_stat _fsyma(FILE* of,t_value inst,t_addr addr,t_value* rest) { - fprintf(of,"trapa #$%x",inst&0xfff); return -1; + fprintf(of,"trapa #$%x",inst&0xfff); return -1; } static t_stat _fsymb(FILE* of,t_value inst,t_addr addr,t_value* rest) { - int rc; - char reg9 = REG9_CHAR(inst); - char reg0 = REG0_CHAR(inst); - int ea = EA_FIELD(inst); - int eamod = EAMOD_FIELD(inst); - int oplen = OPLEN_FIELD(inst); - char bwl = BWL_CHAR(oplen); + int rc; + char reg9 = REG9_CHAR(inst); + char reg0 = REG0_CHAR(inst); + int ea = EA_FIELD(inst); + int eamod = EAMOD_FIELD(inst); + int oplen = OPLEN_FIELD(inst); + char bwl = BWL_CHAR(oplen); - switch (inst & 000700) { - case 000000: - case 000100: - case 000200: - fprintf(of,"cmp.%c ",bwl); rc = _fsymea(of,addr,ea,oplen,rest); ONERR_QUIT(); - fprintf(of,",d%c",reg9); return rc-1; - case 000300: - fprintf(of,"cmpa.w "); rc = _fsymea(of,addr,ea,1,rest); ONERR_QUIT(); - fprintf(of,",a%c",reg9); return rc-1; - case 000400: - case 000500: - case 000600: - if (eamod==010) { - fprintf(of,"cmpm.%c (a%c)+,(a%c)+",bwl,reg0,reg9); return -1; - } else { - fprintf(of,"eor.%c d%c,",bwl,reg9); rc = _fsymea(of,addr,ea,oplen,rest); ONERR_QUIT(); - return rc-1; - } - case 000700: - fprintf(of,"cmpa.l "); rc = _fsymea(of,addr,ea,2,rest); ONERR_QUIT(); - fprintf(of,",a%c",reg9); return rc-1; - default: - return SCPE_ARG; - } + switch (inst & 000700) { + case 000000: + case 000100: + case 000200: + fprintf(of,"cmp.%c ",bwl); rc = _fsymea(of,addr,ea,oplen,rest); ONERR_QUIT(); + fprintf(of,",d%c",reg9); return rc-1; + case 000300: + fprintf(of,"cmpa.w "); rc = _fsymea(of,addr,ea,1,rest); ONERR_QUIT(); + fprintf(of,",a%c",reg9); return rc-1; + case 000400: + case 000500: + case 000600: + if (eamod==010) { + fprintf(of,"cmpm.%c (a%c)+,(a%c)+",bwl,reg0,reg9); return -1; + } else { + fprintf(of,"eor.%c d%c,",bwl,reg9); rc = _fsymea(of,addr,ea,oplen,rest); ONERR_QUIT(); + return rc-1; + } + case 000700: + fprintf(of,"cmpa.l "); rc = _fsymea(of,addr,ea,2,rest); ONERR_QUIT(); + fprintf(of,",a%c",reg9); return rc-1; + default: + return SCPE_ARG; + } } static t_stat _fsymc(FILE* of,t_value inst,t_addr addr,t_value* rest) { - char reg9 = REG9_CHAR(inst); - int ea = EA_FIELD(inst); - int reg0 = REG0_CHAR(inst); - int oplen = OPLEN_FIELD(inst); - char bwl = BWL_CHAR(oplen); + char reg9 = REG9_CHAR(inst); + int ea = EA_FIELD(inst); + int reg0 = REG0_CHAR(inst); + int oplen = OPLEN_FIELD(inst); + char bwl = BWL_CHAR(oplen); - switch (inst & 0000770) { - case 0000500: - fprintf(of,"exg d%c,d%c",reg9,reg0); return -1; - case 0000510: - fprintf(of,"exg a%c,a%c",reg9,reg0); return -1; - case 0000610: - fprintf(of,"exg d%c,a%c",reg9,reg0); return -1; - case 0000400: - fprintf(of,"abcd d%c,d%c",reg9,reg0); return -1; - case 0000410: - fprintf(of,"abcd -(a%c),-(a%c)",reg9,reg0); return -1; - default: - break; - } + switch (inst & 0000770) { + case 0000500: + fprintf(of,"exg d%c,d%c",reg9,reg0); return -1; + case 0000510: + fprintf(of,"exg a%c,a%c",reg9,reg0); return -1; + case 0000610: + fprintf(of,"exg d%c,a%c",reg9,reg0); return -1; + case 0000400: + fprintf(of,"abcd d%c,d%c",reg9,reg0); return -1; + case 0000410: + fprintf(of,"abcd -(a%c),-(a%c)",reg9,reg0); return -1; + default: + break; + } - switch (inst & 0000700) { - case 0000400: - fprintf(of,"and.%c ",bwl); return _fsymead(of,1,reg9,addr,ea,oplen,rest); - case 0000000: - case 0000100: - case 0000200: - fprintf(of,"and.%c ",bwl); return _fsymead(of,0,reg9,addr,ea,oplen,rest); - case 0000300: - fprintf(of,"mulu.w "); return _fsymead(of,0,reg9,addr,ea,1,rest); - case 0000700: - fprintf(of,"muls.w "); return _fsymead(of,0,reg9,addr,ea,1,rest); - default: - return SCPE_ARG; - } + switch (inst & 0000700) { + case 0000400: + fprintf(of,"and.%c ",bwl); return _fsymead(of,1,reg9,addr,ea,oplen,rest); + case 0000000: + case 0000100: + case 0000200: + fprintf(of,"and.%c ",bwl); return _fsymead(of,0,reg9,addr,ea,oplen,rest); + case 0000300: + fprintf(of,"mulu.w "); return _fsymead(of,0,reg9,addr,ea,1,rest); + case 0000700: + fprintf(of,"muls.w "); return _fsymead(of,0,reg9,addr,ea,1,rest); + default: + return SCPE_ARG; + } } static t_stat _fsymd(FILE* of,t_value inst,t_addr addr,t_value* rest) { - int rc; - char reg9 = REG9_CHAR(inst); - char reg0 = REG0_CHAR(inst); - int ea = EA_FIELD(inst); - int eamod = EAMOD_FIELD(inst); - int oplen = OPLEN_FIELD(inst); - char bwl = BWL_CHAR(oplen); - - switch (inst & 000700) { - case 000000: - case 000100: - case 000200: - fprintf(of,"add.%c ",bwl); return _fsymead(of,0,reg9,addr,ea,oplen,rest); - case 000300: - fprintf(of,"adda.w "); rc = _fsymea(of,addr,ea,1,rest); ONERR_QUIT(); - fprintf(of,",a%c",reg9); return rc-1; - case 000400: - switch (eamod) { - case 000: - fprintf(of,"addx.%c d%c,d%c",bwl,reg9,reg0); return -1; - case 001: - fprintf(of,"addx.%c d%c,d%c",bwl,reg9,reg0); return -1; - default: - fprintf(of,"add.%c ",bwl); return _fsymead(of,1,reg9,addr,ea,oplen,rest); - } - case 000500: - case 000600: - fprintf(of,"add.%c ",bwl); return _fsymead(of,1,reg9,addr,ea,oplen,rest); - case 000700: - fprintf(of,"adda.l "); rc = _fsymea(of,addr,ea,2,rest); ONERR_QUIT(); - fprintf(of,",a%c",reg9); return rc-1; - } - return SCPE_ARG; /* Not reached, but silence agressive compiler warnings */ + int rc; + char reg9 = REG9_CHAR(inst); + char reg0 = REG0_CHAR(inst); + int ea = EA_FIELD(inst); + int eamod = EAMOD_FIELD(inst); + int oplen = OPLEN_FIELD(inst); + char bwl = BWL_CHAR(oplen); + + switch (inst & 000700) { + case 000000: + case 000100: + case 000200: + fprintf(of,"add.%c ",bwl); return _fsymead(of,0,reg9,addr,ea,oplen,rest); + case 000300: + fprintf(of,"adda.w "); rc = _fsymea(of,addr,ea,1,rest); ONERR_QUIT(); + fprintf(of,",a%c",reg9); return rc-1; + case 000400: + switch (eamod) { + case 000: + fprintf(of,"addx.%c d%c,d%c",bwl,reg9,reg0); return -1; + case 001: + fprintf(of,"addx.%c d%c,d%c",bwl,reg9,reg0); return -1; + default: + fprintf(of,"add.%c ",bwl); return _fsymead(of,1,reg9,addr,ea,oplen,rest); + } + case 000500: + case 000600: + fprintf(of,"add.%c ",bwl); return _fsymead(of,1,reg9,addr,ea,oplen,rest); + case 000700: + fprintf(of,"adda.l "); rc = _fsymea(of,addr,ea,2,rest); ONERR_QUIT(); + fprintf(of,",a%c",reg9); return rc-1; + } + return SCPE_ARG; /* Not reached, but silence agressive compiler warnings */ } static t_stat _fsyme(FILE* of,t_value inst,t_addr addr,t_value* rest) { - int rc; - int oplen = OPLEN_FIELD(inst); - char bwl = BWL_CHAR(oplen); - int op = (oplen==3 ? (inst>>9) : (inst>>3)) & 3; - char dir = (inst&0x100) ? 'l' : 'r'; - int ir = inst & 0x20; - int ea = EA_FIELD(inst); - char reg9 = REG9_CHAR(inst); - char reg0 = REG0_CHAR(inst); - char *s; + int rc; + int oplen = OPLEN_FIELD(inst); + char bwl = BWL_CHAR(oplen); + int op = (oplen==3 ? (inst>>9) : (inst>>3)) & 3; + char dir = (inst&0x100) ? 'l' : 'r'; + int ir = inst & 0x20; + int ea = EA_FIELD(inst); + char reg9 = REG9_CHAR(inst); + char reg0 = REG0_CHAR(inst); + char *s; - switch (op) { - case 0: s = "as"; break; - case 1: s = "ls"; break; - case 2: s = "rox"; break; - case 3: s = "ro"; break; - default: s = "??"; break; - } - fprintf(of,"%s%c",s,dir); - if (oplen<3) { - fprintf(of,".%c ",bwl); - if (ir) - fprintf(of,"d%c,d%c",reg9,reg0); - else { - if (reg9=='0') reg9 = '8'; - fprintf(of,"#%d,d%c",reg9-'0',reg0); - } - return -1; - } else { - fputc(' ',of); - rc = _fsymea(of,addr,ea,1,rest); ONERR_QUIT(); return rc-1; - } + switch (op) { + case 0: s = "as"; break; + case 1: s = "ls"; break; + case 2: s = "rox"; break; + case 3: s = "ro"; break; + default: s = "??"; break; + } + fprintf(of,"%s%c",s,dir); + if (oplen<3) { + fprintf(of,".%c ",bwl); + if (ir) + fprintf(of,"d%c,d%c",reg9,reg0); + else { + if (reg9=='0') reg9 = '8'; + fprintf(of,"#%d,d%c",reg9-'0',reg0); + } + return -1; + } else { + fputc(' ',of); + rc = _fsymea(of,addr,ea,1,rest); ONERR_QUIT(); return rc-1; + } } static t_stat _fsymf(FILE* of,t_value inst,t_addr addr,t_value* rest) { - fprintf(of,"trapf #$%x",inst&0xfff); return -1; + fprintf(of,"trapf #$%x",inst&0xfff); return -1; } t_stat fprint_sym(FILE* of, t_addr addr, t_value* val, UNIT* uptr, int32 sw) { - int32 c1, c2, inst; + int32 c1, c2, inst; - c1 = (val[0] >> 8) & 0177; - c2 = val[0] & 0177; - if (sw & SWMASK ('A')) { - fprintf (of, (c2 < 040)? "<%02x>": "%c", c2); - return SCPE_OK; - } - if (sw & SWMASK ('C')) { - fprintf (of, (c1 < 040)? "<%02x>": "%c", c1); - fprintf (of, (c2 < 040)? "<%02x>": "%c", c2); - return -1; - } - if (!(sw & SWMASK ('M'))) return SCPE_ARG; + c1 = (val[0] >> 8) & 0177; + c2 = val[0] & 0177; + if (sw & SWMASK ('A')) { + fprintf (of, (c2 < 040)? "<%02x>": "%c", c2); + return SCPE_OK; + } + if (sw & SWMASK ('C')) { + fprintf (of, (c1 < 040)? "<%02x>": "%c", c1); + fprintf (of, (c2 < 040)? "<%02x>": "%c", c2); + return -1; + } + if (!(sw & SWMASK ('M'))) return SCPE_ARG; - inst = val[0]; - switch ((inst>>12) & 0xf) { - case 0x0: return _fsym0(of,inst,addr,val+1); - case 0x1: return _fsym123(of,inst,addr,val+1,'b',0); - case 0x2: return _fsym123(of,inst,addr,val+1,'l',2); - case 0x3: return _fsym123(of,inst,addr,val+1,'w',1); - case 0x4: return _fsym4(of,inst,addr,val+1); - case 0x5: return _fsym5(of,inst,addr,val+1); - case 0x6: return _fsym6(of,inst,addr,val+1); - case 0x7: return _fsym7(of,inst,addr,val+1); - case 0x8: return _fsym8(of,inst,addr,val+1); - case 0x9: return _fsym9(of,inst,addr,val+1); - case 0xa: return _fsyma(of,inst,addr,val+1); - case 0xb: return _fsymb(of,inst,addr,val+1); - case 0xc: return _fsymc(of,inst,addr,val+1); - case 0xd: return _fsymd(of,inst,addr,val+1); - case 0xe: return _fsyme(of,inst,addr,val+1); - case 0xf: return _fsymf(of,inst,addr,val+1); - } - return SCPE_OK; + inst = val[0]; + switch ((inst>>12) & 0xf) { + case 0x0: return _fsym0(of,inst,addr,val+1); + case 0x1: return _fsym123(of,inst,addr,val+1,'b',0); + case 0x2: return _fsym123(of,inst,addr,val+1,'l',2); + case 0x3: return _fsym123(of,inst,addr,val+1,'w',1); + case 0x4: return _fsym4(of,inst,addr,val+1); + case 0x5: return _fsym5(of,inst,addr,val+1); + case 0x6: return _fsym6(of,inst,addr,val+1); + case 0x7: return _fsym7(of,inst,addr,val+1); + case 0x8: return _fsym8(of,inst,addr,val+1); + case 0x9: return _fsym9(of,inst,addr,val+1); + case 0xa: return _fsyma(of,inst,addr,val+1); + case 0xb: return _fsymb(of,inst,addr,val+1); + case 0xc: return _fsymc(of,inst,addr,val+1); + case 0xd: return _fsymd(of,inst,addr,val+1); + case 0xe: return _fsyme(of,inst,addr,val+1); + case 0xf: return _fsymf(of,inst,addr,val+1); + } + return SCPE_OK; } diff --git a/SAGE/sage_aux.c b/SAGE/sage_aux.c index c27e21a6..d44b9937 100644 --- a/SAGE/sage_aux.c +++ b/SAGE/sage_aux.c @@ -31,32 +31,32 @@ static t_stat sageaux_reset(DEVICE* dptr); UNIT sageaux_unit[] = { - { UDATA (NULL, UNIT_FIX | UNIT_BINK, 0) }, - { UDATA (NULL, UNIT_FIX | UNIT_BINK, 0) }, - { UDATA (NULL, UNIT_FIX | UNIT_BINK, 0) }, - { UDATA (NULL, UNIT_FIX | UNIT_BINK, 0) } + { UDATA (NULL, UNIT_FIX | UNIT_BINK, 0) }, + { UDATA (NULL, UNIT_FIX | UNIT_BINK, 0) }, + { UDATA (NULL, UNIT_FIX | UNIT_BINK, 0) }, + { UDATA (NULL, UNIT_FIX | UNIT_BINK, 0) } }; REG sageaux_reg[] = { - { NULL } + { NULL } }; static MTAB sageaux_mod[] = { - { 0 } + { 0 } }; DEVICE sageaux_dev = { - "AUX", sageaux_unit, sageaux_reg, sageaux_mod, - 4, 16, 32, 2, 16, 16, - NULL, NULL, &sageaux_reset, - NULL, NULL, NULL, - NULL, DEV_DISABLE|DEV_DIS, 0, - NULL, NULL, NULL + "AUX", sageaux_unit, sageaux_reg, sageaux_mod, + 4, 16, 32, 2, 16, 16, + NULL, NULL, &sageaux_reset, + NULL, NULL, NULL, + NULL, DEV_DISABLE|DEV_DIS, 0, + NULL, NULL, NULL }; static t_stat sageaux_reset(DEVICE* dptr) { - printf("sageaux_reset\n"); - return SCPE_OK; + printf("sageaux_reset\n"); + return SCPE_OK; } diff --git a/SAGE/sage_cons.c b/SAGE/sage_cons.c index decb8e0a..adbc7b0a 100644 --- a/SAGE/sage_cons.c +++ b/SAGE/sage_cons.c @@ -33,13 +33,13 @@ #include "sim_sock.h" #include "sim_tmxr.h" -#define SIOPOLL 0 -#define SIOTERM 1 +#define SIOPOLL 0 +#define SIOTERM 1 -#define SIO_POLL_FIRST 1 /* immediate */ -#define SIO_POLL_RATE 100 /* sample 100 times /sec */ -#define SIO_POLL_WAIT 15800 /* about 10ms */ -#define SIO_OUT_WAIT 200 +#define SIO_POLL_FIRST 1 /* immediate */ +#define SIO_POLL_RATE 100 /* sample 100 times /sec */ +#define SIO_POLL_WAIT 15800 /* about 10ms */ +#define SIO_OUT_WAIT 200 static t_stat sio_reset(DEVICE* dptr); static t_stat sioterm_svc(UNIT*); @@ -51,196 +51,196 @@ static t_stat sio_rxint(I8251* chip); extern DEVICE sagesio_dev; UNIT sio_unit[] = { - { UDATA (&siopoll_svc, UNIT_ATTABLE, 0), SIO_POLL_WAIT }, - { UDATA (&sioterm_svc, UNIT_IDLE, 0), SIO_OUT_WAIT } + { UDATA (&siopoll_svc, UNIT_ATTABLE, 0), SIO_POLL_WAIT }, + { UDATA (&sioterm_svc, UNIT_IDLE, 0), SIO_OUT_WAIT } }; static SERMUX sio_mux = { - SIO_POLL_FIRST, /*pollfirst*/ - SIO_POLL_RATE, /*pollrate*/ - { 0 }, /*ldsc*/ - { 1, 0, 0, 0 }, /*desc*/ - &sio_unit[SIOTERM], /*term_unit*/ - &sio_unit[SIOPOLL] /*poll unit*/ + SIO_POLL_FIRST, /*pollfirst*/ + SIO_POLL_RATE, /*pollrate*/ + { 0 }, /*ldsc*/ + { 1, 0, 0, 0 }, /*desc*/ + &sio_unit[SIOTERM], /*term_unit*/ + &sio_unit[SIOPOLL] /*poll unit*/ }; static I8251 u58 = { - {0,0,U58_ADDR,4,2}, - &sagesio_dev,NULL,NULL,i8251_reset, - &sio_txint,&sio_rxint, - &sio_unit[SIOPOLL],&sio_unit[SIOTERM], - &sio_mux + {0,0,U58_ADDR,4,2}, + &sagesio_dev,NULL,NULL,i8251_reset, + &sio_txint,&sio_rxint, + &sio_unit[SIOPOLL],&sio_unit[SIOTERM], + &sio_mux }; REG sio_reg[] = { - { DRDATA(INIT, u58.init, 3) }, - { HRDATA(MODE, u58.mode, 8) }, - { HRDATA(SYNC1, u58.sync1, 8) }, - { HRDATA(SYNC2, u58.sync2, 8) }, - { HRDATA(CMD, u58.cmd, 8) }, - { HRDATA(IBUF, u58.ibuf, 8) }, - { HRDATA(OBUF, u58.obuf, 8) }, - { HRDATA(STATUS, u58.status, 8) }, - { HRDATA(STATUS, u58.bitmask, 8), REG_HRO }, - { 0 } + { DRDATA(INIT, u58.init, 3) }, + { HRDATA(MODE, u58.mode, 8) }, + { HRDATA(SYNC1, u58.sync1, 8) }, + { HRDATA(SYNC2, u58.sync2, 8) }, + { HRDATA(CMD, u58.cmd, 8) }, + { HRDATA(IBUF, u58.ibuf, 8) }, + { HRDATA(OBUF, u58.obuf, 8) }, + { HRDATA(STATUS, u58.status, 8) }, + { HRDATA(STATUS, u58.bitmask, 8), REG_HRO }, + { 0 } }; static MTAB sio_mod[] = { { MTAB_XTD|MTAB_VDV, 0, "IO", "IO", &set_iobase, &show_iobase, NULL }, - { 0 } + { 0 } }; DEVICE sagesio_dev = { - "SIO", sio_unit, sio_reg, sio_mod, - 2, 16, 32, 2, 16, 16, - NULL, NULL, &sio_reset, - NULL, &sio_attach, &sio_detach, - &u58, DEV_DEBUG, 0, - i8251_dt, NULL, NULL + "SIO", sio_unit, sio_reg, sio_mod, + 2, 16, 32, 2, 16, 16, + NULL, NULL, &sio_reset, + NULL, &sio_attach, &sio_detach, + &u58, DEV_DEBUG, 0, + i8251_dt, NULL, NULL }; static t_stat sioterm_svc(UNIT* uptr) { - DEVICE* dptr = find_dev_from_unit(uptr); - I8251* chip = (I8251*)dptr->ctxt; - SERMUX* mux = chip->mux; - t_stat rc; - int ch = chip->obuf; - - /* suppress NUL bytes after CR LF */ - switch (ch) { - case 0x0d: - chip->crlf = 1; break; - case 0x0a: - chip->crlf = chip->crlf==1 ? 2 : 0; break; - case 0: - if (chip->crlf==2) goto set_stat; - default: - chip->crlf = 0; - } - - /* TODO? sim_tt_outcvt */ - - /* attached to a telnet port? */ - if (mux->poll->flags & UNIT_ATT) { - if ((rc=tmxr_putc_ln(&mux->ldsc, ch & chip->bitmask)) != SCPE_OK) { - sim_activate(uptr, uptr->wait); - return SCPE_OK; - } else - tmxr_poll_tx(&mux->desc); - } else { - /* no, use normal terminal output */ - if ((rc=sim_putchar_s(ch & chip->bitmask)) != SCPE_OK) { - sim_activate(uptr, uptr->wait); - return rc==SCPE_STALL ? SCPE_OK : rc; - } - } + DEVICE* dptr = find_dev_from_unit(uptr); + I8251* chip = (I8251*)dptr->ctxt; + SERMUX* mux = chip->mux; + t_stat rc; + int ch = chip->obuf; + + /* suppress NUL bytes after CR LF */ + switch (ch) { + case 0x0d: + chip->crlf = 1; break; + case 0x0a: + chip->crlf = chip->crlf==1 ? 2 : 0; break; + case 0: + if (chip->crlf==2) goto set_stat; + default: + chip->crlf = 0; + } + + /* TODO? sim_tt_outcvt */ + + /* attached to a telnet port? */ + if (mux->poll->flags & UNIT_ATT) { + if ((rc=tmxr_putc_ln(&mux->ldsc, ch & chip->bitmask)) != SCPE_OK) { + sim_activate(uptr, uptr->wait); + return SCPE_OK; + } else + tmxr_poll_tx(&mux->desc); + } else { + /* no, use normal terminal output */ + if ((rc=sim_putchar_s(ch & chip->bitmask)) != SCPE_OK) { + sim_activate(uptr, uptr->wait); + return rc==SCPE_STALL ? SCPE_OK : rc; + } + } set_stat: - chip->status |= I8251_ST_TXEMPTY; - if (chip->cmd & I8251_CMD_TXEN) { - chip->status |= I8251_ST_TXRDY; - return sio_txint(chip); - } - chip->status &= ~I8251_ST_TXRDY; - return SCPE_OK; + chip->status |= I8251_ST_TXEMPTY; + if (chip->cmd & I8251_CMD_TXEN) { + chip->status |= I8251_ST_TXRDY; + return sio_txint(chip); + } + chip->status &= ~I8251_ST_TXRDY; + return SCPE_OK; } static t_stat siopoll_svc(UNIT* uptr) { - int32 c; - DEVICE* dptr = find_dev_from_unit(uptr); - I8251* chip = (I8251*)dptr->ctxt; - SERMUX* mux = chip->mux; - - sim_activate(uptr, uptr->wait); /* restart it again */ - - /* network attached? */ - if (mux->poll->flags & UNIT_ATT) { - if (tmxr_poll_conn(&mux->desc) >= 0) /* new connection? */ - mux->ldsc.rcve = 1; - tmxr_poll_rx(&mux->desc); - if (!tmxr_rqln(&mux->ldsc)) return SCPE_OK; - /* input ready */ - c = tmxr_getc_ln(&mux->ldsc); - if ((c & TMXR_VALID)==0) return SCPE_OK; - c &= 0xff; /* extract character */ - } else - return SCPE_OK; - - if (!(chip->cmd & I8251_CMD_RXE)) { /* ignore data if receiver not enabled */ - chip->status &= ~I8251_ST_RXRDY; - return SCPE_OK; - } + int32 c; + DEVICE* dptr = find_dev_from_unit(uptr); + I8251* chip = (I8251*)dptr->ctxt; + SERMUX* mux = chip->mux; + + sim_activate(uptr, uptr->wait); /* restart it again */ + + /* network attached? */ + if (mux->poll->flags & UNIT_ATT) { + if (tmxr_poll_conn(&mux->desc) >= 0) /* new connection? */ + mux->ldsc.rcve = 1; + tmxr_poll_rx(&mux->desc); + if (!tmxr_rqln(&mux->ldsc)) return SCPE_OK; + /* input ready */ + c = tmxr_getc_ln(&mux->ldsc); + if ((c & TMXR_VALID)==0) return SCPE_OK; + c &= 0xff; /* extract character */ + } else + return SCPE_OK; + + if (!(chip->cmd & I8251_CMD_RXE)) { /* ignore data if receiver not enabled */ + chip->status &= ~I8251_ST_RXRDY; + return SCPE_OK; + } - /* got char */ - if (c & SCPE_BREAK) { /* a break? */ - c = 0; - chip->status |= I8251_ST_SYNBRK; - } else - chip->status &= ~I8251_ST_SYNBRK; + /* got char */ + if (c & SCPE_BREAK) { /* a break? */ + c = 0; + chip->status |= I8251_ST_SYNBRK; + } else + chip->status &= ~I8251_ST_SYNBRK; - /* TODO? sim_tt_icvt */ - chip->ibuf = c & chip->bitmask; - if (chip->status & I8251_ST_RXRDY) - chip->status |= I8251_ST_OE; - chip->status |= I8251_ST_RXRDY; - return sio_rxint(chip); + /* TODO? sim_tt_icvt */ + chip->ibuf = c & chip->bitmask; + if (chip->status & I8251_ST_RXRDY) + chip->status |= I8251_ST_OE; + chip->status |= I8251_ST_RXRDY; + return sio_rxint(chip); } static t_stat sio_reset(DEVICE* dptr) -{ - t_stat rc; - I8251* chip = (I8251*)dptr->ctxt; - SERMUX* mux = chip->mux; - - if ((rc = (dptr->flags & DEV_DIS) ? - del_iohandler(chip) : - add_iohandler(mux->poll,chip,i8251_io)) != SCPE_OK) return rc; +{ + t_stat rc; + I8251* chip = (I8251*)dptr->ctxt; + SERMUX* mux = chip->mux; + + if ((rc = (dptr->flags & DEV_DIS) ? + del_iohandler(chip) : + add_iohandler(mux->poll,chip,i8251_io)) != SCPE_OK) return rc; - u58.reset(&u58); - mux->term->wait = 1000; /* TODO adjust to realistic speed */ + u58.reset(&u58); + mux->term->wait = 1000; /* TODO adjust to realistic speed */ - /* network attached? */ - if (mux->poll->flags & UNIT_ATT) { - mux->poll->wait = mux->pfirst; - sim_activate(mux->poll,mux->poll->wait); /* start poll routine */ - } else - sim_cancel(mux->poll); - sim_cancel(mux->term); - return SCPE_OK; + /* network attached? */ + if (mux->poll->flags & UNIT_ATT) { + mux->poll->wait = mux->pfirst; + sim_activate(mux->poll,mux->poll->wait); /* start poll routine */ + } else + sim_cancel(mux->poll); + sim_cancel(mux->term); + return SCPE_OK; } static t_stat sio_attach(UNIT* uptr, char* cptr) { - return mux_attach(uptr,cptr,&sio_mux); + return mux_attach(uptr,cptr,&sio_mux); } static t_stat sio_detach(UNIT* uptr) { - return mux_detach(uptr,&sio_mux); + return mux_detach(uptr,&sio_mux); } static t_stat sio_txint(I8251* chip) { - TRACE_PRINT0(DBG_UART_IRQ,"Raise TX Interrupt"); - return sage_raiseint(SIOTX_PICINT); + TRACE_PRINT0(DBG_UART_IRQ,"Raise TX Interrupt"); + return sage_raiseint(SIOTX_PICINT); } static t_stat sio_rxint(I8251* chip) { - TRACE_PRINT0(DBG_UART_IRQ,"Raise RX Interrupt"); - return sage_raiseint(SIORX_PICINT); + TRACE_PRINT0(DBG_UART_IRQ,"Raise RX Interrupt"); + return sage_raiseint(SIORX_PICINT); } /***************************************************************************************************/ -#define CONSPOLL 0 -#define CONSTERM 1 +#define CONSPOLL 0 +#define CONSTERM 1 -#define CONS_POLL_FIRST 1 /* immediate */ -#define CONS_POLL_RATE 100 /* sample 100 times /sec */ -#define CONS_POLL_WAIT 15800 /* about 10ms */ -#define CONS_OUT_WAIT 200 +#define CONS_POLL_FIRST 1 /* immediate */ +#define CONS_POLL_RATE 100 /* sample 100 times /sec */ +#define CONS_POLL_WAIT 15800 /* about 10ms */ +#define CONS_OUT_WAIT 200 static t_stat cons_reset(DEVICE* dptr); static t_stat cons_txint(I8251* chip); @@ -252,213 +252,213 @@ static t_stat cons_detach(UNIT*); extern DEVICE sagecons_dev; UNIT cons_unit[] = { - { UDATA (&conspoll_svc, UNIT_ATTABLE, 0), CONS_POLL_WAIT }, - { UDATA (&consterm_svc, UNIT_IDLE, 0), CONS_OUT_WAIT } + { UDATA (&conspoll_svc, UNIT_ATTABLE, 0), CONS_POLL_WAIT }, + { UDATA (&consterm_svc, UNIT_IDLE, 0), CONS_OUT_WAIT } }; static SERMUX cons_mux = { - CONS_POLL_FIRST, - CONS_POLL_RATE, - { 0 }, - { 1, 0, 0, 0 }, - &cons_unit[CONSTERM], - &cons_unit[CONSPOLL] + CONS_POLL_FIRST, + CONS_POLL_RATE, + { 0 }, + { 1, 0, 0, 0 }, + &cons_unit[CONSTERM], + &cons_unit[CONSPOLL] }; static I8251 u57 = { - { 0,0,U57_ADDR,4,2}, - &sagecons_dev,NULL,NULL,&i8251_reset, - &cons_txint,&cons_rxint, - &cons_unit[CONSPOLL],&cons_unit[CONSTERM], - &cons_mux + { 0,0,U57_ADDR,4,2}, + &sagecons_dev,NULL,NULL,&i8251_reset, + &cons_txint,&cons_rxint, + &cons_unit[CONSPOLL],&cons_unit[CONSTERM], + &cons_mux }; REG cons_reg[] = { - { DRDATA(INIT, u57.init, 3) }, - { HRDATA(MODE, u57.mode, 8) }, - { HRDATA(SYNC1, u57.sync1, 8) }, - { HRDATA(SYNC2, u57.sync2, 8) }, - { HRDATA(CMD, u57.cmd, 8) }, - { HRDATA(IBUF, u57.ibuf, 8) }, - { HRDATA(OBUF, u57.obuf, 8) }, - { HRDATA(STATUS, u57.status, 8) }, - { HRDATA(BITS, u57.bitmask,8), REG_HRO }, - { 0 } + { DRDATA(INIT, u57.init, 3) }, + { HRDATA(MODE, u57.mode, 8) }, + { HRDATA(SYNC1, u57.sync1, 8) }, + { HRDATA(SYNC2, u57.sync2, 8) }, + { HRDATA(CMD, u57.cmd, 8) }, + { HRDATA(IBUF, u57.ibuf, 8) }, + { HRDATA(OBUF, u57.obuf, 8) }, + { HRDATA(STATUS, u57.status, 8) }, + { HRDATA(BITS, u57.bitmask,8), REG_HRO }, + { 0 } }; static MTAB cons_mod[] = { { MTAB_XTD|MTAB_VDV, 0, "IO", "IO", &set_iobase, &show_iobase, NULL }, - { 0 } + { 0 } }; DEVICE sagecons_dev = { - "CONS", cons_unit, cons_reg, cons_mod, - 2, 16, 32, 2, 16, 16, - NULL, NULL, &cons_reset, - NULL, &cons_attach, &cons_detach, - &u57, DEV_DEBUG, 0, - i8251_dt, NULL, NULL + "CONS", cons_unit, cons_reg, cons_mod, + 2, 16, 32, 2, 16, 16, + NULL, NULL, &cons_reset, + NULL, &cons_attach, &cons_detach, + &u57, DEV_DEBUG, 0, + i8251_dt, NULL, NULL }; static t_stat cons_reset(DEVICE* dptr) { - t_stat rc; - int32 wait; - I8251* chip = (I8251*)dptr->ctxt; - SERMUX* mux = chip->mux; - - if ((rc = (dptr->flags & DEV_DIS) ? - del_iohandler(chip) : - add_iohandler(mux->poll,chip,&i8251_io)) != SCPE_OK) return rc; + t_stat rc; + int32 wait; + I8251* chip = (I8251*)dptr->ctxt; + SERMUX* mux = chip->mux; + + if ((rc = (dptr->flags & DEV_DIS) ? + del_iohandler(chip) : + add_iohandler(mux->poll,chip,&i8251_io)) != SCPE_OK) return rc; - u57.reset(&u57); - - /* initialize POLL timer */ - wait = mux->poll->wait = CONS_POLL_WAIT; - sim_rtcn_init(wait, TMR_CONS); - - u57.oob = TRUE; /* this is the console */ - sim_activate(mux->poll, wait); - sim_cancel(mux->term); - return SCPE_OK; + u57.reset(&u57); + + /* initialize POLL timer */ + wait = mux->poll->wait = CONS_POLL_WAIT; + sim_rtcn_init(wait, TMR_CONS); + + u57.oob = TRUE; /* this is the console */ + sim_activate(mux->poll, wait); + sim_cancel(mux->term); + return SCPE_OK; } /* this service is started when a unit is attached, or characters are available on keyboard */ static t_stat conspoll_svc(UNIT* uptr) { - int32 c, kbdc; - DEVICE* dptr = find_dev_from_unit(uptr); - I8251* chip = (I8251*)dptr->ctxt; - SERMUX* mux = chip->mux; + int32 c, kbdc; + DEVICE* dptr = find_dev_from_unit(uptr); + I8251* chip = (I8251*)dptr->ctxt; + SERMUX* mux = chip->mux; - uptr->wait = sim_rtcn_calb(mux->prate, TMR_CONS); /* calibrate timer */ - sim_activate(uptr, uptr->wait); /* restart it again */ + uptr->wait = sim_rtcn_calb(mux->prate, TMR_CONS); /* calibrate timer */ + sim_activate(uptr, uptr->wait); /* restart it again */ - kbdc = sim_poll_kbd(); /* check keyboard */ - if (kbdc==SCPE_STOP) return kbdc; /* handle CTRL-E */ + kbdc = sim_poll_kbd(); /* check keyboard */ + if (kbdc==SCPE_STOP) return kbdc; /* handle CTRL-E */ - /* network-redirected input? */ - if (mux->poll->flags & UNIT_ATT) { - if (tmxr_poll_conn(&mux->desc) >= 0) /* incoming connection */ - mux->ldsc.rcve = 1; + /* network-redirected input? */ + if (mux->poll->flags & UNIT_ATT) { + if (tmxr_poll_conn(&mux->desc) >= 0) /* incoming connection */ + mux->ldsc.rcve = 1; - tmxr_poll_rx(&mux->desc); /* poll for input */ - if (!tmxr_rqln(&mux->ldsc)) return SCPE_OK; - /* input ready */ - c = tmxr_getc_ln(&mux->ldsc); - if ((c & TMXR_VALID)==0) return SCPE_OK; - c &= 0xff; /* extract character */ - } else { - c = kbdc; /* use char polled from keyboard instead */ - if (c < SCPE_KFLAG) return c; /* ignore data if not valid */ - } - - if (!(chip->cmd & I8251_CMD_RXE)) { /* ignore data if receiver not enabled */ - chip->status &= ~I8251_ST_RXRDY; - return SCPE_OK; - } - - /* got char */ - if (c & SCPE_BREAK) { /* a break? */ - c = 0; - chip->status |= I8251_ST_SYNBRK; - } else - chip->status &= ~I8251_ST_SYNBRK; + tmxr_poll_rx(&mux->desc); /* poll for input */ + if (!tmxr_rqln(&mux->ldsc)) return SCPE_OK; + /* input ready */ + c = tmxr_getc_ln(&mux->ldsc); + if ((c & TMXR_VALID)==0) return SCPE_OK; + c &= 0xff; /* extract character */ + } else { + c = kbdc; /* use char polled from keyboard instead */ + if (c < SCPE_KFLAG) return c; /* ignore data if not valid */ + } + + if (!(chip->cmd & I8251_CMD_RXE)) { /* ignore data if receiver not enabled */ + chip->status &= ~I8251_ST_RXRDY; + return SCPE_OK; + } + + /* got char */ + if (c & SCPE_BREAK) { /* a break? */ + c = 0; + chip->status |= I8251_ST_SYNBRK; + } else + chip->status &= ~I8251_ST_SYNBRK; - /* TODO? sim_tt_icvt */ - chip->ibuf = c & chip->bitmask; - if (chip->status & I8251_ST_RXRDY) - chip->status |= I8251_ST_OE; - chip->status |= I8251_ST_RXRDY; - return cons_rxint(chip); + /* TODO? sim_tt_icvt */ + chip->ibuf = c & chip->bitmask; + if (chip->status & I8251_ST_RXRDY) + chip->status |= I8251_ST_OE; + chip->status |= I8251_ST_RXRDY; + return cons_rxint(chip); } static t_stat consterm_svc(UNIT* uptr) { - DEVICE* dptr = find_dev_from_unit(uptr); - I8251* chip = (I8251*)dptr->ctxt; - SERMUX* mux = chip->mux; - t_stat rc; + DEVICE* dptr = find_dev_from_unit(uptr); + I8251* chip = (I8251*)dptr->ctxt; + SERMUX* mux = chip->mux; + t_stat rc; - int ch = chip->obuf; - - /* suppress NUL bytes after CR LF */ - switch (ch) { - case 0x0d: - chip->crlf = 1; break; - case 0x0a: - chip->crlf = (chip->crlf==1) ? 2 : 0; break; - case 0: - if (chip->crlf==2) goto set_stat; - default: - chip->crlf = 0; - } - - /* TODO? sim_tt_outcvt */ - - /* attached to a telnet port? */ - if (mux->poll->flags & UNIT_ATT) { - if ((rc=tmxr_putc_ln(&mux->ldsc, ch & chip->bitmask)) != SCPE_OK) { - sim_activate(uptr, uptr->wait); - return SCPE_OK; - } else - tmxr_poll_tx(&mux->desc); - } else { - /* no, use normal terminal output */ - if ((rc=sim_putchar_s(ch & chip->bitmask)) != SCPE_OK) { - sim_activate(uptr, uptr->wait); - return rc==SCPE_STALL ? SCPE_OK : rc; - } - } + int ch = chip->obuf; + + /* suppress NUL bytes after CR LF */ + switch (ch) { + case 0x0d: + chip->crlf = 1; break; + case 0x0a: + chip->crlf = (chip->crlf==1) ? 2 : 0; break; + case 0: + if (chip->crlf==2) goto set_stat; + default: + chip->crlf = 0; + } + + /* TODO? sim_tt_outcvt */ + + /* attached to a telnet port? */ + if (mux->poll->flags & UNIT_ATT) { + if ((rc=tmxr_putc_ln(&mux->ldsc, ch & chip->bitmask)) != SCPE_OK) { + sim_activate(uptr, uptr->wait); + return SCPE_OK; + } else + tmxr_poll_tx(&mux->desc); + } else { + /* no, use normal terminal output */ + if ((rc=sim_putchar_s(ch & chip->bitmask)) != SCPE_OK) { + sim_activate(uptr, uptr->wait); + return rc==SCPE_STALL ? SCPE_OK : rc; + } + } set_stat: - chip->status |= I8251_ST_TXEMPTY; - if (chip->cmd & I8251_CMD_TXEN) { - chip->status |= I8251_ST_TXRDY; - return cons_txint(chip); - } - chip->status &= ~I8251_ST_TXRDY; - return SCPE_OK; + chip->status |= I8251_ST_TXEMPTY; + if (chip->cmd & I8251_CMD_TXEN) { + chip->status |= I8251_ST_TXRDY; + return cons_txint(chip); + } + chip->status &= ~I8251_ST_TXRDY; + return SCPE_OK; } static t_stat cons_txint(I8251* chip) { - TRACE_PRINT0(DBG_UART_IRQ,"Raise TX Interrupt"); - return sage_raiseint(CONSTX_PICINT); + TRACE_PRINT0(DBG_UART_IRQ,"Raise TX Interrupt"); + return sage_raiseint(CONSTX_PICINT); } static t_stat cons_rxint(I8251* chip) { - TRACE_PRINT0(DBG_UART_IRQ,"Raise RX Interrupt"); - return m68k_raise_autoint(CONSRX_AUTOINT); + TRACE_PRINT0(DBG_UART_IRQ,"Raise RX Interrupt"); + return m68k_raise_autoint(CONSRX_AUTOINT); } static t_stat cons_attach(UNIT* uptr,char* cptr) { - return mux_attach(uptr,cptr,&cons_mux); + return mux_attach(uptr,cptr,&cons_mux); } static t_stat cons_detach(UNIT* uptr) { - return mux_detach(uptr,&cons_mux); + return mux_detach(uptr,&cons_mux); } t_stat mux_attach(UNIT* uptr, char* cptr, SERMUX* mux) { - t_stat rc; + t_stat rc; - mux->desc.ldsc = &mux->ldsc; - if ((rc = tmxr_attach(&mux->desc, uptr, cptr)) == SCPE_OK) { - mux->poll->wait = mux->pfirst; - sim_activate(mux->poll,mux->poll->wait); - } - return rc; + mux->desc.ldsc = &mux->ldsc; + if ((rc = tmxr_attach(&mux->desc, uptr, cptr)) == SCPE_OK) { + mux->poll->wait = mux->pfirst; + sim_activate(mux->poll,mux->poll->wait); + } + return rc; } t_stat mux_detach(UNIT* uptr,SERMUX* mux) { - t_stat rc = tmxr_detach(&mux->desc, uptr); - mux->ldsc.rcve = 0; - sim_cancel(mux->poll); - sim_cancel(mux->term); - return rc; + t_stat rc = tmxr_detach(&mux->desc, uptr); + mux->ldsc.rcve = 0; + sim_cancel(mux->poll); + sim_cancel(mux->term); + return rc; } diff --git a/SAGE/sage_cpu.c b/SAGE/sage_cpu.c index 8d32ebd7..d168d0c2 100644 --- a/SAGE/sage_cpu.c +++ b/SAGE/sage_cpu.c @@ -40,8 +40,8 @@ static int rom_enable = TRUE; /* LS74 U51 in CPU schematic */ extern int32 DR[]; extern t_addr AR[]; -#define UNIT_CPU_V_BIOS UNIT_CPU_V_FREE /* has custom BIOS */ -#define UNIT_CPU_BIOS (1 << UNIT_CPU_V_BIOS) +#define UNIT_CPU_V_BIOS UNIT_CPU_V_FREE /* has custom BIOS */ +#define UNIT_CPU_BIOS (1 << UNIT_CPU_V_BIOS) #define MAX_ROMSIZE 16384 @@ -52,106 +52,106 @@ char* biosfile = "sage-ii.hex"; #endif static MTAB sagecpu_mod[] = { - { MTAB_XTD|MTAB_VDV, 0, "BIOS", "BIOS", &sagecpu_set_bios, &sagecpu_show_bios }, - M68KCPU_STDMOD, - { 0 } + { MTAB_XTD|MTAB_VDV, 0, "BIOS", "BIOS", &sagecpu_set_bios, &sagecpu_show_bios }, + M68KCPU_STDMOD, + { 0 } }; UNIT sagecpu_unit = { - UDATA (NULL, UNIT_FIX|UNIT_BINK|CPU_TYPE_68000|UNIT_CPU_EXC|UNIT_CPU_STOP|UNIT_CPU_PRVIO, SAGEMEM) + UDATA (NULL, UNIT_FIX|UNIT_BINK|CPU_TYPE_68000|UNIT_CPU_EXC|UNIT_CPU_STOP|UNIT_CPU_PRVIO, SAGEMEM) }; -#define DBG_CPU_OSCPM DBG_CPU_CUSTOM1 +#define DBG_CPU_OSCPM DBG_CPU_CUSTOM1 DEBTAB sagecpu_dt[] = { - { "EXC", DBG_CPU_EXC }, - { "PC", DBG_CPU_PC }, - { "INT", DBG_CPU_INT }, - { "CTRACE", DBG_CPU_CTRACE }, - { "BTRACE", DBG_CPU_BTRACE }, - { "OSCPM", DBG_CPU_OSCPM }, - { NULL, 0 } + { "EXC", DBG_CPU_EXC }, + { "PC", DBG_CPU_PC }, + { "INT", DBG_CPU_INT }, + { "CTRACE", DBG_CPU_CTRACE }, + { "BTRACE", DBG_CPU_BTRACE }, + { "OSCPM", DBG_CPU_OSCPM }, + { NULL, 0 } }; DEVICE sagecpu_dev = { - "CPU", &sagecpu_unit, m68kcpu_reg, sagecpu_mod, - 1, 16, 32, 2, 16, 16, - &m68kcpu_ex, &m68kcpu_dep, &sagecpu_reset, - &sagecpu_boot, NULL, NULL, - NULL, DEV_DEBUG, 0, - sagecpu_dt, NULL, NULL + "CPU", &sagecpu_unit, m68kcpu_reg, sagecpu_mod, + 1, 16, 32, 2, 16, 16, + &m68kcpu_ex, &m68kcpu_dep, &sagecpu_reset, + &sagecpu_boot, NULL, NULL, + NULL, DEV_DEBUG, 0, + sagecpu_dt, NULL, NULL }; static t_stat sagecpu_set_bios(UNIT *uptr, int32 value, char *cptr, void *desc) { - FILE* fp; - if (cptr==NULL) return SCPE_ARG; - if ((fp=fopen(cptr,"r"))==0) return SCPE_OPENERR; - fclose(fp); - - biosfile = malloc(strlen(cptr)+1); - strcpy(biosfile,cptr); + FILE* fp; + if (cptr==NULL) return SCPE_ARG; + if ((fp=fopen(cptr,"r"))==0) return SCPE_OPENERR; + fclose(fp); + + biosfile = malloc(strlen(cptr)+1); + strcpy(biosfile,cptr); - /* enforce reload of BIOS code on next boot */ - if (ROM != 0) free(ROM); - ROM = 0; - return SCPE_OK; + /* enforce reload of BIOS code on next boot */ + if (ROM != 0) free(ROM); + ROM = 0; + return SCPE_OK; } static t_stat sagecpu_show_bios(FILE *st, UNIT *uptr, int32 val, void *desc) { fprintf(st, "BIOS=%s", biosfile); - return SCPE_OK; + return SCPE_OK; } t_stat sagecpu_boot(int32 unitno,DEVICE* dptr) { - t_stat rc; + t_stat rc; - if (!ROM) return SCPE_IERR; - - if (*ROM==0) { - printf("Loading boot code from %s\n",biosfile); - if ((rc = load_cmd(0,biosfile)) != SCPE_OK) return rc; - } - return m68kcpu_boot(unitno,dptr); + if (!ROM) return SCPE_IERR; + + if (*ROM==0) { + printf("Loading boot code from %s\n",biosfile); + if ((rc = load_cmd(0,biosfile)) != SCPE_OK) return rc; + } + return m68kcpu_boot(unitno,dptr); } /* special logic: capture essential TRAP 8-14 for debugging */ static void sage_trapcallback(DEVICE* dptr,int trapnum) { - if ((dptr->dctrl & DBG_CPU_OSCPM) && sim_deb) { - if (trapnum>=0x08 && trapnum<=0x0e) { - fprintf(sim_deb,"SAGE: TRAP #%x: D0=%x A0=%x\n",trapnum,DR[0],AR[0]); - } - if (trapnum==2) { - fprintf(sim_deb,"SAGE: CPM BDOS #%d D1=0x%x D2=0x%x\n",DR[0]&0xff,DR[1],DR[2]); - } - if (trapnum==3) { - fprintf(sim_deb,"SAGE: CPM BIOS #%d D1=0x%x D2=0x%x\n",DR[0]&0xff,DR[1],DR[2]); - } - } + if ((dptr->dctrl & DBG_CPU_OSCPM) && sim_deb) { + if (trapnum>=0x08 && trapnum<=0x0e) { + fprintf(sim_deb,"SAGE: TRAP #%x: D0=%x A0=%x\n",trapnum,DR[0],AR[0]); + } + if (trapnum==2) { + fprintf(sim_deb,"SAGE: CPM BDOS #%d D1=0x%x D2=0x%x\n",DR[0]&0xff,DR[1],DR[2]); + } + if (trapnum==3) { + fprintf(sim_deb,"SAGE: CPM BIOS #%d D1=0x%x D2=0x%x\n",DR[0]&0xff,DR[1],DR[2]); + } + } } static t_stat sagecpu_reset(DEVICE* dptr) { - t_stat rc; + t_stat rc; - /* set CPU pointers */ - m68kcpu_dev = &sagecpu_dev; - m68kcpu_unit = &sagecpu_unit; - - /* redefine memory handlers */ - TranslateAddr = &sage_translateaddr; - Mem = &sage_mem; + /* set CPU pointers */ + m68kcpu_dev = &sagecpu_dev; + m68kcpu_unit = &sagecpu_unit; - if (!ROM) ROM = (uint8*)calloc(MAX_ROMSIZE,1); - rom_enable = TRUE; - - if ((rc=m68kcpu_reset(dptr)) != SCPE_OK) return rc; - - /* redirect callbacks */ - m68kcpu_trapcallback = &sage_trapcallback; - - return SCPE_OK; + /* redefine memory handlers */ + TranslateAddr = &sage_translateaddr; + Mem = &sage_mem; + + if (!ROM) ROM = (uint8*)calloc(MAX_ROMSIZE,1); + rom_enable = TRUE; + + if ((rc=m68kcpu_reset(dptr)) != SCPE_OK) return rc; + + /* redirect callbacks */ + m68kcpu_trapcallback = &sage_trapcallback; + + return SCPE_OK; } uint8 ioemul[4] = { 0,0,0,0 }; @@ -159,37 +159,37 @@ uint8 ioemul[4] = { 0,0,0,0 }; /* sage memory */ static t_stat sage_mem(t_addr addr,uint8** mem) { - t_addr a; -// printf("Try to access %x\n",addr); fflush(stdout); - if (rom_enable && (addr < MAX_ROMSIZE)) { /* boot rom mapped to zero page */ - *mem = ROM+addr; - return SCPE_OK; - } - a = addr - 0xfe0000; /* boot rom at normal ROM page */ - if (a < MAX_ROMSIZE) { - rom_enable = FALSE; - *mem = ROM+a; - return SCPE_OK; - } - a = addr - 0xffc0fe; - if (a < 2) { /* boot rom diagnostic address: black hole */ - ioemul[0] = ioemul[1] = 0; - *mem = ioemul+a; - return SCPE_OK; - } - a = addr - 0xff0000; - if (a < 0x10000) { - *mem = ioemul; - return SCPE_OK; - } - if (addr > MEMORYSIZE) return SIM_NOMEM; - return m68k_mem(addr,mem); + t_addr a; +// printf("Try to access %x\n",addr); fflush(stdout); + if (rom_enable && (addr < MAX_ROMSIZE)) { /* boot rom mapped to zero page */ + *mem = ROM+addr; + return SCPE_OK; + } + a = addr - 0xfe0000; /* boot rom at normal ROM page */ + if (a < MAX_ROMSIZE) { + rom_enable = FALSE; + *mem = ROM+a; + return SCPE_OK; + } + a = addr - 0xffc0fe; + if (a < 2) { /* boot rom diagnostic address: black hole */ + ioemul[0] = ioemul[1] = 0; + *mem = ioemul+a; + return SCPE_OK; + } + a = addr - 0xff0000; + if (a < 0x10000) { + *mem = ioemul; + return SCPE_OK; + } + if (addr > MEMORYSIZE) return SIM_NOMEM; + return m68k_mem(addr,mem); } t_stat sage_translateaddr(t_addr in,t_addr* out, IOHANDLER** ioh,int rw,int fc,int dma) { - static uint32 bptype[] = { R_BKPT_SPC|SWMASK('R'), W_BKPT_SPC|SWMASK('W') }; - t_addr ma = in & addrmask; - if (sim_brk_summ && sim_brk_test(ma, bptype[rw])) return STOP_IBKPT; - return m68k_translateaddr(in,out,ioh,rw,fc,dma); + static uint32 bptype[] = { R_BKPT_SPC|SWMASK('R'), W_BKPT_SPC|SWMASK('W') }; + t_addr ma = in & addrmask; + if (sim_brk_summ && sim_brk_test(ma, bptype[rw])) return STOP_IBKPT; + return m68k_translateaddr(in,out,ioh,rw,fc,dma); } diff --git a/SAGE/sage_defs.h b/SAGE/sage_defs.h index 61e42288..4e9d7e13 100644 --- a/SAGE/sage_defs.h +++ b/SAGE/sage_defs.h @@ -34,116 +34,116 @@ #include "m68k_cpu.h" /* don't define this yet, won't work */ -#undef SAGE_IV +#undef SAGE_IV -#define UNIT_CPU_V_ROM UNIT_CPU_V_FREE /* has switchable ROM */ -#define UNIT_CPU_ROM (1 << UNIT_CPU_V_ROM) +#define UNIT_CPU_V_ROM UNIT_CPU_V_FREE /* has switchable ROM */ +#define UNIT_CPU_ROM (1 << UNIT_CPU_V_ROM) -#define SAGEMEM (128*1024) +#define SAGEMEM (128*1024) -#define ROMBASE 0xfe0000 /* base address of ROM */ +#define ROMBASE 0xfe0000 /* base address of ROM */ #ifdef SAGE_IV -#define ROMSIZE 0x004000 /* size of ROM (4K words) */ +#define ROMSIZE 0x004000 /* size of ROM (4K words) */ #else -#define ROMSIZE 0x002000 /* size of ROM (4K words) */ +#define ROMSIZE 0x002000 /* size of ROM (4K words) */ #endif /* simh timers */ -#define TMR_RTC1 0 -#define TMR_RTC2 1 -#define TMR_CONS 2 -#define TMR_INT 3 +#define TMR_RTC1 0 +#define TMR_RTC2 1 +#define TMR_CONS 2 +#define TMR_INT 3 /* definitions for certain chips */ #include "chip_defs.h" /* PIC base address */ -#define U73_ADDR 0xffc041 -extern t_stat sage_raiseint(int level); /* sage specific interrupt handler */ +#define U73_ADDR 0xffc041 +extern t_stat sage_raiseint(int level); /* sage specific interrupt handler */ /* 8255 for dip switches and floppy control */ -#define U22_ADDR 0xffc021 -extern uint32 *u22_portc; /* exposed for use by FD device */ -#define U22C_FRES 0x80 -#define U22C_PCRMP 0x40 -#define U22C_MOT 0x20 -#define U22C_SL1 0x10 -#define U22C_SL0 0x08 -#define U22C_FDIE 0x04 -#define U22C_RDY 0x02 -#define U22C_TC 0x01 +#define U22_ADDR 0xffc021 +extern uint32 *u22_portc; /* exposed for use by FD device */ +#define U22C_FRES 0x80 +#define U22C_PCRMP 0x40 +#define U22C_MOT 0x20 +#define U22C_SL1 0x10 +#define U22C_SL0 0x08 +#define U22C_FDIE 0x04 +#define U22C_RDY 0x02 +#define U22C_TC 0x01 /* 8253 timer units */ -#define U75_ADDR 0xffc001 -#define U74_ADDR 0xffc081 +#define U75_ADDR 0xffc001 +#define U74_ADDR 0xffc081 #define TIMER2C0_PICINT 6 #define TIMER2C2_PICINT 0 /* FDC */ -#define U21_ADDR 0xffc051 +#define U21_ADDR 0xffc051 extern I8272 u21; -#define FDC_AUTOINT 6 +#define FDC_AUTOINT 6 /* LP port */ -#define U39_ADDR 0xffc061 -#define LP_PICINT 5 -#define SI_PICINT 7 +#define U39_ADDR 0xffc061 +#define LP_PICINT 5 +#define SI_PICINT 7 -#define U39B_FDI 0x01 -#define U39B_WP 0x02 -#define U39B_RG 0x04 -#define U39B_CD 0x08 -#define U39B_BUSY 0x10 -#define U39B_PAPER 0x20 -#define U39B_SEL 0x40 -#define U39B_FAULT 0x80 -#define U39C_PRES 0x01 -#define U39C_SC 0x02 -#define U39C_SI 0x04 -#define U39C_LEDR 0x08 -#define U39C_STROBE 0x10 -#define U39C_PRIME 0x20 -#define U39C_RCNI 0x40 -#define U39C_RMI 0x80 +#define U39B_FDI 0x01 +#define U39B_WP 0x02 +#define U39B_RG 0x04 +#define U39B_CD 0x08 +#define U39B_BUSY 0x10 +#define U39B_PAPER 0x20 +#define U39B_SEL 0x40 +#define U39B_FAULT 0x80 +#define U39C_PRES 0x01 +#define U39C_SC 0x02 +#define U39C_SI 0x04 +#define U39C_LEDR 0x08 +#define U39C_STROBE 0x10 +#define U39C_PRIME 0x20 +#define U39C_RCNI 0x40 +#define U39C_RMI 0x80 /* SIO port */ -#define U58_ADDR 0xffc031 -#define SIORX_PICINT 1 -#define SIOTX_PICINT 3 +#define U58_ADDR 0xffc031 +#define SIORX_PICINT 1 +#define SIOTX_PICINT 3 /* CONS port */ -#define U57_ADDR 0xffc071 -#define CONSRX_AUTOINT 5 -#define CONSTX_PICINT 2 +#define U57_ADDR 0xffc071 +#define CONSRX_AUTOINT 5 +#define CONSTX_PICINT 2 /* unimplemented */ -#define IEEEBASE 0xffc011 /* IEEE-488 interface (TMS9914) */ +#define IEEEBASE 0xffc011 /* IEEE-488 interface (TMS9914) */ /* winchester board: not yet */ -#define S2651d 0xffc401 /* aux serial 4 */ -#define S2651d_DATA (S2651d+0) /* RW data port aux 4 */ -#define S2651d_STATUS (S2651d+2) /* R status aux 4 */ -#define S2651d_MODE (S2651d+4) /* W mode aux 4 */ -#define S2651d_CTRL (S2651d+6) /* W mode aux 4 */ +#define S2651d 0xffc401 /* aux serial 4 */ +#define S2651d_DATA (S2651d+0) /* RW data port aux 4 */ +#define S2651d_STATUS (S2651d+2) /* R status aux 4 */ +#define S2651d_MODE (S2651d+4) /* W mode aux 4 */ +#define S2651d_CTRL (S2651d+6) /* W mode aux 4 */ -#define S2651c 0xffc441 /* aux serial 3 */ -#define S2651c_DATA (S2651c+0) /* RW data port aux 3 */ -#define S2651c_STATUS (S2651c+2) /* R status aux 3 */ -#define S2651c_MODE (S2651c+4) /* W mode aux 3 */ -#define S2651c_CTRL (S2651c+6) /* W mode aux 3 */ +#define S2651c 0xffc441 /* aux serial 3 */ +#define S2651c_DATA (S2651c+0) /* RW data port aux 3 */ +#define S2651c_STATUS (S2651c+2) /* R status aux 3 */ +#define S2651c_MODE (S2651c+4) /* W mode aux 3 */ +#define S2651c_CTRL (S2651c+6) /* W mode aux 3 */ -#define S2651b 0xffc481 /* aux serial 2 */ -#define S2651b_DATA (S2651b+0) /* RW data port aux 2 */ -#define S2651b_STATUS (S2651b+2) /* R status aux 2 */ -#define S2651b_MODE (S2651b+4) /* W mode aux 2 */ -#define S2651b_CTRL (S2651b+6) /* W mode aux 2 */ +#define S2651b 0xffc481 /* aux serial 2 */ +#define S2651b_DATA (S2651b+0) /* RW data port aux 2 */ +#define S2651b_STATUS (S2651b+2) /* R status aux 2 */ +#define S2651b_MODE (S2651b+4) /* W mode aux 2 */ +#define S2651b_CTRL (S2651b+6) /* W mode aux 2 */ -#define S2651a 0xff4c1 /* aux serial 1 */ -#define S2651a_DATA (S2651a+0) /* RW data port aux 1 */ -#define S2651a_STATUS (S2651a+2) /* R status aux 1 */ -#define S2651a_MODE (S2651a+4) /* W mode aux 1 */ -#define S2651a_CTRL (S2651a+6) /* W mode aux 1 */ +#define S2651a 0xff4c1 /* aux serial 1 */ +#define S2651a_DATA (S2651a+0) /* RW data port aux 1 */ +#define S2651a_STATUS (S2651a+2) /* R status aux 1 */ +#define S2651a_MODE (S2651a+4) /* W mode aux 1 */ +#define S2651a_CTRL (S2651a+6) /* W mode aux 1 */ /* must be included at the end */ #include "m68k_cpu.h" diff --git a/SAGE/sage_fd.c b/SAGE/sage_fd.c index 76c58046..c03a6338 100644 --- a/SAGE/sage_fd.c +++ b/SAGE/sage_fd.c @@ -37,9 +37,9 @@ static t_stat fdcint_svc(UNIT*); /* this is the FDC chip */ I8272 u21 = { - { 0, 0, U21_ADDR, 4, 2 }, - &sagefd_dev, - NULL, NULL, &i8272_reset, &sagefd_seldrv, &sagefd_interrupt + { 0, 0, U21_ADDR, 4, 2 }, + &sagefd_dev, + NULL, NULL, &i8272_reset, &sagefd_seldrv, &sagefd_interrupt }; UNIT sagefd_unit[] = { @@ -48,11 +48,11 @@ UNIT sagefd_unit[] = { }; REG sagefd_reg[] = { - { NULL } + { NULL } }; static MTAB sagefd_mod[] = { - { MTAB_XTD|MTAB_VDV, 0, "IO", "IO", &set_iobase, &show_iobase, NULL }, + { MTAB_XTD|MTAB_VDV, 0, "IO", "IO", &set_iobase, &show_iobase, NULL }, { UNIT_I8272_WLK, 0, "WRTENB", "WRTENB", NULL }, { UNIT_I8272_WLK, UNIT_I8272_WLK, "WRTLCK", "WRTLCK", NULL }, { UNIT_I8272_VERBOSE, 0, "QUIET", "QUIET", NULL }, @@ -61,71 +61,71 @@ static MTAB sagefd_mod[] = { }; DEVICE sagefd_dev = { - "FD", sagefd_unit, sagefd_reg, sagefd_mod, - 2, 16, 32, 2, 16, 16, - NULL, NULL, &sagefd_reset, - &sagefd_boot, &i8272_attach, &i8272_detach, - &u21, (DEV_DISABLE|DEV_DEBUG), 0, - i8272_dt, NULL, NULL + "FD", sagefd_unit, sagefd_reg, sagefd_mod, + 2, 16, 32, 2, 16, 16, + NULL, NULL, &sagefd_reset, + &sagefd_boot, &i8272_attach, &i8272_detach, + &u21, (DEV_DISABLE|DEV_DEBUG), 0, + i8272_dt, NULL, NULL }; static void sagefd_seldrv(I8272* chip,int drvnum) { - /* this routine defeats the standard drive select in i8272.c - * which interprets the US0/US1 bits of various commands. - * Sage uses 8255 portc bits for that, and always leaves - * US0/US1 = 0, despite which drive is selected. - * The actual code to select drives is in sage_stddev.c in u22callc() - */ - return; + /* this routine defeats the standard drive select in i8272.c + * which interprets the US0/US1 bits of various commands. + * Sage uses 8255 portc bits for that, and always leaves + * US0/US1 = 0, despite which drive is selected. + * The actual code to select drives is in sage_stddev.c in u22callc() + */ + return; } static t_stat sagefd_reset(DEVICE* dptr) { - t_stat rc; - I8272* chip = (I8272*)dptr->ctxt; + t_stat rc; + I8272* chip = (I8272*)dptr->ctxt; + + /* fixup device link */ + i8272_dev = dptr; - /* fixup device link */ - i8272_dev = dptr; - rc = (dptr->flags & DEV_DIS) ? /* Disconnect I/O Ports */ - del_iohandler((void*)chip) : - add_iohandler(&sagefd_unit[0],(void*)chip,i8272_io); + del_iohandler((void*)chip) : + add_iohandler(&sagefd_unit[0],(void*)chip,i8272_io); if (rc != SCPE_OK) return rc; - return (*chip->reset)(chip); + return (*chip->reset)(chip); } static t_stat fdcint_svc(UNIT* unit) { #if DBG_MSG==1 - I8272* chip; - DEVICE* dptr; + I8272* chip; + DEVICE* dptr; if (!unit) return -1; dptr = find_dev_from_unit(unit); - if (!dptr) return -1; - chip = (I8272*)dptr->ctxt; + if (!dptr) return -1; + chip = (I8272*)dptr->ctxt; #endif - if (*u22_portc & U22C_FDIE) { - TRACE_PRINT0(DBG_FD_IRQ,"FDCINT_SVC: deliver interrupt"); - m68k_raise_autoint(FDC_AUTOINT); - - } else { - TRACE_PRINT0(DBG_FD_IRQ,"FDCINT_SVC: int not granted"); - } - return SCPE_OK; + if (*u22_portc & U22C_FDIE) { + TRACE_PRINT0(DBG_FD_IRQ,"FDCINT_SVC: deliver interrupt"); + m68k_raise_autoint(FDC_AUTOINT); + + } else { + TRACE_PRINT0(DBG_FD_IRQ,"FDCINT_SVC: int not granted"); + } + return SCPE_OK; } static t_stat sagefd_boot(int32 unit_num,DEVICE* dptr) { - printf("sagefd_boot\n"); - return SCPE_OK; + printf("sagefd_boot\n"); + return SCPE_OK; } static void sagefd_interrupt(I8272* chip,int delay) { - TRACE_PRINT0(DBG_FD_IRQ,"SAGEFD_INT: request interrupt"); - sim_activate(&sagefd_unit[0],delay); + TRACE_PRINT0(DBG_FD_IRQ,"SAGEFD_INT: request interrupt"); + sim_activate(&sagefd_unit[0],delay); } /* dummy routines for i8272 - sage does not use DMA */ @@ -135,5 +135,5 @@ void PutByteDMA(uint32 addr, uint8 data) uint8 GetByteDMA(uint32 addr) { - return 0; + return 0; } diff --git a/SAGE/sage_hd.c b/SAGE/sage_hd.c index f5c267a2..cf615595 100644 --- a/SAGE/sage_hd.c +++ b/SAGE/sage_hd.c @@ -35,50 +35,50 @@ static t_stat sagehd_detach(UNIT* uptr); UNIT sagehd_unit[] = { - { UDATA (NULL, UNIT_FIX | UNIT_BINK | UNIT_DISABLE | UNIT_ROABLE, 0) }, - { UDATA (NULL, UNIT_FIX | UNIT_BINK | UNIT_DISABLE | UNIT_DIS | UNIT_ROABLE, 0) }, - { UDATA (NULL, UNIT_FIX | UNIT_BINK | UNIT_DISABLE | UNIT_DIS | UNIT_ROABLE, 0) }, - { UDATA (NULL, UNIT_FIX | UNIT_BINK | UNIT_DISABLE | UNIT_DIS | UNIT_ROABLE, 0) } + { UDATA (NULL, UNIT_FIX | UNIT_BINK | UNIT_DISABLE | UNIT_ROABLE, 0) }, + { UDATA (NULL, UNIT_FIX | UNIT_BINK | UNIT_DISABLE | UNIT_DIS | UNIT_ROABLE, 0) }, + { UDATA (NULL, UNIT_FIX | UNIT_BINK | UNIT_DISABLE | UNIT_DIS | UNIT_ROABLE, 0) }, + { UDATA (NULL, UNIT_FIX | UNIT_BINK | UNIT_DISABLE | UNIT_DIS | UNIT_ROABLE, 0) } }; REG sagehd_reg[] = { - { NULL } + { NULL } }; /* static MTAB sagehd_mod[] = { - { NULL } + { NULL } }; */ DEVICE sagehd_dev = { - "HD", sagehd_unit, sagehd_reg, /*sagehd_mod*/NULL, - 4, 16, 32, 2, 16, 16, - NULL, NULL, &sagehd_reset, - &sagehd_boot, &sagehd_attach, &sagehd_detach, - NULL, DEV_DISABLE|DEV_DIS, 0, - NULL, NULL, NULL + "HD", sagehd_unit, sagehd_reg, /*sagehd_mod*/NULL, + 4, 16, 32, 2, 16, 16, + NULL, NULL, &sagehd_reset, + &sagehd_boot, &sagehd_attach, &sagehd_detach, + NULL, DEV_DISABLE|DEV_DIS, 0, + NULL, NULL, NULL }; static t_stat sagehd_reset(DEVICE* dptr) { - printf("sagehd_reset\n"); - return SCPE_OK; + printf("sagehd_reset\n"); + return SCPE_OK; } static t_stat sagehd_boot(int32 unit_num,DEVICE* dptr) { - printf("sagehd_boot\n"); - return SCPE_OK; + printf("sagehd_boot\n"); + return SCPE_OK; } static t_stat sagehd_attach(UNIT* uptr, char* file) { - printf("sagehd_attach\n"); - return SCPE_OK; + printf("sagehd_attach\n"); + return SCPE_OK; } static t_stat sagehd_detach(UNIT* uptr) { - printf("sagehd_detach\n"); - return SCPE_OK; + printf("sagehd_detach\n"); + return SCPE_OK; } diff --git a/SAGE/sage_ieee.c b/SAGE/sage_ieee.c index 3db6512e..84d59dd6 100644 --- a/SAGE/sage_ieee.c +++ b/SAGE/sage_ieee.c @@ -33,30 +33,30 @@ static t_stat sageieee_reset(DEVICE* dptr); UNIT sageieee_unit = { - UDATA (NULL, UNIT_FIX | UNIT_BINK, 0) + UDATA (NULL, UNIT_FIX | UNIT_BINK, 0) }; REG sageieee_reg[] = { - { NULL } + { NULL } }; static MTAB sageieee_mod[] = { - { 0 } + { 0 } }; DEVICE sageieee_dev = { - "IEEE", &sageieee_unit, sageieee_reg, sageieee_mod, - 1, 16, 32, 2, 16, 16, - NULL, NULL, &sageieee_reset, - NULL, NULL, NULL, - NULL, DEV_DISABLE|DEV_DIS, 0, - NULL, NULL, NULL + "IEEE", &sageieee_unit, sageieee_reg, sageieee_mod, + 1, 16, 32, 2, 16, 16, + NULL, NULL, &sageieee_reset, + NULL, NULL, NULL, + NULL, DEV_DISABLE|DEV_DIS, 0, + NULL, NULL, NULL }; static t_stat sageieee_reset(DEVICE* dptr) { - printf("sageieee_reset\n"); - return SCPE_OK; + printf("sageieee_reset\n"); + return SCPE_OK; } #endif diff --git a/SAGE/sage_lp.c b/SAGE/sage_lp.c index 02b301bb..201ac177 100644 --- a/SAGE/sage_lp.c +++ b/SAGE/sage_lp.c @@ -66,58 +66,58 @@ extern DEVICE sagelp_dev; */ static I8255 u39 = { - { 0,0,U39_ADDR,8,2}, - &sagelp_dev, - i8255_write,i8255_read,u39_reset,u39_calla,u39_callb,u39_callc,u39_ckmode + { 0,0,U39_ADDR,8,2}, + &sagelp_dev, + i8255_write,i8255_read,u39_reset,u39_calla,u39_callb,u39_callc,u39_ckmode }; UNIT sagelp_unit = { - UDATA (NULL, UNIT_SEQ|UNIT_ATTABLE|UNIT_TEXT, 0), SERIAL_OUT_WAIT + UDATA (NULL, UNIT_SEQ|UNIT_ATTABLE|UNIT_TEXT, 0), SERIAL_OUT_WAIT }; REG sagelp_reg[] = { - { HRDATA(PORTA, u39.porta, 8) }, - { HRDATA(PORTB, u39.portb, 8) }, - { HRDATA(PORTC, u39.portc, 8) }, - { HRDATA(CTRL, u39.ctrl, 8) }, + { HRDATA(PORTA, u39.porta, 8) }, + { HRDATA(PORTB, u39.portb, 8) }, + { HRDATA(PORTC, u39.portc, 8) }, + { HRDATA(CTRL, u39.ctrl, 8) }, { GRDATA (BUF, sagelp_unit.buf, 16, 8, 0) }, { DRDATA (POS, sagelp_unit.pos, T_ADDR_W), PV_LEFT }, - { NULL } + { NULL } }; static MTAB sagelp_mod[] = { { MTAB_XTD|MTAB_VDV, 0, "IO", "IO", &set_iobase, &show_iobase, NULL }, { UNIT_OFFLINE, UNIT_OFFLINE, "offline", "OFFLINE", NULL }, { UNIT_OFFLINE, 0, "online", "ONLINE", NULL }, - { 0 } + { 0 } }; DEBTAB sagelp_dt[] = { - { "WRA", DBG_PP_WRA }, - { "RDB", DBG_PP_RDB }, - { "RDC", DBG_PP_RDC }, - { "WRC", DBG_PP_WRC }, - { "WRMODE", DBG_PP_MODE }, - { NULL, 0 } + { "WRA", DBG_PP_WRA }, + { "RDB", DBG_PP_RDB }, + { "RDC", DBG_PP_RDC }, + { "WRC", DBG_PP_WRC }, + { "WRMODE", DBG_PP_MODE }, + { NULL, 0 } }; DEVICE sagelp_dev = { - "LP", &sagelp_unit, sagelp_reg, sagelp_mod, - 1, 16, 32, 2, 16, 16, - NULL, NULL, &sagelp_reset, - NULL, &sagelp_attach, &sagelp_detach, - &u39, (DEV_DISABLE|DEV_DEBUG), 0, - sagelp_dt, NULL, NULL + "LP", &sagelp_unit, sagelp_reg, sagelp_mod, + 1, 16, 32, 2, 16, 16, + NULL, NULL, &sagelp_reset, + NULL, &sagelp_attach, &sagelp_detach, + &u39, (DEV_DISABLE|DEV_DEBUG), 0, + sagelp_dt, NULL, NULL }; t_stat sagelp_reset(DEVICE* dptr) { - t_stat rc; + t_stat rc; if ((rc = (dptr->flags & DEV_DIS) ? /* Disconnect I/O Ports */ - del_iohandler(dptr->ctxt) : - add_iohandler(&sagelp_unit,dptr->ctxt,i8255_io)) != SCPE_OK) return rc; - - return u39.reset(&u39); + del_iohandler(dptr->ctxt) : + add_iohandler(&sagelp_unit,dptr->ctxt,i8255_io)) != SCPE_OK) return rc; + + return u39.reset(&u39); } /* we don't accept any mode and combination that a 8255 can do, because @@ -126,122 +126,122 @@ t_stat sagelp_reset(DEVICE* dptr) static t_stat u39_calla(I8255* chip, int rw) { - if (rw) { - sagelp_unit.buf = chip->porta; - TRACE_PRINT1(DBG_PP_WRA,"WR PortA = 0x%x",chip->porta); - } - return SCPE_OK; + if (rw) { + sagelp_unit.buf = chip->porta; + TRACE_PRINT1(DBG_PP_WRA,"WR PortA = 0x%x",chip->porta); + } + return SCPE_OK; } static t_stat u39_callb(I8255* chip, int rw) { - if (rw==0) { /* only when reading port */ - /* propagate FDC Write Protect */ - int portb = 0; - I8272_DRIVE_INFO* dip = &u21.drive[u21.fdc_curdrv]; - if (dip->uptr && (dip->uptr->flags & UNIT_I8272_WLK)) { - portb |= U39B_WP; - TRACE_PRINT1(DBG_PP_RDB,"RD PortB: WP+=%d",(portb&U39B_WP)?1:0); - } - - /* propagate FDC interrupt */ - if (u21.irqflag) { - portb |= U39B_FDI; - TRACE_PRINT0(DBG_PP_RDB,"RD PortB: FDI+=1"); - } else { - TRACE_PRINT0(DBG_PP_RDB,"RD PortB: FDI+=0"); - } - chip->portb = portb; - } - return SCPE_OK; + if (rw==0) { /* only when reading port */ + /* propagate FDC Write Protect */ + int portb = 0; + I8272_DRIVE_INFO* dip = &u21.drive[u21.fdc_curdrv]; + if (dip->uptr && (dip->uptr->flags & UNIT_I8272_WLK)) { + portb |= U39B_WP; + TRACE_PRINT1(DBG_PP_RDB,"RD PortB: WP+=%d",(portb&U39B_WP)?1:0); + } + + /* propagate FDC interrupt */ + if (u21.irqflag) { + portb |= U39B_FDI; + TRACE_PRINT0(DBG_PP_RDB,"RD PortB: FDI+=1"); + } else { + TRACE_PRINT0(DBG_PP_RDB,"RD PortB: FDI+=0"); + } + chip->portb = portb; + } + return SCPE_OK; } static t_stat u39_callc(I8255* chip,int rw) { - if (rw==1) { - if (I8255_FALLEDGE(portc,U39C_STROBE)) { - sagelp_output(&sagelp_unit); - TRACE_PRINT1(DBG_PP_RDC,"RD PortC: STROBE-=%d",chip->portc&U39C_STROBE?1:0); - } - if (I8255_RISEEDGE(portc,U39C_SI)) { -/* printf("rising edge on SI: PC=%x!\n",PCX);*/ - TRACE_PRINT1(DBG_PP_RDC,"RD PortC: SI+=%d",chip->portc&U39C_SI?1:0); - sage_raiseint(SI_PICINT); - } - } - return SCPE_OK; + if (rw==1) { + if (I8255_FALLEDGE(portc,U39C_STROBE)) { + sagelp_output(&sagelp_unit); + TRACE_PRINT1(DBG_PP_RDC,"RD PortC: STROBE-=%d",chip->portc&U39C_STROBE?1:0); + } + if (I8255_RISEEDGE(portc,U39C_SI)) { +/* printf("rising edge on SI: PC=%x!\n",PCX);*/ + TRACE_PRINT1(DBG_PP_RDC,"RD PortC: SI+=%d",chip->portc&U39C_SI?1:0); + sage_raiseint(SI_PICINT); + } + } + return SCPE_OK; } static t_stat u39_ckmode(I8255* chip,uint32 data) { - TRACE_PRINT1(DBG_PP_MODE,"WR Mode: 0x%x",data); - - /* BIOS initializes port A as input, later LP is initialized to output */ - if (!(data==0x82 || data==0x92)) { - /* hardwired: - * d7=1 -- mode set flag - * d6=0 -+ group a mode 0: basic I/O - * d5=0 -+ - * d4=0 -- port a = output / input - * d3=0 -- port c upper = output - * d2=0 -- group b mode 0: basic I/O - * d1=1 -- port b = input - * d0=0 -- port c lower = output - */ - printf("u39_ckmode: unsupported ctrl=0x%02x\n",data); - return STOP_IMPL; - } - chip->portc = 0; /* reset port */ - return SCPE_OK; + TRACE_PRINT1(DBG_PP_MODE,"WR Mode: 0x%x",data); + + /* BIOS initializes port A as input, later LP is initialized to output */ + if (!(data==0x82 || data==0x92)) { + /* hardwired: + * d7=1 -- mode set flag + * d6=0 -+ group a mode 0: basic I/O + * d5=0 -+ + * d4=0 -- port a = output / input + * d3=0 -- port c upper = output + * d2=0 -- group b mode 0: basic I/O + * d1=1 -- port b = input + * d0=0 -- port c lower = output + */ + printf("u39_ckmode: unsupported ctrl=0x%02x\n",data); + return STOP_IMPL; + } + chip->portc = 0; /* reset port */ + return SCPE_OK; } static t_stat u39_reset(I8255* chip) { - sagelp_unit.buf = 0; - sim_cancel (&sagelp_unit); - return SCPE_OK; + sagelp_unit.buf = 0; + sim_cancel (&sagelp_unit); + return SCPE_OK; } static t_stat sagelp_attach (UNIT *uptr, char *cptr) { - t_stat rc; - rc = attach_unit(uptr, cptr); - if ((sagelp_unit.flags & UNIT_ATT) == 0) - u39.portb |= U39B_PAPER; /* no paper */ - - return rc; + t_stat rc; + rc = attach_unit(uptr, cptr); + if ((sagelp_unit.flags & UNIT_ATT) == 0) + u39.portb |= U39B_PAPER; /* no paper */ + + return rc; } static t_stat sagelp_detach (UNIT *uptr) { - u39.portb |= U39B_PAPER; /* no paper */ - return detach_unit (uptr); + u39.portb |= U39B_PAPER; /* no paper */ + return detach_unit (uptr); } static t_stat sagelp_output(UNIT *uptr) { - if ((uptr->flags & UNIT_ATT)==0) { - u39.portb |= U39B_PAPER; /* unattached means: no paper */ - return SCPE_UNATT; - } else if (uptr->flags & UNIT_OFFLINE) { - u39.portb &= ~U39B_SEL; /* offline means: SEL = 0 */ - return STOP_OFFLINE; - } - u39.portb &= ~U39B_PAPER; /* has paper */ - u39.portb |= U39B_SEL; /* is online */ - u39.portb |= U39B_FAULT; /* no fault */ - u39.portb &= ~U39B_BUSY; /* not busy */ - if ((u39.portc & U39C_STROBE)==0) { /* strobe presented */ - fputc (uptr->buf & 0177, uptr->fileref); /* put out char */ - if (ferror (uptr->fileref)) { - perror ("LP I/O error"); - clearerr (uptr->fileref); - return SCPE_IOERR; - } - sagelp_unit.pos = ftell(uptr->fileref); /* update pos */ - u39.portc |= U39C_STROBE; /* XXX reset strobe directly */ - sage_raiseint(LP_PICINT); - return SCPE_OK; - } - return SCPE_OK; + if ((uptr->flags & UNIT_ATT)==0) { + u39.portb |= U39B_PAPER; /* unattached means: no paper */ + return SCPE_UNATT; + } else if (uptr->flags & UNIT_OFFLINE) { + u39.portb &= ~U39B_SEL; /* offline means: SEL = 0 */ + return STOP_OFFLINE; + } + u39.portb &= ~U39B_PAPER; /* has paper */ + u39.portb |= U39B_SEL; /* is online */ + u39.portb |= U39B_FAULT; /* no fault */ + u39.portb &= ~U39B_BUSY; /* not busy */ + if ((u39.portc & U39C_STROBE)==0) { /* strobe presented */ + fputc (uptr->buf & 0177, uptr->fileref); /* put out char */ + if (ferror (uptr->fileref)) { + perror ("LP I/O error"); + clearerr (uptr->fileref); + return SCPE_IOERR; + } + sagelp_unit.pos = ftell(uptr->fileref); /* update pos */ + u39.portc |= U39C_STROBE; /* XXX reset strobe directly */ + sage_raiseint(LP_PICINT); + return SCPE_OK; + } + return SCPE_OK; } diff --git a/SAGE/sage_stddev.c b/SAGE/sage_stddev.c index ac1f0629..56706c45 100644 --- a/SAGE/sage_stddev.c +++ b/SAGE/sage_stddev.c @@ -52,8 +52,8 @@ * IR7 = Output C2 of U39 * * Notes: - * INTA- is hardwired to VCC, so vectoring is not possible - * SP- is hardwired to VCC, so buffered mode is not possible, and device is a master. + * INTA- is hardwired to VCC, so vectoring is not possible + * SP- is hardwired to VCC, so buffered mode is not possible, and device is a master. * CAS0-2 lines are open, no need to handle * UCSD bios and boot prom do not program the PIC for rotating priorities, * so effectively prio is always 7. @@ -62,51 +62,51 @@ extern DEVICE sagepic_dev; static t_stat sagepic_reset(DEVICE* dptr); static I8259 u73 = { {0,0,U73_ADDR,4,2}, - &sagepic_dev,NULL,NULL,i8259_reset + &sagepic_dev,NULL,NULL,i8259_reset }; UNIT sagepic_unit = { - UDATA (NULL, UNIT_IDLE, 0) + UDATA (NULL, UNIT_IDLE, 0) }; REG sagepic_reg[] = { - { DRDATA(STATE, u73.state, 8) }, - { HRDATA(IRR, u73.irr, 8) }, - { HRDATA(IMR, u73.imr, 8) }, - { HRDATA(ISR, u73.isr, 8) }, - { HRDATA(ICW1, u73.icw1, 8) }, - { HRDATA(ICW2, u73.icw2, 8) }, - { HRDATA(ICW4, u73.icw4, 8) }, - { HRDATA(OCW2, u73.prio, 3) }, - { NULL } + { DRDATA(STATE, u73.state, 8) }, + { HRDATA(IRR, u73.irr, 8) }, + { HRDATA(IMR, u73.imr, 8) }, + { HRDATA(ISR, u73.isr, 8) }, + { HRDATA(ICW1, u73.icw1, 8) }, + { HRDATA(ICW2, u73.icw2, 8) }, + { HRDATA(ICW4, u73.icw4, 8) }, + { HRDATA(OCW2, u73.prio, 3) }, + { NULL } }; static MTAB sagepic_mod[] = { { MTAB_XTD|MTAB_VDV, 0, "IO", "IO", &set_iobase, &show_iobase, NULL }, - { 0 } + { 0 } }; DEVICE sagepic_dev = { - "PIC", &sagepic_unit, sagepic_reg, sagepic_mod, - 1, 16, 32, 2, 16, 16, - NULL, NULL, &sagepic_reset, - NULL, NULL, NULL, - &u73, DEV_DEBUG, 0, - i8259_dt, NULL, NULL + "PIC", &sagepic_unit, sagepic_reg, sagepic_mod, + 1, 16, 32, 2, 16, 16, + NULL, NULL, &sagepic_reset, + NULL, NULL, NULL, + &u73, DEV_DEBUG, 0, + i8259_dt, NULL, NULL }; static t_stat sagepic_reset(DEVICE* dptr) { - t_stat rc; - if ((rc = (dptr->flags & DEV_DIS) ? - del_iohandler(dptr->ctxt) : - add_iohandler(&sagepic_unit,dptr->ctxt,i8259_io)) != SCPE_OK) return rc; - return u73.reset(&u73); + t_stat rc; + if ((rc = (dptr->flags & DEV_DIS) ? + del_iohandler(dptr->ctxt) : + add_iohandler(&sagepic_unit,dptr->ctxt,i8259_io)) != SCPE_OK) return rc; + return u73.reset(&u73); } t_stat sage_raiseint(int level) { - return i8259_raiseint(&u73,level); + return i8259_raiseint(&u73,level); } /****************************************************************************************************** @@ -152,11 +152,11 @@ t_stat sage_raiseint(int level) */ #if defined(SAGE_IV) - uint32 groupa = 0xd7; /* used by cons device, 19k2, no parity, boot floppy 0 */ - uint32 groupb = 0xf8; /* used by ieee device */ + uint32 groupa = 0xd7; /* used by cons device, 19k2, no parity, boot floppy 0 */ + uint32 groupb = 0xf8; /* used by ieee device */ #else - uint32 groupa = 0xe7; /* used by cons device, 19k2, no parity, boot winchester 0 */ - uint32 groupb = 0xf8; /* used by ieee device */ + uint32 groupa = 0xe7; /* used by cons device, 19k2, no parity, boot winchester 0 */ + uint32 groupb = 0xf8; /* used by ieee device */ #endif static t_stat sagedip_reset(DEVICE* dptr); @@ -172,194 +172,194 @@ static t_stat u22_ckmode(I8255* chip,uint32 data); extern DEVICE sagedip_dev; static I8255 u22 = { - { 0,0,U22_ADDR,8,2 }, - &sagedip_dev,i8255_write,i8255_read,u22_reset,u22_calla,u22_callb,u22_callc,u22_ckmode + { 0,0,U22_ADDR,8,2 }, + &sagedip_dev,i8255_write,i8255_read,u22_reset,u22_calla,u22_callb,u22_callc,u22_ckmode }; uint32* u22_portc = &u22.portc; /* this is used in the FD device as well, but whole 8255 is handled here */ UNIT sagedip_unit = { - UDATA (NULL, UNIT_IDLE, 0) + UDATA (NULL, UNIT_IDLE, 0) }; REG sagedip_reg[] = { - { HRDATA(PORTA, u22.porta, 8) }, - { HRDATA(PORTB, u22.portb, 8) }, - { HRDATA(PORTC, u22.portc, 8) }, - { HRDATA(CTRL, u22.ctrl, 8) }, - { NULL } + { HRDATA(PORTA, u22.porta, 8) }, + { HRDATA(PORTB, u22.portb, 8) }, + { HRDATA(PORTC, u22.portc, 8) }, + { HRDATA(CTRL, u22.ctrl, 8) }, + { NULL } }; static MTAB sagedip_mod[] = { { MTAB_XTD|MTAB_VDV, 0, "IO", "IO", &set_iobase, &show_iobase, NULL }, { MTAB_XTD|MTAB_VDV, 0, "GROUPA", "GROUPA", &set_groupa, &show_groupa, NULL }, { MTAB_XTD|MTAB_VDV, 0, "GROUPB", "GROUPB", &set_groupb, &show_groupb, NULL }, - { 0 } + { 0 } }; /* Debug Flags */ DEBTAB sagedip_dt[] = { - { "RDA", DBG_PP_RDA }, - { "RDB", DBG_PP_RDB }, - { "WRC", DBG_PP_WRC }, - { "WRMODE", DBG_PP_MODE }, - { NULL, 0 } + { "RDA", DBG_PP_RDA }, + { "RDB", DBG_PP_RDB }, + { "WRC", DBG_PP_WRC }, + { "WRMODE", DBG_PP_MODE }, + { NULL, 0 } }; DEVICE sagedip_dev = { - "DIP", &sagedip_unit, sagedip_reg, sagedip_mod, - 1, 16, 32, 2, 16, 16, - NULL, NULL, &sagedip_reset, - NULL, NULL, NULL, - &u22, DEV_DEBUG, 0, - sagedip_dt, NULL, NULL + "DIP", &sagedip_unit, sagedip_reg, sagedip_mod, + 1, 16, 32, 2, 16, 16, + NULL, NULL, &sagedip_reset, + NULL, NULL, NULL, + &u22, DEV_DEBUG, 0, + sagedip_dt, NULL, NULL }; static t_stat sagedip_reset(DEVICE* dptr) { - t_stat rc; - - if ((rc = (dptr->flags & DEV_DIS) ? /* Disconnect I/O Ports */ - del_iohandler(dptr->ctxt) : - add_iohandler(&sagedip_unit,dptr->ctxt,i8255_io)) != SCPE_OK) return rc; - - /* clear 8255 ctrl register */ - return u22.reset(&u22); + t_stat rc; + + if ((rc = (dptr->flags & DEV_DIS) ? /* Disconnect I/O Ports */ + del_iohandler(dptr->ctxt) : + add_iohandler(&sagedip_unit,dptr->ctxt,i8255_io)) != SCPE_OK) return rc; + + /* clear 8255 ctrl register */ + return u22.reset(&u22); } static t_stat set_gr(char* cptr, uint32* sw) { - int i; - char c; - - if (!cptr) return SCPE_ARG; - - *sw = 0; - for (i=0; *cptr && i<8; i++) { - c = *cptr++; - *sw <<= 1; - if (c=='1') *sw |= 1; - else if (c=='0') continue; - else if (c==0) break; - else return SCPE_ARG; - } - return SCPE_OK; + int i; + char c; + + if (!cptr) return SCPE_ARG; + + *sw = 0; + for (i=0; *cptr && i<8; i++) { + c = *cptr++; + *sw <<= 1; + if (c=='1') *sw |= 1; + else if (c=='0') continue; + else if (c==0) break; + else return SCPE_ARG; + } + return SCPE_OK; } static t_stat set_groupa(UNIT *uptr, int32 val, char *cptr, void *desc) { - return set_gr(cptr,&groupa); + return set_gr(cptr,&groupa); } static t_stat set_groupb(UNIT *uptr, int32 val, char *cptr, void *desc) { - return set_gr(cptr,&groupb); + return set_gr(cptr,&groupb); } static t_stat show_gr(FILE* st, char* prefix, uint32 gr) { - int i; - fputs(prefix, st); - for (i = 0x80; i > 0; i = i >> 1) - fprintf(st,"%c", gr&i ? '1' : '0'); - return SCPE_OK; + int i; + fputs(prefix, st); + for (i = 0x80; i > 0; i = i >> 1) + fprintf(st,"%c", gr&i ? '1' : '0'); + return SCPE_OK; } static t_stat show_groupa(FILE *st, UNIT *uptr, int32 val, void *desc) { - return show_gr(st, "GROUPA=", groupa); + return show_gr(st, "GROUPA=", groupa); } static t_stat show_groupb(FILE *st, UNIT *uptr, int32 val, void *desc) { - return show_gr(st, "GROUPB=", groupb); + return show_gr(st, "GROUPB=", groupb); } static t_stat u22_reset(I8255* chip) { - chip->ctrl = 0; - chip->portc = 0; - return SCPE_OK; + chip->ctrl = 0; + chip->portc = 0; + return SCPE_OK; } extern I8272 u21; static t_stat u22_calla(I8255* chip,int rw) { - if (rw==0) { - chip->porta = groupa & 0xff; - TRACE_PRINT1(DBG_PP_RDA,"WR PortA: 0x%x",groupa); - } - return SCPE_OK; + if (rw==0) { + chip->porta = groupa & 0xff; + TRACE_PRINT1(DBG_PP_RDA,"WR PortA: 0x%x",groupa); + } + return SCPE_OK; } static t_stat u22_callb(I8255* chip,int rw) { - if (rw==0) { - chip->portb = groupb & 0xff; - TRACE_PRINT1(DBG_PP_RDA,"WR PortB: 0x%x",groupb); - } - return SCPE_OK; + if (rw==0) { + chip->portb = groupb & 0xff; + TRACE_PRINT1(DBG_PP_RDA,"WR PortB: 0x%x",groupb); + } + return SCPE_OK; } /* callback handler for FDC bits */ static t_stat u22_callc(I8255* chip,int rw) { - /* bit0: TC+ positive enforce that internal data counter of FDC is reset - * bit1: RDY+ positive enable the FDC - * bit2: FDIE+ positive enable FDC interrupt (handled directly by reading portc in sage_fd.c) - * bit3: SL0- negative select of drive 0 - * bit4: SL1- negative select of drive 1 - * bit5: MOT- negative switch on drive motor (ignored) - * bit6: PCRMP- negative precompensation (ignored) - * bit7: FRES+ positive FDC reset - */ + /* bit0: TC+ positive enforce that internal data counter of FDC is reset + * bit1: RDY+ positive enable the FDC + * bit2: FDIE+ positive enable FDC interrupt (handled directly by reading portc in sage_fd.c) + * bit3: SL0- negative select of drive 0 + * bit4: SL1- negative select of drive 1 + * bit5: MOT- negative switch on drive motor (ignored) + * bit6: PCRMP- negative precompensation (ignored) + * bit7: FRES+ positive FDC reset + */ - if (I8255_ISSET(portc,U22C_TC)) { /* TC+ */ - i8272_finish(&u21); /* terminate a read/write in progress */ - } - if (I8255_ISCLR(portc,U22C_RDY)) { /* RDY+ */ - i8272_abortio(&u21); /* abort current op */ - } - if (I8255_ISCLR(portc,U22C_SL0)) { /* SL0- */ - u21.fdc_curdrv = 0; - } else if (I8255_ISCLR(portc,U22C_SL1)) { /* SL1- */ - u21.fdc_curdrv = 1; - } else if (I8255_ISSET(portc,U22C_SL0|U22C_SL1)) { /* deselect drives */ - u21.fdc_curdrv = 0; - } - if (I8255_ISSET(portc,U22C_FRES)) { /* FRES+ */ - i8272_reset(&u21); - } - TRACE_PRINT(DBG_PP_WRC,(sim_deb,"PORTC Flags: %s%s%s%s%s%s%s%s", - I8255_ISSET(portc,U22C_TC)?"TC ":"", - I8255_ISSET(portc,U22C_RDY)?"RDY ":"", - I8255_ISSET(portc,U22C_FDIE)?"FDIE ":"", - I8255_ISSET(portc,U22C_SL0)?"":"SL0 ", - I8255_ISSET(portc,U22C_SL1)?"":"SL1 ", - I8255_ISSET(portc,U22C_MOT)?"":"MOT ", - I8255_ISSET(portc,U22C_PCRMP)?"":"PCRMP ", - I8255_ISSET(portc,U22C_FRES)?"FRES ":"")); - return SCPE_OK; + if (I8255_ISSET(portc,U22C_TC)) { /* TC+ */ + i8272_finish(&u21); /* terminate a read/write in progress */ + } + if (I8255_ISCLR(portc,U22C_RDY)) { /* RDY+ */ + i8272_abortio(&u21); /* abort current op */ + } + if (I8255_ISCLR(portc,U22C_SL0)) { /* SL0- */ + u21.fdc_curdrv = 0; + } else if (I8255_ISCLR(portc,U22C_SL1)) { /* SL1- */ + u21.fdc_curdrv = 1; + } else if (I8255_ISSET(portc,U22C_SL0|U22C_SL1)) { /* deselect drives */ + u21.fdc_curdrv = 0; + } + if (I8255_ISSET(portc,U22C_FRES)) { /* FRES+ */ + i8272_reset(&u21); + } + TRACE_PRINT(DBG_PP_WRC,(sim_deb,"PORTC Flags: %s%s%s%s%s%s%s%s", + I8255_ISSET(portc,U22C_TC)?"TC ":"", + I8255_ISSET(portc,U22C_RDY)?"RDY ":"", + I8255_ISSET(portc,U22C_FDIE)?"FDIE ":"", + I8255_ISSET(portc,U22C_SL0)?"":"SL0 ", + I8255_ISSET(portc,U22C_SL1)?"":"SL1 ", + I8255_ISSET(portc,U22C_MOT)?"":"MOT ", + I8255_ISSET(portc,U22C_PCRMP)?"":"PCRMP ", + I8255_ISSET(portc,U22C_FRES)?"FRES ":"")); + return SCPE_OK; } static t_stat u22_ckmode(I8255* chip, uint32 data) { - /* hardwired: - * d7=1 -- mode set flag - * d6=0 -+ group a mode 0: basic I/O - * d5=0 -+ - * d4=1 -- porta = input - * d3=0 -- portc upper = output - * d2=0 -- group b mode 0: basic I/O - * d1=1 -- portb = input - * d0=0 -- portc lower = output - */ - TRACE_PRINT1(DBG_PP_MODE,"WR Mode: 0x%x",data); - if (data != 0x92) { - printf("u22_ckmode: unsupported ctrl=0x%02x\n",data); - return STOP_IMPL; - } - return SCPE_OK; + /* hardwired: + * d7=1 -- mode set flag + * d6=0 -+ group a mode 0: basic I/O + * d5=0 -+ + * d4=1 -- porta = input + * d3=0 -- portc upper = output + * d2=0 -- group b mode 0: basic I/O + * d1=1 -- portb = input + * d0=0 -- portc lower = output + */ + TRACE_PRINT1(DBG_PP_MODE,"WR Mode: 0x%x",data); + if (data != 0x92) { + printf("u22_ckmode: unsupported ctrl=0x%02x\n",data); + return STOP_IMPL; + } + return SCPE_OK; } /*********************************************************************************** @@ -427,114 +427,114 @@ extern DEVICE sagetimer2_dev; /* forward timer 2 */ UNIT sagetimer2_unit = { - UDATA (&timer2_svc, UNIT_IDLE, 0) + UDATA (&timer2_svc, UNIT_IDLE, 0) }; static I8253 u74 = { {0,0,U74_ADDR,8,2}, - &sagetimer2_dev,&sagetimer2_unit,i8253_reset,u74_ckmode, - { { 0, }, { u74_call1, }, { 0, } } + &sagetimer2_dev,&sagetimer2_unit,i8253_reset,u74_ckmode, + { { 0, }, { u74_call1, }, { 0, } } }; /* timer 1 */ UNIT sagetimer1_unit = { - UDATA (&timer1_svc, UNIT_IDLE, 1) + UDATA (&timer1_svc, UNIT_IDLE, 1) }; static I8253 u75 = { {0,0,U75_ADDR,8,2}, - &sagetimer1_dev,&sagetimer1_unit,i8253_reset,u75_ckmode, - { { u75_call0, }, { 0, }, { 0, } } + &sagetimer1_dev,&sagetimer1_unit,i8253_reset,u75_ckmode, + { { u75_call0, }, { 0, }, { 0, } } }; REG sagetimer1_reg[] = { - { HRDATA(INIT, u75.init, 8), REG_HRO }, - { HRDATA(STATE0,u75.cntr[0].state, 8),REG_HRO }, - { HRDATA(STATE1,u75.cntr[1].state, 8),REG_HRO }, - { HRDATA(STATE2,u75.cntr[2].state, 8),REG_HRO }, - { HRDATA(MODE0, u75.cntr[0].mode, 8) }, - { HRDATA(MODE1, u75.cntr[1].mode, 8) }, - { HRDATA(MODE2, u75.cntr[2].mode, 8) }, - { HRDATA(CNT0, u75.cntr[0].count, 16) }, - { HRDATA(CNT1, u75.cntr[1].count, 16) }, - { HRDATA(CNT2, u75.cntr[2].count, 16) }, - { HRDATA(LATCH0,u75.cntr[0].latch, 16) }, - { HRDATA(LATCH1,u75.cntr[1].latch, 16) }, - { HRDATA(LATCH2,u75.cntr[2].latch, 16) }, - { HRDATA(DIV0, u75.cntr[0].divider, 16),REG_HRO }, - { HRDATA(DIV1, u75.cntr[1].divider, 16),REG_HRO }, - { HRDATA(DIV2, u75.cntr[2].divider, 16),REG_HRO }, - { NULL } + { HRDATA(INIT, u75.init, 8), REG_HRO }, + { HRDATA(STATE0,u75.cntr[0].state, 8),REG_HRO }, + { HRDATA(STATE1,u75.cntr[1].state, 8),REG_HRO }, + { HRDATA(STATE2,u75.cntr[2].state, 8),REG_HRO }, + { HRDATA(MODE0, u75.cntr[0].mode, 8) }, + { HRDATA(MODE1, u75.cntr[1].mode, 8) }, + { HRDATA(MODE2, u75.cntr[2].mode, 8) }, + { HRDATA(CNT0, u75.cntr[0].count, 16) }, + { HRDATA(CNT1, u75.cntr[1].count, 16) }, + { HRDATA(CNT2, u75.cntr[2].count, 16) }, + { HRDATA(LATCH0,u75.cntr[0].latch, 16) }, + { HRDATA(LATCH1,u75.cntr[1].latch, 16) }, + { HRDATA(LATCH2,u75.cntr[2].latch, 16) }, + { HRDATA(DIV0, u75.cntr[0].divider, 16),REG_HRO }, + { HRDATA(DIV1, u75.cntr[1].divider, 16),REG_HRO }, + { HRDATA(DIV2, u75.cntr[2].divider, 16),REG_HRO }, + { NULL } }; static MTAB sagetimer1_mod[] = { { MTAB_XTD|MTAB_VDV, 0, "IO", "IO", &set_iobase, &show_iobase, NULL }, - { 0 } + { 0 } }; DEVICE sagetimer1_dev = { - "TIMER1", &sagetimer1_unit, sagetimer1_reg, sagetimer1_mod, - 1, 16, 32, 2, 16, 16, - NULL, NULL, &sagetimer1_reset, - NULL, NULL, NULL, - &u75, DEV_DEBUG, 0, - i8253_dt, NULL, NULL + "TIMER1", &sagetimer1_unit, sagetimer1_reg, sagetimer1_mod, + 1, 16, 32, 2, 16, 16, + NULL, NULL, &sagetimer1_reset, + NULL, NULL, NULL, + &u75, DEV_DEBUG, 0, + i8253_dt, NULL, NULL }; static t_stat sagetimer1_reset(DEVICE* dptr) { - t_stat rc; - if (!(rc = (dptr->flags & DEV_DIS) ? - del_iohandler(dptr->ctxt) : - add_iohandler(&sagetimer1_unit,dptr->ctxt,i8253_io)) != SCPE_OK) return rc; - return u75.reset(&u75); + t_stat rc; + if (!(rc = (dptr->flags & DEV_DIS) ? + del_iohandler(dptr->ctxt) : + add_iohandler(&sagetimer1_unit,dptr->ctxt,i8253_io)) != SCPE_OK) return rc; + return u75.reset(&u75); } static t_stat timer1_svc(UNIT* uptr) { - int32 wait; - I8253CNTR* t1c0 = &u75.cntr[0]; - I8253CNTR* t2c0 = &u74.cntr[0]; - -// fprintf(sim_deb,"TIMER1: timer1_svc called T1C0=%d T2C0=%d\n",t1c0->count,t2c0->count); - /* we call this service 64000 times a second to decrement counter T1C0. - * When T1C0 reaches 0, it will decrement T2C0 */ - t1c0->count--; - if (t1c0->count <= 0) { - /* reload from divider */ - t1c0->count = t1c0->divider; - /* decrement T2C0 counter and raise interrupt 6 if counter is zero */ - if (t2c0->count == 0) { - sage_raiseint(TIMER2C0_PICINT); -// printf("timer1 heartbeat\n"); - t2c0->count = 65536; - } - t2c0->count--; - } + int32 wait; + I8253CNTR* t1c0 = &u75.cntr[0]; + I8253CNTR* t2c0 = &u74.cntr[0]; + +// fprintf(sim_deb,"TIMER1: timer1_svc called T1C0=%d T2C0=%d\n",t1c0->count,t2c0->count); + /* we call this service 64000 times a second to decrement counter T1C0. + * When T1C0 reaches 0, it will decrement T2C0 */ + t1c0->count--; + if (t1c0->count <= 0) { + /* reload from divider */ + t1c0->count = t1c0->divider; + /* decrement T2C0 counter and raise interrupt 6 if counter is zero */ + if (t2c0->count == 0) { + sage_raiseint(TIMER2C0_PICINT); +// printf("timer1 heartbeat\n"); + t2c0->count = 65536; + } + t2c0->count--; + } - /* adjust timing */ - wait = sim_rtcn_calb(64000,TMR_RTC1); - sim_activate(u75.unit,wait); /* 64000 ticks per second */ - return SCPE_OK; + /* adjust timing */ + wait = sim_rtcn_calb(64000,TMR_RTC1); + sim_activate(u75.unit,wait); /* 64000 ticks per second */ + return SCPE_OK; } static t_stat u75_ckmode(I8253* chip,uint32 mode) { - /* @TODO check valid modes */ - return SCPE_OK; + /* @TODO check valid modes */ + return SCPE_OK; } static t_stat u75_call0(I8253* chip,int rw,uint32* value) { - if (rw==1) { - I8253CNTR* cntr = &chip->cntr[0]; - if ((cntr->mode & I8253_BOTH) && (cntr->state & I8253_ST_MSBNEXT)) { - sim_cancel(chip->unit); - return SCPE_OK; /* not fully loaded yet */ - } else { - /* start the CK0 clock at 64000Hz */ - sim_activate(chip->unit,sim_rtcn_init(64000,TMR_RTC1)); /* use timer1 C0 for this clock */ - } - } - return SCPE_OK; + if (rw==1) { + I8253CNTR* cntr = &chip->cntr[0]; + if ((cntr->mode & I8253_BOTH) && (cntr->state & I8253_ST_MSBNEXT)) { + sim_cancel(chip->unit); + return SCPE_OK; /* not fully loaded yet */ + } else { + /* start the CK0 clock at 64000Hz */ + sim_activate(chip->unit,sim_rtcn_init(64000,TMR_RTC1)); /* use timer1 C0 for this clock */ + } + } + return SCPE_OK; } @@ -543,91 +543,91 @@ static t_stat u75_call0(I8253* chip,int rw,uint32* value) ***********************************************************************************/ REG sagetimer2_reg[] = { - { HRDATA(INIT, u74.init, 8), REG_HRO }, - { HRDATA(STATE0,u74.cntr[0].state, 8),REG_HRO }, - { HRDATA(STATE1,u74.cntr[1].state, 8),REG_HRO }, - { HRDATA(STATE2,u74.cntr[2].state, 8),REG_HRO }, - { HRDATA(MODE0, u74.cntr[0].mode, 8) }, - { HRDATA(MODE1, u74.cntr[1].mode, 8) }, - { HRDATA(MODE2, u74.cntr[2].mode, 8) }, - { HRDATA(CNT0, u74.cntr[0].count, 16) }, - { HRDATA(CNT1, u74.cntr[1].count, 16) }, - { HRDATA(CNT2, u74.cntr[2].count, 16) }, - { HRDATA(LATCH0,u74.cntr[0].latch, 16) }, - { HRDATA(LATCH1,u74.cntr[1].latch, 16) }, - { HRDATA(LATCH2,u74.cntr[2].latch, 16) }, - { HRDATA(DIV0, u74.cntr[0].divider, 16),REG_HRO }, - { HRDATA(DIV1, u74.cntr[1].divider, 16),REG_HRO }, - { HRDATA(DIV2, u74.cntr[2].divider, 16),REG_HRO }, - { NULL } + { HRDATA(INIT, u74.init, 8), REG_HRO }, + { HRDATA(STATE0,u74.cntr[0].state, 8),REG_HRO }, + { HRDATA(STATE1,u74.cntr[1].state, 8),REG_HRO }, + { HRDATA(STATE2,u74.cntr[2].state, 8),REG_HRO }, + { HRDATA(MODE0, u74.cntr[0].mode, 8) }, + { HRDATA(MODE1, u74.cntr[1].mode, 8) }, + { HRDATA(MODE2, u74.cntr[2].mode, 8) }, + { HRDATA(CNT0, u74.cntr[0].count, 16) }, + { HRDATA(CNT1, u74.cntr[1].count, 16) }, + { HRDATA(CNT2, u74.cntr[2].count, 16) }, + { HRDATA(LATCH0,u74.cntr[0].latch, 16) }, + { HRDATA(LATCH1,u74.cntr[1].latch, 16) }, + { HRDATA(LATCH2,u74.cntr[2].latch, 16) }, + { HRDATA(DIV0, u74.cntr[0].divider, 16),REG_HRO }, + { HRDATA(DIV1, u74.cntr[1].divider, 16),REG_HRO }, + { HRDATA(DIV2, u74.cntr[2].divider, 16),REG_HRO }, + { NULL } }; static MTAB sagetimer2_mod[] = { { MTAB_XTD|MTAB_VDV, 0, "IO", "IO", &set_iobase, &show_iobase, NULL }, - { 0 } + { 0 } }; DEVICE sagetimer2_dev = { - "TIMER2", &sagetimer2_unit, sagetimer2_reg, sagetimer2_mod, - 1, 16, 32, 2, 16, 16, - NULL, NULL, &sagetimer2_reset, - NULL, NULL, NULL, - &u74, DEV_DEBUG, 0, - i8253_dt, NULL, NULL + "TIMER2", &sagetimer2_unit, sagetimer2_reg, sagetimer2_mod, + 1, 16, 32, 2, 16, 16, + NULL, NULL, &sagetimer2_reset, + NULL, NULL, NULL, + &u74, DEV_DEBUG, 0, + i8253_dt, NULL, NULL }; static t_stat sagetimer2_reset(DEVICE* dptr) { - t_stat rc; - if ((rc = (dptr->flags & DEV_DIS) ? - del_iohandler(dptr->ctxt) : - add_iohandler(&sagetimer2_unit,dptr->ctxt,i8253_io)) != SCPE_OK) return rc; - return u74.reset(&u74); + t_stat rc; + if ((rc = (dptr->flags & DEV_DIS) ? + del_iohandler(dptr->ctxt) : + add_iohandler(&sagetimer2_unit,dptr->ctxt,i8253_io)) != SCPE_OK) return rc; + return u74.reset(&u74); } static t_stat u74_ckmode(I8253* chip,uint32 mode) { - /* @TODO check valid modes */ - return SCPE_OK; + /* @TODO check valid modes */ + return SCPE_OK; } static t_stat u74_call1(I8253* chip,int rw,uint32* value) { - if (rw==1) { - I8253CNTR* cntr = &chip->cntr[1]; - if ((cntr->mode & I8253_BOTH) && (cntr->state & I8253_ST_MSBNEXT)) { - sim_cancel(chip->unit); - return SCPE_OK; /* not fully loaded yet */ - } else { - /* start the CK0 clock at 64000Hz */ - sim_activate(chip->unit,sim_rtcn_init(64000,TMR_RTC1)); /* use timer1 C0 for this clock */ - } - } - return SCPE_OK; + if (rw==1) { + I8253CNTR* cntr = &chip->cntr[1]; + if ((cntr->mode & I8253_BOTH) && (cntr->state & I8253_ST_MSBNEXT)) { + sim_cancel(chip->unit); + return SCPE_OK; /* not fully loaded yet */ + } else { + /* start the CK0 clock at 64000Hz */ + sim_activate(chip->unit,sim_rtcn_init(64000,TMR_RTC1)); /* use timer1 C0 for this clock */ + } + } + return SCPE_OK; } static t_stat timer2_svc(UNIT* uptr) { - int32 wait; - I8253CNTR* t2c1 = &u74.cntr[1]; - I8253CNTR* t2c2 = &u74.cntr[2]; - - /* we call this service 64000 times a second to decrement counter T2C1. - * When T2C1 reaches 0, it will decrement T2C2 */ - t2c1->count--; - if (t2c1->count <= 0) { - /* reload from divider */ - t2c1->count = t2c1->divider; - /* decrement T2C2 counter and raise interrupt 0 if counter is zero */ - if (t2c2->count == 0) { -// printf("timer2 heartbeat\n"); - sage_raiseint(TIMER2C2_PICINT); - } - t2c2->count--; - } + int32 wait; + I8253CNTR* t2c1 = &u74.cntr[1]; + I8253CNTR* t2c2 = &u74.cntr[2]; - /* adjust timing */ - wait = sim_rtcn_calb(64000,TMR_RTC1); - sim_activate(u74.unit,wait); /* 64000 ticks per second */ - return SCPE_OK; + /* we call this service 64000 times a second to decrement counter T2C1. + * When T2C1 reaches 0, it will decrement T2C2 */ + t2c1->count--; + if (t2c1->count <= 0) { + /* reload from divider */ + t2c1->count = t2c1->divider; + /* decrement T2C2 counter and raise interrupt 0 if counter is zero */ + if (t2c2->count == 0) { +// printf("timer2 heartbeat\n"); + sage_raiseint(TIMER2C2_PICINT); + } + t2c2->count--; + } + + /* adjust timing */ + wait = sim_rtcn_calb(64000,TMR_RTC1); + sim_activate(u74.unit,wait); /* 64000 ticks per second */ + return SCPE_OK; } diff --git a/SAGE/sage_sys.c b/SAGE/sage_sys.c index c4eee9d9..2da2ef95 100644 --- a/SAGE/sage_sys.c +++ b/SAGE/sage_sys.c @@ -46,26 +46,26 @@ extern DEVICE sagehd_dev; extern DEVICE sageaux_dev; #endif -char sim_name[] = "Sage-II/IV 68k"; +char sim_name[] = "Sage-II/IV 68k"; -REG *sim_PC = &m68kcpu_reg[18]; -int sim_emax = SIM_EMAX; -DEVICE *sim_devices[] = { - &sagecpu_dev, - &sagepic_dev, - &sagetimer1_dev, - &sagetimer2_dev, - &sagedip_dev, - &sagefd_dev, - &sagecons_dev, - &sagesio_dev, - &sagelp_dev, +REG *sim_PC = &m68kcpu_reg[18]; +int sim_emax = SIM_EMAX; +DEVICE *sim_devices[] = { + &sagecpu_dev, + &sagepic_dev, + &sagetimer1_dev, + &sagetimer2_dev, + &sagedip_dev, + &sagefd_dev, + &sagecons_dev, + &sagesio_dev, + &sagelp_dev, #if 0 - &sageieee_dev, + &sageieee_dev, #endif #ifdef SAGE_IV - &sagehd_dev, - &sageaux_dev, + &sagehd_dev, + &sageaux_dev, #endif - NULL + NULL }; diff --git a/TX-0/tx0_cpu.c b/TX-0/tx0_cpu.c index 93e99b12..93ef7775 100644 --- a/TX-0/tx0_cpu.c +++ b/TX-0/tx0_cpu.c @@ -325,7 +325,7 @@ REG cpu_reg[] = { { ORDATA (MBR, MBR, 18) }, { ORDATA (LR, LR, 18) }, { ORDATA (TAC, TAC, 18) }, - { ORDATA (TBR, TBR, 18) }, + { ORDATA (TBR, TBR, 18) }, { ORDATA (PF, PF, 18) }, { BRDATA (PCQ, pcq, 8, ASIZE, PCQ_SIZE), REG_RO+REG_CIRC }, { ORDATA (PCQP, pcq_p, 6), REG_HRO }, @@ -703,10 +703,10 @@ t_stat sim_instr (void) break; case 3: /* tix (Transfer and Index) */ TRACE_PRINT(TRN_MSG, ("[%06o] TIX: XR=%05o\n", PC-1, XR)); - if ((XR == 037777) || (XR == 000000)) { /* +/- 0, take next instruction */ + if ((XR == 037777) || (XR == 000000)) { /* +/- 0, take next instruction */ TRACE_PRINT(TRN_MSG, ("+/- 0, transfer not taken.\n")); } else { /* Not +/- 0 */ - if (XR & 0020000) { /* XR[4] == 1 */ + if (XR & 0020000) { /* XR[4] == 1 */ TRACE_PRINT(TRN_MSG, ("XR is negative, transfer taken,")); XR ++; } else { /* XR[4] = 0 */ diff --git a/TX-0/tx0_stddev.c b/TX-0/tx0_stddev.c index 3ea7100b..b23cf7d9 100644 --- a/TX-0/tx0_stddev.c +++ b/TX-0/tx0_stddev.c @@ -290,13 +290,13 @@ circuitry. Lines without seventh hole punched are ignored by the PETR. As each line of the tape is read in, the data is stored into an 18-bit BUF register with bits mapped as follows: -Tape BUF -0 0 -1 3 -2 6 -3 9 -4 12 -5 15 +Tape BUF +0 0 +1 3 +2 6 +3 9 +4 12 +5 15 Up to three lines of tape may be read into a single the single BUF register. Before subsequent lines are read, the BUF register is cycled one bit right. @@ -410,18 +410,18 @@ extern UNIT cpu_unit; /* Switches the CPU to READIN mode and starts execution. */ t_stat petr_boot (int32 unitno, DEVICE *dptr) { - t_stat reason = SCPE_OK; + t_stat reason = SCPE_OK; #ifdef SANITY_CHECK_TAPE - int32 AC, MBR, MAR, IR = 0; - int32 blkcnt, chksum = 0, fa, la; - int32 addr, tdata; + int32 AC, MBR, MAR, IR = 0; + int32 blkcnt, chksum = 0, fa, la; + int32 addr, tdata; #endif /* SANITY_CHECK_TAPE */ /* Switch to READIN mode. */ cpu_set_mode(&cpu_unit, UNIT_MODE_READIN, NULL, NULL); #ifdef SANITY_CHECK_TAPE - for(;(IR != 2) && (IR != 1);) { + for(;(IR != 2) && (IR != 1);) { AC = petr(3,0,0); /* Read three chars from tape into AC */ MAR = AC & AMASK; /* Set memory address */ IR = AC >> 16; @@ -453,62 +453,62 @@ t_stat petr_boot (int32 unitno, DEVICE *dptr) default: reason = SCPE_IERR; break; - } - } + } + } - blkcnt = 0; - while (1) { - chksum = 0; + blkcnt = 0; + while (1) { + chksum = 0; - fa = petr(3,0,0); /* Read three characters from tape. */ + fa = petr(3,0,0); /* Read three characters from tape. */ - if ((fa & 0400000) || (fa & 0200000)) { - break; - } + if ((fa & 0400000) || (fa & 0200000)) { + break; + } - chksum += fa; - if (chksum > 0777777) { - chksum +=1; - } - chksum &= 0777777; + chksum += fa; + if (chksum > 0777777) { + chksum +=1; + } + chksum &= 0777777; - la = petr(3,0,0); /* Read three characters from tape. */ + la = petr(3,0,0); /* Read three characters from tape. */ - chksum += la; - if (chksum > 0777777) { - chksum +=1; - } - chksum &= 0777777; + chksum += la; + if (chksum > 0777777) { + chksum +=1; + } + chksum &= 0777777; - la = (~la) & 0177777; + la = (~la) & 0177777; - sim_printf("First Address=%06o, Last Address=%06o\n", fa, la); + sim_printf("First Address=%06o, Last Address=%06o\n", fa, la); - for(addr = fa; addr <= la; addr++) { - tdata = petr(3,0,0); /* Read three characters from tape. */ - chksum += tdata; - if (chksum > 0777777) { - chksum +=1; - } - chksum &= 0777777; - } + for(addr = fa; addr <= la; addr++) { + tdata = petr(3,0,0); /* Read three characters from tape. */ + chksum += tdata; + if (chksum > 0777777) { + chksum +=1; + } + chksum &= 0777777; + } - chksum = (~chksum) & 0777777; + chksum = (~chksum) & 0777777; - tdata = petr(3,0,0); + tdata = petr(3,0,0); - if (chksum != tdata) { - reason = SCPE_FMT; - } + if (chksum != tdata) { + reason = SCPE_FMT; + } - sim_printf("Block %d: Calculated checksum=%06o, real checksum=%06o, %s\n", blkcnt, chksum, tdata, chksum == tdata ? "OK" : "BAD Checksum!"); - blkcnt++; - } + sim_printf("Block %d: Calculated checksum=%06o, real checksum=%06o, %s\n", blkcnt, chksum, tdata, chksum == tdata ? "OK" : "BAD Checksum!"); + blkcnt++; + } - fseek (petr_dev.units[0].fileref, 0, SEEK_SET); + fseek (petr_dev.units[0].fileref, 0, SEEK_SET); #endif /* SANITY_CHECK_TAPE */ - /* Start Execution */ + /* Start Execution */ return (reason); } diff --git a/VAX/vax860_stddev.c b/VAX/vax860_stddev.c index 746b021c..09a8e512 100644 --- a/VAX/vax860_stddev.c +++ b/VAX/vax860_stddev.c @@ -56,7 +56,7 @@ #define TXCS_M_TEN 0xF #define TXCS_TEN (TXCS_M_TEN << TXCS_V_TEN) #define TXCS_RD (CSR_DONE + CSR_IE + TXCS_TEN + TXCS_IDC + TXCS_WMN) /* Readable bits */ -#define TXCS_WR (CSR_IE) /* Writeable bits */ +#define TXCS_WR (CSR_IE) /* Writeable bits */ #define ID_CT 0 /* console terminal */ #define ID_RS 1 /* remote services */ #define ID_EMM 2 /* environmental monitoring module */ diff --git a/alpha/alpha_cpu.c b/alpha/alpha_cpu.c index 7a6d7c1c..7c63dd1b 100644 --- a/alpha/alpha_cpu.c +++ b/alpha/alpha_cpu.c @@ -1372,7 +1372,7 @@ while (reason == 0) { if (!(arch_mask & AMASK_CIX)) ABORT (EXC_RSVI); for (res = 0; rbv != 0; res++) { rbv = rbv & ~(rbv & NEG_Q (rbv)); - } + } break; case 0x31: /* PERR */ diff --git a/alpha/alpha_ev5_pal.c b/alpha/alpha_ev5_pal.c index 124968e4..8519e4fa 100644 --- a/alpha/alpha_ev5_pal.c +++ b/alpha/alpha_ev5_pal.c @@ -164,7 +164,7 @@ REG ev5pal_reg[] = { { FLDATA (PWRFL, ev5_pwrfl, 0) }, { FLDATA (SLI, ev5_sli, 0) }, { NULL } - }; + }; DEVICE ev5pal_dev = { "EV5PAL", &ev5pal_unit, ev5pal_reg, NULL, @@ -172,7 +172,7 @@ DEVICE ev5pal_dev = { NULL, NULL, &pal_proc_reset_hwre, NULL, NULL, NULL, NULL, DEV_DIS - }; + }; /* EV5 interrupt dispatch - reached from top of instruction loop - dispatch to PALcode */ @@ -675,7 +675,7 @@ switch (fnc) { if (pal_mode && ((val ^ ev5_icsr) & ICSR_SDE)) { if (val & ICSR_SDE) { PAL_USE_SHADOW; } else { PAL_USE_MAIN; } - } + } ev5_icsr = val & ICSR_RW; itlb_set_spage ((((uint32) val) >> ICSR_V_SPE) & ICSR_M_SPE); fpen = (((uint32) val) >> ICSR_V_FPE) & 1; @@ -815,12 +815,12 @@ static struct pal_opt ld_st_opt[] = { { HW_LD_PTE, 'P' }, { HW_LD_LCK, 'L' }, { 0 } - }; + }; static struct pal_opt rei_opt[] = { { HW_REI_S, 'S' }, { 0 } - }; + }; /* Print options for hardware PAL instruction */ diff --git a/alpha/alpha_fpi.c b/alpha/alpha_fpi.c index 62c7b459..ecf13211 100644 --- a/alpha/alpha_fpi.c +++ b/alpha/alpha_fpi.c @@ -132,8 +132,8 @@ uint32 sign = FPR_GETSIGN (op)? S_SIGN: 0; uint32 frac = ((uint32) (op >> S_V_FRAC)) & M32; uint32 exp = FPR_GETEXP (op); -if (exp == FPR_NAN) exp = S_NAN; /* inf or NaN? */ -else if (exp != 0) exp = exp + S_BIAS - T_BIAS; /* non-zero? */ +if (exp == FPR_NAN) exp = S_NAN; /* inf or NaN? */ +else if (exp != 0) exp = exp + S_BIAS - T_BIAS; /* non-zero? */ exp = (exp & S_M_EXP) << S_V_EXP; return (t_uint64) (sign | exp | (frac & ~(S_SIGN|S_EXP))); } @@ -631,8 +631,8 @@ static const int32 expmin[2] = { T_BIAS - S_BIAS, 0 }; t_uint64 rndadd, rndbits, res; uint32 rndm; -if (r->frac == 0) /* result 0? */ - return ((t_uint64) r->sign << FPR_V_SIGN); +if (r->frac == 0) /* result 0? */ + return ((t_uint64) r->sign << FPR_V_SIGN); rndm = I_GETFRND (ir); /* inst round mode */ if (rndm == I_FRND_D) rndm = FPCR_GETFRND (fpcr); /* dynamic? use FPCR */ rndbits = r->frac & infrnd[dp]; /* isolate round bits */ diff --git a/alpha/alpha_fpv.c b/alpha/alpha_fpv.c index 90513448..b66bc8bf 100644 --- a/alpha/alpha_fpv.c +++ b/alpha/alpha_fpv.c @@ -82,7 +82,7 @@ uint32 sign = FPR_GETSIGN (op)? F_SIGN: 0; uint32 frac = (uint32) (op >> F_V_FRAC); uint32 exp = FPR_GETEXP (op); -if (exp != 0) exp = exp + F_BIAS - G_BIAS; /* zero? */ +if (exp != 0) exp = exp + F_BIAS - G_BIAS; /* zero? */ exp = (exp & F_M_EXP) << F_V_EXP; return (t_uint64) (sign | exp | (SWAP_VAXF (frac) & ~(F_SIGN|F_EXP))); } @@ -398,7 +398,7 @@ r->frac = r->frac & M64; if (r->frac == 0) { /* if fraction = 0 */ r->sign = r->exp = 0; /* result is 0 */ return; - } + } while ((r->frac & UF_NM) == 0) { /* normalized? */ for (i = 0; i < 5; i++) { /* find first 1 */ if (r->frac & normmask[i]) break; diff --git a/alpha/alpha_sys.c b/alpha/alpha_sys.c index 580a3ca6..7d91f832 100644 --- a/alpha/alpha_sys.c +++ b/alpha/alpha_sys.c @@ -543,7 +543,7 @@ if (sw & SWMASK ('C')) { /* char format? */ for (sc = 0; sc < 64; sc = sc + 8) { /* print string */ c = (uint32) (val[0] >> sc) & 0x7F; fprintf (of, (c < 0x20)? "<%02X>": "%c", c); - } + } return -7; /* return # chars */ } if (sw & SWMASK ('M')) { /* inst format? */ diff --git a/alpha/old_pal/alpha_pal_unix.c b/alpha/old_pal/alpha_pal_unix.c index 73fa8011..363c657e 100644 --- a/alpha/old_pal/alpha_pal_unix.c +++ b/alpha/old_pal/alpha_pal_unix.c @@ -162,7 +162,7 @@ REG unixpal_reg[] = { { HRDATA (IPL, unix_ipl, 3) }, { HRDATA (CM, unix_cm, 0) }, { NULL } - }; + }; DEVICE unixpal_dev = { "UNIXPAL", &unixpal_unit, unixpal_reg, NULL, @@ -170,7 +170,7 @@ DEVICE unixpal_dev = { NULL, NULL, &pal_proc_reset_unix, NULL, NULL, NULL, NULL, DEV_DIS - }; + }; /* Unix interrupt evaluator - returns IPL of highest priority interrupt */ diff --git a/alpha/old_pal/alpha_pal_vms.c b/alpha/old_pal/alpha_pal_vms.c index df0612da..5d7d1bdc 100644 --- a/alpha/old_pal/alpha_pal_vms.c +++ b/alpha/old_pal/alpha_pal_vms.c @@ -211,7 +211,7 @@ REG vmspal_reg[] = { { HRDATA (ASTSR, vms_astsr, 4) }, { FLDATA (DATFX, vms_datfx, 0) }, { NULL } - }; + }; DEVICE vmspal_dev = { "VMSPAL", &vmspal_unit, vmspal_reg, NULL, @@ -219,7 +219,7 @@ DEVICE vmspal_dev = { NULL, NULL, &pal_proc_reset_vms, NULL, NULL, NULL, NULL, 0 - }; + }; /* VMS interrupt evaluator - returns IPL of highest priority interrupt */ @@ -1571,7 +1571,7 @@ if ((pa & (lnt - 1)) == 0) { /* aligned? */ if (lnt == L_LONG) return ReadPL (pa); /* long? */ if (lnt == L_WORD) return ReadPW (pa); /* word? */ return ReadPB (pa); /* byte */ - } + } if ((VA_GETOFF (va) + lnt) > VA_PAGSIZE) { /* cross page? */ if (exc = Test (va + 8, acc, &pa1)) /* test, translate */ ABORT1 (va + 8, exc + EXC_R); diff --git a/display/display.h b/display/display.h index 98226eaf..850e0c20 100644 --- a/display/display.h +++ b/display/display.h @@ -139,5 +139,5 @@ extern unsigned char display_tablet; * users of this library are expected to provide these calls. * simulator will set 18 simulated switches. */ -extern unsigned long cpu_get_switches(void); /* get current switch state */ -extern void cpu_set_switches(unsigned long); /* set switches */ +extern unsigned long cpu_get_switches(void); /* get current switch state */ +extern void cpu_set_switches(unsigned long); /* set switches */ diff --git a/sigma/sigma_coc.c b/sigma/sigma_coc.c index d7af5c9b..800fbee8 100644 --- a/sigma/sigma_coc.c +++ b/sigma/sigma_coc.c @@ -59,17 +59,17 @@ /* DIO address */ -#define MUXDIO_V_FNC 0 /* function */ -#define MUXDIO_M_FNC 0xF -#define MUXDIO_V_COC 4 /* ctlr num */ -#define MUXDIO_M_COC 0xF +#define MUXDIO_V_FNC 0 /* function */ +#define MUXDIO_M_FNC 0xF +#define MUXDIO_V_COC 4 /* ctlr num */ +#define MUXDIO_M_COC 0xF #define MUXDIO_GETFNC(x) (((x) >> MUXDIO_V_FNC) & MUXDIO_M_FNC) #define MUXDIO_GETCOC(x) (((x) >> MUXDIO_V_COC) & MUXDIO_M_COC) -#define MUXDAT_V_LIN 0 /* line num */ -#define MUXDAT_M_LIN (MUX_LINES - 1) -#define MUXDAT_V_CHR 8 /* output char */ -#define MUXDAT_M_CHR 0xFF +#define MUXDAT_V_LIN 0 /* line num */ +#define MUXDAT_M_LIN (MUX_LINES - 1) +#define MUXDAT_V_CHR 8 /* output char */ +#define MUXDAT_M_CHR 0xFF #define MUXDAT_GETLIN(x) (((x) >> MUXDAT_V_LIN) & MUXDAT_M_LIN) #define MUXDAT_GETCHR(x) (((x) >> MUXDAT_V_CHR) & MUXDAT_M_CHR) diff --git a/sigma/sigma_cpu.c b/sigma/sigma_cpu.c index dd6d4631..eb242d93 100644 --- a/sigma/sigma_cpu.c +++ b/sigma/sigma_cpu.c @@ -724,7 +724,7 @@ switch (op) { PSW1 = ((PSW1 & ~PSW1_FPC) | /* set ctrls */ ((opnd & PSW1_M_FPC) << PSW1_V_FPC)) & ~cpu_tab[cpu_model].psw1_mbz; /* clear mbz */ - break; + break; case OP_LCF: /* load cc, flt */ if ((tr = Ea (IR, &bva, VR, BY)) != 0) /* get eff addr */ @@ -1118,7 +1118,7 @@ switch (op) { res = R[rn] | opnd; CC34_W (res); /* set CC's */ R[rn] = res; /* store */ - break; + break; case OP_EOR: /* xor */ if ((tr = Ea (IR, &bva, VR, WD)) != 0) /* get eff addr */ @@ -1128,7 +1128,7 @@ switch (op) { res = R[rn] ^ opnd; CC34_W (res); /* set CC's */ R[rn] = res; /* store */ - break; + break; /* Compares */ @@ -1137,7 +1137,7 @@ switch (op) { return tr; opnd = SEXT_LIT_W (opnd) & WMASK; /* sext to 32b */ CC234_CMP (R[rn], opnd); /* set CC's */ - break; + break; case OP_CB: /* compare byte */ if ((tr = Ea (IR, &bva, VR, BY)) != 0) /* get eff addr */ diff --git a/sigma/sigma_defs.h b/sigma/sigma_defs.h index d4ab45a6..b31fd413 100644 --- a/sigma/sigma_defs.h +++ b/sigma/sigma_defs.h @@ -170,7 +170,7 @@ typedef struct { #define S_V_MCNT 24 /* string mask/count */ #define S_M_MCNT 0xFF #define S_MCNT (S_M_MCNT << S_V_MCNT) -#define S_GETMCNT(x) (((x) >> S_V_MCNT) & S_M_MCNT) +#define S_GETMCNT(x) (((x) >> S_V_MCNT) & S_M_MCNT) #define S_ADDRINC (S_MCNT + 1) /* Data types */ @@ -196,7 +196,7 @@ typedef struct { #define FP_NORM 0x00F00000 #define FP_M_FRLO 0xFFFFFFFF /* low fraction */ #define FP_GETSIGN(x) (((x) >> FP_V_SIGN) & 1) -#define FP_GETEXP(x) (((x) >> FP_V_EXP) & FP_M_EXP) +#define FP_GETEXP(x) (((x) >> FP_V_EXP) & FP_M_EXP) #define FP_GETFRHI(x) (((x) >> FP_V_FRHI) & FP_M_FRHI) #define FP_GETFRLO(x) ((x) & FP_M_FRLO) @@ -428,7 +428,7 @@ typedef struct { #define SEXT_RN_W(x) (((x) & RNSIGN)? ((x) | ~RNMASK): ((x) & RNMASK)) #define SEXT_H_W(x) (((x) & HSIGN)? ((x) | ~HMASK): ((x) & HMASK)) -#define SEXT_LIT_W(x) (((x) & LITSIGN)? ((x) | ~LITMASK): ((x) & LITMASK)) +#define SEXT_LIT_W(x) (((x) & LITSIGN)? ((x) | ~LITMASK): ((x) & LITMASK)) #define NEG_W(x) ((~(x) + 1) & WMASK) #define NEG_D(x,y) do { y = NEG_W(y); x = (~(x) + ((y) == 0)) & WMASK; } while (0) #define CC34_W(x) CC = (((x) & WSIGN)? \ diff --git a/sigma/sigma_dk.c b/sigma/sigma_dk.c index e732465b..728c8a2a 100644 --- a/sigma/sigma_dk.c +++ b/sigma/sigma_dk.c @@ -50,8 +50,8 @@ #define DKA_M_TK 0x1FF #define DKA_V_SC 0 /* sector offset */ #define DKA_M_SC 0xF -#define DKA_GETTK(x) (((x) >> DKA_V_TK) & DKA_M_TK) -#define DKA_GETSC(x) (((x) >> DKA_V_SC) & DKA_M_SC) +#define DKA_GETTK(x) (((x) >> DKA_V_TK) & DKA_M_TK) +#define DKA_GETSC(x) (((x) >> DKA_V_SC) & DKA_M_SC) /* Status byte 3 is current sector */ diff --git a/sigma/sigma_dp.c b/sigma/sigma_dp.c index 7b7c72cb..322a1b42 100644 --- a/sigma/sigma_dp.c +++ b/sigma/sigma_dp.c @@ -65,9 +65,9 @@ #define DPA_M_HD 0x1F #define DPA_V_SC 0 /* sector offset */ #define DPA_M_SC 0x1F -#define DPA_GETCY(x) (((x) >> DPA_V_CY) & DPA_M_CY) +#define DPA_GETCY(x) (((x) >> DPA_V_CY) & DPA_M_CY) #define DPA_GETHD(x) (((x) >> DPA_V_HD) & DPA_M_HD) -#define DPA_GETSC(x) (((x) >> DPA_V_SC) & DPA_M_SC) +#define DPA_GETSC(x) (((x) >> DPA_V_SC) & DPA_M_SC) /* Sense order */ diff --git a/sigma/sigma_map.c b/sigma/sigma_map.c index 898de7bb..d9367327 100644 --- a/sigma/sigma_map.c +++ b/sigma/sigma_map.c @@ -26,7 +26,7 @@ #include "sigma_defs.h" -#define BVA_REG (RF_NUM << 2) +#define BVA_REG (RF_NUM << 2) #define BPAMASK ((cpu_tab[cpu_model].pamask << 2) | 0x3) #define NUM_MUNITS (MAXMEMSIZE / CPU_MUNIT_SIZE) diff --git a/sigma/sigma_mt.c b/sigma/sigma_mt.c index bcd419ed..19bc2ba3 100644 --- a/sigma/sigma_mt.c +++ b/sigma/sigma_mt.c @@ -489,7 +489,7 @@ switch (st) { uptr->UST |= MTDV_DTE; /* set DTE flag */ chan_set_chf (mt_dib.dva, CHF_XMDE); chan_uen (mt_dib.dva); /* force uend */ - return SCPE_IOERR; + return SCPE_IOERR; case MTSE_INVRL: /* invalid rec lnt */ uptr->UST |= MTDV_DTE; /* set DTE flag */ diff --git a/sigma/sigma_rad.c b/sigma/sigma_rad.c index 8ecdbd71..1b904a44 100644 --- a/sigma/sigma_rad.c +++ b/sigma/sigma_rad.c @@ -59,8 +59,8 @@ #define RADA_M_TK3 0x3FF #define RADA_V_SC3 0 #define RADA_M_SC3 0xF -#define RADA_GETTK(x) (((x) >> rad_tab[rad_model].tk_v) & rad_tab[rad_model].tk_m) -#define RADA_GETSC(x) (((x) >> rad_tab[rad_model].sc_v) & rad_tab[rad_model].sc_m) +#define RADA_GETTK(x) (((x) >> rad_tab[rad_model].tk_v) & rad_tab[rad_model].tk_m) +#define RADA_GETSC(x) (((x) >> rad_tab[rad_model].sc_v) & rad_tab[rad_model].sc_m) /* Address bad flag */ diff --git a/sigma/sigma_sys.c b/sigma/sigma_sys.c index f70e1b72..f9822c65 100644 --- a/sigma/sigma_sys.c +++ b/sigma/sigma_sys.c @@ -370,7 +370,7 @@ if (sw & SWMASK ('C')) { /* char format? */ if (sw & SWMASK ('A')) fprintf (of, FMTASC (c & 0x7F)); else fprint_ebcdic (of, c); - } + } return 0; /* return # chars */ } if (sw & SWMASK ('A')) { /* ASCII? */ diff --git a/sim_video.c b/sim_video.c index 7d11d54d..8ad9cf24 100644 --- a/sim_video.c +++ b/sim_video.c @@ -1149,30 +1149,30 @@ int vid_video_events (void) SDL_Event event; #if SDL_MAJOR_VERSION == 1 static char *eventtypes[] = { - "NOEVENT", /**< Unused (do not remove) */ - "ACTIVEEVENT", /**< Application loses/gains visibility */ - "KEYDOWN", /**< Keys pressed */ - "KEYUP", /**< Keys released */ - "MOUSEMOTION", /**< Mouse moved */ - "MOUSEBUTTONDOWN", /**< Mouse button pressed */ - "MOUSEBUTTONUP", /**< Mouse button released */ - "JOYAXISMOTION", /**< Joystick axis motion */ - "JOYBALLMOTION", /**< Joystick trackball motion */ - "JOYHATMOTION", /**< Joystick hat position change */ - "JOYBUTTONDOWN", /**< Joystick button pressed */ - "JOYBUTTONUP", /**< Joystick button released */ - "QUIT", /**< User-requested quit */ - "SYSWMEVENT", /**< System specific event */ - "EVENT_RESERVEDA", /**< Reserved for future use.. */ - "EVENT_RESERVEDB", /**< Reserved for future use.. */ - "VIDEORESIZE", /**< User resized video mode */ - "VIDEOEXPOSE", /**< Screen needs to be redrawn */ - "EVENT_RESERVED2", /**< Reserved for future use.. */ - "EVENT_RESERVED3", /**< Reserved for future use.. */ - "EVENT_RESERVED4", /**< Reserved for future use.. */ - "EVENT_RESERVED5", /**< Reserved for future use.. */ - "EVENT_RESERVED6", /**< Reserved for future use.. */ - "EVENT_RESERVED7", /**< Reserved for future use.. */ + "NOEVENT", /**< Unused (do not remove) */ + "ACTIVEEVENT", /**< Application loses/gains visibility */ + "KEYDOWN", /**< Keys pressed */ + "KEYUP", /**< Keys released */ + "MOUSEMOTION", /**< Mouse moved */ + "MOUSEBUTTONDOWN", /**< Mouse button pressed */ + "MOUSEBUTTONUP", /**< Mouse button released */ + "JOYAXISMOTION", /**< Joystick axis motion */ + "JOYBALLMOTION", /**< Joystick trackball motion */ + "JOYHATMOTION", /**< Joystick hat position change */ + "JOYBUTTONDOWN", /**< Joystick button pressed */ + "JOYBUTTONUP", /**< Joystick button released */ + "QUIT", /**< User-requested quit */ + "SYSWMEVENT", /**< System specific event */ + "EVENT_RESERVEDA", /**< Reserved for future use.. */ + "EVENT_RESERVEDB", /**< Reserved for future use.. */ + "VIDEORESIZE", /**< User resized video mode */ + "VIDEOEXPOSE", /**< Screen needs to be redrawn */ + "EVENT_RESERVED2", /**< Reserved for future use.. */ + "EVENT_RESERVED3", /**< Reserved for future use.. */ + "EVENT_RESERVED4", /**< Reserved for future use.. */ + "EVENT_RESERVED5", /**< Reserved for future use.. */ + "EVENT_RESERVED6", /**< Reserved for future use.. */ + "EVENT_RESERVED7", /**< Reserved for future use.. */ "USEREVENT", /** Events SDL_USEREVENT(24) through SDL_MAXEVENTS-1(31) are for your use */ "", "", diff --git a/swtp6800/common/dc-4.c b/swtp6800/common/dc-4.c index b61c02c2..4eabb167 100644 --- a/swtp6800/common/dc-4.c +++ b/swtp6800/common/dc-4.c @@ -32,19 +32,19 @@ The floppy controller is interfaced to the CPU by use of 5 memory addreses. These are SS-30 slot numbers 5 and 6 (0x8014-0x801B). - Address Mode Function - ------- ---- -------- + Address Mode Function + ------- ---- -------- - 0x8014 Read Returns FDC interrupt status - 0x8014 Write Selects the drive/head/motor control - 0x8018 Read Returns status of FDC - 0x8018 Write FDC command register - 0x8019 Read Returns FDC track register - 0x8019 Write Set FDC track register - 0x801A Read Returns FDC sector register - 0x801A Write Set FDC sector register - 0x801B Read Read data - 0x801B Write Write data + 0x8014 Read Returns FDC interrupt status + 0x8014 Write Selects the drive/head/motor control + 0x8018 Read Returns status of FDC + 0x8018 Write FDC command register + 0x8019 Read Returns FDC track register + 0x8019 Write Set FDC track register + 0x801A Read Returns FDC sector register + 0x801A Write Set FDC sector register + 0x801B Read Read data + 0x801B Write Write data Drive Select Read (0x8014): @@ -181,28 +181,28 @@ A FLEX disk is defined as follows: - Track Sector Use - 0 1 Boot sector - 0 2 Boot sector (cont) - 0 3 Unused - 0 4 System Identity Record (explained below) - 0 5 Unused - 0 6-last Directory - 10 entries/sector (explained below) - 1 1 First available data sector - last-1 last Last available data sector + Track Sector Use + 0 1 Boot sector + 0 2 Boot sector (cont) + 0 3 Unused + 0 4 System Identity Record (explained below) + 0 5 Unused + 0 6-last Directory - 10 entries/sector (explained below) + 1 1 First available data sector + last-1 last Last available data sector System Identity Record - Byte Use - 0x00 Two bytes of zeroes (Clears forward link) - 0x10 Volume name in ASCII(11 bytes) - 0x1B Volume number in binary (2 bytes) - 0x1D Address of first free data sector (Track-Sector) (2 bytes) - 0x1F Address of last free data sector (Track-Sector) (2 bytes) - 0x21 Total number of data sectors in binary (2 bytes) - 0x23 Current date (Month-Day-Year) in binary - 0x26 Highest track number on disk in binary (byte) - 0x27 Highest sector number on a track in binary (byte) + Byte Use + 0x00 Two bytes of zeroes (Clears forward link) + 0x10 Volume name in ASCII(11 bytes) + 0x1B Volume number in binary (2 bytes) + 0x1D Address of first free data sector (Track-Sector) (2 bytes) + 0x1F Address of last free data sector (Track-Sector) (2 bytes) + 0x21 Total number of data sectors in binary (2 bytes) + 0x23 Current date (Month-Day-Year) in binary + 0x26 Highest track number on disk in binary (byte) + 0x27 Highest sector number on a track in binary (byte) The following unit registers are used by this controller emulation: @@ -224,7 +224,7 @@ /* emulate a SS FLEX disk with 72 sectors and 80 tracks */ -#define NUM_DISK 4 /* standard 1797 maximum */ +#define NUM_DISK 4 /* standard 1797 maximum */ #define SECT_SIZE 256 /* standard FLEX sector */ #define NUM_SECT 72 /* sectors/track */ #define TRAK_SIZE (SECT_SIZE * NUM_SECT) /* trk size (bytes) */ @@ -240,10 +240,10 @@ /* 1797 status bits */ -#define BUSY 0x01 -#define DRQ 0x02 -#define WRPROT 0x40 -#define NOTRDY 0x80 +#define BUSY 0x01 +#define DRQ 0x02 +#define WRPROT 0x40 +#define NOTRDY 0x80 /* function prototypes */ @@ -444,7 +444,7 @@ int32 fdccmd(int32 io, int32 data) if (dsk_dev.dctrl & DEBUG_write) printf("\nfdccmd: Write of disk %d, track %d, sector %d", cur_dsk, dsk_unit[cur_dsk].u4, dsk_unit[cur_dsk].u5); - if (dsk_unit[cur_dsk].u3 & WRPROT) { + if (dsk_unit[cur_dsk].u3 & WRPROT) { printf("\nfdccmd: Drive %d is write-protected", cur_dsk); } else { pos = trksiz * dsk_unit[cur_dsk].u4; /* calculate file offset */ diff --git a/swtp6800/common/m6800.c b/swtp6800/common/m6800.c index 39e18dac..7ceb4aad 100644 --- a/swtp6800/common/m6800.c +++ b/swtp6800/common/m6800.c @@ -1918,8 +1918,8 @@ t_stat m6800_reset (DEVICE *dptr) /* This is the dumper/loader. This command uses the -h to signify a - hex dump/load vice a binary one. If no address is given to load, it - takes the address from the hex record or the current PC for binary. + hex dump/load vice a binary one. If no address is given to load, it + takes the address from the hex record or the current PC for binary. */ t_stat sim_load (FILE *fileref, char *cptr, char *fnam, int flag) diff --git a/swtp6800/common/mp-s.c b/swtp6800/common/mp-s.c index 1100e35c..f2922f56 100644 --- a/swtp6800/common/mp-s.c +++ b/swtp6800/common/mp-s.c @@ -43,9 +43,9 @@ +---+---+---+---+---+---+---+---+ RXF - A 1 in this bit position means a character has been received - on the data port and is ready to be read. + on the data port and is ready to be read. TXE - A 1 in this bit means the port is ready to receive a character - on the data port and transmit it out over the serial line. + on the data port and transmit it out over the serial line. A read to the data port gets the buffered character, a write to the data port writes the character to the device. @@ -266,12 +266,12 @@ int32 sio0d(int32 io, int32 data) } if ((odata = getc(ptr_unit.fileref)) == EOF) { // end of file? // printf("Got EOF\n"); - ptr_unit.u3 &= 0xFE; // clear RXF flag + ptr_unit.u3 &= 0xFE; // clear RXF flag return (odata = 0); // no data } // printf("Returning new %02X\n", odata); ptr_unit.pos++; // step character count - ptr_unit.u3 &= 0xFE; // clear RXF flag + ptr_unit.u3 &= 0xFE; // clear RXF flag return (odata & 0xFF); // return character } else { sio_unit.u3 &= 0xFE; // clear RXF flag @@ -312,10 +312,10 @@ int32 sio0d(int32 io, int32 data) return (odata = 0); } -/* because each port appears at 2 addresses and this fact is used - to determine if it is a MP-C or MP-S repeatedly in the SWTBUG - monitor, this code assures that reads of the high ports return - the same data as was read the last time on the low ports. +/* because each port appears at 2 addresses and this fact is used + to determine if it is a MP-C or MP-S repeatedly in the SWTBUG + monitor, this code assures that reads of the high ports return + the same data as was read the last time on the low ports. */ int32 sio1s(int32 io, int32 data) diff --git a/swtp6800/swtp6800/mp-a2_sys.c b/swtp6800/swtp6800/mp-a2_sys.c index 8a043061..f5393d8f 100644 --- a/swtp6800/swtp6800/mp-a2_sys.c +++ b/swtp6800/swtp6800/mp-a2_sys.c @@ -46,12 +46,12 @@ extern DEVICE dsk_dev; /* SCP data structures - sim_name simulator name string - sim_PC pointer to saved PC register descriptor - sim_emax number of words needed for examine - sim_devices array of pointers to simulated devices - sim_stop_messages array of pointers to stop messages - sim_load binary loader + sim_name simulator name string + sim_PC pointer to saved PC register descriptor + sim_emax number of words needed for examine + sim_devices array of pointers to simulated devices + sim_stop_messages array of pointers to stop messages + sim_load binary loader */ char sim_name[] = "SWTP 6800, V2, MP-A2 CPU Board"; diff --git a/swtp6800/swtp6800/mp-a_sys.c b/swtp6800/swtp6800/mp-a_sys.c index 4460b781..2bc1afc2 100644 --- a/swtp6800/swtp6800/mp-a_sys.c +++ b/swtp6800/swtp6800/mp-a_sys.c @@ -45,12 +45,12 @@ extern DEVICE dsk_dev; /* SCP data structures - sim_name simulator name string - sim_PC pointer to saved PC register descriptor - sim_emax number of words needed for examine - sim_devices array of pointers to simulated devices - sim_stop_messages array of pointers to stop messages - sim_load binary loader + sim_name simulator name string + sim_PC pointer to saved PC register descriptor + sim_emax number of words needed for examine + sim_devices array of pointers to simulated devices + sim_stop_messages array of pointers to stop messages + sim_load binary loader */ char sim_name[] = "SWTP 6800, V2, MP-A CPU Board"; diff --git a/swtp6800/swtp6800/swtp_defs.h b/swtp6800/swtp6800/swtp_defs.h index 90384145..a905eff3 100644 --- a/swtp6800/swtp6800/swtp_defs.h +++ b/swtp6800/swtp6800/swtp_defs.h @@ -33,10 +33,10 @@ Copyright (c) 2005-2012, William Beech /* Memory */ -#define MAXMEMSIZE 65536 // max memory size -#define MEMSIZE (m6800_unit.capac) // actual memory size -#define ADDRMASK (MAXMEMSIZE - 1) // address mask -#define MEM_ADDR_OK(x) (((uint32) (x)) < MEMSIZE) +#define MAXMEMSIZE 65536 // max memory size +#define MEMSIZE (m6800_unit.capac) // actual memory size +#define ADDRMASK (MAXMEMSIZE - 1) // address mask +#define MEM_ADDR_OK(x) (((uint32) (x)) < MEMSIZE) /* debug definitions */ @@ -51,9 +51,9 @@ Copyright (c) 2005-2012, William Beech /* Simulator stop codes */ -#define STOP_RSRV 1 // must be 1 -#define STOP_HALT 2 // HALT-really WAI -#define STOP_IBKPT 3 // breakpoint -#define STOP_OPCODE 4 // invalid opcode -#define STOP_MEMORY 5 // invalid memory address +#define STOP_RSRV 1 // must be 1 +#define STOP_HALT 2 // HALT-really WAI +#define STOP_IBKPT 3 // breakpoint +#define STOP_OPCODE 4 // invalid opcode +#define STOP_MEMORY 5 // invalid memory address