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Full VAX Simulators: Fix inverted instruction set test

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This commit is contained in:
Mark Pizzolato 2019-05-01 04:20:51 -07:00
parent 4aa4f639e6
commit 6ae9b8025a
3 changed files with 10 additions and 8 deletions
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8
VAX/vax_cis.c
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@ -107,10 +107,10 @@ t_stat r;
DSTR accum, src1, src2, dst; DSTR accum, src1, src2, dst;
DSTR mptable[10]; DSTR mptable[10];
if (!(((IG_PACKD == DR_GETIGRP(drom[opc][0])) && if (((IG_PACKD == DR_GETIGRP(drom[opc][0])) &&
(cpu_instruction_set & VAX_PACKED)) || (cpu_instruction_set & VAX_PACKED)) ||
((IG_EMONL == DR_GETIGRP(drom[opc][0])) && ((IG_EMONL == DR_GETIGRP(drom[opc][0])) &&
(cpu_instruction_set & VAX_EMONL)))) { /* Emulated? */ (cpu_instruction_set & VAX_EMONL))) { /* Emulated? */
/* CIS and emulate only instructions - invoke emulator interface /* CIS and emulate only instructions - invoke emulator interface
opnd[0:5] = six operands to be pushed (if PSL<fpd> = 0) opnd[0:5] = six operands to be pushed (if PSL<fpd> = 0)
cc = condition codes cc = condition codes

2
VAX/vax_cpu.c
View file

@ -3829,7 +3829,7 @@ fprintf (st, "Implementing: ");
if ((cpu_instruction_set & FULL_INSTRUCTION_SET) == FULL_INSTRUCTION_SET) { if ((cpu_instruction_set & FULL_INSTRUCTION_SET) == FULL_INSTRUCTION_SET) {
fprintf (st, "All standard VAX instructions"); fprintf (st, "All standard VAX instructions");
#if defined(CMPM_VAX) #if defined(CMPM_VAX)
fprintf (st, "and Compatibility mode"); fprintf (st, " and Compatibility mode");
#endif #endif
if (sim_switches & SWMASK ('V')) if (sim_switches & SWMASK ('V'))
cpu_show_instruction_group (st, cpu_instruction_set); cpu_show_instruction_group (st, cpu_instruction_set);

8
VAX/vax_defs.h
View file

@ -474,7 +474,7 @@ extern jmp_buf save_env;
#define VAX_EXTAC (1 << DR_GETIGRP(IG_EXTAC)) #define VAX_EXTAC (1 << DR_GETIGRP(IG_EXTAC))
#define VAX_EMONL (1 << DR_GETIGRP(IG_EMONL)) #define VAX_EMONL (1 << DR_GETIGRP(IG_EMONL))
#define VAX_VECTR (1 << DR_GETIGRP(IG_VECTR)) #define VAX_VECTR (1 << DR_GETIGRP(IG_VECTR))
#define FULL_INSTRUCTION_SET (VAX_BASE | \ #define FULL_INSTRUCTION_SET (VAX_FULL_BASE | \
(1 << DR_GETIGRP(IG_PACKD)) | \ (1 << DR_GETIGRP(IG_PACKD)) | \
(1 << DR_GETIGRP(IG_EXTAC)) | \ (1 << DR_GETIGRP(IG_EXTAC)) | \
(1 << DR_GETIGRP(IG_EMONL))) (1 << DR_GETIGRP(IG_EMONL)))
@ -1011,8 +1011,10 @@ extern int32 cpu_instruction_set;
#define CPU_MODEL_MODIFIERS /* No model specific CPU modifiers */ #define CPU_MODEL_MODIFIERS /* No model specific CPU modifiers */
#endif #endif
#ifndef CPU_INST_MODIFIERS #ifndef CPU_INST_MODIFIERS
#define CPU_INST_MODIFIERS { MTAB_XTD|MTAB_VDV, 0, "INSTRUCTIONS", "INSTRUCTIONS={F-FLOAT|D-FLOAT}", \ #define CPU_INST_MODIFIERS { MTAB_XTD|MTAB_VDV|MTAB_VALR|MTAB_NMO, 0, "INSTRUCTIONS", "INSTRUCTIONS={{NO}G-FLOAT|{NO}D-FLOAT|{NO}PACKED|{NO}EXTENDED|{NO}EMULATED}", \
&cpu_set_instruction_set, &cpu_show_instruction_set, NULL, "Set/Show the CPU Instruction Set" }, &cpu_set_instruction_set, NULL, NULL, "Set the CPU Instruction Set" }, \
{ MTAB_XTD|MTAB_VDV, 0, "INSTRUCTIONS", NULL, \
NULL, &cpu_show_instruction_set, NULL, "Show the CPU Instruction Set (SHOW -V)" },
#endif #endif
#ifndef IDX_IMM_TEST #ifndef IDX_IMM_TEST
#define IDX_IMM_TEST RSVD_ADDR_FAULT #define IDX_IMM_TEST RSVD_ADDR_FAULT