From 6b5ab2bc06a32927e6bd71fce8f2660a5a180984 Mon Sep 17 00:00:00 2001
From: Bill <nj7p@nj7p.org>
Date: Tue, 11 Oct 2016 15:56:10 -0700
Subject: [PATCH] SWTP6800,  IBMPC, IBMPCXT, isys8010, isys8020, imds-225:
 sim_interval fix

Properly sequence change to sim_interval so that debug behavior is as
expected.
---
 IBMPC-Systems/common/i8088.c | 2 +-
 Intel-Systems/common/i8008.c | 2 +-
 Intel-Systems/common/i8080.c | 2 +-
 Intel-Systems/common/i8088.c | 5 +----
 swtp6800/common/m6800.c      | 3 ++-
 5 files changed, 6 insertions(+), 8 deletions(-)

diff --git a/IBMPC-Systems/common/i8088.c b/IBMPC-Systems/common/i8088.c
index 73934076..4f71f6ee 100644
--- a/IBMPC-Systems/common/i8088.c
+++ b/IBMPC-Systems/common/i8088.c
@@ -584,7 +584,6 @@ int32 sim_instr (void)
         if (sim_interval <= 0) {        /* check clock queue */
             if (reason = sim_process_event ()) break;
         }
-        sim_interval--;                 /* countdown clock */
 
         if (int_req > 0) {              /* interrupt? */
         /* 8088 interrupts not implemented yet. */
@@ -596,6 +595,7 @@ int32 sim_instr (void)
             break;
         }
 
+        sim_interval--;                 /* countdown clock */
         PCX = IP;
         IR = OP = fetch_byte(0);        /* fetch instruction */
 
diff --git a/Intel-Systems/common/i8008.c b/Intel-Systems/common/i8008.c
index 48b30c86..56025d08 100644
--- a/Intel-Systems/common/i8008.c
+++ b/Intel-Systems/common/i8008.c
@@ -345,7 +345,6 @@ int32 sim_instr (void)
             if (reason = sim_process_event())
                 break;
         }
-        sim_interval--;                 /* countdown clock */
 
         if (int_req > 0) {              /* interrupt? */
 //            sim_printf("\ni8008: int_req=%04X", int_req);
@@ -365,6 +364,7 @@ int32 sim_instr (void)
             break;
         }
 
+        sim_interval--;                 /* countdown clock */
         PCX = PC;
 
         if (uptr->flags & UNIT_TRACE) {
diff --git a/Intel-Systems/common/i8080.c b/Intel-Systems/common/i8080.c
index 065436e0..5b017e7b 100644
--- a/Intel-Systems/common/i8080.c
+++ b/Intel-Systems/common/i8080.c
@@ -416,7 +416,6 @@ int32 sim_instr (void)
             if ((reason = sim_process_event()))
                 break;
         }
-        sim_interval--;                 /* countdown clock */
 
         if (int_req > 0) {              /* interrupt? */
 //            sim_printf("\ni8080: int_req=%04X IM=%04X", int_req, IM);
@@ -460,6 +459,7 @@ int32 sim_instr (void)
             break;
         }
 
+        sim_interval--;                 /* countdown clock */
         PCX = PC;
 
 //        fprintf(fpd, "%04X\n", PC);
diff --git a/Intel-Systems/common/i8088.c b/Intel-Systems/common/i8088.c
index c38a5274..934b2d07 100644
--- a/Intel-Systems/common/i8088.c
+++ b/Intel-Systems/common/i8088.c
@@ -587,7 +587,6 @@ int32 sim_instr (void)
         if (sim_interval <= 0) {        /* check clock queue */
             if (reason = sim_process_event ()) break;
         }
-        sim_interval--;                 /* countdown clock */
 
         if (int_req > 0) {              /* interrupt? */
 
@@ -601,12 +600,10 @@ int32 sim_instr (void)
             break;
         }
 
-
+        sim_interval--;                 /* countdown clock */
         PCX = IP;
         IR = OP = fetch_byte(0);           /* fetch instruction */
 
-
-
         /* Handle below all operations which refer to registers or
           register pairs.  After that, a large switch statement
           takes care of all other opcodes */
diff --git a/swtp6800/common/m6800.c b/swtp6800/common/m6800.c
index 9e998fdc..caa8db08 100644
--- a/swtp6800/common/m6800.c
+++ b/swtp6800/common/m6800.c
@@ -332,8 +332,9 @@ t_stat sim_instr (void)
             reason = STOP_IBKPT;        /* stop simulation */
             break;
         }
-        IR = OP = fetch_byte(0);        /* fetch instruction */
+
         sim_interval--;
+        IR = OP = fetch_byte(0);        /* fetch instruction */
 
         /* The Big Instruction Decode Switch */