SCP: Add timer logic description comments to sim_timer
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1 changed files with 23 additions and 1 deletions
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sim_timer.c
24
sim_timer.c
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@ -827,7 +827,6 @@ static uint32 cyc_ms = 0;
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uint32 w_ms, w_idle, act_ms;
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uint32 w_ms, w_idle, act_ms;
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int32 act_cyc;
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int32 act_cyc;
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//sim_idle_idled = TRUE; /* record idle attempt */
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if ((!sim_idle_enab) || /* idling disabled */
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if ((!sim_idle_enab) || /* idling disabled */
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((sim_clock_queue == QUEUE_LIST_END) && /* or clock queue empty? */
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((sim_clock_queue == QUEUE_LIST_END) && /* or clock queue empty? */
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#if defined(SIM_ASYNCH_IO) && defined(SIM_ASYNCH_CLOCKS)
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#if defined(SIM_ASYNCH_IO) && defined(SIM_ASYNCH_CLOCKS)
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@ -842,6 +841,29 @@ if ((!sim_idle_enab) || /* idling disabled */
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sim_interval = sim_interval - 1;
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sim_interval = sim_interval - 1;
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return FALSE;
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return FALSE;
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}
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}
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/*
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When a simulator is in an instruction path (or under other conditions
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which would indicate idling), the countdown of sim_interval will not
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be happening at a pace which is consistent with the rate it happens
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when not in the ‘idle capable’ state. The consequence of this is that
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the clock calibration may produce calibrated results which vary much
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more than they do when not in the idle able state. Sim_idle also uses
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the calibrated tick size to approximate an adjustment to sim_interval
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to reflect the number of instructions which would have executed during
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the actual idle time, so consistent calibrated numbers produce better
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adjustments.
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To negate this effect, we set a flag (sim_idle_idled) here and the
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sim_rtcn_calb routine checks this flag before performing an actual
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calibration and skips calibration if the flag was set and then clears
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the flag. Thus recalibration only happens if things didn’t idle.
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we also check check sim_idle_enab above so that all simulators can avoid
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directly checking sim_idle_enab before calling sim_idle so that all of
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the bookkeeping on sim_idle_idled is done here in sim_timer where it
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means something, while not idling when it isn’t enabled.
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*/
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//sim_idle_idled = TRUE; /* record idle attempt */
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sim_debug (DBG_TRC, &sim_timer_dev, "sim_idle(tmr=%d, sin_cyc=%d)\n", tmr, sin_cyc);
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sim_debug (DBG_TRC, &sim_timer_dev, "sim_idle(tmr=%d, sin_cyc=%d)\n", tmr, sin_cyc);
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if (cyc_ms == 0) /* not computed yet? */
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if (cyc_ms == 0) /* not computed yet? */
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cyc_ms = (rtc_currd[tmr] * rtc_hz[tmr]) / 1000; /* cycles per msec */
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cyc_ms = (rtc_currd[tmr] * rtc_hz[tmr]) / 1000; /* cycles per msec */
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