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SCP: Add timer logic description comments to sim_timer

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This commit is contained in:
Mark Pizzolato 2013-09-08 17:27:58 -07:00
parent c0b82b9adf
commit 6be61242da
1 changed files with 23 additions and 1 deletions
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24
sim_timer.c
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@ -827,7 +827,6 @@ static uint32 cyc_ms = 0;
uint32 w_ms, w_idle, act_ms;
int32 act_cyc;
//sim_idle_idled = TRUE; /* record idle attempt */
if ((!sim_idle_enab) || /* idling disabled */
((sim_clock_queue == QUEUE_LIST_END) && /* or clock queue empty? */
#if defined(SIM_ASYNCH_IO) && defined(SIM_ASYNCH_CLOCKS)
@ -842,6 +841,29 @@ if ((!sim_idle_enab) || /* idling disabled */
sim_interval = sim_interval - 1;
return FALSE;
}
/*
When a simulator is in an instruction path (or under other conditions
which would indicate idling), the countdown of sim_interval will not
be happening at a pace which is consistent with the rate it happens
when not in the ‘idle capable’ state. The consequence of this is that
the clock calibration may produce calibrated results which vary much
more than they do when not in the idle able state. Sim_idle also uses
the calibrated tick size to approximate an adjustment to sim_interval
to reflect the number of instructions which would have executed during
the actual idle time, so consistent calibrated numbers produce better
adjustments.
To negate this effect, we set a flag (sim_idle_idled) here and the
sim_rtcn_calb routine checks this flag before performing an actual
calibration and skips calibration if the flag was set and then clears
the flag. Thus recalibration only happens if things didn’t idle.
we also check check sim_idle_enab above so that all simulators can avoid
directly checking sim_idle_enab before calling sim_idle so that all of
the bookkeeping on sim_idle_idled is done here in sim_timer where it
means something, while not idling when it isn’t enabled.
*/
//sim_idle_idled = TRUE; /* record idle attempt */
sim_debug (DBG_TRC, &sim_timer_dev, "sim_idle(tmr=%d, sin_cyc=%d)\n", tmr, sin_cyc);
if (cyc_ms == 0) /* not computed yet? */
cyc_ms = (rtc_currd[tmr] * rtc_hz[tmr]) / 1000; /* cycles per msec */