imds-225, isys80xx, ibmpc, ibmpcxt: Address Coverity identified problems

This commit is contained in:
Bill Beech 2017-06-07 11:34:26 -07:00
parent 625d1b391e
commit 6fcd70128e
5 changed files with 30 additions and 26 deletions

View file

@ -261,9 +261,9 @@ int32 CS; /* Code Segment Register */
int32 DS; /* Data Segment Register */ int32 DS; /* Data Segment Register */
int32 SS; /* Stack Segment Register */ int32 SS; /* Stack Segment Register */
int32 ES; /* Extra Segment Register */ int32 ES; /* Extra Segment Register */
int32 IP; /* Program Counter */ uint32 IP; /* Program Counter */
int32 PSW; /* Program Status Word (Flags) */ int32 PSW; /* Program Status Word (Flags) */
int32 saved_PC = 0; /* saved program counter */ uint32 saved_PC = 0; /* saved program counter */
int32 int_req = 0; /* Interrupt request 0x01 = int, 0x02 = NMI*/ int32 int_req = 0; /* Interrupt request 0x01 = int, 0x02 = NMI*/
uint16 port; //port called in dev_table[port] uint16 port; //port called in dev_table[port]
int32 chip = 0; /* 0 = 8088 chip, 1 = 8086 chip */ int32 chip = 0; /* 0 = 8088 chip, 1 = 8086 chip */
@ -472,8 +472,6 @@ DEVICE i8088_dev = {
uint8 xor_3_tab[] = { 0, 1, 1, 0 }; uint8 xor_3_tab[] = { 0, 1, 1, 0 };
int32 IP;
static const char *opcode[256] = { static const char *opcode[256] = {
"ADD\t", "ADD\t", "ADD\t", "ADD\t", /* 0x00 */ "ADD\t", "ADD\t", "ADD\t", "ADD\t", /* 0x00 */
"ADD\tAL,", "ADD\tAX,", "PUSH\tES", "POP\tES", "ADD\tAL,", "ADD\tAX,", "PUSH\tES", "POP\tES",
@ -543,30 +541,34 @@ static const char *opcode[256] = {
/* /*
0 = 1 byte opcode 0 = 1 byte opcode
1 = DATA8 1 = d8
2 = DATA16 2 = d16
3 = IP-INC8 3 = rel8
4 = IP-INC16 4 = rel16
5 = r/m8,r8
6 = r/m16,r16
7 = r/m8
8 = r/m16
20 = I haven't figured it out yet! 20 = I haven't figured it out yet!
*/ */
int32 oplen[256] = { int32 oplen[256] = {
20,20,20,20, 1, 2, 0, 0, 20,20,20,20, 1, 2, 0, 0, //0x00 5, 6, 5, 6, 1, 2, 0, 0, 5, 6, 5, 6, 1, 2, 0, 0, //0x00
20,20,20,20, 1, 2, 0, 0, 20,20,20,20, 1, 2, 0, 0, //0x10 5, 6, 5, 6, 1, 2, 0, 0, 5, 6, 5, 6, 1, 2, 0, 0, //0x10
20,20,20,20, 1, 2, 0, 0, 20,20,20,20, 1, 2, 0, 0, //0x20 5, 6, 5, 6, 1, 2, 0, 0, 5, 6, 5, 6, 1, 2, 0, 0, //0x20
20,20,20,20, 1, 2, 0, 0, 20,20,20,20, 1, 2, 0, 0, //0x30 5, 6, 5, 6, 1, 2, 0, 0, 5, 6, 5, 6, 1, 2, 0, 0, //0x30
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //0x40 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //0x40
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //0x50 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //0x50
20,20,20,20,20,20,20,20, 20,20,20,20,20,20,20,20, //0x60 20,20,20,20,20,20,20,20, 20,20,20,20,20,20,20,20, //0x60
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, //0x70 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, //0x70
20,20,20,20,20,20,20,20, 20,20,20,20,20,20,20,20, //0x80 5, 6, 5, 6, 5, 6, 5, 6, 5, 6, 5, 6, 5, 6, 5, 6, //0x80
0, 0, 0, 0, 0, 0, 0, 0, 0,20, 0, 0, 0, 0, 0, 0, //0x90 0, 0, 0, 0, 0, 0, 0, 0, 0,20, 0, 0, 0, 0, 0, 0, //0x90
20,20,20,20, 0, 0, 0, 0, 1, 2, 0, 0, 0, 0, 0, 0, //0xA0 20,20,20,20, 0, 0, 0, 0, 1, 2, 0, 0, 0, 0, 0, 0, //0xA0
1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, //0xB0 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, //0xB0
0, 0, 2, 0,20,20,20,20, 0, 0, 2, 0, 0, 1, 0, 0, //0xC0 0, 0, 2, 0,20,20,20,20, 0, 0, 2, 0, 0, 1, 0, 0, //0xC0
20,20,20,20, 0, 0, 0, 0, 20,20,20,20,20,20,20,20, //0xD0 20,20,20,20, 0, 0, 0, 0, 20,20,20,20,20,20,20,20, //0xD0
3, 3, 3, 3, 1, 1, 1, 1, 4, 4,20, 3, 0, 0, 0, 0, //0xE0 3, 3, 3, 3, 1, 1, 1, 1, 4, 4,20, 3, 0, 0, 0, 0, //0xE0
0, 0, 0, 0, 0, 0,20,20, 0, 0, 0, 0, 0, 0,20,20, //0xF0 0, 0, 0, 0, 0, 0, 5, 6, 0, 0, 0, 0, 0, 0, 7, 8 //0xF0
}; };
void set_cpuint(int32 int_num) void set_cpuint(int32 int_num)
@ -578,8 +580,8 @@ void set_cpuint(int32 int_num)
int32 sim_instr (void) int32 sim_instr (void)
{ {
extern int32 sim_interval; extern int32 sim_interval;
int32 IR, OP, reason; uint32 IR, OP, reason;
int32 MRR, REG, EA, MOD, RM, VAL, DATA, OFF, SEG, INC, VAL1; uint32 MRR, REG, EA, MOD, RM, VAL, DATA, OFF, SEG, INC, VAL1;
IP = saved_PC & ADDRMASK16; /* load local IP */ IP = saved_PC & ADDRMASK16; /* load local IP */
reason = 0; /* clear stop reason */ reason = 0; /* clear stop reason */
@ -591,7 +593,7 @@ int32 sim_instr (void)
sim_printf("\n"); sim_printf("\n");
if (sim_interval <= 0) { /* check clock queue */ if (sim_interval <= 0) { /* check clock queue */
if (reason = sim_process_event ()) break; if ((reason = sim_process_event())) break;
} }
if (int_req > 0) { /* interrupt? */ if (int_req > 0) { /* interrupt? */

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@ -83,7 +83,7 @@
extern uint16 port; //port called in dev_table[port] extern uint16 port; //port called in dev_table[port]
/* function prototypes */ /* internal function prototypes */
t_stat i8255_reset (DEVICE *dptr, uint16 baseport); t_stat i8255_reset (DEVICE *dptr, uint16 baseport);
uint8 i8255_get_dn(void); uint8 i8255_get_dn(void);
@ -154,7 +154,7 @@ DEVICE i8255_dev = {
i8255_unit, //units i8255_unit, //units
i8255_reg, //registers i8255_reg, //registers
NULL, //modifiers NULL, //modifiers
1, //numunits I8255_NUM, //numunits
16, //aradix 16, //aradix
16, //awidth 16, //awidth
1, //aincr 1, //aincr

View file

@ -454,7 +454,7 @@ uint8 isbc202_get_dn(void)
return 0xFF; return 0xFF;
} }
/* ISBC202 control port functions */ /* iSBC202 control port functions */
uint8 isbc2020(t_bool io, uint8 data) uint8 isbc2020(t_bool io, uint8 data)
{ {

View file

@ -800,11 +800,13 @@ t_stat isbc208_svc (UNIT *uptr)
} }
//*** quick fix. Needs more thought! //*** quick fix. Needs more thought!
fp = fopen(uptr->filename, "wb"); // write out modified image fp = fopen(uptr->filename, "wb"); // write out modified image
for (i=0; i<uptr->capac; i++) { if (fp) {
c = *(isbc208_buf[uptr->u6] + i) & 0xFF; for (i=0; i<uptr->capac; i++) {
fputc(c, fp); c = *(isbc208_buf[uptr->u6] + i) & 0xFF;
fputc(c, fp);
}
fclose(fp);
} }
fclose(fp);
//*** need to step return results IAW table 3-11 in 143078-001 //*** need to step return results IAW table 3-11 in 143078-001
i8272_w2 = cyl; /* generate a current address mark */ i8272_w2 = cyl; /* generate a current address mark */
i8272_w3 = hed >> 2; i8272_w3 = hed >> 2;

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@ -65,12 +65,12 @@
//board definitions for the multibus //board definitions for the multibus
/* set the base I/O address for the iSBC 201 */ /* set the base I/O address for the iSBC 201 */
#define SBC201_BASE 0x78 #define SBC201_BASE 0x78
#define SBC201_INT INT_1 #define SBC201_INT INT_1
#define SBC201_NUM 0 #define SBC201_NUM 0
/* set the base I/O address for the iSBC 202 */ /* set the base I/O address for the iSBC 202 */
#define SBC202_BASE 0x78 #define SBC202_BASE 0x78
#define SBC202_INT INT_1 #define SBC202_INT INT_1
#define SBC202_NUM 1 #define SBC202_NUM 1