From 75e79a4da813606d8f0bb0a0a5bd280f46bbe508 Mon Sep 17 00:00:00 2001
From: Mark Pizzolato <mark@infocomm.com>
Date: Sat, 1 Apr 2023 20:23:23 -1000
Subject: [PATCH] ND100: Fix CLK device setup and calibration

Original logic mixed up parameters and calibrated for 20000 ticks
per second rather than 50.
---
 ND100/nd100_stddev.c | 23 ++++++++++++++---------
 1 file changed, 14 insertions(+), 9 deletions(-)

diff --git a/ND100/nd100_stddev.c b/ND100/nd100_stddev.c
index cb9e2f79..da80c28d 100644
--- a/ND100/nd100_stddev.c
+++ b/ND100/nd100_stddev.c
@@ -219,13 +219,14 @@ iox_tty(int addr)
 /*
  * Real-time clock.
  */
-#define US_PER_CLK      20000
 #define CLK_PER_SEC     50
 
 int int_enabled, dev_ready;
 
 struct intr rtc_int = { 0, 1 };
 
+t_stat clk_reset(DEVICE *dptr);
+
 t_stat clk_svc(UNIT *uptr);
 
 UNIT clk_unit = { UDATA (&clk_svc, 0, 0) };
@@ -243,7 +244,7 @@ MTAB clk_mod[] = {
 DEVICE clk_dev = {
         "RTC", &clk_unit, clk_reg, clk_mod,
         1, 0, 0, 0, 0, 0,
-        NULL, NULL, NULL,
+        NULL, NULL, &clk_reset,
         NULL, NULL, NULL,
         0, 0
 };
@@ -258,18 +259,14 @@ iox_clk(int addr)
                 regA = 0;
                 break;
         case 1: /* Reset counter */
-                sim_cancel(&clk_unit);
-                if (!sim_is_active(&clk_unit))
-                        sim_activate(&clk_unit, sim_rtc_init(US_PER_CLK));
+                sim_activate_after_abs(&clk_unit, 1000000/CLK_PER_SEC);
                 break;
         case 2: /* read status */
                 regA = (dev_ready << 3) | int_enabled;
                 break;
 
         case 3: /* set status */
-                sim_cancel(&clk_unit);
-                if (!sim_is_active(&clk_unit))
-                        sim_activate(&clk_unit, sim_rtc_init(US_PER_CLK));
+                sim_activate_after_abs(&clk_unit, 1000000/CLK_PER_SEC);
                 int_enabled = regA & 1;
                 if (BIT13(regA))
                         dev_ready = 0;
@@ -281,10 +278,18 @@ iox_clk(int addr)
         return rv;
 }
 
+t_stat
+clk_reset (DEVICE *dptr)
+{
+        sim_rtc_init(1000000/CLK_PER_SEC);
+        return SCPE_OK;
+}
+
 t_stat
 clk_svc(UNIT *uptr)
 {
-        sim_activate(&clk_unit, sim_rtc_calb(US_PER_CLK));
+        sim_rtc_calb(CLK_PER_SEC);
+        sim_activate_after(&clk_unit, 1000000/CLK_PER_SEC);
         dev_ready = 1;
         if (int_enabled)
                 extint(13, &rtc_int);