Addition of MicroVAX I (VAX610) processor simulator from Matt Burke
This commit is contained in:
Mark Pizzolato
parent
cc7049cc39
commit
76612265ca
17 changed files with 3576 additions and 17 deletions
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@ -24,6 +24,7 @@
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used in advertising or otherwise to promote the sale, use or other dealings
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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in this Software without prior written authorization from Robert M Supnik.
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24-Oct-12 MB Added working map base address
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09-Jan-03 RMS Tape read/write end pkt is longer than disk read/write
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09-Jan-03 RMS Tape read/write end pkt is longer than disk read/write
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20-Sep-02 RMS Merged TMSCP definitions
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20-Sep-02 RMS Merged TMSCP definitions
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*/
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*/
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@ -412,6 +413,8 @@
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#define RW_WBAH 21
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#define RW_WBAH 21
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#define RW_WBLL 22 /* working lbn */
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#define RW_WBLL 22 /* working lbn */
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#define RW_WBLH 23
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#define RW_WBLH 23
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#define RW_WMPL 24 /* working map */
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#define RW_WMPH 25
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/* Tape specific status */
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/* Tape specific status */
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114
PDP11/pdp11_rq.c
114
PDP11/pdp11_rq.c
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@ -26,6 +26,7 @@
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rq RQDX3 disk controller
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rq RQDX3 disk controller
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24-Oct-12 MB Added mapped transfers for VAX
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07-Mar-11 MP Added working behaviors for removable device types.
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07-Mar-11 MP Added working behaviors for removable device types.
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This allows physical CDROM's to come online and be
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This allows physical CDROM's to come online and be
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ejected.
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ejected.
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@ -137,6 +138,8 @@ extern uint32 cpu_opt;
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#define RQ_NUMDR 4 /* # drives */
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#define RQ_NUMDR 4 /* # drives */
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#define RQ_NUMBY 512 /* bytes per block */
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#define RQ_NUMBY 512 /* bytes per block */
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#define RQ_MAXFR (1 << 16) /* max xfer */
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#define RQ_MAXFR (1 << 16) /* max xfer */
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#define RQ_MAPXFER (1 << 31) /* mapped xfer */
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#define RQ_M_PFN 0x1FFFFF /* map entry PFN */
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#define UNIT_V_ONL (UNIT_V_UF + 0) /* online */
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#define UNIT_V_ONL (UNIT_V_UF + 0) /* online */
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#define UNIT_V_WLK (UNIT_V_UF + 1) /* hwre write lock */
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#define UNIT_V_WLK (UNIT_V_UF + 1) /* hwre write lock */
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@ -707,6 +710,10 @@ t_bool rq_getdesc (MSC *cp, struct uq_ring *ring, uint32 *desc);
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t_bool rq_putdesc (MSC *cp, struct uq_ring *ring, uint32 desc);
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t_bool rq_putdesc (MSC *cp, struct uq_ring *ring, uint32 desc);
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int32 rq_rw_valid (MSC *cp, int32 pkt, UNIT *uptr, uint32 cmd);
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int32 rq_rw_valid (MSC *cp, int32 pkt, UNIT *uptr, uint32 cmd);
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t_bool rq_rw_end (MSC *cp, UNIT *uptr, uint32 flg, uint32 sts);
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t_bool rq_rw_end (MSC *cp, UNIT *uptr, uint32 flg, uint32 sts);
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uint32 rq_map_ba (uint32 ba, uint32 ma);
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int32 rq_readb (uint32 ba, int32 bc, uint32 ma, uint8 *buf);
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int32 rq_readw (uint32 ba, int32 bc, uint32 ma, uint16 *buf);
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int32 rq_writew (uint32 ba, int32 bc, uint32 ma, uint16 *buf);
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void rq_putr (MSC *cp, int32 pkt, uint32 cmd, uint32 flg,
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void rq_putr (MSC *cp, int32 pkt, uint32 cmd, uint32 flg,
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uint32 sts, uint32 lnt, uint32 typ);
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uint32 sts, uint32 lnt, uint32 typ);
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void rq_putr_unit (MSC *cp, int32 pkt, UNIT *uptr, uint32 lu, t_bool all);
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void rq_putr_unit (MSC *cp, int32 pkt, UNIT *uptr, uint32 lu, t_bool all);
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@ -1737,6 +1744,8 @@ if ((uptr = rq_getucb (cp, lu))) { /* unit exist? */
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cp->pak[pkt].d[RW_WBCH] = cp->pak[pkt].d[RW_BCH];
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cp->pak[pkt].d[RW_WBCH] = cp->pak[pkt].d[RW_BCH];
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cp->pak[pkt].d[RW_WBLL] = cp->pak[pkt].d[RW_LBNL];
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cp->pak[pkt].d[RW_WBLL] = cp->pak[pkt].d[RW_LBNL];
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cp->pak[pkt].d[RW_WBLH] = cp->pak[pkt].d[RW_LBNH];
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cp->pak[pkt].d[RW_WBLH] = cp->pak[pkt].d[RW_LBNH];
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cp->pak[pkt].d[RW_WMPL] = cp->pak[pkt].d[RW_MAPL];
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cp->pak[pkt].d[RW_WMPH] = cp->pak[pkt].d[RW_MAPH];
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uptr->iostarttime = sim_grtime();
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uptr->iostarttime = sim_grtime();
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sim_activate (uptr, 0); /* activate */
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sim_activate (uptr, 0); /* activate */
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sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_rw - started\n");
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sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_rw - started\n");
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@ -1803,6 +1812,100 @@ uptr->io_complete = 1;
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sim_activate_notbefore (uptr, uptr->iostarttime+rq_xtime);
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sim_activate_notbefore (uptr, uptr->iostarttime+rq_xtime);
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}
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}
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/* Map buffer address */
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uint32 rq_map_ba (uint32 ba, uint32 ma)
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{
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#if defined (VM_VAX) /* VAX version */
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int32 idx;
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uint32 rg;
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idx = (VA_GETVPN(ba) << 2); /* map register index */
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rg = ReadL (ma + idx); /* map register */
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if (rg & PTE_V) /* valid? */
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return ((rg & RQ_M_PFN) << VA_N_OFF) | (ba & VA_M_OFF);
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#endif
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return 0;
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}
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/* Read byte buffer from memory */
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int32 rq_readb (uint32 ba, int32 bc, uint32 ma, uint8 *buf)
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{
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#if defined (VM_VAX) /* VAX version */
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int32 lbc, t, tbc = 0;
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uint32 pba;
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if (ba & RQ_MAPXFER) { /* mapped xfer? */
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while (tbc < bc) {
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if (!(pba = rq_map_ba (ba, ma))) /* get physical ba */
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return (bc - tbc);
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lbc = 0x200 - (ba & VA_M_OFF); /* bc for this tx */
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if (lbc > (bc - tbc)) lbc = (bc - tbc);
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t = Map_ReadB (pba, lbc, buf);
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tbc += (lbc - t); /* bytes xfer'd so far */
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if (t) return (bc - tbc); /* incomplete xfer? */
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ba += lbc;
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buf += lbc;
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}
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return 0;
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}
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#endif
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return Map_ReadB (ba, bc, buf); /* unmapped xfer */
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}
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/* Read word buffer from memory */
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int32 rq_readw (uint32 ba, int32 bc, uint32 ma, uint16 *buf)
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{
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#if defined (VM_VAX) /* VAX version */
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int32 lbc, t, tbc = 0;
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uint32 pba;
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if (ba & RQ_MAPXFER) { /* mapped xfer? */
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while (tbc < bc) {
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if (!(pba = rq_map_ba (ba, ma))) /* get physical ba */
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return (bc - tbc);
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lbc = 0x200 - (ba & VA_M_OFF); /* bc for this tx */
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if (lbc > (bc - tbc)) lbc = (bc - tbc);
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t = Map_ReadW (pba, lbc, buf);
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tbc += (lbc - t); /* bytes xfer'd so far */
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if (t) return (bc - tbc); /* incomplete xfer? */
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ba += lbc;
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buf += (lbc >> 1);
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}
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return 0;
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}
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#endif
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return Map_ReadW (ba, bc, buf); /* unmapped xfer */
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}
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/* Write word buffer to memory */
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int32 rq_writew (uint32 ba, int32 bc, uint32 ma, uint16 *buf)
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{
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#if defined (VM_VAX) /* VAX version */
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int32 lbc, t, tbc = 0;
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uint32 pba;
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if (ba & RQ_MAPXFER) { /* mapped xfer? */
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while (tbc < bc) {
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if (!(pba = rq_map_ba (ba, ma))) /* get physical ba */
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return (bc - tbc);
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lbc = 0x200 - (ba & VA_M_OFF); /* bc for this tx */
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if (lbc > (bc - tbc)) lbc = (bc - tbc);
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t = Map_WriteW (pba, lbc, buf);
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tbc += (lbc - t); /* bytes xfer'd so far */
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if (t) return (bc - tbc); /* incomplete xfer? */
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ba += lbc;
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buf += (lbc >> 1);
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}
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return 0;
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}
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#endif
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return Map_WriteW (ba, bc, buf); /* unmapped xfer */
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}
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/* Unit service for data transfer commands */
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/* Unit service for data transfer commands */
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t_stat rq_svc (UNIT *uptr)
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t_stat rq_svc (UNIT *uptr)
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@ -1815,6 +1918,7 @@ uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* get cmd */
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uint32 ba = GETP32 (pkt, RW_WBAL); /* buf addr */
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uint32 ba = GETP32 (pkt, RW_WBAL); /* buf addr */
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uint32 bc = GETP32 (pkt, RW_WBCL); /* byte count */
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uint32 bc = GETP32 (pkt, RW_WBCL); /* byte count */
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uint32 bl = GETP32 (pkt, RW_WBLL); /* block addr */
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uint32 bl = GETP32 (pkt, RW_WBLL); /* block addr */
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uint32 ma = GETP32 (pkt, RW_WMPL); /* block addr */
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sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_svc(unit=%d, pkt=%d, cmd=%s, lbn=%0X, bc=%0x, phase=%s)\n",
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sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_svc(unit=%d, pkt=%d, cmd=%s, lbn=%0X, bc=%0x, phase=%s)\n",
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uptr-rq_devmap[cp->cnum]->units, pkt, rq_cmdname[cp->pak[pkt].d[CMD_OPC]&0x3f], bl, bc,
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uptr-rq_devmap[cp->cnum]->units, pkt, rq_cmdname[cp->pak[pkt].d[CMD_OPC]&0x3f], bl, bc,
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@ -1853,7 +1957,7 @@ if (!uptr->io_complete) { /* Top End (I/O Initiation) Processing */
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}
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}
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else if (cmd == OP_WR) { /* write? */
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else if (cmd == OP_WR) { /* write? */
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t = Map_ReadW (ba, tbc, uptr->rqxb); /* fetch buffer */
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t = rq_readw (ba, tbc, ma, uptr->rqxb); /* fetch buffer */
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if ((abc = tbc - t)) { /* any xfer? */
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if ((abc = tbc - t)) { /* any xfer? */
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wwc = ((abc + (RQ_NUMBY - 1)) & ~(RQ_NUMBY - 1)) >> 1;
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wwc = ((abc + (RQ_NUMBY - 1)) & ~(RQ_NUMBY - 1)) >> 1;
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for (i = (abc >> 1); i < wwc; i++)
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for (i = (abc >> 1); i < wwc; i++)
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@ -1875,7 +1979,7 @@ else { /* Bottom End (After I/O processing) */
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}
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}
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else if (cmd == OP_WR) { /* write? */
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else if (cmd == OP_WR) { /* write? */
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t = Map_ReadW (ba, tbc, uptr->rqxb); /* fetch buffer */
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t = rq_readw (ba, tbc, ma, uptr->rqxb); /* fetch buffer */
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abc = tbc - t; /* any xfer? */
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abc = tbc - t; /* any xfer? */
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if (t) { /* nxm? */
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if (t) { /* nxm? */
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PUTP32 (pkt, RW_WBCL, bc - abc); /* adj bc */
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PUTP32 (pkt, RW_WBCL, bc - abc); /* adj bc */
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@ -1889,7 +1993,7 @@ else { /* Bottom End (After I/O processing) */
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else {
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else {
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sim_disk_data_trace(uptr, uptr->rqxb, bl, tbc, "sim_disk_rdsect", DBG_DAT & rq_devmap[cp->cnum]->dctrl, DBG_REQ);
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sim_disk_data_trace(uptr, uptr->rqxb, bl, tbc, "sim_disk_rdsect", DBG_DAT & rq_devmap[cp->cnum]->dctrl, DBG_REQ);
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if ((cmd == OP_RD) && !err) { /* read? */
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if ((cmd == OP_RD) && !err) { /* read? */
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if ((t = Map_WriteW (ba, tbc, uptr->rqxb))) {/* store, nxm? */
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if ((t = rq_writew (ba, tbc, ma, uptr->rqxb))) {/* store, nxm? */
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PUTP32 (pkt, RW_WBCL, bc - (tbc - t)); /* adj bc */
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PUTP32 (pkt, RW_WBCL, bc - (tbc - t)); /* adj bc */
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PUTP32 (pkt, RW_WBAL, ba + (tbc - t)); /* adj ba */
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PUTP32 (pkt, RW_WBAL, ba + (tbc - t)); /* adj ba */
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if (rq_hbe (cp, uptr)) /* post err log */
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if (rq_hbe (cp, uptr)) /* post err log */
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@ -1900,7 +2004,7 @@ else { /* Bottom End (After I/O processing) */
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else if ((cmd == OP_CMP) && !err) { /* compare? */
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else if ((cmd == OP_CMP) && !err) { /* compare? */
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uint8 dby, mby;
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uint8 dby, mby;
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for (i = 0; i < tbc; i++) { /* loop */
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for (i = 0; i < tbc; i++) { /* loop */
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if (Map_ReadB (ba + i, 1, &mby)) { /* fetch, nxm? */
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if (rq_readb (ba + i, 1, ma, &mby)) { /* fetch, nxm? */
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PUTP32 (pkt, RW_WBCL, bc - i); /* adj bc */
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PUTP32 (pkt, RW_WBCL, bc - i); /* adj bc */
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PUTP32 (pkt, RW_WBAL, bc - i); /* adj ba */
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PUTP32 (pkt, RW_WBAL, bc - i); /* adj ba */
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if (rq_hbe (cp, uptr)) /* post err log */
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if (rq_hbe (cp, uptr)) /* post err log */
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@ -1957,6 +2061,8 @@ cp->pak[pkt].d[RW_WBCL] = 0;
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cp->pak[pkt].d[RW_WBCH] = 0;
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cp->pak[pkt].d[RW_WBCH] = 0;
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cp->pak[pkt].d[RW_WBLL] = 0;
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cp->pak[pkt].d[RW_WBLL] = 0;
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cp->pak[pkt].d[RW_WBLH] = 0;
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cp->pak[pkt].d[RW_WBLH] = 0;
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cp->pak[pkt].d[RW_WMPL] = 0;
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cp->pak[pkt].d[RW_WMPH] = 0;
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rq_putr (cp, pkt, cmd | OP_END, flg, sts, RW_LNT_D, UQ_TYP_SEQ); /* fill pkt */
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rq_putr (cp, pkt, cmd | OP_END, flg, sts, RW_LNT_D, UQ_TYP_SEQ); /* fill pkt */
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if (!rq_putpkt (cp, pkt, TRUE)) /* send pkt */
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if (!rq_putpkt (cp, pkt, TRUE)) /* send pkt */
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return ERR;
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return ERR;
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BIN
VAX/ka610.bin
Normal file
BIN
VAX/ka610.bin
Normal file
Binary file not shown.
391
VAX/vax610_defs.h
Normal file
391
VAX/vax610_defs.h
Normal file
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@ -0,0 +1,391 @@
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/* vax610_defs.h: MicroVAX I model-specific definitions file
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Copyright (c) 2011-2012, Matt Burke
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This module incorporates code from SimH, Copyright (c) 2004-2008, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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THE AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name(s) of the author(s) shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from the author(s).
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15-Feb-2012 MB First Version
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This file covers the MicroVAX I
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System memory map
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0000 0000 - 003F FFFF main memory
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0040 0000 - 1FFF FFFF reserved
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2000 0000 - 2000 1FFF qbus address space
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2000 2000 - 3FFF FFFF reserved
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*/
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#ifdef FULL_VAX /* subset VAX */
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#undef FULL_VAX
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#endif
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#ifndef _VAX610_DEFS_H_
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#define _VAX610_DEFS_H_ 1
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/* Microcode constructs */
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|
#define VAX610_SID (7 << 24) /* system ID */
|
||||||
|
#define VAX610_FLOAT (1 << 16) /* floating point type */
|
||||||
|
#define VAX610_MREV (5 << 8) /* microcode revision */
|
||||||
|
#define VAX610_HWREV 1 /* hardware revision */
|
||||||
|
#define CON_HLTPIN 0x0200 /* external CPU halt */
|
||||||
|
#define CON_PWRUP 0x0300 /* powerup code */
|
||||||
|
#define CON_HLTINS 0x0600 /* HALT instruction */
|
||||||
|
#define CON_BADPSL 0x4000 /* invalid PSL flag */
|
||||||
|
#define CON_MAPON 0x8000 /* mapping on flag */
|
||||||
|
#define MCHK_TBM_P0 0x05 /* PPTE in P0 */
|
||||||
|
#define MCHK_TBM_P1 0x06 /* PPTE in P1 */
|
||||||
|
#define MCHK_M0_P0 0x07 /* PPTE in P0 */
|
||||||
|
#define MCHK_M0_P1 0x08 /* PPTE in P1 */
|
||||||
|
#define MCHK_INTIPL 0x09 /* invalid ireq */
|
||||||
|
#define MCHK_READ 0x02 /* read check */
|
||||||
|
#define MCHK_WRITE 0x02 /* write check */
|
||||||
|
|
||||||
|
/* Machine specific IPRs */
|
||||||
|
|
||||||
|
#define MT_TBDR 36 /* Translation Buffer Disable */
|
||||||
|
#define MT_CADR 37 /* Cache Disable Register */
|
||||||
|
#define MT_MCESR 38 /* Machine Check Error Summary */
|
||||||
|
#define MT_CAER 39 /* Cache Error Register */
|
||||||
|
#define MT_CONISP 41 /* Console Saved ISP */
|
||||||
|
#define MT_CONPC 42 /* Console Saved PC */
|
||||||
|
#define MT_CONPSL 43 /* Console Saved PSL */
|
||||||
|
#define MT_SBIFS 48 /* SBI fault status */
|
||||||
|
#define MT_SBIS 49 /* SBI silo */
|
||||||
|
#define MT_SBISC 50 /* SBI silo comparator */
|
||||||
|
#define MT_SBIMT 51 /* SBI maint */
|
||||||
|
#define MT_SBIER 52 /* SBI error */
|
||||||
|
#define MT_SBITA 53 /* SBI timeout addr */
|
||||||
|
#define MT_SBIQC 54 /* SBI timeout clear */
|
||||||
|
#define MT_IORESET 55 /* I/O Bus Reset */
|
||||||
|
#define MT_TBDATA 59 /* Translation Buffer Data */
|
||||||
|
#define MT_MBRK 60 /* microbreak */
|
||||||
|
|
||||||
|
/* Memory */
|
||||||
|
|
||||||
|
#define MAXMEMWIDTH 22 /* max mem, KA610 */
|
||||||
|
#define MAXMEMSIZE (1 << MAXMEMWIDTH) /* max mem size */
|
||||||
|
#define MAXMEMWIDTH_X 22 /* max mem, KA610 */
|
||||||
|
#define MAXMEMSIZE_X (1 << MAXMEMWIDTH_X)
|
||||||
|
#define INITMEMSIZE (1 << 22) /* initial memory size */
|
||||||
|
#define MEMSIZE (cpu_unit.capac)
|
||||||
|
#define ADDR_IS_MEM(x) (((uint32) (x)) < MEMSIZE)
|
||||||
|
#undef PAMASK
|
||||||
|
#define PAMASK 0x203FFFFF /* KA610 needs a special mask */
|
||||||
|
#define MEM_MODIFIERS { UNIT_MSIZE, (1u << 19), NULL, "512k", &cpu_set_size }, \
|
||||||
|
{ UNIT_MSIZE, (1u << 20), NULL, "1M", &cpu_set_size }, \
|
||||||
|
{ UNIT_MSIZE, (1u << 21), NULL, "2M", &cpu_set_size }, \
|
||||||
|
{ UNIT_MSIZE, (1u << 22), NULL, "4M", &cpu_set_size }
|
||||||
|
|
||||||
|
/* Qbus I/O page */
|
||||||
|
|
||||||
|
#define IOPAGEAWIDTH 13 /* IO addr width */
|
||||||
|
#define IOPAGESIZE (1u << IOPAGEAWIDTH) /* IO page length */
|
||||||
|
#define IOPAGEMASK (IOPAGESIZE - 1) /* IO addr mask */
|
||||||
|
#define IOPAGEBASE 0x20000000 /* IO page base */
|
||||||
|
#define ADDR_IS_IO(x) ((((uint32) (x)) >= IOPAGEBASE) && \
|
||||||
|
(((uint32) (x)) < (IOPAGEBASE + IOPAGESIZE)))
|
||||||
|
|
||||||
|
/* Other address spaces */
|
||||||
|
|
||||||
|
#define ADDR_IS_CDG(x) (0)
|
||||||
|
#define ADDR_IS_ROM(x) (0)
|
||||||
|
#define ADDR_IS_NVR(x) (0)
|
||||||
|
|
||||||
|
/* Machine specific reserved operand tests (all NOPs) */
|
||||||
|
|
||||||
|
#define ML_PA_TEST(r)
|
||||||
|
#define ML_LR_TEST(r)
|
||||||
|
#define ML_SBR_TEST(r)
|
||||||
|
#define ML_PXBR_TEST(r)
|
||||||
|
#define LP_AST_TEST(r)
|
||||||
|
#define LP_MBZ84_TEST(r)
|
||||||
|
#define LP_MBZ92_TEST(r)
|
||||||
|
|
||||||
|
#define SCB_VALID (ADDR_IS_MEM(SCBB) || ADDR_IS_ROM(SCBB))
|
||||||
|
|
||||||
|
/* Qbus I/O modes */
|
||||||
|
|
||||||
|
#define READ 0 /* PDP-11 compatibility */
|
||||||
|
#define WRITE (L_WORD)
|
||||||
|
#define WRITEB (L_BYTE)
|
||||||
|
|
||||||
|
/* Common CSI flags */
|
||||||
|
|
||||||
|
#define CSR_V_GO 0 /* go */
|
||||||
|
#define CSR_V_IE 6 /* interrupt enable */
|
||||||
|
#define CSR_V_DONE 7 /* done */
|
||||||
|
#define CSR_V_BUSY 11 /* busy */
|
||||||
|
#define CSR_V_ERR 15 /* error */
|
||||||
|
#define CSR_GO (1u << CSR_V_GO)
|
||||||
|
#define CSR_IE (1u << CSR_V_IE)
|
||||||
|
#define CSR_DONE (1u << CSR_V_DONE)
|
||||||
|
#define CSR_BUSY (1u << CSR_V_BUSY)
|
||||||
|
#define CSR_ERR (1u << CSR_V_ERR)
|
||||||
|
|
||||||
|
/* Timers */
|
||||||
|
|
||||||
|
#define TMR_CLK 0 /* 100Hz clock */
|
||||||
|
|
||||||
|
/* Internal I/O interrupts */
|
||||||
|
|
||||||
|
#define IPL_CLKINT 0x16 /* clock IPL */
|
||||||
|
|
||||||
|
/* I/O system definitions */
|
||||||
|
|
||||||
|
#define DZ_MUXES 4 /* max # of DZV muxes */
|
||||||
|
#define DZ_LINES 4 /* lines per DZV mux */
|
||||||
|
#define VH_MUXES 4 /* max # of DHQ muxes */
|
||||||
|
#define DLX_LINES 16 /* max # of KL11/DL11's */
|
||||||
|
#define DCX_LINES 16 /* max # of DC11's */
|
||||||
|
#define MT_MAXFR (1 << 16) /* magtape max rec */
|
||||||
|
#define AUTO_LNT 34 /* autoconfig ranks */
|
||||||
|
|
||||||
|
#define DEV_V_UBUS (DEV_V_UF + 0) /* Unibus */
|
||||||
|
#define DEV_V_QBUS (DEV_V_UF + 1) /* Qbus */
|
||||||
|
#define DEV_V_Q18 (DEV_V_UF + 2) /* Qbus, mem <= 256KB */
|
||||||
|
#define DEV_V_FLTA (DEV_V_UF + 3) /* flt addr */
|
||||||
|
#define DEV_UBUS (1u << DEV_V_UBUS)
|
||||||
|
#define DEV_QBUS (1u << DEV_V_QBUS)
|
||||||
|
#define DEV_Q18 (1u << DEV_V_Q18)
|
||||||
|
#define DEV_FLTA (1u << DEV_V_FLTA)
|
||||||
|
|
||||||
|
#define UNIBUS FALSE /* 22b only */
|
||||||
|
|
||||||
|
#define DEV_RDX 16 /* default device radix */
|
||||||
|
|
||||||
|
/* Device information block */
|
||||||
|
|
||||||
|
#define VEC_DEVMAX 4 /* max device vec */
|
||||||
|
|
||||||
|
typedef struct {
|
||||||
|
uint32 ba; /* base addr */
|
||||||
|
uint32 lnt; /* length */
|
||||||
|
t_stat (*rd)(int32 *dat, int32 ad, int32 md);
|
||||||
|
t_stat (*wr)(int32 dat, int32 ad, int32 md);
|
||||||
|
int32 vnum; /* vectors: number */
|
||||||
|
int32 vloc; /* locator */
|
||||||
|
int32 vec; /* value */
|
||||||
|
int32 (*ack[VEC_DEVMAX])(void); /* ack routine */
|
||||||
|
} DIB;
|
||||||
|
|
||||||
|
/* I/O page layout - RQB,RQC,RQD float based on number of DZ's */
|
||||||
|
|
||||||
|
#define IOBA_DZ (IOPAGEBASE + 000100) /* DZ11 */
|
||||||
|
#define IOLN_DZ 010
|
||||||
|
#define IOBA_RQB (IOPAGEBASE + 000334 + (020 * (DZ_MUXES / 2)))
|
||||||
|
#define IOLN_RQB 004
|
||||||
|
#define IOBA_RQC (IOPAGEBASE + IOBA_RQB + IOLN_RQB)
|
||||||
|
#define IOLN_RQC 004
|
||||||
|
#define IOBA_RQD (IOPAGEBASE + IOBA_RQC + IOLN_RQC)
|
||||||
|
#define IOLN_RQD 004
|
||||||
|
#define IOBA_VH (IOPAGEBASE + 000440) /* DHQ11 */
|
||||||
|
#define IOLN_VH 020
|
||||||
|
#define IOBA_MEM (IOPAGEBASE + 012100) /* MSV11-P */
|
||||||
|
#define IOLN_MEM 040
|
||||||
|
#define IOBA_RQ (IOPAGEBASE + 012150) /* RQDX3 */
|
||||||
|
#define IOLN_RQ 004
|
||||||
|
#define IOBA_TS (IOPAGEBASE + 012520) /* TS11 */
|
||||||
|
#define IOLN_TS 004
|
||||||
|
#define IOBA_RL (IOPAGEBASE + 014400) /* RL11 */
|
||||||
|
#define IOLN_RL 012
|
||||||
|
#define IOBA_XQ (IOPAGEBASE + 014440) /* DEQNA/DELQA */
|
||||||
|
#define IOLN_XQ 020
|
||||||
|
#define IOBA_XQB (IOPAGEBASE + 014460) /* 2nd DEQNA/DELQA */
|
||||||
|
#define IOLN_XQB 020
|
||||||
|
#define IOBA_TQ (IOPAGEBASE + 014500) /* TMSCP */
|
||||||
|
#define IOLN_TQ 004
|
||||||
|
#define IOBA_XU (IOPAGEBASE + 014510) /* DEUNA/DELUA */
|
||||||
|
#define IOLN_XU 010
|
||||||
|
#define IOBA_RP (IOPAGEBASE + 016700) /* RP/RM */
|
||||||
|
#define IOLN_RP 054
|
||||||
|
#define IOBA_CR (IOPAGEBASE + 017160) /* CD/CR/CM */
|
||||||
|
#define IOLN_CR 010
|
||||||
|
#define IOBA_RX (IOPAGEBASE + 017170) /* RXV11 */
|
||||||
|
#define IOLN_RX 004
|
||||||
|
#define IOBA_RY (IOPAGEBASE + 017170) /* RXV21 */
|
||||||
|
#define IOLN_RY 004
|
||||||
|
#define IOBA_QVSS (IOPAGEBASE + 017200) /* QVSS */
|
||||||
|
#define IOLN_QVSS 0100
|
||||||
|
#define IOBA_QDSS (IOPAGEBASE + 017400) /* QDSS */
|
||||||
|
#define IOLN_QDSS 002
|
||||||
|
#define IOBA_DBL (IOPAGEBASE + 017500) /* doorbell */
|
||||||
|
#define IOLN_DBL 002
|
||||||
|
#define IOBA_LPT (IOPAGEBASE + 017514) /* LP11 */
|
||||||
|
#define IOLN_LPT 004
|
||||||
|
#define IOBA_PTR (IOPAGEBASE + 017550) /* PC11 reader */
|
||||||
|
#define IOLN_PTR 004
|
||||||
|
#define IOBA_PTP (IOPAGEBASE + 017554) /* PC11 punch */
|
||||||
|
#define IOLN_PTP 004
|
||||||
|
|
||||||
|
/* For the KA610, all hardware devices interrupt at IPL 17 regardless
|
||||||
|
of their bus request level. Within each IPL, priority is right to left
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* IPL 17 */
|
||||||
|
|
||||||
|
#define INT_V_CLK 0 /* clock */
|
||||||
|
#define INT_V_RQ 1 /* RQDX3 */
|
||||||
|
#define INT_V_RL 2 /* RLV12/RL02 */
|
||||||
|
#define INT_V_DZRX 3 /* DZ11 */
|
||||||
|
#define INT_V_DZTX 4
|
||||||
|
#define INT_V_RP 5 /* RP,RM drives */
|
||||||
|
#define INT_V_TS 6 /* TS11/TSV05 */
|
||||||
|
#define INT_V_TQ 7 /* TMSCP */
|
||||||
|
#define INT_V_XQ 8 /* DEQNA/DELQA */
|
||||||
|
#define INT_V_RY 9 /* RXV21 */
|
||||||
|
#define INT_V_TTI 10 /* console */
|
||||||
|
#define INT_V_TTO 11
|
||||||
|
#define INT_V_PTR 12 /* PC11 */
|
||||||
|
#define INT_V_PTP 13
|
||||||
|
#define INT_V_LPT 14 /* LP11 */
|
||||||
|
#define INT_V_CSI 15 /* SSC cons UART */
|
||||||
|
#define INT_V_CSO 16
|
||||||
|
#define INT_V_TMR0 17 /* SSC timers */
|
||||||
|
#define INT_V_TMR1 18
|
||||||
|
#define INT_V_VHRX 19 /* DHQ11 */
|
||||||
|
#define INT_V_VHTX 20
|
||||||
|
#define INT_V_QDSS 21 /* QDSS */
|
||||||
|
#define INT_V_CR 22
|
||||||
|
#define INT_V_QVSS 23 /* QVSS */
|
||||||
|
|
||||||
|
#define INT_CLK (1u << INT_V_CLK)
|
||||||
|
#define INT_RQ (1u << INT_V_RQ)
|
||||||
|
#define INT_RL (1u << INT_V_RL)
|
||||||
|
#define INT_DZRX (1u << INT_V_DZRX)
|
||||||
|
#define INT_DZTX (1u << INT_V_DZTX)
|
||||||
|
#define INT_RP (1u << INT_V_RP)
|
||||||
|
#define INT_TS (1u << INT_V_TS)
|
||||||
|
#define INT_TQ (1u << INT_V_TQ)
|
||||||
|
#define INT_XQ (1u << INT_V_XQ)
|
||||||
|
#define INT_RY (1u << INT_V_RY)
|
||||||
|
#define INT_TTI (1u << INT_V_TTI)
|
||||||
|
#define INT_TTO (1u << INT_V_TTO)
|
||||||
|
#define INT_PTR (1u << INT_V_PTR)
|
||||||
|
#define INT_PTP (1u << INT_V_PTP)
|
||||||
|
#define INT_LPT (1u << INT_V_LPT)
|
||||||
|
#define INT_CSI (1u << INT_V_CSI)
|
||||||
|
#define INT_CSO (1u << INT_V_CSO)
|
||||||
|
#define INT_TMR0 (1u << INT_V_TMR0)
|
||||||
|
#define INT_TMR1 (1u << INT_V_TMR1)
|
||||||
|
#define INT_VHRX (1u << INT_V_VHRX)
|
||||||
|
#define INT_VHTX (1u << INT_V_VHTX)
|
||||||
|
#define INT_QDSS (1u << INT_V_QDSS)
|
||||||
|
#define INT_CR (1u << INT_V_CR)
|
||||||
|
#define INT_QVSS (1u << INT_V_QVSS)
|
||||||
|
|
||||||
|
#define IPL_CLK (0x17 - IPL_HMIN) /* relative IPL */
|
||||||
|
#define IPL_RQ (0x17 - IPL_HMIN)
|
||||||
|
#define IPL_RL (0x17 - IPL_HMIN)
|
||||||
|
#define IPL_DZRX (0x17 - IPL_HMIN)
|
||||||
|
#define IPL_DZTX (0x17 - IPL_HMIN)
|
||||||
|
#define IPL_RP (0x17 - IPL_HMIN)
|
||||||
|
#define IPL_TS (0x17 - IPL_HMIN)
|
||||||
|
#define IPL_TQ (0x17 - IPL_HMIN)
|
||||||
|
#define IPL_XQ (0x17 - IPL_HMIN)
|
||||||
|
#define IPL_RY (0x17 - IPL_HMIN)
|
||||||
|
#define IPL_TTI (0x17 - IPL_HMIN)
|
||||||
|
#define IPL_TTO (0x17 - IPL_HMIN)
|
||||||
|
#define IPL_PTR (0x17 - IPL_HMIN)
|
||||||
|
#define IPL_PTP (0x17 - IPL_HMIN)
|
||||||
|
#define IPL_LPT (0x17 - IPL_HMIN)
|
||||||
|
#define IPL_CSI (0x17 - IPL_HMIN)
|
||||||
|
#define IPL_CSO (0x17 - IPL_HMIN)
|
||||||
|
#define IPL_TMR0 (0x17 - IPL_HMIN)
|
||||||
|
#define IPL_TMR1 (0x17 - IPL_HMIN)
|
||||||
|
#define IPL_VHRX (0x17 - IPL_HMIN)
|
||||||
|
#define IPL_VHTX (0x17 - IPL_HMIN)
|
||||||
|
#define IPL_QDSS (0x17 - IPL_HMIN)
|
||||||
|
#define IPL_CR (0x17 - IPL_HMIN)
|
||||||
|
#define IPL_QVSS (0x17 - IPL_HMIN)
|
||||||
|
|
||||||
|
#define IPL_HMAX 0x17 /* highest hwre level */
|
||||||
|
#define IPL_HMIN 0x17 /* lowest hwre level */
|
||||||
|
#define IPL_HLVL (IPL_HMAX - IPL_HMIN + 1) /* # hardware levels */
|
||||||
|
#define IPL_SMAX 0xF /* highest swre level */
|
||||||
|
|
||||||
|
/* Device vectors */
|
||||||
|
|
||||||
|
#define VEC_QBUS 1 /* Qbus system */
|
||||||
|
#define VEC_Q 0x200 /* Qbus vector offset */
|
||||||
|
#define VEC_PTR (VEC_Q + 0070)
|
||||||
|
#define VEC_PTP (VEC_Q + 0074)
|
||||||
|
#define VEC_XQ (VEC_Q + 0120)
|
||||||
|
#define VEC_XU (VEC_Q + 0120)
|
||||||
|
#define VEC_RQ (VEC_Q + 0154)
|
||||||
|
#define VEC_RL (VEC_Q + 0160)
|
||||||
|
#define VEC_LPT (VEC_Q + 0200)
|
||||||
|
#define VEC_TS (VEC_Q + 0224)
|
||||||
|
#define VEC_CR (VEC_Q + 0230)
|
||||||
|
#define VEC_RP (VEC_Q + 0254)
|
||||||
|
#define VEC_TQ (VEC_Q + 0260)
|
||||||
|
#define VEC_RX (VEC_Q + 0264)
|
||||||
|
#define VEC_RY (VEC_Q + 0264)
|
||||||
|
#define VEC_DZRX (VEC_Q + 0300)
|
||||||
|
#define VEC_DZTX (VEC_Q + 0304)
|
||||||
|
#define VEC_VHRX (VEC_Q + 0310)
|
||||||
|
#define VEC_VHTX (VEC_Q + 0314)
|
||||||
|
|
||||||
|
/* Interrupt macros */
|
||||||
|
|
||||||
|
#define IVCL(dv) ((IPL_##dv * 32) + INT_V_##dv)
|
||||||
|
#define IREQ(dv) int_req[IPL_##dv]
|
||||||
|
#define SET_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] | (INT_##dv)
|
||||||
|
#define CLR_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] & ~(INT_##dv)
|
||||||
|
#define IORETURN(f,v) ((f)? (v): SCPE_OK) /* cond error return */
|
||||||
|
|
||||||
|
/* Logging */
|
||||||
|
|
||||||
|
#define LOG_CPU_I 0x1 /* intexc */
|
||||||
|
#define LOG_CPU_R 0x2 /* REI */
|
||||||
|
#define LOG_CPU_P 0x4 /* context */
|
||||||
|
|
||||||
|
/* Function prototypes for virtual memory interface */
|
||||||
|
|
||||||
|
int32 Read (uint32 va, int32 lnt, int32 acc);
|
||||||
|
void Write (uint32 va, int32 val, int32 lnt, int32 acc);
|
||||||
|
|
||||||
|
/* Function prototypes for physical memory interface (inlined) */
|
||||||
|
|
||||||
|
SIM_INLINE int32 ReadB (uint32 pa);
|
||||||
|
SIM_INLINE int32 ReadW (uint32 pa);
|
||||||
|
SIM_INLINE int32 ReadL (uint32 pa);
|
||||||
|
SIM_INLINE int32 ReadLP (uint32 pa);
|
||||||
|
SIM_INLINE void WriteB (uint32 pa, int32 val);
|
||||||
|
SIM_INLINE void WriteW (uint32 pa, int32 val);
|
||||||
|
SIM_INLINE void WriteL (uint32 pa, int32 val);
|
||||||
|
void WriteLP (uint32 pa, int32 val);
|
||||||
|
|
||||||
|
/* Function prototypes for I/O */
|
||||||
|
|
||||||
|
int32 Map_ReadB (uint32 ba, int32 bc, uint8 *buf);
|
||||||
|
int32 Map_ReadW (uint32 ba, int32 bc, uint16 *buf);
|
||||||
|
int32 Map_WriteB (uint32 ba, int32 bc, uint8 *buf);
|
||||||
|
int32 Map_WriteW (uint32 ba, int32 bc, uint16 *buf);
|
||||||
|
|
||||||
|
int32 clk_cosched (int32 wait);
|
||||||
|
|
||||||
|
#include "pdp11_io_lib.h"
|
||||||
|
|
||||||
|
#endif
|
||||||
376
VAX/vax610_io.c
Normal file
376
VAX/vax610_io.c
Normal file
|
|
@ -0,0 +1,376 @@
|
||||||
|
/* vax610_io.c: MicroVAX I Qbus IO simulator
|
||||||
|
|
||||||
|
Copyright (c) 2011-2012, Matt Burke
|
||||||
|
This module incorporates code from SimH, Copyright (c) 1998-2008, Robert M Supnik
|
||||||
|
|
||||||
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
to deal in the Software without restriction, including without limitation
|
||||||
|
the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||||
|
and/or sell copies of the Software, and to permit persons to whom the
|
||||||
|
Software is furnished to do so, subject to the following conditions:
|
||||||
|
|
||||||
|
The above copyright notice and this permission notice shall be included in
|
||||||
|
all copies or substantial portions of the Software.
|
||||||
|
|
||||||
|
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||||
|
THE AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||||
|
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||||
|
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||||
|
|
||||||
|
Except as contained in this notice, the name(s) of the author(s) shall not be
|
||||||
|
used in advertising or otherwise to promote the sale, use or other dealings
|
||||||
|
in this Software without prior written authorization from the author(s).
|
||||||
|
|
||||||
|
qba Qbus adapter
|
||||||
|
|
||||||
|
15-Feb-2012 MB First Version
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "vax_defs.h"
|
||||||
|
|
||||||
|
int32 int_req[IPL_HLVL] = { 0 }; /* intr, IPL 14-17 */
|
||||||
|
int32 autcon_enb = 1; /* autoconfig enable */
|
||||||
|
|
||||||
|
extern int32 PSL, SISR, trpirq, mem_err, hlt_pin;
|
||||||
|
extern int32 p1;
|
||||||
|
extern jmp_buf save_env;
|
||||||
|
extern DEVICE *sim_devices[];
|
||||||
|
|
||||||
|
int32 eval_int (void);
|
||||||
|
t_stat qba_reset (DEVICE *dptr);
|
||||||
|
|
||||||
|
/* Qbus adapter data structures
|
||||||
|
|
||||||
|
qba_dev QBA device descriptor
|
||||||
|
qba_unit QBA units
|
||||||
|
qba_reg QBA register list
|
||||||
|
*/
|
||||||
|
|
||||||
|
UNIT qba_unit = { UDATA (NULL, 0, 0) };
|
||||||
|
|
||||||
|
REG qba_reg[] = {
|
||||||
|
{ HRDATA (IPL17, int_req[3], 32), REG_RO },
|
||||||
|
{ HRDATA (IPL16, int_req[2], 32), REG_RO },
|
||||||
|
{ HRDATA (IPL15, int_req[1], 32), REG_RO },
|
||||||
|
{ HRDATA (IPL14, int_req[0], 32), REG_RO },
|
||||||
|
{ FLDATA (AUTOCON, autcon_enb, 0), REG_HRO },
|
||||||
|
{ NULL }
|
||||||
|
};
|
||||||
|
|
||||||
|
MTAB qba_mod[] = {
|
||||||
|
{ MTAB_XTD|MTAB_VDV|MTAB_NMO, 0, "IOSPACE", NULL,
|
||||||
|
NULL, &show_iospace },
|
||||||
|
{ MTAB_XTD|MTAB_VDV, 1, "AUTOCONFIG", "AUTOCONFIG",
|
||||||
|
&set_autocon, &show_autocon },
|
||||||
|
{ MTAB_XTD|MTAB_VDV, 0, NULL, "NOAUTOCONFIG",
|
||||||
|
&set_autocon, NULL },
|
||||||
|
{ 0 }
|
||||||
|
};
|
||||||
|
|
||||||
|
DEVICE qba_dev = {
|
||||||
|
"QBA", &qba_unit, qba_reg, qba_mod,
|
||||||
|
1, 16, 4, 2, 16, 16,
|
||||||
|
NULL, NULL, &qba_reset,
|
||||||
|
NULL, NULL, NULL,
|
||||||
|
NULL, DEV_QBUS
|
||||||
|
};
|
||||||
|
|
||||||
|
/* IO page dispatches */
|
||||||
|
|
||||||
|
t_stat (*iodispR[IOPAGESIZE >> 1])(int32 *dat, int32 ad, int32 md);
|
||||||
|
t_stat (*iodispW[IOPAGESIZE >> 1])(int32 dat, int32 ad, int32 md);
|
||||||
|
|
||||||
|
/* Interrupt request to interrupt action map */
|
||||||
|
|
||||||
|
int32 (*int_ack[IPL_HLVL][32])(void); /* int ack routines */
|
||||||
|
|
||||||
|
/* Interrupt request to vector map */
|
||||||
|
|
||||||
|
int32 int_vec[IPL_HLVL][32]; /* int req to vector */
|
||||||
|
|
||||||
|
/* The KA610 handles errors in I/O space as follows
|
||||||
|
|
||||||
|
- read: machine check
|
||||||
|
- write: machine check (?)
|
||||||
|
*/
|
||||||
|
|
||||||
|
int32 ReadQb (uint32 pa)
|
||||||
|
{
|
||||||
|
int32 idx, val;
|
||||||
|
|
||||||
|
idx = (pa & IOPAGEMASK) >> 1;
|
||||||
|
if (iodispR[idx]) {
|
||||||
|
iodispR[idx] (&val, pa, READ);
|
||||||
|
return val;
|
||||||
|
}
|
||||||
|
MACH_CHECK (MCHK_READ);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
void WriteQb (uint32 pa, int32 val, int32 mode)
|
||||||
|
{
|
||||||
|
int32 idx;
|
||||||
|
|
||||||
|
idx = (pa & IOPAGEMASK) >> 1;
|
||||||
|
if (iodispW[idx]) {
|
||||||
|
iodispW[idx] (val, pa, mode);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
MACH_CHECK (MCHK_WRITE); /* FIXME: is this correct? */
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* ReadIO - read I/O space
|
||||||
|
|
||||||
|
Inputs:
|
||||||
|
pa = physical address
|
||||||
|
lnt = length (BWLQ)
|
||||||
|
Output:
|
||||||
|
longword of data
|
||||||
|
*/
|
||||||
|
|
||||||
|
int32 ReadIO (uint32 pa, int32 lnt)
|
||||||
|
{
|
||||||
|
int32 iod;
|
||||||
|
|
||||||
|
iod = ReadQb (pa); /* wd from Qbus */
|
||||||
|
if (lnt < L_LONG) /* bw? position */
|
||||||
|
iod = iod << ((pa & 2)? 16: 0);
|
||||||
|
else iod = (ReadQb (pa + 2) << 16) | iod; /* lw, get 2nd wd */
|
||||||
|
SET_IRQL;
|
||||||
|
return iod;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* WriteIO - write I/O space
|
||||||
|
|
||||||
|
Inputs:
|
||||||
|
pa = physical address
|
||||||
|
val = data to write, right justified in 32b longword
|
||||||
|
lnt = length (BWLQ)
|
||||||
|
Outputs:
|
||||||
|
none
|
||||||
|
*/
|
||||||
|
|
||||||
|
void WriteIO (uint32 pa, int32 val, int32 lnt)
|
||||||
|
{
|
||||||
|
if (lnt == L_BYTE)
|
||||||
|
WriteQb (pa, val, WRITEB);
|
||||||
|
else if (lnt == L_WORD)
|
||||||
|
WriteQb (pa, val, WRITE);
|
||||||
|
else {
|
||||||
|
WriteQb (pa, val & 0xFFFF, WRITE);
|
||||||
|
WriteQb (pa + 2, (val >> 16) & 0xFFFF, WRITE);
|
||||||
|
}
|
||||||
|
SET_IRQL;
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Find highest priority outstanding interrupt */
|
||||||
|
|
||||||
|
int32 eval_int (void)
|
||||||
|
{
|
||||||
|
int32 ipl = PSL_GETIPL (PSL);
|
||||||
|
int32 i, t;
|
||||||
|
|
||||||
|
static const int32 sw_int_mask[IPL_SMAX] = {
|
||||||
|
0xFFFE, 0xFFFC, 0xFFF8, 0xFFF0, /* 0 - 3 */
|
||||||
|
0xFFE0, 0xFFC0, 0xFF80, 0xFF00, /* 4 - 7 */
|
||||||
|
0xFE00, 0xFC00, 0xF800, 0xF000, /* 8 - B */
|
||||||
|
0xE000, 0xC000, 0x8000 /* C - E */
|
||||||
|
};
|
||||||
|
|
||||||
|
if (hlt_pin) /* hlt pin int */
|
||||||
|
return IPL_HLTPIN;
|
||||||
|
if ((ipl < IPL_MEMERR) && mem_err) /* mem err int */
|
||||||
|
return IPL_MEMERR;
|
||||||
|
for (i = IPL_HMAX; i >= IPL_HMIN; i--) { /* chk hwre int */
|
||||||
|
if (i <= ipl) /* at ipl? no int */
|
||||||
|
return 0;
|
||||||
|
if (int_req[i - IPL_HMIN]) /* req != 0? int */
|
||||||
|
return i;
|
||||||
|
}
|
||||||
|
if (ipl >= IPL_SMAX) /* ipl >= sw max? */
|
||||||
|
return 0;
|
||||||
|
if ((t = SISR & sw_int_mask[ipl]) == 0) /* eligible req */
|
||||||
|
return 0;
|
||||||
|
for (i = IPL_SMAX; i > ipl; i--) { /* check swre int */
|
||||||
|
if ((t >> i) & 1) /* req != 0? int */
|
||||||
|
return i;
|
||||||
|
}
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Return vector for highest priority hardware interrupt at IPL lvl */
|
||||||
|
|
||||||
|
int32 get_vector (int32 lvl)
|
||||||
|
{
|
||||||
|
int32 i;
|
||||||
|
int32 l = lvl - IPL_HMIN;
|
||||||
|
|
||||||
|
if (lvl == IPL_MEMERR) { /* mem error? */
|
||||||
|
mem_err = 0;
|
||||||
|
return SCB_MEMERR;
|
||||||
|
}
|
||||||
|
if (lvl > IPL_HMAX) { /* error req lvl? */
|
||||||
|
ABORT (STOP_UIPL); /* unknown intr */
|
||||||
|
}
|
||||||
|
for (i = 0; int_req[l] && (i < 32); i++) {
|
||||||
|
if ((int_req[l] >> i) & 1) {
|
||||||
|
int_req[l] = int_req[l] & ~(1u << i);
|
||||||
|
if (int_ack[l][i])
|
||||||
|
return int_ack[l][i]();
|
||||||
|
return int_vec[l][i];
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Reset I/O bus */
|
||||||
|
|
||||||
|
void ioreset_wr (int32 data)
|
||||||
|
{
|
||||||
|
reset_all (5); /* from qba on... */
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Reset Qbus */
|
||||||
|
|
||||||
|
t_stat qba_reset (DEVICE *dptr)
|
||||||
|
{
|
||||||
|
int32 i;
|
||||||
|
|
||||||
|
for (i = 0; i < IPL_HLVL; i++)
|
||||||
|
int_req[i] = 0;
|
||||||
|
return SCPE_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Qbus I/O buffer routines, aligned access
|
||||||
|
|
||||||
|
Map_ReadB - fetch byte buffer from memory
|
||||||
|
Map_ReadW - fetch word buffer from memory
|
||||||
|
Map_WriteB - store byte buffer into memory
|
||||||
|
Map_WriteW - store word buffer into memory
|
||||||
|
*/
|
||||||
|
|
||||||
|
int32 Map_ReadB (uint32 ba, int32 bc, uint8 *buf)
|
||||||
|
{
|
||||||
|
int32 i;
|
||||||
|
uint32 ma = ba & 0x3FFFFF;
|
||||||
|
uint32 dat;
|
||||||
|
|
||||||
|
if ((ba | bc) & 03) { /* check alignment */
|
||||||
|
for (i = 0; i < bc; i++, buf++) { /* by bytes */
|
||||||
|
*buf = ReadB (ma);
|
||||||
|
ma = ma + 1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
for (i = 0; i < bc; i = i + 4, buf++) { /* by longwords */
|
||||||
|
dat = ReadL (ma); /* get lw */
|
||||||
|
*buf++ = dat & BMASK; /* low 8b */
|
||||||
|
*buf++ = (dat >> 8) & BMASK; /* next 8b */
|
||||||
|
*buf++ = (dat >> 16) & BMASK; /* next 8b */
|
||||||
|
*buf = (dat >> 24) & BMASK;
|
||||||
|
ma = ma + 4;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
int32 Map_ReadW (uint32 ba, int32 bc, uint16 *buf)
|
||||||
|
{
|
||||||
|
int32 i;
|
||||||
|
uint32 ma = ba & 0x3FFFFF;
|
||||||
|
uint32 dat;
|
||||||
|
|
||||||
|
ba = ba & ~01;
|
||||||
|
bc = bc & ~01;
|
||||||
|
if ((ba | bc) & 03) { /* check alignment */
|
||||||
|
for (i = 0; i < bc; i = i + 2, buf++) { /* by words */
|
||||||
|
*buf = ReadW (ma);
|
||||||
|
ma = ma + 2;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
for (i = 0; i < bc; i = i + 4, buf++) { /* by longwords */
|
||||||
|
dat = ReadL (ma); /* get lw */
|
||||||
|
*buf++ = dat & WMASK; /* low 16b */
|
||||||
|
*buf = (dat >> 16) & WMASK; /* high 16b */
|
||||||
|
ma = ma + 4;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
int32 Map_WriteB (uint32 ba, int32 bc, uint8 *buf)
|
||||||
|
{
|
||||||
|
int32 i;
|
||||||
|
uint32 ma = ba & 0x3FFFFF;
|
||||||
|
uint32 dat;
|
||||||
|
|
||||||
|
if ((ba | bc) & 03) { /* check alignment */
|
||||||
|
for (i = 0; i < bc; i++, buf++) { /* by bytes */
|
||||||
|
WriteB (ma, *buf);
|
||||||
|
ma = ma + 1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
for (i = 0; i < bc; i = i + 4, buf++) { /* by longwords */
|
||||||
|
dat = (uint32) *buf++; /* get low 8b */
|
||||||
|
dat = dat | (((uint32) *buf++) << 8); /* merge next 8b */
|
||||||
|
dat = dat | (((uint32) *buf++) << 16); /* merge next 8b */
|
||||||
|
dat = dat | (((uint32) *buf) << 24); /* merge hi 8b */
|
||||||
|
WriteL (ma, dat); /* store lw */
|
||||||
|
ma = ma + 4;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
int32 Map_WriteW (uint32 ba, int32 bc, uint16 *buf)
|
||||||
|
{
|
||||||
|
int32 i;
|
||||||
|
uint32 ma = ba & 0x3FFFFF;
|
||||||
|
uint32 dat;
|
||||||
|
|
||||||
|
ba = ba & ~01;
|
||||||
|
bc = bc & ~01;
|
||||||
|
if ((ba | bc) & 03) { /* check alignment */
|
||||||
|
for (i = 0; i < bc; i = i + 2, buf++) { /* by words */
|
||||||
|
WriteW (ma, *buf);
|
||||||
|
ma = ma + 2;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
for (i = 0; i < bc; i = i + 4, buf++) { /* by longwords */
|
||||||
|
dat = (uint32) *buf++; /* get low 16b */
|
||||||
|
dat = dat | (((uint32) *buf) << 16); /* merge hi 16b */
|
||||||
|
WriteL (ma, dat); /* store lw */
|
||||||
|
ma = ma + 4;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Build dib_tab from device list */
|
||||||
|
|
||||||
|
t_stat build_dib_tab (void)
|
||||||
|
{
|
||||||
|
int32 i;
|
||||||
|
DEVICE *dptr;
|
||||||
|
DIB *dibp;
|
||||||
|
t_stat r;
|
||||||
|
|
||||||
|
init_ubus_tab (); /* init bus tables */
|
||||||
|
for (i = 0; (dptr = sim_devices[i]) != NULL; i++) { /* loop thru dev */
|
||||||
|
dibp = (DIB *) dptr->ctxt; /* get DIB */
|
||||||
|
if (dibp && !(dptr->flags & DEV_DIS)) { /* defined, enabled? */
|
||||||
|
if ((r = build_ubus_tab (dptr, dibp))) /* add to bus tab */
|
||||||
|
return r;
|
||||||
|
} /* end if enabled */
|
||||||
|
} /* end for */
|
||||||
|
return SCPE_OK;
|
||||||
|
}
|
||||||
112
VAX/vax610_mem.c
Normal file
112
VAX/vax610_mem.c
Normal file
|
|
@ -0,0 +1,112 @@
|
||||||
|
/* vax610_mem.c: MSV11-P memory controller
|
||||||
|
|
||||||
|
Copyright (c) 2011-2012, Matt Burke
|
||||||
|
|
||||||
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
to deal in the Software without restriction, including without limitation
|
||||||
|
the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||||
|
and/or sell copies of the Software, and to permit persons to whom the
|
||||||
|
Software is furnished to do so, subject to the following conditions:
|
||||||
|
|
||||||
|
The above copyright notice and this permission notice shall be included in
|
||||||
|
all copies or substantial portions of the Software.
|
||||||
|
|
||||||
|
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||||
|
THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||||
|
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||||
|
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||||
|
|
||||||
|
Except as contained in this notice, the name of the author shall not be
|
||||||
|
used in advertising or otherwise to promote the sale, use or other dealings
|
||||||
|
in this Software without prior written authorization from the author.
|
||||||
|
|
||||||
|
15-Feb-2012 MB First Version
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "vax_defs.h"
|
||||||
|
|
||||||
|
#define MAX_MCTL_COUNT 16
|
||||||
|
|
||||||
|
#define MCSR_PEN 0x0001 /* parity enable */
|
||||||
|
#define MCSR_WWP 0x0004 /* write wrong parity */
|
||||||
|
#define MCSR_ECR 0x4000 /* extended CSR read enable */
|
||||||
|
#define MCSR_RW (MCSR_ECR|MCSR_WWP|MCSR_PEN)
|
||||||
|
|
||||||
|
extern UNIT cpu_unit;
|
||||||
|
|
||||||
|
int32 mctl_csr[MAX_MCTL_COUNT];
|
||||||
|
int32 mctl_count = 0;
|
||||||
|
|
||||||
|
t_stat mctl_rd (int32 *data, int32 PA, int32 access);
|
||||||
|
t_stat mctl_wr (int32 data, int32 PA, int32 access);
|
||||||
|
t_stat mctl_reset (DEVICE *dptr);
|
||||||
|
|
||||||
|
/* MCTL data structures
|
||||||
|
|
||||||
|
mctl_dev MCTL device descriptor
|
||||||
|
mctl_unit MCTL unit list
|
||||||
|
mctl_reg MCTL register list
|
||||||
|
mctl_mod MCTL modifier list
|
||||||
|
*/
|
||||||
|
|
||||||
|
DIB mctl_dib = {
|
||||||
|
IOBA_MEM, IOLN_MEM, &mctl_rd, &mctl_wr,
|
||||||
|
1, 0, 0, { NULL }
|
||||||
|
};
|
||||||
|
|
||||||
|
UNIT mctl_unit[] = { UDATA (NULL, 0, 0) };
|
||||||
|
|
||||||
|
REG mctl_reg[] = {
|
||||||
|
{ DRDATA (COUNT, mctl_count, 16) },
|
||||||
|
{ BRDATA (CSR, mctl_csr, DEV_RDX, 16, MAX_MCTL_COUNT) },
|
||||||
|
{ NULL }
|
||||||
|
};
|
||||||
|
|
||||||
|
DEVICE mctl_dev = {
|
||||||
|
"MCTL", mctl_unit, mctl_reg, NULL,
|
||||||
|
1, DEV_RDX, 20, 1, DEV_RDX, 8,
|
||||||
|
NULL, NULL, &mctl_reset,
|
||||||
|
NULL, NULL, NULL,
|
||||||
|
&mctl_dib, DEV_Q18
|
||||||
|
};
|
||||||
|
|
||||||
|
/* I/O dispatch routines */
|
||||||
|
|
||||||
|
t_stat mctl_rd (int32 *data, int32 PA, int32 access)
|
||||||
|
{
|
||||||
|
int32 rg = (PA >> 1) & 0xF;
|
||||||
|
if (rg >= mctl_count)
|
||||||
|
return SCPE_NXM;
|
||||||
|
*data = mctl_csr[rg];
|
||||||
|
return SCPE_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
t_stat mctl_wr (int32 data, int32 PA, int32 access)
|
||||||
|
{
|
||||||
|
int32 rg = (PA >> 1) & 0xF;
|
||||||
|
if (rg >= mctl_count)
|
||||||
|
return SCPE_NXM;
|
||||||
|
mctl_csr[rg] = data & MCSR_RW;
|
||||||
|
return SCPE_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
t_stat mctl_reset (DEVICE *dptr)
|
||||||
|
{
|
||||||
|
int32 rg;
|
||||||
|
for (rg = 0; rg < MAX_MCTL_COUNT; rg++) {
|
||||||
|
mctl_csr[rg] = 0;
|
||||||
|
}
|
||||||
|
mctl_count = (int32)(MEMSIZE >> 18); /* memory controllers enabled */
|
||||||
|
return SCPE_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Used by CPU */
|
||||||
|
|
||||||
|
void rom_wr_B (int32 pa, int32 val)
|
||||||
|
{
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
393
VAX/vax610_stddev.c
Normal file
393
VAX/vax610_stddev.c
Normal file
|
|
@ -0,0 +1,393 @@
|
||||||
|
/* vax610_stddev.c: MicroVAX I standard I/O devices
|
||||||
|
|
||||||
|
Copyright (c) 2011-2012, Matt Burke
|
||||||
|
This module incorporates code from SimH, Copyright (c) 1998-2008, Robert M Supnik
|
||||||
|
|
||||||
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
to deal in the Software without restriction, including without limitation
|
||||||
|
the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||||
|
and/or sell copies of the Software, and to permit persons to whom the
|
||||||
|
Software is furnished to do so, subject to the following conditions:
|
||||||
|
|
||||||
|
The above copyright notice and this permission notice shall be included in
|
||||||
|
all copies or substantial portions of the Software.
|
||||||
|
|
||||||
|
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||||
|
THE AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||||
|
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||||
|
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||||
|
|
||||||
|
Except as contained in this notice, the name(s) of the author(s) shall not be
|
||||||
|
used in advertising or otherwise to promote the sale, use or other dealings
|
||||||
|
in this Software without prior written authorization from the author(s).
|
||||||
|
|
||||||
|
tti terminal input
|
||||||
|
tto terminal output
|
||||||
|
clk 100Hz clock
|
||||||
|
|
||||||
|
15-Feb-2012 MB First Version
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "vax_defs.h"
|
||||||
|
#include <time.h>
|
||||||
|
|
||||||
|
#define TTICSR_IMP (CSR_DONE + CSR_IE) /* terminal input */
|
||||||
|
#define TTICSR_RW (CSR_IE)
|
||||||
|
#define TTIBUF_ERR 0x8000 /* error */
|
||||||
|
#define TTIBUF_OVR 0x4000 /* overrun */
|
||||||
|
#define TTIBUF_FRM 0x2000 /* framing error */
|
||||||
|
#define TTIBUF_RBR 0x0400 /* receive break */
|
||||||
|
#define TTOCSR_IMP (CSR_DONE + CSR_IE) /* terminal output */
|
||||||
|
#define TTOCSR_RW (CSR_IE)
|
||||||
|
#define TXDB_V_SEL 8 /* unit select */
|
||||||
|
#define TXDB_M_SEL 0xF
|
||||||
|
#define TXDB_MISC 0xF /* console misc */
|
||||||
|
#define MISC_MASK 0xFF /* console data mask */
|
||||||
|
#define MISC_BOOT 0x2 /* reboot */
|
||||||
|
#define MISC_CLWS 0x3 /* clear warm start */
|
||||||
|
#define MISC_CLCS 0x4 /* clear cold start */
|
||||||
|
#define MISC_SWDN 0x5 /* software done */
|
||||||
|
#define TXDB_SEL (TXDB_M_SEL << TXDB_V_SEL) /* non-terminal */
|
||||||
|
#define TXDB_GETSEL(x) (((x) >> TXDB_V_SEL) & TXDB_M_SEL)
|
||||||
|
#define CLKCSR_IMP (CSR_IE) /* real-time clock */
|
||||||
|
#define CLKCSR_RW (CSR_IE)
|
||||||
|
#define CLK_DELAY 5000 /* 100 Hz */
|
||||||
|
#define TMXR_MULT 1 /* 100 Hz */
|
||||||
|
|
||||||
|
extern int32 int_req[IPL_HLVL];
|
||||||
|
extern int32 hlt_pin;
|
||||||
|
extern int32 sim_switches;
|
||||||
|
extern jmp_buf save_env;
|
||||||
|
extern int32 p1;
|
||||||
|
|
||||||
|
int32 tti_csr = 0; /* control/status */
|
||||||
|
int32 tto_csr = 0; /* control/status */
|
||||||
|
int32 clk_csr = 0; /* control/status */
|
||||||
|
int32 clk_tps = 100; /* ticks/second */
|
||||||
|
int32 tmxr_poll = CLK_DELAY * TMXR_MULT; /* term mux poll */
|
||||||
|
int32 tmr_poll = CLK_DELAY; /* pgm timer poll */
|
||||||
|
|
||||||
|
t_stat tti_svc (UNIT *uptr);
|
||||||
|
t_stat tto_svc (UNIT *uptr);
|
||||||
|
t_stat clk_svc (UNIT *uptr);
|
||||||
|
t_stat tti_reset (DEVICE *dptr);
|
||||||
|
t_stat tto_reset (DEVICE *dptr);
|
||||||
|
t_stat clk_reset (DEVICE *dptr);
|
||||||
|
void txdb_func (int32 data);
|
||||||
|
|
||||||
|
extern int32 sysd_hlt_enb (void);
|
||||||
|
extern int32 con_halt (int32 code, int32 cc);
|
||||||
|
|
||||||
|
/* TTI data structures
|
||||||
|
|
||||||
|
tti_dev TTI device descriptor
|
||||||
|
tti_unit TTI unit descriptor
|
||||||
|
tti_reg TTI register list
|
||||||
|
*/
|
||||||
|
|
||||||
|
DIB tti_dib = { 0, 0, NULL, NULL, 1, IVCL (TTI), SCB_TTI, { NULL } };
|
||||||
|
|
||||||
|
UNIT tti_unit = { UDATA (&tti_svc, UNIT_IDLE|TT_MODE_8B, 0), 0 };
|
||||||
|
|
||||||
|
REG tti_reg[] = {
|
||||||
|
{ HRDATA (BUF, tti_unit.buf, 16) },
|
||||||
|
{ HRDATA (CSR, tti_csr, 16) },
|
||||||
|
{ FLDATA (INT, int_req[IPL_TTI], INT_V_TTI) },
|
||||||
|
{ FLDATA (DONE, tti_csr, CSR_V_DONE) },
|
||||||
|
{ FLDATA (IE, tti_csr, CSR_V_IE) },
|
||||||
|
{ DRDATA (POS, tti_unit.pos, T_ADDR_W), PV_LEFT },
|
||||||
|
{ DRDATA (TIME, tti_unit.wait, 24), PV_LEFT },
|
||||||
|
{ NULL }
|
||||||
|
};
|
||||||
|
|
||||||
|
MTAB tti_mod[] = {
|
||||||
|
{ TT_MODE, TT_MODE_7B, "7b", "7B", NULL },
|
||||||
|
{ TT_MODE, TT_MODE_8B, "8b", "8B", NULL },
|
||||||
|
{ MTAB_XTD|MTAB_VDV, 0, "VECTOR", NULL,
|
||||||
|
NULL, &show_vec, NULL },
|
||||||
|
{ 0 }
|
||||||
|
};
|
||||||
|
|
||||||
|
DEVICE tti_dev = {
|
||||||
|
"TTI", &tti_unit, tti_reg, tti_mod,
|
||||||
|
1, 10, 31, 1, 16, 8,
|
||||||
|
NULL, NULL, &tti_reset,
|
||||||
|
NULL, NULL, NULL,
|
||||||
|
&tti_dib, 0
|
||||||
|
};
|
||||||
|
|
||||||
|
/* TTO data structures
|
||||||
|
|
||||||
|
tto_dev TTO device descriptor
|
||||||
|
tto_unit TTO unit descriptor
|
||||||
|
tto_reg TTO register list
|
||||||
|
*/
|
||||||
|
|
||||||
|
DIB tto_dib = { 0, 0, NULL, NULL, 1, IVCL (TTO), SCB_TTO, { NULL } };
|
||||||
|
|
||||||
|
UNIT tto_unit = { UDATA (&tto_svc, TT_MODE_8B, 0), SERIAL_OUT_WAIT };
|
||||||
|
|
||||||
|
REG tto_reg[] = {
|
||||||
|
{ HRDATA (BUF, tto_unit.buf, 8) },
|
||||||
|
{ HRDATA (CSR, tto_csr, 16) },
|
||||||
|
{ FLDATA (INT, int_req[IPL_TTO], INT_V_TTO) },
|
||||||
|
{ FLDATA (DONE, tto_csr, CSR_V_DONE) },
|
||||||
|
{ FLDATA (IE, tto_csr, CSR_V_IE) },
|
||||||
|
{ DRDATA (POS, tto_unit.pos, T_ADDR_W), PV_LEFT },
|
||||||
|
{ DRDATA (TIME, tto_unit.wait, 24), PV_LEFT },
|
||||||
|
{ NULL }
|
||||||
|
};
|
||||||
|
|
||||||
|
MTAB tto_mod[] = {
|
||||||
|
{ TT_MODE, TT_MODE_7B, "7b", "7B", NULL },
|
||||||
|
{ TT_MODE, TT_MODE_8B, "8b", "8B", NULL },
|
||||||
|
{ TT_MODE, TT_MODE_7P, "7p", "7P", NULL },
|
||||||
|
{ MTAB_XTD|MTAB_VDV, 0, "VECTOR", NULL, NULL, &show_vec },
|
||||||
|
{ 0 }
|
||||||
|
};
|
||||||
|
|
||||||
|
DEVICE tto_dev = {
|
||||||
|
"TTO", &tto_unit, tto_reg, tto_mod,
|
||||||
|
1, 10, 31, 1, 16, 8,
|
||||||
|
NULL, NULL, &tto_reset,
|
||||||
|
NULL, NULL, NULL,
|
||||||
|
&tto_dib, 0
|
||||||
|
};
|
||||||
|
|
||||||
|
/* CLK data structures
|
||||||
|
|
||||||
|
clk_dev CLK device descriptor
|
||||||
|
clk_unit CLK unit descriptor
|
||||||
|
clk_reg CLK register list
|
||||||
|
*/
|
||||||
|
|
||||||
|
DIB clk_dib = { 0, 0, NULL, NULL, 1, IVCL (CLK), SCB_INTTIM, { NULL } };
|
||||||
|
|
||||||
|
UNIT clk_unit = { UDATA (&clk_svc, UNIT_IDLE, 0), CLK_DELAY };
|
||||||
|
|
||||||
|
REG clk_reg[] = {
|
||||||
|
{ HRDATA (CSR, clk_csr, 16) },
|
||||||
|
{ FLDATA (INT, int_req[IPL_CLK], INT_V_CLK) },
|
||||||
|
{ FLDATA (IE, clk_csr, CSR_V_IE) },
|
||||||
|
{ DRDATA (TIME, clk_unit.wait, 24), REG_NZ + PV_LEFT },
|
||||||
|
{ DRDATA (TPS, clk_tps, 8), REG_NZ + PV_LEFT },
|
||||||
|
{ NULL }
|
||||||
|
};
|
||||||
|
|
||||||
|
DEVICE clk_dev = {
|
||||||
|
"CLK", &clk_unit, clk_reg, NULL,
|
||||||
|
1, 0, 0, 0, 0, 0,
|
||||||
|
NULL, NULL, &clk_reset,
|
||||||
|
NULL, NULL, NULL,
|
||||||
|
&clk_dib, 0
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Clock and terminal MxPR routines
|
||||||
|
|
||||||
|
iccs_rd/wr interval timer
|
||||||
|
rxcs_rd/wr input control/status
|
||||||
|
rxdb_rd input buffer
|
||||||
|
txcs_rd/wr output control/status
|
||||||
|
txdb_wr output buffer
|
||||||
|
*/
|
||||||
|
|
||||||
|
int32 iccs_rd (void)
|
||||||
|
{
|
||||||
|
return (clk_csr & CLKCSR_IMP);
|
||||||
|
}
|
||||||
|
|
||||||
|
int32 rxcs_rd (void)
|
||||||
|
{
|
||||||
|
return (tti_csr & TTICSR_IMP);
|
||||||
|
}
|
||||||
|
|
||||||
|
int32 rxdb_rd (void)
|
||||||
|
{
|
||||||
|
int32 t = tti_unit.buf; /* char + error */
|
||||||
|
|
||||||
|
tti_csr = tti_csr & ~CSR_DONE; /* clr done */
|
||||||
|
tti_unit.buf = tti_unit.buf & 0377; /* clr errors */
|
||||||
|
CLR_INT (TTI);
|
||||||
|
return t;
|
||||||
|
}
|
||||||
|
|
||||||
|
int32 txcs_rd (void)
|
||||||
|
{
|
||||||
|
return (tto_csr & TTOCSR_IMP);
|
||||||
|
}
|
||||||
|
|
||||||
|
void iccs_wr (int32 data)
|
||||||
|
{
|
||||||
|
if ((data & CSR_IE) == 0)
|
||||||
|
CLR_INT (CLK);
|
||||||
|
clk_csr = (clk_csr & ~CLKCSR_RW) | (data & CLKCSR_RW);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
void rxcs_wr (int32 data)
|
||||||
|
{
|
||||||
|
if ((data & CSR_IE) == 0)
|
||||||
|
CLR_INT (TTI);
|
||||||
|
else if ((tti_csr & (CSR_DONE + CSR_IE)) == CSR_DONE)
|
||||||
|
SET_INT (TTI);
|
||||||
|
tti_csr = (tti_csr & ~TTICSR_RW) | (data & TTICSR_RW);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
void txcs_wr (int32 data)
|
||||||
|
{
|
||||||
|
if ((data & CSR_IE) == 0)
|
||||||
|
CLR_INT (TTO);
|
||||||
|
else if ((tto_csr & (CSR_DONE + CSR_IE)) == CSR_DONE)
|
||||||
|
SET_INT (TTO);
|
||||||
|
tto_csr = (tto_csr & ~TTOCSR_RW) | (data & TTOCSR_RW);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
void txdb_wr (int32 data)
|
||||||
|
{
|
||||||
|
if (data & TXDB_SEL) { /* internal function? */
|
||||||
|
txdb_func (data);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
tto_unit.buf = data & 0377;
|
||||||
|
tto_csr = tto_csr & ~CSR_DONE;
|
||||||
|
CLR_INT (TTO);
|
||||||
|
sim_activate (&tto_unit, tto_unit.wait);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
void txdb_func (int32 data)
|
||||||
|
{
|
||||||
|
int32 sel = TXDB_GETSEL (data); /* get selection */
|
||||||
|
|
||||||
|
if (sel == TXDB_MISC) { /* misc function? */
|
||||||
|
switch (data & MISC_MASK) { /* case on function */
|
||||||
|
|
||||||
|
case MISC_SWDN:
|
||||||
|
ABORT (STOP_SWDN);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case MISC_BOOT:
|
||||||
|
con_halt (0, 0); /* set up reboot */
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Terminal input routines
|
||||||
|
|
||||||
|
tti_svc process event (character ready)
|
||||||
|
tti_reset process reset
|
||||||
|
*/
|
||||||
|
|
||||||
|
t_stat tti_svc (UNIT *uptr)
|
||||||
|
{
|
||||||
|
int32 c;
|
||||||
|
|
||||||
|
sim_activate (uptr, KBD_WAIT (uptr->wait, tmr_poll)); /* continue poll */
|
||||||
|
if ((c = sim_poll_kbd ()) < SCPE_KFLAG) /* no char or error? */
|
||||||
|
return c;
|
||||||
|
if (c & SCPE_BREAK) { /* break? */
|
||||||
|
if (sysd_hlt_enb ()) /* if enabled, halt */
|
||||||
|
hlt_pin = 1;
|
||||||
|
tti_unit.buf = TTIBUF_ERR | TTIBUF_FRM | TTIBUF_RBR;
|
||||||
|
}
|
||||||
|
else tti_unit.buf = sim_tt_inpcvt (c, TT_GET_MODE (uptr->flags));
|
||||||
|
uptr->pos = uptr->pos + 1;
|
||||||
|
tti_csr = tti_csr | CSR_DONE;
|
||||||
|
if (tti_csr & CSR_IE)
|
||||||
|
SET_INT (TTI);
|
||||||
|
return SCPE_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
t_stat tti_reset (DEVICE *dptr)
|
||||||
|
{
|
||||||
|
tti_unit.buf = 0;
|
||||||
|
tti_csr = 0;
|
||||||
|
CLR_INT (TTI);
|
||||||
|
sim_activate_abs (&tti_unit, KBD_WAIT (tti_unit.wait, tmr_poll));
|
||||||
|
return SCPE_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Terminal output routines
|
||||||
|
|
||||||
|
tto_svc process event (character typed)
|
||||||
|
tto_reset process reset
|
||||||
|
*/
|
||||||
|
|
||||||
|
t_stat tto_svc (UNIT *uptr)
|
||||||
|
{
|
||||||
|
int32 c;
|
||||||
|
t_stat r;
|
||||||
|
|
||||||
|
c = sim_tt_outcvt (tto_unit.buf, TT_GET_MODE (uptr->flags));
|
||||||
|
if (c >= 0) {
|
||||||
|
if ((r = sim_putchar_s (c)) != SCPE_OK) { /* output; error? */
|
||||||
|
sim_activate (uptr, uptr->wait); /* retry */
|
||||||
|
return ((r == SCPE_STALL)? SCPE_OK: r); /* !stall? report */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
tto_csr = tto_csr | CSR_DONE;
|
||||||
|
if (tto_csr & CSR_IE)
|
||||||
|
SET_INT (TTO);
|
||||||
|
uptr->pos = uptr->pos + 1;
|
||||||
|
return SCPE_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
t_stat tto_reset (DEVICE *dptr)
|
||||||
|
{
|
||||||
|
tto_unit.buf = 0;
|
||||||
|
tto_csr = CSR_DONE;
|
||||||
|
CLR_INT (TTO);
|
||||||
|
sim_cancel (&tto_unit); /* deactivate unit */
|
||||||
|
return SCPE_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Clock routines
|
||||||
|
|
||||||
|
clk_svc process event (clock tick)
|
||||||
|
clk_reset process reset
|
||||||
|
*/
|
||||||
|
|
||||||
|
t_stat clk_svc (UNIT *uptr)
|
||||||
|
{
|
||||||
|
int32 t;
|
||||||
|
|
||||||
|
if (clk_csr & CSR_IE)
|
||||||
|
SET_INT (CLK);
|
||||||
|
t = sim_rtcn_calb (clk_tps, TMR_CLK); /* calibrate clock */
|
||||||
|
sim_activate (&clk_unit, t); /* reactivate unit */
|
||||||
|
tmr_poll = t; /* set tmr poll */
|
||||||
|
tmxr_poll = t * TMXR_MULT; /* set mux poll */
|
||||||
|
return SCPE_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Clock coscheduling routine */
|
||||||
|
|
||||||
|
int32 clk_cosched (int32 wait)
|
||||||
|
{
|
||||||
|
int32 t;
|
||||||
|
|
||||||
|
t = sim_is_active (&clk_unit);
|
||||||
|
return (t? t - 1: wait);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Reset routine */
|
||||||
|
|
||||||
|
t_stat clk_reset (DEVICE *dptr)
|
||||||
|
{
|
||||||
|
int32 t;
|
||||||
|
|
||||||
|
clk_csr = 0;
|
||||||
|
CLR_INT (CLK);
|
||||||
|
t = sim_rtcn_init (clk_unit.wait, TMR_CLK); /* init timer */
|
||||||
|
sim_activate_abs (&clk_unit, t); /* activate unit */
|
||||||
|
tmr_poll = t; /* set tmr poll */
|
||||||
|
tmxr_poll = t * TMXR_MULT; /* set mux poll */
|
||||||
|
return SCPE_OK;
|
||||||
|
}
|
||||||
|
|
||||||
480
VAX/vax610_sysdev.c
Normal file
480
VAX/vax610_sysdev.c
Normal file
|
|
@ -0,0 +1,480 @@
|
||||||
|
/* vax610_sysdev.c: MicroVAX I system-specific logic
|
||||||
|
|
||||||
|
Copyright (c) 2011-2012, Matt Burke
|
||||||
|
This module incorporates code from SimH, Copyright (c) 1998-2008, Robert M Supnik
|
||||||
|
|
||||||
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
to deal in the Software without restriction, including without limitation
|
||||||
|
the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||||
|
and/or sell copies of the Software, and to permit persons to whom the
|
||||||
|
Software is furnished to do so, subject to the following conditions:
|
||||||
|
|
||||||
|
The above copyright notice and this permission notice shall be included in
|
||||||
|
all copies or substantial portions of the Software.
|
||||||
|
|
||||||
|
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||||
|
THE AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||||
|
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||||
|
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||||
|
|
||||||
|
Except as contained in this notice, the name(s) of the author(s) shall not be
|
||||||
|
used in advertising or otherwise to promote the sale, use or other dealings
|
||||||
|
in this Software without prior written authorization from the author(s).
|
||||||
|
|
||||||
|
This module contains the MicroVAX I system-specific registers and devices.
|
||||||
|
|
||||||
|
sysd system devices
|
||||||
|
|
||||||
|
15-Feb-2012 MB First Version
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "vax_defs.h"
|
||||||
|
#include <time.h>
|
||||||
|
|
||||||
|
#ifndef DONT_USE_INTERNAL_ROM
|
||||||
|
#include "vax_ka610_bin.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* MicroVAX I boot device definitions */
|
||||||
|
|
||||||
|
struct boot_dev {
|
||||||
|
char *name;
|
||||||
|
int32 code;
|
||||||
|
};
|
||||||
|
|
||||||
|
extern int32 R[16];
|
||||||
|
extern int32 in_ie;
|
||||||
|
extern int32 mchk_va, mchk_ref;
|
||||||
|
extern int32 int_req[IPL_HLVL];
|
||||||
|
extern jmp_buf save_env;
|
||||||
|
extern int32 p1;
|
||||||
|
extern int32 sim_switches;
|
||||||
|
extern FILE *sim_log;
|
||||||
|
extern CTAB *sim_vm_cmd;
|
||||||
|
extern int32 trpirq, mem_err;
|
||||||
|
|
||||||
|
int32 conisp, conpc, conpsl; /* console reg */
|
||||||
|
char cpu_boot_cmd[CBUFSIZE] = { 0 }; /* boot command */
|
||||||
|
|
||||||
|
static struct boot_dev boot_tab[] = {
|
||||||
|
{ "RQ", 0x00415544 }, /* DUAn */
|
||||||
|
{ "XQ", 0x00415158 }, /* XQAn */
|
||||||
|
{ NULL }
|
||||||
|
};
|
||||||
|
|
||||||
|
t_stat sysd_reset (DEVICE *dptr);
|
||||||
|
t_stat vax610_boot (int32 flag, char *ptr);
|
||||||
|
t_stat vax610_boot_parse (int32 flag, char *ptr);
|
||||||
|
t_stat cpu_boot (int32 unitno, DEVICE *dptr);
|
||||||
|
|
||||||
|
extern int32 intexc (int32 vec, int32 cc, int32 ipl, int ei);
|
||||||
|
extern int32 iccs_rd (void);
|
||||||
|
extern int32 todr_rd (void);
|
||||||
|
extern int32 rxcs_rd (void);
|
||||||
|
extern int32 rxdb_rd (void);
|
||||||
|
extern int32 txcs_rd (void);
|
||||||
|
extern void iccs_wr (int32 dat);
|
||||||
|
extern void todr_wr (int32 dat);
|
||||||
|
extern void rxcs_wr (int32 dat);
|
||||||
|
extern void txcs_wr (int32 dat);
|
||||||
|
extern void txdb_wr (int32 dat);
|
||||||
|
extern void ioreset_wr (int32 dat);
|
||||||
|
extern int32 eval_int (void);
|
||||||
|
|
||||||
|
/* SYSD data structures
|
||||||
|
|
||||||
|
sysd_dev SYSD device descriptor
|
||||||
|
sysd_unit SYSD units
|
||||||
|
sysd_reg SYSD register list
|
||||||
|
*/
|
||||||
|
|
||||||
|
UNIT sysd_unit = { UDATA (NULL, 0, 0) };
|
||||||
|
|
||||||
|
REG sysd_reg[] = {
|
||||||
|
{ HRDATA (CONISP, conisp, 32) },
|
||||||
|
{ HRDATA (CONPC, conpc, 32) },
|
||||||
|
{ HRDATA (CONPSL, conpsl, 32) },
|
||||||
|
{ NULL }
|
||||||
|
};
|
||||||
|
|
||||||
|
DEVICE sysd_dev = {
|
||||||
|
"SYSD", &sysd_unit, sysd_reg, NULL,
|
||||||
|
1, 16, 16, 1, 16, 8,
|
||||||
|
NULL, NULL, &sysd_reset,
|
||||||
|
NULL, NULL, NULL,
|
||||||
|
NULL, 0
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Special boot command, overrides regular boot */
|
||||||
|
|
||||||
|
CTAB vax610_cmd[] = {
|
||||||
|
{ "BOOT", &vax610_boot, RU_BOOT,
|
||||||
|
"bo{ot} <device>{/R5:flg} boot device\n" },
|
||||||
|
{ NULL }
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Read KA610 specific IPR's */
|
||||||
|
|
||||||
|
int32 ReadIPR (int32 rg)
|
||||||
|
{
|
||||||
|
int32 val;
|
||||||
|
|
||||||
|
switch (rg) {
|
||||||
|
|
||||||
|
case MT_ICCS: /* ICCS */
|
||||||
|
val = iccs_rd ();
|
||||||
|
break;
|
||||||
|
|
||||||
|
case MT_RXCS: /* RXCS */
|
||||||
|
val = rxcs_rd ();
|
||||||
|
break;
|
||||||
|
|
||||||
|
case MT_RXDB: /* RXDB */
|
||||||
|
val = rxdb_rd ();
|
||||||
|
break;
|
||||||
|
|
||||||
|
case MT_TXCS: /* TXCS */
|
||||||
|
val = txcs_rd ();
|
||||||
|
break;
|
||||||
|
|
||||||
|
case MT_TXDB: /* TXDB */
|
||||||
|
val = 0;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case MT_CONISP: /* console ISP */
|
||||||
|
val = conisp;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case MT_CONPC: /* console PC */
|
||||||
|
val = conpc;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case MT_CONPSL: /* console PSL */
|
||||||
|
val = conpsl;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case MT_SID: /* SID */
|
||||||
|
val = (VAX610_SID | VAX610_FLOAT | VAX610_MREV | VAX610_HWREV);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case MT_NICR: /* NICR */
|
||||||
|
case MT_ICR: /* ICR */
|
||||||
|
case MT_TODR: /* TODR */
|
||||||
|
case MT_CSRS: /* CSRS */
|
||||||
|
case MT_CSRD: /* CSRD */
|
||||||
|
case MT_CSTS: /* CSTS */
|
||||||
|
case MT_CSTD: /* CSTD */
|
||||||
|
case MT_TBDR: /* TBDR */
|
||||||
|
case MT_CADR: /* CADR */
|
||||||
|
case MT_MCESR: /* MCESR */
|
||||||
|
case MT_CAER: /* CAER */
|
||||||
|
case MT_SBIFS: /* SBIFS */
|
||||||
|
case MT_SBIS: /* SBIS */
|
||||||
|
case MT_SBISC: /* SBISC */
|
||||||
|
case MT_SBIMT: /* SBIMT */
|
||||||
|
case MT_SBIER: /* SBIER */
|
||||||
|
case MT_SBITA: /* SBITA */
|
||||||
|
case MT_SBIQC: /* SBIQC */
|
||||||
|
case MT_TBDATA: /* TBDATA */
|
||||||
|
case MT_MBRK: /* MBRK */
|
||||||
|
case MT_PME: /* PME */
|
||||||
|
val = 0;
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
RSVD_OPND_FAULT;
|
||||||
|
}
|
||||||
|
|
||||||
|
return val;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Write KA610 specific IPR's */
|
||||||
|
|
||||||
|
void WriteIPR (int32 rg, int32 val)
|
||||||
|
{
|
||||||
|
switch (rg) {
|
||||||
|
|
||||||
|
case MT_ICCS: /* ICCS */
|
||||||
|
iccs_wr (val);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case MT_RXCS: /* RXCS */
|
||||||
|
rxcs_wr (val);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case MT_RXDB: /* RXDB */
|
||||||
|
break;
|
||||||
|
|
||||||
|
case MT_TXCS: /* TXCS */
|
||||||
|
txcs_wr (val);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case MT_TXDB: /* TXDB */
|
||||||
|
txdb_wr (val);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case MT_IORESET: /* IORESET */
|
||||||
|
ioreset_wr (val);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case MT_SID:
|
||||||
|
case MT_CONISP:
|
||||||
|
case MT_CONPC:
|
||||||
|
case MT_CONPSL: /* halt reg */
|
||||||
|
RSVD_OPND_FAULT;
|
||||||
|
|
||||||
|
case MT_NICR: /* NICR */
|
||||||
|
case MT_ICR: /* ICR */
|
||||||
|
case MT_TODR: /* TODR */
|
||||||
|
case MT_CSRS: /* CSRS */
|
||||||
|
case MT_CSRD: /* CSRD */
|
||||||
|
case MT_CSTS: /* CSTS */
|
||||||
|
case MT_CSTD: /* CSTD */
|
||||||
|
case MT_TBDR: /* TBDR */
|
||||||
|
case MT_CADR: /* CADR */
|
||||||
|
case MT_MCESR: /* MCESR */
|
||||||
|
case MT_CAER: /* CAER */
|
||||||
|
case MT_SBIFS: /* SBIFS */
|
||||||
|
case MT_SBIS: /* SBIS */
|
||||||
|
case MT_SBISC: /* SBISC */
|
||||||
|
case MT_SBIMT: /* SBIMT */
|
||||||
|
case MT_SBIER: /* SBIER */
|
||||||
|
case MT_SBITA: /* SBITA */
|
||||||
|
case MT_SBIQC: /* SBIQC */
|
||||||
|
case MT_TBDATA: /* TBDATA */
|
||||||
|
case MT_MBRK: /* MBRK */
|
||||||
|
case MT_PME: /* PME */
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
RSVD_OPND_FAULT;
|
||||||
|
}
|
||||||
|
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Read/write I/O register space
|
||||||
|
|
||||||
|
These routines are the 'catch all' for address space map. Any
|
||||||
|
address that doesn't explicitly belong to memory or I/O
|
||||||
|
is given to these routines for processing.
|
||||||
|
*/
|
||||||
|
|
||||||
|
struct reglink { /* register linkage */
|
||||||
|
uint32 low; /* low addr */
|
||||||
|
uint32 high; /* high addr */
|
||||||
|
t_stat (*read)(int32 pa); /* read routine */
|
||||||
|
void (*write)(int32 pa, int32 val, int32 lnt); /* write routine */
|
||||||
|
};
|
||||||
|
|
||||||
|
struct reglink regtable[] = {
|
||||||
|
/* { QVMBASE, QVMBASE+QVMSIZE, &qv_mem_rd, &qv_mem_wr }, */
|
||||||
|
{ 0, 0, NULL, NULL }
|
||||||
|
};
|
||||||
|
|
||||||
|
/* ReadReg - read register space
|
||||||
|
|
||||||
|
Inputs:
|
||||||
|
pa = physical address
|
||||||
|
lnt = length (BWLQ) - ignored
|
||||||
|
Output:
|
||||||
|
longword of data
|
||||||
|
*/
|
||||||
|
|
||||||
|
int32 ReadReg (uint32 pa, int32 lnt)
|
||||||
|
{
|
||||||
|
struct reglink *p;
|
||||||
|
|
||||||
|
for (p = ®table[0]; p->low != 0; p++) {
|
||||||
|
if ((pa >= p->low) && (pa < p->high) && p->read)
|
||||||
|
return p->read (pa);
|
||||||
|
}
|
||||||
|
MACH_CHECK (MCHK_READ);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* WriteReg - write register space
|
||||||
|
|
||||||
|
Inputs:
|
||||||
|
pa = physical address
|
||||||
|
val = data to write, right justified in 32b longword
|
||||||
|
lnt = length (BWLQ)
|
||||||
|
Outputs:
|
||||||
|
none
|
||||||
|
*/
|
||||||
|
|
||||||
|
void WriteReg (uint32 pa, int32 val, int32 lnt)
|
||||||
|
{
|
||||||
|
struct reglink *p;
|
||||||
|
|
||||||
|
for (p = ®table[0]; p->low != 0; p++) {
|
||||||
|
if ((pa >= p->low) && (pa < p->high) && p->write) {
|
||||||
|
p->write (pa, val, lnt);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
mem_err = 1;
|
||||||
|
SET_IRQL;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Special boot command - linked into SCP by initial reset
|
||||||
|
|
||||||
|
Syntax: BOOT <device>{/R5:val}
|
||||||
|
|
||||||
|
Sets up R0-R5, calls SCP boot processor with effective BOOT CPU
|
||||||
|
*/
|
||||||
|
|
||||||
|
t_stat vax610_boot (int32 flag, char *ptr)
|
||||||
|
{
|
||||||
|
t_stat r;
|
||||||
|
|
||||||
|
r = vax610_boot_parse (flag, ptr); /* parse the boot cmd */
|
||||||
|
if (r != SCPE_OK) /* error? */
|
||||||
|
return r;
|
||||||
|
strncpy (cpu_boot_cmd, ptr, CBUFSIZE); /* save for reboot */
|
||||||
|
return run_cmd (flag, "CPU");
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Parse boot command, set up registers - also used on reset */
|
||||||
|
|
||||||
|
t_stat vax610_boot_parse (int32 flag, char *ptr)
|
||||||
|
{
|
||||||
|
char gbuf[CBUFSIZE];
|
||||||
|
char *slptr, *regptr;
|
||||||
|
int32 i, r5v, unitno;
|
||||||
|
DEVICE *dptr;
|
||||||
|
UNIT *uptr;
|
||||||
|
DIB *dibp;
|
||||||
|
t_stat r;
|
||||||
|
|
||||||
|
regptr = get_glyph (ptr, gbuf, 0); /* get glyph */
|
||||||
|
if ((slptr = strchr (gbuf, '/'))) { /* found slash? */
|
||||||
|
regptr = strchr (ptr, '/'); /* locate orig */
|
||||||
|
*slptr = 0; /* zero in string */
|
||||||
|
}
|
||||||
|
dptr = find_unit (gbuf, &uptr); /* find device */
|
||||||
|
if ((dptr == NULL) || (uptr == NULL))
|
||||||
|
return SCPE_ARG;
|
||||||
|
dibp = (DIB *) dptr->ctxt; /* get DIB */
|
||||||
|
if (dibp == NULL)
|
||||||
|
return SCPE_ARG;
|
||||||
|
unitno = (int32) (uptr - dptr->units);
|
||||||
|
r5v = 0;
|
||||||
|
if ((strncmp (regptr, "/R5:", 4) == 0) ||
|
||||||
|
(strncmp (regptr, "/R5=", 4) == 0) ||
|
||||||
|
(strncmp (regptr, "/r5:", 4) == 0) ||
|
||||||
|
(strncmp (regptr, "/r5=", 4) == 0)) {
|
||||||
|
r5v = (int32) get_uint (regptr + 4, 16, LMASK, &r);
|
||||||
|
if (r != SCPE_OK)
|
||||||
|
return r;
|
||||||
|
}
|
||||||
|
else if (*regptr != 0)
|
||||||
|
return SCPE_ARG;
|
||||||
|
for (i = 0; boot_tab[i].name != NULL; i++) {
|
||||||
|
if (strcmp (dptr->name, boot_tab[i].name) == 0) {
|
||||||
|
R[0] = boot_tab[i].code | (('0' + unitno) << 24);
|
||||||
|
R[1] = 0xC0;
|
||||||
|
R[2] = 0;
|
||||||
|
R[3] = 0;
|
||||||
|
R[4] = 0;
|
||||||
|
R[5] = r5v;
|
||||||
|
return SCPE_OK;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return SCPE_NOFNC;
|
||||||
|
}
|
||||||
|
|
||||||
|
int32 sysd_hlt_enb (void)
|
||||||
|
{
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Machine check */
|
||||||
|
|
||||||
|
int32 machine_check (int32 p1, int32 opc, int32 cc, int32 delta)
|
||||||
|
{
|
||||||
|
int32 p2, acc;
|
||||||
|
|
||||||
|
p2 = mchk_va + 4; /* save vap */
|
||||||
|
cc = intexc (SCB_MCHK, cc, 0, IE_EXC); /* take exception */
|
||||||
|
acc = ACC_MASK (KERN); /* in kernel mode */
|
||||||
|
in_ie = 1;
|
||||||
|
SP = SP - 16; /* push 4 words */
|
||||||
|
Write (SP, 12, L_LONG, WA); /* # bytes */
|
||||||
|
Write (SP + 4, p1, L_LONG, WA); /* mcheck type */
|
||||||
|
Write (SP + 8, p2, L_LONG, WA); /* parameter 1 */
|
||||||
|
Write (SP + 12, p2, L_LONG, WA); /* parameter 2 */
|
||||||
|
in_ie = 0;
|
||||||
|
return cc;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Console entry */
|
||||||
|
|
||||||
|
int32 con_halt (int32 code, int32 cc)
|
||||||
|
{
|
||||||
|
if ((cpu_boot_cmd[0] == 0) || /* saved boot cmd? */
|
||||||
|
(vax610_boot_parse (0, cpu_boot_cmd) != SCPE_OK) || /* reparse the boot cmd */
|
||||||
|
(reset_all (0) != SCPE_OK) || /* reset the world */
|
||||||
|
(cpu_boot (0, NULL) != SCPE_OK)) /* set up boot code */
|
||||||
|
ABORT (STOP_BOOT); /* any error? */
|
||||||
|
printf ("Rebooting...\n");
|
||||||
|
if (sim_log)
|
||||||
|
fprintf (sim_log, "Rebooting...\n");
|
||||||
|
return cc;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Bootstrap */
|
||||||
|
|
||||||
|
t_stat cpu_boot (int32 unitno, DEVICE *dptr)
|
||||||
|
{
|
||||||
|
t_stat r;
|
||||||
|
|
||||||
|
printf ("Loading boot code from ka610.bin\n");
|
||||||
|
if (sim_log) fprintf (sim_log,
|
||||||
|
"Loading boot code from ka610.bin\n");
|
||||||
|
r = load_cmd (0, "-O ka610.bin 200");
|
||||||
|
if (r != SCPE_OK) {
|
||||||
|
#ifndef DONT_USE_INTERNAL_ROM
|
||||||
|
FILE *f;
|
||||||
|
|
||||||
|
if ((f = sim_fopen ("ka610.bin", "wb"))) {
|
||||||
|
printf ("Saving boot code to ka610.bin\n");
|
||||||
|
if (sim_log)
|
||||||
|
fprintf (sim_log, "Saving boot code to ka610.bin\n");
|
||||||
|
sim_fwrite (vax_ka610_bin, sizeof(vax_ka610_bin[0]), sizeof(vax_ka610_bin)/sizeof(vax_ka610_bin[0]), f);
|
||||||
|
fclose (f);
|
||||||
|
printf ("Loading boot code from ka610.bin\n");
|
||||||
|
if (sim_log)
|
||||||
|
fprintf (sim_log, "Loading boot code from ka610.bin\n");
|
||||||
|
r = load_cmd (0, "-O ka610.bin 200");
|
||||||
|
if (r == SCPE_OK)
|
||||||
|
SP = PC = 512;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
return r;
|
||||||
|
}
|
||||||
|
SP = PC = 512;
|
||||||
|
AP = 1;
|
||||||
|
return SCPE_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* SYSD reset */
|
||||||
|
|
||||||
|
t_stat sysd_reset (DEVICE *dptr)
|
||||||
|
{
|
||||||
|
sim_vm_cmd = vax610_cmd;
|
||||||
|
return SCPE_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
t_stat cpu_set_model (UNIT *uptr, int32 val, char *cptr, void *desc)
|
||||||
|
{
|
||||||
|
return SCPE_NOFNC;
|
||||||
|
}
|
||||||
|
|
||||||
|
t_stat cpu_show_model (FILE *st, UNIT *uptr, int32 val, void *desc)
|
||||||
|
{
|
||||||
|
fprintf (st, "model=MicroVAX I");
|
||||||
|
return SCPE_OK;
|
||||||
|
}
|
||||||
114
VAX/vax610_syslist.c
Normal file
114
VAX/vax610_syslist.c
Normal file
|
|
@ -0,0 +1,114 @@
|
||||||
|
/* vax610_syslist.c: MicroVAX I device list
|
||||||
|
|
||||||
|
Copyright (c) 2011-2012, Matt Burke
|
||||||
|
This module incorporates code from SimH, Copyright (c) 1998-2008, Robert M Supnik
|
||||||
|
|
||||||
|
Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
|
copy of this software and associated documentation files (the "Software"),
|
||||||
|
to deal in the Software without restriction, including without limitation
|
||||||
|
the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||||
|
and/or sell copies of the Software, and to permit persons to whom the
|
||||||
|
Software is furnished to do so, subject to the following conditions:
|
||||||
|
|
||||||
|
The above copyright notice and this permission notice shall be included in
|
||||||
|
all copies or substantial portions of the Software.
|
||||||
|
|
||||||
|
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||||
|
THE AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||||
|
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||||
|
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||||
|
|
||||||
|
Except as contained in this notice, the name(s) of the author(s) shall not be
|
||||||
|
used in advertising or otherwise to promote the sale, use or other dealings
|
||||||
|
in this Software without prior written authorization from the author(s).
|
||||||
|
|
||||||
|
15-Feb-2012 MB First version
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "vax_defs.h"
|
||||||
|
|
||||||
|
char sim_name[] = "VAX610";
|
||||||
|
|
||||||
|
extern DEVICE cpu_dev;
|
||||||
|
extern DEVICE mctl_dev;
|
||||||
|
extern DEVICE tlb_dev;
|
||||||
|
extern DEVICE sysd_dev;
|
||||||
|
extern DEVICE qba_dev;
|
||||||
|
extern DEVICE tti_dev, tto_dev;
|
||||||
|
extern DEVICE cr_dev;
|
||||||
|
extern DEVICE lpt_dev;
|
||||||
|
extern DEVICE clk_dev;
|
||||||
|
extern DEVICE rq_dev, rqb_dev, rqc_dev, rqd_dev;
|
||||||
|
extern DEVICE rl_dev;
|
||||||
|
extern DEVICE ry_dev;
|
||||||
|
extern DEVICE ts_dev;
|
||||||
|
extern DEVICE tq_dev;
|
||||||
|
extern DEVICE dz_dev;
|
||||||
|
extern DEVICE xq_dev, xqb_dev;
|
||||||
|
extern DEVICE vh_dev;
|
||||||
|
|
||||||
|
extern int32 sim_switches;
|
||||||
|
extern void WriteB (uint32 pa, int32 val);
|
||||||
|
extern UNIT cpu_unit;
|
||||||
|
|
||||||
|
DEVICE *sim_devices[] = {
|
||||||
|
&cpu_dev,
|
||||||
|
&mctl_dev,
|
||||||
|
&tlb_dev,
|
||||||
|
&sysd_dev,
|
||||||
|
&qba_dev,
|
||||||
|
&clk_dev,
|
||||||
|
&tti_dev,
|
||||||
|
&tto_dev,
|
||||||
|
&dz_dev,
|
||||||
|
&vh_dev,
|
||||||
|
&cr_dev,
|
||||||
|
&lpt_dev,
|
||||||
|
&rl_dev,
|
||||||
|
&rq_dev,
|
||||||
|
&rqb_dev,
|
||||||
|
&rqc_dev,
|
||||||
|
&rqd_dev,
|
||||||
|
&ry_dev,
|
||||||
|
&ts_dev,
|
||||||
|
&tq_dev,
|
||||||
|
&xq_dev,
|
||||||
|
&xqb_dev,
|
||||||
|
NULL
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Binary loader
|
||||||
|
|
||||||
|
The binary loader handles absolute system images, that is, system
|
||||||
|
images linked /SYSTEM. These are simply a byte stream, with no
|
||||||
|
origin or relocation information.
|
||||||
|
|
||||||
|
-o for memory, specify origin
|
||||||
|
*/
|
||||||
|
|
||||||
|
t_stat sim_load (FILE *fileref, char *cptr, char *fnam, int flag)
|
||||||
|
{
|
||||||
|
t_stat r;
|
||||||
|
int32 i;
|
||||||
|
uint32 origin, limit;
|
||||||
|
|
||||||
|
if (flag) /* dump? */
|
||||||
|
return SCPE_ARG;
|
||||||
|
origin = 0; /* memory */
|
||||||
|
limit = (uint32) cpu_unit.capac;
|
||||||
|
if (sim_switches & SWMASK ('O')) { /* origin? */
|
||||||
|
origin = (int32) get_uint (cptr, 16, 0xFFFFFFFF, &r);
|
||||||
|
if (r != SCPE_OK)
|
||||||
|
return SCPE_ARG;
|
||||||
|
}
|
||||||
|
while ((i = getc (fileref)) != EOF) { /* read byte stream */
|
||||||
|
if (origin >= limit) /* NXM? */
|
||||||
|
return SCPE_NXM;
|
||||||
|
else WriteB (origin, i); /* store byte */
|
||||||
|
origin = origin + 1;
|
||||||
|
}
|
||||||
|
return SCPE_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
@ -734,6 +734,8 @@ void cpu_idle (void);
|
||||||
#include "vax750_defs.h"
|
#include "vax750_defs.h"
|
||||||
#elif defined (VAX_730)
|
#elif defined (VAX_730)
|
||||||
#include "vax730_defs.h"
|
#include "vax730_defs.h"
|
||||||
|
#elif defined (VAX_610)
|
||||||
|
#include "vax610_defs.h"
|
||||||
#else
|
#else
|
||||||
#include "vaxmod_defs.h"
|
#include "vaxmod_defs.h"
|
||||||
#endif
|
#endif
|
||||||
|
|
|
||||||
1034
VAX/vax_ka610_bin.h
Normal file
1034
VAX/vax_ka610_bin.h
Normal file
File diff suppressed because it is too large
Load diff
|
|
@ -23,6 +23,7 @@
|
||||||
used in advertising or otherwise to promote the sale, use or other dealings
|
used in advertising or otherwise to promote the sale, use or other dealings
|
||||||
in this Software without prior written authorization from Robert M Supnik.
|
in this Software without prior written authorization from Robert M Supnik.
|
||||||
|
|
||||||
|
24-Oct-12 MB Added support for KA620 virtual addressing
|
||||||
21-Jul-08 RMS Removed inlining support
|
21-Jul-08 RMS Removed inlining support
|
||||||
28-May-08 RMS Inlined physical memory routines
|
28-May-08 RMS Inlined physical memory routines
|
||||||
29-Apr-07 RMS Added address masking for system page table reads
|
29-Apr-07 RMS Added address masking for system page table reads
|
||||||
|
|
@ -474,6 +475,7 @@ else {
|
||||||
MM_ERR (PR_LNV);
|
MM_ERR (PR_LNV);
|
||||||
ptead = d_p0br + ptidx;
|
ptead = d_p0br + ptidx;
|
||||||
}
|
}
|
||||||
|
#if !defined (VAX_620)
|
||||||
if ((ptead & VA_S0) == 0)
|
if ((ptead & VA_S0) == 0)
|
||||||
ABORT (STOP_PPTE); /* ppte must be sys */
|
ABORT (STOP_PPTE); /* ppte must be sys */
|
||||||
vpn = VA_GETVPN (ptead); /* get vpn, tbi */
|
vpn = VA_GETVPN (ptead); /* get vpn, tbi */
|
||||||
|
|
@ -494,6 +496,7 @@ else {
|
||||||
((pte << VA_N_OFF) & TLB_PFN); /* set stlb data */
|
((pte << VA_N_OFF) & TLB_PFN); /* set stlb data */
|
||||||
}
|
}
|
||||||
ptead = (stlb[tbi].pte & TLB_PFN) | VA_GETOFF (ptead);
|
ptead = (stlb[tbi].pte & TLB_PFN) | VA_GETOFF (ptead);
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
pte = ReadL (ptead); /* read pte */
|
pte = ReadL (ptead); /* read pte */
|
||||||
tlbpte = cvtacc[PTE_GETACC (pte)] | /* cvt access */
|
tlbpte = cvtacc[PTE_GETACC (pte)] | /* cvt access */
|
||||||
|
|
|
||||||
|
|
@ -75,6 +75,11 @@ Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "VAX750", "VAX750.vcproj", "
|
||||||
{D40F3AF1-EEE7-4432-9807-2AD287B490F8} = {D40F3AF1-EEE7-4432-9807-2AD287B490F8}
|
{D40F3AF1-EEE7-4432-9807-2AD287B490F8} = {D40F3AF1-EEE7-4432-9807-2AD287B490F8}
|
||||||
EndProjectSection
|
EndProjectSection
|
||||||
EndProject
|
EndProject
|
||||||
|
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "VAX610", "VAX610.vcproj", "{B3671ABB-4FFF-4EEB-8A5B-06716C9BCE9E}"
|
||||||
|
ProjectSection(ProjectDependencies) = postProject
|
||||||
|
{D40F3AF1-EEE7-4432-9807-2AD287B490F8} = {D40F3AF1-EEE7-4432-9807-2AD287B490F8}
|
||||||
|
EndProjectSection
|
||||||
|
EndProject
|
||||||
Global
|
Global
|
||||||
GlobalSection(SolutionConfigurationPlatforms) = preSolution
|
GlobalSection(SolutionConfigurationPlatforms) = preSolution
|
||||||
Debug|Win32 = Debug|Win32
|
Debug|Win32 = Debug|Win32
|
||||||
|
|
@ -205,6 +210,10 @@ Global
|
||||||
{43A9CF64-5705-4FB7-B837-ED9AAFF97DAC}.Debug|Win32.Build.0 = Debug|Win32
|
{43A9CF64-5705-4FB7-B837-ED9AAFF97DAC}.Debug|Win32.Build.0 = Debug|Win32
|
||||||
{43A9CF64-5705-4FB7-B837-ED9AAFF97DAC}.Release|Win32.ActiveCfg = Release|Win32
|
{43A9CF64-5705-4FB7-B837-ED9AAFF97DAC}.Release|Win32.ActiveCfg = Release|Win32
|
||||||
{43A9CF64-5705-4FB7-B837-ED9AAFF97DAC}.Release|Win32.Build.0 = Release|Win32
|
{43A9CF64-5705-4FB7-B837-ED9AAFF97DAC}.Release|Win32.Build.0 = Release|Win32
|
||||||
|
{B3671ABB-4FFF-4EEB-8A5B-06716C9BCE9E}.Debug|Win32.ActiveCfg = Debug|Win32
|
||||||
|
{B3671ABB-4FFF-4EEB-8A5B-06716C9BCE9E}.Debug|Win32.Build.0 = Debug|Win32
|
||||||
|
{B3671ABB-4FFF-4EEB-8A5B-06716C9BCE9E}.Release|Win32.ActiveCfg = Release|Win32
|
||||||
|
{B3671ABB-4FFF-4EEB-8A5B-06716C9BCE9E}.Release|Win32.Build.0 = Release|Win32
|
||||||
EndGlobalSection
|
EndGlobalSection
|
||||||
GlobalSection(SolutionProperties) = preSolution
|
GlobalSection(SolutionProperties) = preSolution
|
||||||
HideSolutionNode = FALSE
|
HideSolutionNode = FALSE
|
||||||
|
|
|
||||||
449
Visual Studio Projects/VAX610.vcproj
Normal file
449
Visual Studio Projects/VAX610.vcproj
Normal file
|
|
@ -0,0 +1,449 @@
|
||||||
|
<?xml version="1.0" encoding="Windows-1252"?>
|
||||||
|
<VisualStudioProject
|
||||||
|
ProjectType="Visual C++"
|
||||||
|
Version="9.00"
|
||||||
|
Name="VAX610"
|
||||||
|
ProjectGUID="{B3671ABB-4FFF-4EEB-8A5B-06716C9BCE9E}"
|
||||||
|
RootNamespace="VAX610"
|
||||||
|
Keyword="Win32Proj"
|
||||||
|
TargetFrameworkVersion="131072"
|
||||||
|
>
|
||||||
|
<Platforms>
|
||||||
|
<Platform
|
||||||
|
Name="Win32"
|
||||||
|
/>
|
||||||
|
</Platforms>
|
||||||
|
<ToolFiles>
|
||||||
|
</ToolFiles>
|
||||||
|
<Configurations>
|
||||||
|
<Configuration
|
||||||
|
Name="Debug|Win32"
|
||||||
|
OutputDirectory="..\BIN\NT\$(PlatformName)-$(ConfigurationName)"
|
||||||
|
IntermediateDirectory="..\BIN\NT\Project\simh\VAX610\$(PlatformName)-$(ConfigurationName)"
|
||||||
|
ConfigurationType="1"
|
||||||
|
InheritedPropertySheets="$(VCInstallDir)VCProjectDefaults\UpgradeFromVC71.vsprops"
|
||||||
|
CharacterSet="0"
|
||||||
|
>
|
||||||
|
<Tool
|
||||||
|
Name="VCPreBuildEventTool"
|
||||||
|
Description="Build Dependent ROM include File(s) & Check for required build dependencies"
|
||||||
|
CommandLine="pushd ..
$(TargetDir)BuildROMs
popd

if not exist ../../windows-build/winpcap/Wpdpack/Include/pcap.h goto _notice
if not exist ../../windows-build/pthreads/pthread.h goto _notice
goto _good

:_notice
echo ****************************************************
echo ****************************************************
echo ** The required build support is not available. **
echo ****************************************************
echo ****************************************************
type 0ReadMe_Projects.txt
exit 1

:_good
"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCCustomBuildTool"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCXMLDataGeneratorTool"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCWebServiceProxyGeneratorTool"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCMIDLTool"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCCLCompilerTool"
|
||||||
|
Optimization="0"
|
||||||
|
AdditionalIncludeDirectories="./;../;../VAX/;../pdp11/;"../../windows-build/winpcap/Wpdpack/Include";"../../windows-build/pthreads""
|
||||||
|
PreprocessorDefinitions="USE_INT64;USE_ADDR64;VM_VAX;VAX_610;USE_SHARED;_CRT_NONSTDC_NO_WARNINGS;_CRT_SECURE_NO_WARNINGS;PTW32_STATIC_LIB;USE_READER_THREAD;SIM_ASYNCH_IO"
|
||||||
|
KeepComments="false"
|
||||||
|
MinimalRebuild="true"
|
||||||
|
BasicRuntimeChecks="0"
|
||||||
|
RuntimeLibrary="1"
|
||||||
|
UsePrecompiledHeader="0"
|
||||||
|
WarningLevel="3"
|
||||||
|
Detect64BitPortabilityProblems="false"
|
||||||
|
DebugInformationFormat="3"
|
||||||
|
CompileAs="1"
|
||||||
|
ShowIncludes="false"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCManagedResourceCompilerTool"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCResourceCompilerTool"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCPreLinkEventTool"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCLinkerTool"
|
||||||
|
AdditionalOptions="/fixed:no"
|
||||||
|
AdditionalDependencies="wpcap.lib packet.lib wsock32.lib winmm.lib"
|
||||||
|
OutputFile="$(OutDir)\VAX610.exe"
|
||||||
|
LinkIncremental="1"
|
||||||
|
AdditionalLibraryDirectories=""../../windows-build/winpcap/Wpdpack/Lib/""
|
||||||
|
GenerateDebugInformation="true"
|
||||||
|
ProgramDatabaseFile="$(OutDir)\VAX610.pdb"
|
||||||
|
SubSystem="1"
|
||||||
|
RandomizedBaseAddress="1"
|
||||||
|
DataExecutionPrevention="0"
|
||||||
|
TargetMachine="1"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCALinkTool"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCManifestTool"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCXDCMakeTool"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCBscMakeTool"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCFxCopTool"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCAppVerifierTool"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCPostBuildEventTool"
|
||||||
|
/>
|
||||||
|
</Configuration>
|
||||||
|
<Configuration
|
||||||
|
Name="Release|Win32"
|
||||||
|
OutputDirectory="..\BIN\NT\$(PlatformName)-$(ConfigurationName)"
|
||||||
|
IntermediateDirectory="..\BIN\NT\Project\simh\VAX610\$(PlatformName)-$(ConfigurationName)"
|
||||||
|
ConfigurationType="1"
|
||||||
|
InheritedPropertySheets="$(VCInstallDir)VCProjectDefaults\UpgradeFromVC71.vsprops"
|
||||||
|
CharacterSet="0"
|
||||||
|
>
|
||||||
|
<Tool
|
||||||
|
Name="VCPreBuildEventTool"
|
||||||
|
Description="Build Dependent ROM include File(s) & Check for required build dependencies"
|
||||||
|
CommandLine="pushd ..
$(TargetDir)BuildROMs
popd

if not exist ../../windows-build/winpcap/Wpdpack/Include/pcap.h goto _notice
if not exist ../../windows-build/pthreads/pthread.h goto _notice
goto _good

:_notice
echo ****************************************************
echo ****************************************************
echo ** The required build support is not available. **
echo ****************************************************
echo ****************************************************
type 0ReadMe_Projects.txt
exit 1

:_good
"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCCustomBuildTool"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCXMLDataGeneratorTool"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCWebServiceProxyGeneratorTool"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCMIDLTool"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCCLCompilerTool"
|
||||||
|
Optimization="2"
|
||||||
|
InlineFunctionExpansion="2"
|
||||||
|
EnableIntrinsicFunctions="true"
|
||||||
|
FavorSizeOrSpeed="1"
|
||||||
|
OmitFramePointers="true"
|
||||||
|
WholeProgramOptimization="true"
|
||||||
|
AdditionalIncludeDirectories="./;../;../VAX/;../pdp11/;"../../windows-build/winpcap/Wpdpack/Include";"../../windows-build/pthreads""
|
||||||
|
PreprocessorDefinitions="USE_INT64;USE_ADDR64;VM_VAX;VAX_610;USE_SHARED;_CRT_NONSTDC_NO_WARNINGS;_CRT_SECURE_NO_WARNINGS;PTW32_STATIC_LIB;USE_READER_THREAD;SIM_ASYNCH_IO"
|
||||||
|
KeepComments="false"
|
||||||
|
StringPooling="true"
|
||||||
|
RuntimeLibrary="0"
|
||||||
|
BufferSecurityCheck="false"
|
||||||
|
EnableFunctionLevelLinking="true"
|
||||||
|
UsePrecompiledHeader="0"
|
||||||
|
WarningLevel="3"
|
||||||
|
Detect64BitPortabilityProblems="false"
|
||||||
|
DebugInformationFormat="3"
|
||||||
|
CompileAs="1"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCManagedResourceCompilerTool"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCResourceCompilerTool"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCPreLinkEventTool"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCLinkerTool"
|
||||||
|
AdditionalOptions="/fixed:no"
|
||||||
|
AdditionalDependencies="wpcap.lib packet.lib wsock32.lib winmm.lib"
|
||||||
|
OutputFile="$(OutDir)\VAX610.exe"
|
||||||
|
LinkIncremental="1"
|
||||||
|
AdditionalLibraryDirectories=""../../windows-build/winpcap/Wpdpack/Lib/""
|
||||||
|
GenerateDebugInformation="true"
|
||||||
|
SubSystem="1"
|
||||||
|
OptimizeReferences="2"
|
||||||
|
EnableCOMDATFolding="2"
|
||||||
|
LinkTimeCodeGeneration="1"
|
||||||
|
RandomizedBaseAddress="1"
|
||||||
|
DataExecutionPrevention="0"
|
||||||
|
TargetMachine="1"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCALinkTool"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCManifestTool"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCXDCMakeTool"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCBscMakeTool"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCFxCopTool"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCAppVerifierTool"
|
||||||
|
/>
|
||||||
|
<Tool
|
||||||
|
Name="VCPostBuildEventTool"
|
||||||
|
/>
|
||||||
|
</Configuration>
|
||||||
|
</Configurations>
|
||||||
|
<References>
|
||||||
|
</References>
|
||||||
|
<Files>
|
||||||
|
<Filter
|
||||||
|
Name="Source Files"
|
||||||
|
Filter="cpp;c;cxx;def;odl;idl;hpj;bat;asm"
|
||||||
|
>
|
||||||
|
<File
|
||||||
|
RelativePath="..\PDP11\pdp11_cr.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\PDP11\pdp11_dz.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\PDP11\pdp11_io_lib.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\PDP11\pdp11_lp.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\PDP11\pdp11_rl.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\PDP11\pdp11_rq.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\Pdp11\pdp11_ry.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\PDP11\pdp11_tq.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\PDP11\pdp11_ts.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\Pdp11\pdp11_vh.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\PDP11\pdp11_xq.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\..\windows-build\pthreads\pthread.c"
|
||||||
|
>
|
||||||
|
<FileConfiguration
|
||||||
|
Name="Debug|Win32"
|
||||||
|
>
|
||||||
|
<Tool
|
||||||
|
Name="VCCLCompilerTool"
|
||||||
|
PreprocessorDefinitions="HAVE_PTW32_CONFIG_H;PTW32_BUILD_INLINED;PTW32_STATIC_LIB;__CLEANUP_C;$(NOINHERIT)"
|
||||||
|
/>
|
||||||
|
</FileConfiguration>
|
||||||
|
<FileConfiguration
|
||||||
|
Name="Release|Win32"
|
||||||
|
>
|
||||||
|
<Tool
|
||||||
|
Name="VCCLCompilerTool"
|
||||||
|
WholeProgramOptimization="false"
|
||||||
|
PreprocessorDefinitions="HAVE_PTW32_CONFIG_H;PTW32_BUILD_INLINED;PTW32_STATIC_LIB;__CLEANUP_C;$(NOINHERIT)"
|
||||||
|
/>
|
||||||
|
</FileConfiguration>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\scp.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\sim_console.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\sim_disk.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\sim_ether.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\sim_fio.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\sim_sock.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\sim_tape.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\sim_timer.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\sim_tmxr.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\VAX\vax610_io.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\VAX\vax610_mem.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\VAX\vax610_stddev.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\VAX\vax610_sysdev.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\VAX\vax610_syslist.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\VAX\vax_cis.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\VAX\vax_cmode.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\VAX\vax_cpu.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\VAX\vax_cpu1.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\VAX\vax_fpa.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\VAX\vax_mmu.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\VAX\vax_octa.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\VAX\vax_sys.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\VAX\vax_syscm.c"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
</Filter>
|
||||||
|
<Filter
|
||||||
|
Name="Header Files"
|
||||||
|
Filter="h;hpp;hxx;hm;inl;inc"
|
||||||
|
>
|
||||||
|
<File
|
||||||
|
RelativePath="..\PDP11\pdp11_io_lib.h"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\PDP11\pdp11_mscp.h"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\PDP11\pdp11_uqssp.h"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\PDP11\pdp11_xq.h"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\PDP11\pdp11_xq_bootrom.h"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\scp.h"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\sim_console.h"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\sim_defs.h"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\sim_disk.h"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\sim_ether.h"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\sim_fio.h"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\sim_rev.h"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\sim_sock.h"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\sim_tape.h"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\sim_timer.h"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\sim_tmxr.h"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\VAX\vax610_defs.h"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
<File
|
||||||
|
RelativePath="..\VAX\vax_defs.h"
|
||||||
|
>
|
||||||
|
</File>
|
||||||
|
</Filter>
|
||||||
|
<Filter
|
||||||
|
Name="Resource Files"
|
||||||
|
Filter="rc;ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe"
|
||||||
|
>
|
||||||
|
</Filter>
|
||||||
|
</Files>
|
||||||
|
<Globals>
|
||||||
|
</Globals>
|
||||||
|
</VisualStudioProject>
|
||||||
77
descrip.mms
77
descrip.mms
|
|
@ -42,6 +42,7 @@
|
||||||
# SWTP6800MP-A Just Build The SWTP6800MP-A.
|
# SWTP6800MP-A Just Build The SWTP6800MP-A.
|
||||||
# SWTP6800MP-A2 Just Build The SWTP6800MP-A2.
|
# SWTP6800MP-A2 Just Build The SWTP6800MP-A2.
|
||||||
# VAX Just Build The DEC VAX.
|
# VAX Just Build The DEC VAX.
|
||||||
|
# VAX610 Just Build The DEC VAX610 (MicroVAX I).
|
||||||
# VAX730 Just Build The DEC VAX730.
|
# VAX730 Just Build The DEC VAX730.
|
||||||
# VAX750 Just Build The DEC VAX750.
|
# VAX750 Just Build The DEC VAX750.
|
||||||
# VAX780 Just Build The DEC VAX780.
|
# VAX780 Just Build The DEC VAX780.
|
||||||
|
|
@ -601,7 +602,7 @@ SWTP6800MP_A2_SOURCE = $(SWTP6800MP_A2_COMMON)mp-a2.c,$(SWTP6800MP_A2_COMMON)m68
|
||||||
SWTP6800MP_A2_OPTIONS = /INCL=($(SIMH_DIR),$(SWTP6800MP_A2_DIR))/DEF=($(CC_DEFS))
|
SWTP6800MP_A2_OPTIONS = /INCL=($(SIMH_DIR),$(SWTP6800MP_A2_DIR))/DEF=($(CC_DEFS))
|
||||||
|
|
||||||
#
|
#
|
||||||
# Digital Equipment VAX Simulator Definitions.
|
# Digital Equipment VAX 3900 Simulator Definitions.
|
||||||
#
|
#
|
||||||
VAX_DIR = SYS$DISK:[.VAX]
|
VAX_DIR = SYS$DISK:[.VAX]
|
||||||
VAX_LIB1 = $(LIB_DIR)VAXL1-$(ARCH).OLB
|
VAX_LIB1 = $(LIB_DIR)VAXL1-$(ARCH).OLB
|
||||||
|
|
@ -629,6 +630,34 @@ VAX_OPTIONS = /INCL=($(SIMH_DIR),$(VAX_DIR),$(PDP11_DIR)$(PCAP_INC))\
|
||||||
VAX_SIMH_LIB = $(SIMH_LIB)
|
VAX_SIMH_LIB = $(SIMH_LIB)
|
||||||
.ENDIF
|
.ENDIF
|
||||||
|
|
||||||
|
# Digital Equipment VAX610 (MicroVAX I) Simulator Definitions.
|
||||||
|
#
|
||||||
|
VAX610_DIR = SYS$DISK:[.VAX]
|
||||||
|
VAX610_LIB1 = $(LIB_DIR)VAX610L1-$(ARCH).OLB
|
||||||
|
VAX610_SOURCE1 = $(VAX610_DIR)VAX_CPU.C,$(VAX610_DIR)VAX_CPU1.C,\
|
||||||
|
$(VAX610_DIR)VAX_FPA.C,$(VAX610_DIR)VAX_CIS.C,\
|
||||||
|
$(VAX610_DIR)VAX_OCTA.C,$(VAX610_DIR)VAX_CMODE.C,\
|
||||||
|
$(VAX610_DIR)VAX_MMU.C,$(VAX610_DIR)VAX_SYS.C,\
|
||||||
|
$(VAX610_DIR)VAX_SYSCM.C,$(VAX610_DIR)VAX610_STDDEV.C,\
|
||||||
|
$(VAX610_DIR)VAX610_MEM.C,\
|
||||||
|
$(VAX610_DIR)VAX610_IO.C,$(VAX610_DIR)VAX610_SYSLIST.C
|
||||||
|
VAX610_LIB2 = $(LIB_DIR)VAX610L2-$(ARCH).OLB
|
||||||
|
VAX610_SOURCE2 = $(PDP11_DIR)PDP11_RL.C,$(PDP11_DIR)PDP11_RQ.C,\
|
||||||
|
$(PDP11_DIR)PDP11_TS.C,$(PDP11_DIR)PDP11_DZ.C,\
|
||||||
|
$(PDP11_DIR)PDP11_LP.C,$(PDP11_DIR)PDP11_TQ.C,\
|
||||||
|
$(PDP11_DIR)PDP11_XU.C,$(PDP11_DIR)PDP11_RY.C,\
|
||||||
|
$(PDP11_DIR)PDP11_CR.C,$(PDP11_DIR)PDP11_HK.C,\
|
||||||
|
$(PDP11_DIR)PDP11_IO_LIB.C
|
||||||
|
.IFDEF ALPHA_OR_IA64
|
||||||
|
VAX610_OPTIONS = /INCL=($(SIMH_DIR),$(VAX610_DIR),$(PDP11_DIR)$(PCAP_INC))\
|
||||||
|
/DEF=($(CC_DEFS),"VM_VAX=1","USE_ADDR64=1","USE_INT64=1"$(PCAP_DEFS),"VAX_730=1")
|
||||||
|
VAX610_SIMH_LIB = $(SIMH_LIB64)
|
||||||
|
.ELSE
|
||||||
|
VAX610_OPTIONS = /INCL=($(SIMH_DIR),$(VAX610_DIR),$(PDP11_DIR)$(PCAP_INC))\
|
||||||
|
/DEF=($(CC_DEFS),"VM_VAX=1"$(PCAP_DEFS),"VAX_730=1")
|
||||||
|
VAX610_SIMH_LIB = $(SIMH_LIB)
|
||||||
|
.ENDIF
|
||||||
|
|
||||||
# Digital Equipment VAX730 Simulator Definitions.
|
# Digital Equipment VAX730 Simulator Definitions.
|
||||||
#
|
#
|
||||||
VAX730_DIR = SYS$DISK:[.VAX]
|
VAX730_DIR = SYS$DISK:[.VAX]
|
||||||
|
|
@ -661,7 +690,7 @@ VAX730_SIMH_LIB = $(SIMH_LIB)
|
||||||
# Digital Equipment VAX750 Simulator Definitions.
|
# Digital Equipment VAX750 Simulator Definitions.
|
||||||
#
|
#
|
||||||
VAX750_DIR = SYS$DISK:[.VAX]
|
VAX750_DIR = SYS$DISK:[.VAX]
|
||||||
VAX750_LIB1 = $(LIB_DIR)VAX730L1-$(ARCH).OLB
|
VAX750_LIB1 = $(LIB_DIR)VAX750L1-$(ARCH).OLB
|
||||||
VAX750_SOURCE1 = $(VAX750_DIR)VAX_CPU.C,$(VAX750_DIR)VAX_CPU1.C,\
|
VAX750_SOURCE1 = $(VAX750_DIR)VAX_CPU.C,$(VAX750_DIR)VAX_CPU1.C,\
|
||||||
$(VAX750_DIR)VAX_FPA.C,$(VAX750_DIR)VAX_CIS.C,\
|
$(VAX750_DIR)VAX_FPA.C,$(VAX750_DIR)VAX_CIS.C,\
|
||||||
$(VAX750_DIR)VAX_OCTA.C,$(VAX750_DIR)VAX_CMODE.C,\
|
$(VAX750_DIR)VAX_OCTA.C,$(VAX750_DIR)VAX_CMODE.C,\
|
||||||
|
|
@ -670,7 +699,7 @@ VAX750_SOURCE1 = $(VAX750_DIR)VAX_CPU.C,$(VAX750_DIR)VAX_CPU1.C,\
|
||||||
$(VAX750_DIR)VAX750_CMI.C,$(VAX750_DIR)VAX750_MEM.C,\
|
$(VAX750_DIR)VAX750_CMI.C,$(VAX750_DIR)VAX750_MEM.C,\
|
||||||
$(VAX750_DIR)VAX750_UBA.C,$(VAX750_DIR)VAX7X0_MBA.C,\
|
$(VAX750_DIR)VAX750_UBA.C,$(VAX750_DIR)VAX7X0_MBA.C,\
|
||||||
$(VAX750_DIR)VAX750_SYSLIST.C
|
$(VAX750_DIR)VAX750_SYSLIST.C
|
||||||
VAX750_LIB2 = $(LIB_DIR)VAX730L2-$(ARCH).OLB
|
VAX750_LIB2 = $(LIB_DIR)VAX750L2-$(ARCH).OLB
|
||||||
VAX750_SOURCE2 = $(PDP11_DIR)PDP11_RL.C,$(PDP11_DIR)PDP11_RQ.C,\
|
VAX750_SOURCE2 = $(PDP11_DIR)PDP11_RL.C,$(PDP11_DIR)PDP11_RQ.C,\
|
||||||
$(PDP11_DIR)PDP11_TS.C,$(PDP11_DIR)PDP11_DZ.C,\
|
$(PDP11_DIR)PDP11_TS.C,$(PDP11_DIR)PDP11_DZ.C,\
|
||||||
$(PDP11_DIR)PDP11_LP.C,$(PDP11_DIR)PDP11_TQ.C,\
|
$(PDP11_DIR)PDP11_LP.C,$(PDP11_DIR)PDP11_TQ.C,\
|
||||||
|
|
@ -735,7 +764,7 @@ I7094_OPTIONS = /INCL=($(SIMH_DIR),$(I7094_DIR))/DEF=($(CC_DEFS))
|
||||||
.IFDEF ALPHA_OR_IA64
|
.IFDEF ALPHA_OR_IA64
|
||||||
ALL : ALTAIR ALTAIRZ80 ECLIPSE GRI LGP H316 HP2100 I1401 I1620 IBM1130 ID16 \
|
ALL : ALTAIR ALTAIRZ80 ECLIPSE GRI LGP H316 HP2100 I1401 I1620 IBM1130 ID16 \
|
||||||
ID32 NOVA PDP1 PDP4 PDP7 PDP8 PDP9 PDP10 PDP11 PDP15 S3 \
|
ID32 NOVA PDP1 PDP4 PDP7 PDP8 PDP9 PDP10 PDP11 PDP15 S3 \
|
||||||
VAX VAX730 VAX750 VAX780 \
|
VAX VAX610 VAX730 VAX750 VAX780 \
|
||||||
SDS I7094 SWTP6800MP-A SWTP6800MP-A2
|
SDS I7094 SWTP6800MP-A SWTP6800MP-A2
|
||||||
$! No further actions necessary
|
$! No further actions necessary
|
||||||
.ELSE
|
.ELSE
|
||||||
|
|
@ -744,7 +773,7 @@ ALL : ALTAIR ALTAIRZ80 ECLIPSE GRI LGP H316 HP2100 I1401 I1620 IBM1130 ID16 \
|
||||||
#
|
#
|
||||||
ALL : ALTAIR ALTAIRZ80 GRI H316 HP2100 I1401 I1620 IBM1130 ID16 ID32 \
|
ALL : ALTAIR ALTAIRZ80 GRI H316 HP2100 I1401 I1620 IBM1130 ID16 ID32 \
|
||||||
NOVA PDP1 PDP4 PDP7 PDP8 PDP9 PDP11 PDP15 S3 \
|
NOVA PDP1 PDP4 PDP7 PDP8 PDP9 PDP11 PDP15 S3 \
|
||||||
VAX VAX730 VAX750 VAX780 SDS SWTP6800MP-A SWTP6800MP-A2
|
VAX VAX510 VAX730 VAX750 VAX780 SDS SWTP6800MP-A SWTP6800MP-A2
|
||||||
$! No further actions necessary
|
$! No further actions necessary
|
||||||
.ENDIF
|
.ENDIF
|
||||||
|
|
||||||
|
|
@ -1161,6 +1190,29 @@ $(VAX_LIB2) : $(VAX_SOURCE2)
|
||||||
$ LIBRARY/REPLACE $(MMS$TARGET) $(BLD_DIR)*.OBJ
|
$ LIBRARY/REPLACE $(MMS$TARGET) $(BLD_DIR)*.OBJ
|
||||||
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
|
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
|
||||||
|
|
||||||
|
$(VAX610_LIB1) : $(VAX610_SOURCE1)
|
||||||
|
$!
|
||||||
|
$! Building The $(VAX610_LIB1) Library.
|
||||||
|
$!
|
||||||
|
$ RUN/NODEBUG $(BIN_DIR)BuildROMs-$(ARCH).EXE
|
||||||
|
$ $(CC)$(VAX610_OPTIONS)/OBJ=$(VAX610_DIR) -
|
||||||
|
/OBJ=$(BLD_DIR) $(MMS$CHANGED_LIST)
|
||||||
|
$ IF (F$SEARCH("$(MMS$TARGET)").EQS."") THEN -
|
||||||
|
LIBRARY/CREATE $(MMS$TARGET)
|
||||||
|
$ LIBRARY/REPLACE $(MMS$TARGET) $(BLD_DIR)*.OBJ
|
||||||
|
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
|
||||||
|
|
||||||
|
$(VAX610_LIB2) : $(VAX610_SOURCE2)
|
||||||
|
$!
|
||||||
|
$! Building The $(VAX610_LIB2) Library.
|
||||||
|
$!
|
||||||
|
$ $(CC)$(VAX610_OPTIONS)/OBJ=$(VAX610_DIR) -
|
||||||
|
/OBJ=$(BLD_DIR) $(MMS$CHANGED_LIST)
|
||||||
|
$ IF (F$SEARCH("$(MMS$TARGET)").EQS."") THEN -
|
||||||
|
LIBRARY/CREATE $(MMS$TARGET)
|
||||||
|
$ LIBRARY/REPLACE $(MMS$TARGET) $(BLD_DIR)*.OBJ
|
||||||
|
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
|
||||||
|
|
||||||
$(VAX730_LIB1) : $(VAX730_SOURCE1)
|
$(VAX730_LIB1) : $(VAX730_SOURCE1)
|
||||||
$!
|
$!
|
||||||
$! Building The $(VAX730_LIB1) Library.
|
$! Building The $(VAX730_LIB1) Library.
|
||||||
|
|
@ -1610,6 +1662,21 @@ $(BIN_DIR)VAX-$(ARCH).EXE : $(SIMH_MAIN) $(VAX_SIMH_LIB) $(PCAP_LIBD) $(VAX_LIB1
|
||||||
$(VAX_SIMH_LIB)/LIBRARY$(PCAP_LIBR)
|
$(VAX_SIMH_LIB)/LIBRARY$(PCAP_LIBR)
|
||||||
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
|
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
|
||||||
|
|
||||||
|
VAX610 : $(BIN_DIR)VAX610-$(ARCH).EXE
|
||||||
|
$! VAX610 done
|
||||||
|
|
||||||
|
$(BIN_DIR)VAX610-$(ARCH).EXE : $(SIMH_MAIN) $(VAX610_SIMH_LIB) $(PCAP_LIBD) $(VAX610_LIB1) $(VAX610_LIB2) $(PCAP_EXECLET)
|
||||||
|
$!
|
||||||
|
$! Building The $(BIN_DIR)VAX610-$(ARCH).EXE Simulator.
|
||||||
|
$!
|
||||||
|
$ $(CC)$(VAX610_OPTIONS)/OBJ=$(BLD_DIR) SCP.C
|
||||||
|
$ LINK $(LINK_DEBUG)$(LINK_SECTION_BINDING)-
|
||||||
|
/EXE=$(BIN_DIR)VAX610-$(ARCH).EXE -
|
||||||
|
$(BLD_DIR)SCP.OBJ,-
|
||||||
|
$(VAX610_LIB1)/LIBRARY,$(VAX610_LIB2)/LIBRARY,-
|
||||||
|
$(VAX610_SIMH_LIB)/LIBRARY$(PCAP_LIBR)
|
||||||
|
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
|
||||||
|
|
||||||
VAX730 : $(BIN_DIR)VAX730-$(ARCH).EXE
|
VAX730 : $(BIN_DIR)VAX730-$(ARCH).EXE
|
||||||
$! VAX730 done
|
$! VAX730 done
|
||||||
|
|
||||||
|
|
|
||||||
25
makefile
25
makefile
|
|
@ -470,6 +470,18 @@ VAX = ${VAXD}/vax_cpu.c ${VAXD}/vax_cpu1.c ${VAXD}/vax_fpa.c ${VAXD}/vax_io.c \
|
||||||
VAX_OPT = -DVM_VAX -DUSE_INT64 -DUSE_ADDR64 -I ${VAXD} -I ${PDP11D} ${NETWORK_OPT}
|
VAX_OPT = -DVM_VAX -DUSE_INT64 -DUSE_ADDR64 -I ${VAXD} -I ${PDP11D} ${NETWORK_OPT}
|
||||||
|
|
||||||
|
|
||||||
|
VAX610 = ${VAXD}/vax_cpu.c ${VAXD}/vax_cpu1.c ${VAXD}/vax_fpa.c \
|
||||||
|
${VAXD}/vax_cis.c ${VAXD}/vax_octa.c ${VAXD}/vax_cmode.c \
|
||||||
|
${VAXD}/vax_mmu.c ${VAXD}/vax_sys.c ${VAXD}/vax_syscm.c \
|
||||||
|
${VAXD}/vax610_stddev.c ${VAXD}/vax610_sysdev.c \
|
||||||
|
${VAXD}/vax610_io.c ${VAXD}/vax610_syslist.c ${VAXD}/vax610_mem.c \
|
||||||
|
${PDP11D}/pdp11_rl.c ${PDP11D}/pdp11_rq.c ${PDP11D}/pdp11_ts.c \
|
||||||
|
${PDP11D}/pdp11_dz.c ${PDP11D}/pdp11_lp.c ${PDP11D}/pdp11_tq.c \
|
||||||
|
${PDP11D}/pdp11_xq.c ${PDP11D}/pdp11_ry.c ${PDP11D}/pdp11_vh.c \
|
||||||
|
${PDP11D}/pdp11_cr.c ${PDP11D}/pdp11_io_lib.c
|
||||||
|
VAX610_OPT = -DVM_VAX -DVAX_610 -DUSE_INT64 -DUSE_ADDR64 -I ${VAXD} -I ${PDP11D} ${NETWORK_OPT}
|
||||||
|
|
||||||
|
|
||||||
VAX730 = ${VAXD}/vax_cpu.c ${VAXD}/vax_cpu1.c ${VAXD}/vax_fpa.c \
|
VAX730 = ${VAXD}/vax_cpu.c ${VAXD}/vax_cpu1.c ${VAXD}/vax_fpa.c \
|
||||||
${VAXD}/vax_cis.c ${VAXD}/vax_octa.c ${VAXD}/vax_cmode.c \
|
${VAXD}/vax_cis.c ${VAXD}/vax_octa.c ${VAXD}/vax_cmode.c \
|
||||||
${VAXD}/vax_mmu.c ${VAXD}/vax_sys.c ${VAXD}/vax_syscm.c \
|
${VAXD}/vax_mmu.c ${VAXD}/vax_sys.c ${VAXD}/vax_syscm.c \
|
||||||
|
|
@ -664,9 +676,10 @@ SWTP6800_OPT = -I ${SWTP6800D}
|
||||||
# Build everything
|
# Build everything
|
||||||
#
|
#
|
||||||
ALL = pdp1 pdp4 pdp7 pdp8 pdp9 pdp15 pdp11 pdp10 \
|
ALL = pdp1 pdp4 pdp7 pdp8 pdp9 pdp15 pdp11 pdp10 \
|
||||||
vax vax730 vax750 vax780 nova eclipse hp2100 i1401 i1620 s3 \
|
vax vax610 vax730 vax750 vax780 nova eclipse \
|
||||||
altair altairz80 gri i7094 ibm1130 id16 \
|
hp2100 i1401 i1620 s3 altair altairz80 gri \
|
||||||
id32 sds lgp h316 swtp6800mp-a swtp6800mp-a2
|
i7094 ibm1130 id16 id32 sds lgp h316 \
|
||||||
|
swtp6800mp-a swtp6800mp-a2
|
||||||
|
|
||||||
all : ${ALL}
|
all : ${ALL}
|
||||||
|
|
||||||
|
|
@ -753,6 +766,12 @@ ${BIN}vax${EXE} : ${VAX} ${SIM} ${BUILD_ROMS}
|
||||||
${MKDIRBIN}
|
${MKDIRBIN}
|
||||||
${CC} ${VAX} ${SIM} ${VAX_OPT} $(CC_OUTSPEC) ${LDFLAGS}
|
${CC} ${VAX} ${SIM} ${VAX_OPT} $(CC_OUTSPEC) ${LDFLAGS}
|
||||||
|
|
||||||
|
vax610 : ${BIN}vax610${EXE}
|
||||||
|
|
||||||
|
${BIN}vax610${EXE} : ${VAX610} ${SIM} ${BUILD_ROMS}
|
||||||
|
${MKDIRBIN}
|
||||||
|
${CC} ${VAX610} ${SIM} ${VAX610_OPT} -o $@ ${LDFLAGS}
|
||||||
|
|
||||||
vax730 : ${BIN}vax730${EXE}
|
vax730 : ${BIN}vax730${EXE}
|
||||||
|
|
||||||
${BIN}vax730${EXE} : ${VAX730} ${SIM} ${BUILD_ROMS}
|
${BIN}vax730${EXE} : ${VAX730} ${SIM} ${BUILD_ROMS}
|
||||||
|
|
|
||||||
|
|
@ -40,6 +40,7 @@
|
||||||
struct ROM_File_Descriptor {
|
struct ROM_File_Descriptor {
|
||||||
char *BinaryName; char *IncludeFileName; size_t expected_size; unsigned int checksum; char *ArrayName;} ROMs[] = {
|
char *BinaryName; char *IncludeFileName; size_t expected_size; unsigned int checksum; char *ArrayName;} ROMs[] = {
|
||||||
{"VAX/ka655x.bin", "VAX/vax_ka655x_bin.h", 131072, 0xFF7673B6, "vax_ka655x_bin"},
|
{"VAX/ka655x.bin", "VAX/vax_ka655x_bin.h", 131072, 0xFF7673B6, "vax_ka655x_bin"},
|
||||||
|
{"VAX/ka610.bin", "VAX/vax_ka610_bin.h", 16384, 0xFFEF3312, "vax_ka610_bin"},
|
||||||
{"VAX/vmb.exe", "VAX/vax_vmb_exe.h", 44544, 0xFFC014CC, "vax_vmb_exe"},
|
{"VAX/vmb.exe", "VAX/vax_vmb_exe.h", 44544, 0xFFC014CC, "vax_vmb_exe"},
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -152,13 +153,13 @@ for (i=0; i<statb.st_size; ++i)
|
||||||
checksum += ROMData[i];
|
checksum += ROMData[i];
|
||||||
checksum = ~checksum;
|
checksum = ~checksum;
|
||||||
sprintf (include_filename, "%s.h", rom_filename);
|
sprintf (include_filename, "%s.h", rom_filename);
|
||||||
if ((c = strchr (include_filename, '.')))
|
strcpy (array_name, rom_filename);
|
||||||
*c = '_';
|
|
||||||
if (!(c = strchr (rom_filename, '/')))
|
|
||||||
c = strchr (rom_filename, '/');
|
|
||||||
strcpy (array_name, c);
|
|
||||||
if ((c = strchr (array_name, '.')))
|
if ((c = strchr (array_name, '.')))
|
||||||
*c = '_';
|
*c = '_';
|
||||||
|
if ((c = strchr (array_name, '/')))
|
||||||
|
*c = '_';
|
||||||
|
if ((c = strchr (array_name, '\\')))
|
||||||
|
*c = '_';
|
||||||
printf ("The ROMs array entry for this new ROM image file should look something like:\n");
|
printf ("The ROMs array entry for this new ROM image file should look something like:\n");
|
||||||
printf ("{\"%s\", \"%s\", %d, 0x%08X, \"%s\"}\n",
|
printf ("{\"%s\", \"%s\", %d, 0x%08X, \"%s\"}\n",
|
||||||
rom_filename, include_filename, (int)(statb.st_size), checksum, array_name);
|
rom_filename, include_filename, (int)(statb.st_size), checksum, array_name);
|
||||||
|
|
|
||||||
Loading…
Add table
Reference in a new issue