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HP3000: Fourth HP 3000 release, update 1

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See HP3000/hp3000_release.txt for details of the release
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Mark Pizzolato 2017-01-25 11:50:49 -08:00
parent 0046905f72
commit 7ac92a0e84
3 changed files with 54 additions and 18 deletions
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29
HP3000/hp3000_cpu.c
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@ -1,6 +1,6 @@
/* hp3000_cpu.c: HP 3000 Central Processing Unit simulator /* hp3000_cpu.c: HP 3000 Central Processing Unit simulator
Copyright (c) 2016, J. David Bryan Copyright (c) 2016-2017, J. David Bryan
Permission is hereby granted, free of charge, to any person obtaining a copy Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal of this software and associated documentation files (the "Software"), to deal
@ -25,6 +25,7 @@
CPU HP 3000 Series III Central Processing Unit CPU HP 3000 Series III Central Processing Unit
19-Jan-17 JDB Added comments describing the OPND and EXEC trace options
29_Dec-16 JDB Changed the status mnemonic flag from REG_S to REG_T 29_Dec-16 JDB Changed the status mnemonic flag from REG_S to REG_T
07-Nov-16 JDB Renamed cpu_byte_to_word_ea to cpu_byte_ea 07-Nov-16 JDB Renamed cpu_byte_to_word_ea to cpu_byte_ea
03-Nov-16 JDB Added zero offsets to the cpu_call_procedure calls 03-Nov-16 JDB Added zero offsets to the cpu_call_procedure calls
@ -509,11 +510,13 @@
The trace options that may be specified are: The trace options that may be specified are:
Trace Action Trace Action
----- ---------------------------------- ----- -------------------------------------------
INSTR trace instruction executions INSTR trace instructions executed
DATA trace memory data accesses DATA trace memory data accesses
FETCH trace memory instruction fetches FETCH trace memory instruction fetches
REG trace registers REG trace registers
OPND trace memory operands
EXEC trace matching instruction execution states
PSERV trace process clock service events PSERV trace process clock service events
A section of an example trace is: A section of an example trace is:
@ -564,12 +567,20 @@
instruction that may alter the base registers, the program, data, and stack instruction that may alter the base registers, the program, data, and stack
segment base registers are printed. segment base registers are printed.
The OPND option traces operand values. Some instructions that take memory The OPND option traces memory byte operand values. Some instructions take
and register operands that are difficult to decode from DATA or REG traces memory and register operands that are difficult to decode from DATA or REG
present the operand values in a higher-level format. The memory bank and traces. This option presents these operands in a higher-level format. The
address values are always those of the operands. The operand data and value memory bank and address values are always those of the operands. The operand
presented are specific to the instruction; see the instruction executor data and values printed are specific to the instruction. For example, the
comments for details. ALGN instruction prints its source and target operands, digit counts, and
fraction counts, and the EDIT instruction displays its subprogram operations.
The EXEC option traces the execution of instructions that match
user-specified criteria. When a match occurs, all CPU trace options are
turned on for the duration of the execution of the matched instruction. The
prior trace settings are restored when a match fails. This option allows
detailed tracing of specified instructions while minimizing the log file size
compared to a full instruction trace.
The PSERV option traces process clock event service entries. Each trace The PSERV option traces process clock event service entries. Each trace
reports whether or not the CPU was executing on the Interrupt Control Stack reports whether or not the CPU was executing on the Interrupt Control Stack

43
HP3000/hp3000_release.txt
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SIMH/HP 3000 RELEASE NOTES SIMH/HP 3000 RELEASE NOTES
========================== ==========================
Last update: 2017-01-08 Last update: 2017-01-23
This file documents the release history of the Hewlett-Packard 3000 simulator. This file documents the release history of the Hewlett-Packard 3000 simulator.
@ -11,13 +11,32 @@ simulator code base is available at:
https://github.com/simh/simh https://github.com/simh/simh
...and may be downloaded at any time. A code snapshot is identified by the "git ...and may be downloaded at any time. A code snapshot is identified by the "git
commit ID" that is displayed by the simulator welcome banner. commit ID" that is displayed in the simulator welcome banner.
Therefore, HP 3000 releases are simply documentation checkpoints that describe Therefore, HP 3000 releases are simply documentation checkpoints that describe
the changes that have occurred since the last checkpoint. Generally, a release the changes that have occurred since the last checkpoint. Generally, a release
is written when one or more major changes have been incorporated. Minor bug is written when one or more major changes have been incorporated. Minor bug
fixes will be available immediately but only noted as part of the next release fixes will be available immediately from the repository but only noted as part
document. of the next release document.
===============================
Reporting Bugs in the Simulator
===============================
If you find a bug in the HP 3000 simulator, please report it either to the SIMH
issue tracker on github at:
https://github.com/simh/simh/issues
...or to the SIMH mailing list; see:
http://mailman.trailing-edge.com/mailman/listinfo/simh
...for subscribing information. In either case, please include a console log
that contains a reproducible test case that illustrates the problem. See the
"Recording Simulator Activities" section of the "SIMH User's Guide" for details.
@ -58,15 +77,14 @@ PDF version of the same manual is available at:
A preconfigured MPE-V/R disc image containing the Fundamental Operating Software A preconfigured MPE-V/R disc image containing the Fundamental Operating Software
(FOS), selected SUBSYS language processors (BASIC, BASICOMP, COBOL, COBOLII, (FOS), selected SUBSYS language processors (BASIC, BASICOMP, COBOL, COBOLII,
FORTRAN, PASCAL, RPG, and SPL), and example programs is available from Bitsavers FORTRAN, PASCAL, RPG, and SPL), and example programs is available at:
at:
http://www.bitsavers.org/bits/HP/HP_3000/ http://simh.trailing-edge.com/kits/mpe-vr-software-kit.zip
The archive contains instructions and simulator command files that allow The archive contains instructions and simulator command files that allow
ready-to-run operation. ready-to-run operation.
Manuals describing MPE operation are also available from Bitsavers at: Manuals describing MPE operation are available from Bitsavers at:
http://www.bitsavers.org/pdf/hp/3000/ http://www.bitsavers.org/pdf/hp/3000/
@ -187,6 +205,13 @@ Implementation Notes
routines to the system SL and COBOL example programs to the OPERATOR.SYS routines to the system SL and COBOL example programs to the OPERATOR.SYS
account. The startup command files also enable the COBOL II instruction set. account. The startup command files also enable the COBOL II instruction set.
- If you are using a custom MPE configuration and want to run COBOL II
programs, you must perform a SYSDUMP/COLDSTART to replace the three existing
COBLIB segments in your SL.PUB.SYS with their COBOL II replacements. The
U00U232A.USL.SYS and COB68LIB.PUB.SYS files on the disc image from the
software kit contain the replacement segments. See Usage Note 6 in the
"readme.txt" file and the "mpe-3-sysdump.log" file in the kit for details.
- New "hp3000_cpu_cis.c" and "hp3000_mem.c" modules have been added. - New "hp3000_cpu_cis.c" and "hp3000_mem.c" modules have been added.
- For this release, checking for interrupts is not performed during execution - For this release, checking for interrupts is not performed during execution
@ -285,7 +310,7 @@ Bugs Fixed
the stack, and the instruction is reexecuted. However, the program label the stack, and the instruction is reexecuted. However, the program label
has been lost, so control transfers to a random location. has been lost, so control transfers to a random location.
CAUSE: The instructions obtain the label and then delete the TOS, flush CAUSE: The instructions obtain the labels and then delete the TOS, flush
the rest of the stack registers to memory, and then check that SM <= Z, the rest of the stack registers to memory, and then check that SM <= Z,
i.e., that the current top of the stack in memory does not exceed the i.e., that the current top of the stack in memory does not exceed the
stack limit. If SM > Z, a stack overflow has occurred, and the trap stack limit. If SM > Z, a stack overflow has occurred, and the trap

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