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PDP11, PDP10, all VAX: General extern cleanup.

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Remove explicit redundant extern declarations in source files that are
defined in processor include files.
This commit is contained in:
Mark Pizzolato 2017-02-04 19:37:20 -08:00
parent 5dc6d9a487
commit 7d432406b6
60 changed files with 35 additions and 148 deletions
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8
PDP10/pdp10_cpu.c
View file

@ -254,14 +254,6 @@ void set_ac_display (d10 *acbase);
extern t_stat build_dib_tab (void); extern t_stat build_dib_tab (void);
extern t_stat show_iospace (FILE *st, UNIT *uptr, int32 val, CONST void *desc); extern t_stat show_iospace (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
extern d10 Read (a10 ea, int32 prv); /* read, read check */
extern d10 ReadM (a10 ea, int32 prv); /* read, write check */
extern d10 ReadE (a10 ea); /* read, exec */
extern d10 ReadP (a10 ea); /* read, physical */
extern void Write (a10 ea, d10 val, int32 prv); /* write */
extern void WriteE (a10 ea, d10 val); /* write, exec */
extern void WriteP (a10 ea, d10 val); /* write, physical */
extern t_bool AccViol (a10 ea, int32 prv, int32 mode); /* access check */
extern void set_dyn_ptrs (void); extern void set_dyn_ptrs (void);
extern a10 conmap (a10 ea, int32 mode, int32 sw); extern a10 conmap (a10 ea, int32 mode, int32 sw);
extern void fe_intr (); extern void fe_intr ();

17
PDP10/pdp10_defs.h
View file

@ -49,6 +49,7 @@
#endif #endif
#include "sim_defs.h" /* simulator defns */ #include "sim_defs.h" /* simulator defns */
#include <setjmp.h>
#if defined(USE_ADDR64) #if defined(USE_ADDR64)
#error "PDP-10 does not support 64b addresses!" #error "PDP-10 does not support 64b addresses!"
@ -772,6 +773,15 @@ void uba_debug_dma_in (uint32 ba, a10 pa_start, a10 pa_end);
void uba_debug_dma_out (uint32 ba, a10 pa_start, a10 pa_end); void uba_debug_dma_out (uint32 ba, a10 pa_start, a10 pa_end);
void uba_debug_dma_nxm (const char *msg, a10 pa10, uint32 ba, int32 bc); void uba_debug_dma_nxm (const char *msg, a10 pa10, uint32 ba, int32 bc);
extern d10 Read (a10 ea, int32 prv); /* read, read check */
extern d10 ReadM (a10 ea, int32 prv); /* read, write check */
extern d10 ReadE (a10 ea); /* read, exec */
extern d10 ReadP (a10 ea); /* read, physical */
extern void Write (a10 ea, d10 val, int32 prv); /* write */
extern void WriteE (a10 ea, d10 val); /* write, exec */
extern void WriteP (a10 ea, d10 val); /* write, physical */
extern t_bool AccViol (a10 ea, int32 prv, int32 mode); /* access check */
t_stat set_addr (UNIT *uptr, int32 val, CONST char *cptr, void *desc); t_stat set_addr (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat set_addr_flt (UNIT *uptr, int32 val, CONST char *cptr, void *desc); t_stat set_addr_flt (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat show_addr (FILE *st, UNIT *uptr, int32 val, CONST void *desc); t_stat show_addr (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
@ -784,5 +794,12 @@ extern d10 *ac_cur; /* current AC block */
extern int32 flags; /* flags */ extern int32 flags; /* flags */
extern const int32 pi_l2bit[8]; extern const int32 pi_l2bit[8];
extern const d10 bytemask[64]; extern const d10 bytemask[64];
extern int32 int_req;
extern d10 *M; /* memory */
extern a10 pager_PC; /* pager: saved PC */
extern d10 pager_word; /* pager: error word */
extern UNIT cpu_unit;
extern int32 apr_flg;
extern jmp_buf save_env;
#endif #endif

2
PDP10/pdp10_fe.c
View file

@ -42,8 +42,6 @@
#include "sim_tmxr.h" #include "sim_tmxr.h"
#define UNIT_DUMMY (1 << UNIT_V_UF) #define UNIT_DUMMY (1 << UNIT_V_UF)
extern d10 *M;
extern int32 apr_flg;
extern int32 tmxr_poll; extern int32 tmxr_poll;
t_stat fei_svc (UNIT *uptr); t_stat fei_svc (UNIT *uptr);
t_stat feo_svc (UNIT *uptr); t_stat feo_svc (UNIT *uptr);

5
PDP10/pdp10_ksio.c
View file

@ -149,11 +149,6 @@ static const int32 ubabr54[UBANUM] = {
#define M_WORD0 (~INT64_C (0777777000000)) /* Clear word 0 + XX */ #define M_WORD0 (~INT64_C (0777777000000)) /* Clear word 0 + XX */
#define M_WORD1 (~INT64_C (0000000777777)) /* Clear word 1 + XX */ #define M_WORD1 (~INT64_C (0000000777777)) /* Clear word 1 + XX */
extern d10 *M; /* main memory */
extern d10 pager_word;
extern UNIT cpu_unit;
extern jmp_buf save_env;
extern int32 pi_eval (void); extern int32 pi_eval (void);
t_stat ubmap_rd (int32 *data, int32 addr, int32 access); t_stat ubmap_rd (int32 *data, int32 addr, int32 access);

2
PDP10/pdp10_lp20.c
View file

@ -171,8 +171,6 @@
/* LPCSUM/LPPDAT (765516) */ /* LPCSUM/LPPDAT (765516) */
extern int32 int_req;
static int32 lpcsa = 0; /* control/status A */ static int32 lpcsa = 0; /* control/status A */
static int32 lpcsb = CSB_DVOF; /* control/status B */ static int32 lpcsb = CSB_DVOF; /* control/status B */
static int32 lpba = 0; /* bus address */ static int32 lpba = 0; /* bus address */

1
PDP10/pdp10_mdfp.c
View file

@ -752,7 +752,6 @@ static t_uint64 normmask[6] = {
0x7FFF800000000000, 0x7FFFFFFF80000000, 0x7FFFFFFFFFFFFFFF 0x7FFF800000000000, 0x7FFFFFFF80000000, 0x7FFFFFFFFFFFFFFF
}; };
static int32 normtab[7] = { 1, 2, 4, 8, 16, 32, 63 }; static int32 normtab[7] = { 1, 2, 4, 8, 16, 32, 63 };
extern a10 pager_PC;
if (a->fhi & FP_UCRY) { /* carry set? */ if (a->fhi & FP_UCRY) { /* carry set? */
sim_printf ("%%PDP-10 FP: carry bit set at normalization, PC = %o\n", pager_PC); sim_printf ("%%PDP-10 FP: carry bit set at normalization, PC = %o\n", pager_PC);

7
PDP10/pdp10_pag.c
View file

@ -77,7 +77,6 @@
*/ */
#include "pdp10_defs.h" #include "pdp10_defs.h"
#include <setjmp.h>
/* Page table (contains expanded pte's) */ /* Page table (contains expanded pte's) */
@ -95,19 +94,13 @@
#define PF_OK 0 /* pfail ok */ #define PF_OK 0 /* pfail ok */
#define PF_TR 1 /* pfail trap */ #define PF_TR 1 /* pfail trap */
extern d10 *M;
extern d10 acs[AC_NBLK * AC_NUM]; extern d10 acs[AC_NBLK * AC_NUM];
extern d10 *ac_prv, *last_pa; extern d10 *ac_prv, *last_pa;
extern a10 epta, upta; extern a10 epta, upta;
extern d10 pager_word;
extern int32 apr_flg;
extern d10 ebr, ubr, hsb; extern d10 ebr, ubr, hsb;
extern d10 spt, cst, cstm, pur; extern d10 spt, cst, cstm, pur;
extern a10 dbr1, dbr2, dbr3, dbr4; extern a10 dbr1, dbr2, dbr3, dbr4;
extern d10 pcst, quant; extern d10 pcst, quant;
extern t_bool paging;
extern UNIT cpu_unit;
extern jmp_buf save_env;
extern int32 test_int (void); extern int32 test_int (void);
extern int32 pi_eval (void); extern int32 pi_eval (void);

3
PDP10/pdp10_rp.c
View file

@ -330,11 +330,8 @@ struct drvtyp drv_tab[] = {
{ 0 } { 0 }
}; };
extern d10 *M; /* memory */
extern int32 int_req;
extern int32 ubmap[UBANUM][UMAP_MEMSIZE]; /* Unibus maps */ extern int32 ubmap[UBANUM][UMAP_MEMSIZE]; /* Unibus maps */
extern int32 ubcs[UBANUM]; extern int32 ubcs[UBANUM];
extern UNIT cpu_unit;
extern uint32 fe_bootrh; extern uint32 fe_bootrh;
extern int32 fe_bootunit; extern int32 fe_bootunit;

2
PDP10/pdp10_sys.c
View file

@ -60,9 +60,7 @@ extern DEVICE xu_dev;
extern DEVICE dup_dev; extern DEVICE dup_dev;
extern DEVICE kmc_dev; extern DEVICE kmc_dev;
extern DEVICE dmc_dev; extern DEVICE dmc_dev;
extern UNIT cpu_unit;
extern REG cpu_reg[]; extern REG cpu_reg[];
extern d10 *M;
extern a10 saved_PC; extern a10 saved_PC;
/* SCP data structures and interface routines /* SCP data structures and interface routines

7
PDP10/pdp10_tim.c
View file

@ -140,9 +140,7 @@ int32 tmr_poll; /* SimH instructions/clo
int32 tmxr_poll; /* SimH instructions/term mux poll */ int32 tmxr_poll; /* SimH instructions/term mux poll */
extern int32 apr_flg, pi_act; extern int32 apr_flg, pi_act;
extern UNIT cpu_unit;
extern d10 pcst; extern d10 pcst;
extern a10 pager_PC;
static t_stat tcu_rd (int32 *data, int32 PA, int32 access); static t_stat tcu_rd (int32 *data, int32 PA, int32 access);
static t_stat tim_svc (UNIT *uptr); static t_stat tim_svc (UNIT *uptr);
@ -150,11 +148,6 @@ static t_stat tim_reset (DEVICE *dptr);
static t_bool update_interval (d10 new_interval); static t_bool update_interval (d10 new_interval);
static void tim_incr_base (d10 *base, d10 incr); static void tim_incr_base (d10 *base, d10 incr);
extern d10 Read (a10 ea, int32 prv);
extern d10 ReadM (a10 ea, int32 prv);
extern void Write (a10 ea, d10 val, int32 prv);
extern void WriteP (a10 ea, d10 val);
extern int32 pi_eval (void);
extern t_stat wr_nop (int32 data, int32 PA, int32 access); extern t_stat wr_nop (int32 data, int32 PA, int32 access);
/* TIM data structures /* TIM data structures

3
PDP10/pdp10_tu.c
View file

@ -296,11 +296,8 @@
break; \ break; \
} }
extern d10 *M; /* memory */
extern int32 int_req;
extern int32 ubmap[UBANUM][UMAP_MEMSIZE]; /* Unibus map */ extern int32 ubmap[UBANUM][UMAP_MEMSIZE]; /* Unibus map */
extern int32 ubcs[UBANUM]; extern int32 ubcs[UBANUM];
extern UNIT cpu_unit;
int32 tucs1 = 0; /* control/status 1 */ int32 tucs1 = 0; /* control/status 1 */
int32 tuwc = 0; /* word count */ int32 tuwc = 0; /* word count */

1
PDP10/pdp10_xtnd.c
View file

@ -140,7 +140,6 @@
#define ED_SKPA 0700 /* skip always */ #define ED_SKPA 0700 /* skip always */
extern int32 rlog; extern int32 rlog;
extern jmp_buf save_env;
extern d10 Read (int32 ea, int32 prv); extern d10 Read (int32 ea, int32 prv);
extern void Write (int32 ea, d10 val, int32 prv); extern void Write (int32 ea, d10 val, int32 prv);

1
PDP11/pdp11_cis.c
View file

@ -175,7 +175,6 @@ static DSTR Dstr0 = { 0, {0, 0, 0, 0} };
extern int32 isenable, dsenable; extern int32 isenable, dsenable;
extern int32 N, Z, V, C, fpd, ipl; extern int32 N, Z, V, C, fpd, ipl;
extern int32 R[8], trap_req; extern int32 R[8], trap_req;
extern uint32 cpu_type;
int32 ReadDstr (int32 *dscr, DSTR *dec, int32 flag); int32 ReadDstr (int32 *dscr, DSTR *dec, int32 flag);
void WriteDstr (int32 *dscr, DSTR *dec, int32 flag); void WriteDstr (int32 *dscr, DSTR *dec, int32 flag);

1
PDP11/pdp11_cpumod.c
View file

@ -85,7 +85,6 @@ int32 toy_state = 0;
uint8 toy_data[TOY_LNT] = { 0 }; uint8 toy_data[TOY_LNT] = { 0 };
static int32 clk_tps_map[4] = { 60, 60, 50, 800 }; static int32 clk_tps_map[4] = { 60, 60, 50, 800 };
extern uint16 *M;
extern int32 R[8]; extern int32 R[8];
extern int32 STKLIM, PIRQ; extern int32 STKLIM, PIRQ;
extern int32 clk_fie, clk_fnxm, clk_tps, clk_default; extern int32 clk_fie, clk_fnxm, clk_tps, clk_default;

3
PDP11/pdp11_cr.c
View file

@ -203,7 +203,6 @@
#if defined (VM_PDP10) /* PDP10 version */ #if defined (VM_PDP10) /* PDP10 version */
#include "pdp10_defs.h" #include "pdp10_defs.h"
extern int32 int_req;
#define DFLT_DIS (DEV_DIS) #define DFLT_DIS (DEV_DIS)
#define DFLT_TYPE (UNIT_CD20) /* CD20 (CD11) only */ #define DFLT_TYPE (UNIT_CD20) /* CD20 (CD11) only */
#define CD20_ONLY (1) #define CD20_ONLY (1)
@ -211,14 +210,12 @@ extern int32 int_req;
#define AIECO_REQ (1) /* Requires Augmented Image ECO */ #define AIECO_REQ (1) /* Requires Augmented Image ECO */
#elif defined (VM_VAX) /* VAX version */ #elif defined (VM_VAX) /* VAX version */
#include "vax_defs.h" #include "vax_defs.h"
extern int32 int_req[IPL_HLVL];
#define DFLT_DIS (DEV_QBUS) /* CR11 is programmed I/O only, Qbus OK */ #define DFLT_DIS (DEV_QBUS) /* CR11 is programmed I/O only, Qbus OK */
#define DFLT_TYPE (UNIT_CR11) /* CR11 only */ #define DFLT_TYPE (UNIT_CR11) /* CR11 only */
#define CR11_ONLY (1) #define CR11_ONLY (1)
#define DFLT_CPM 285 #define DFLT_CPM 285
#else /* PDP-11 version */ #else /* PDP-11 version */
#include "pdp11_defs.h" #include "pdp11_defs.h"
extern int32 int_req[IPL_HLVL];
#define DFLT_DIS (DEV_QBUS) /* CR11 is programmed I/O only, Qbus OK */ #define DFLT_DIS (DEV_QBUS) /* CR11 is programmed I/O only, Qbus OK */
#define DFLT_TYPE (UNIT_CR11) /* Default, but changable */ #define DFLT_TYPE (UNIT_CR11) /* Default, but changable */
#define DFLT_CPM 285 #define DFLT_CPM 285

1
PDP11/pdp11_dc.c
View file

@ -78,7 +78,6 @@
#define DCOCSR_CTS 0000002 /* clr to send (RO) */ #define DCOCSR_CTS 0000002 /* clr to send (RO) */
#define DCOCSR_MNT 0000004 /* maint (RWNI) */ #define DCOCSR_MNT 0000004 /* maint (RWNI) */
extern int32 int_req[IPL_HLVL];
extern int32 tmxr_poll; extern int32 tmxr_poll;
uint16 dci_csr[DCX_LINES] = { 0 }; /* control/status */ uint16 dci_csr[DCX_LINES] = { 0 }; /* control/status */

18
PDP11/pdp11_defs.h
View file

@ -180,13 +180,6 @@
#define CPUT(x) ((cpu_type & (x)) != 0) #define CPUT(x) ((cpu_type & (x)) != 0)
#define CPUO(x) ((cpu_opt & (x)) != 0) #define CPUO(x) ((cpu_opt & (x)) != 0)
#define UNIBUS (cpu_opt & BUS_U) #define UNIBUS (cpu_opt & BUS_U)
extern int32 cpu_bme; /* bus map enable */
extern uint32 cpu_model; /* CPU model */
extern uint32 cpu_type; /* model as bit mask */
extern uint32 cpu_opt; /* CPU options */
extern DEVICE cpu_dev;
extern UNIT cpu_unit;
/* Feature sets /* Feature sets
@ -868,6 +861,17 @@ void cpu_set_boot (int32 pc);
#include "pdp11_io_lib.h" #include "pdp11_io_lib.h"
extern int32 cpu_bme; /* bus map enable */
extern uint32 cpu_model; /* CPU model */
extern uint32 cpu_type; /* model as bit mask */
extern uint32 cpu_opt; /* CPU options */
extern int32 autcon_enb; /* autoconfig enable */
extern int32 int_req[IPL_HLVL]; /* interrupt requests */
extern uint16 *M; /* Memory */
extern DEVICE cpu_dev;
extern UNIT cpu_unit;
#if defined (UC15) /* UC15 */ #if defined (UC15) /* UC15 */
#define INIMODEL MOD_1105 #define INIMODEL MOD_1105
#define INIOPTNS SOP_1105 #define INIOPTNS SOP_1105

1
PDP11/pdp11_dl.c
View file

@ -79,7 +79,6 @@
#define DLOCSR_RD (CSR_DONE|CSR_IE|DLOCSR_MNT|DLOCSR_XBR) #define DLOCSR_RD (CSR_DONE|CSR_IE|DLOCSR_MNT|DLOCSR_XBR)
#define DLOCSR_WR (CSR_IE|DLOCSR_MNT|DLOCSR_XBR) #define DLOCSR_WR (CSR_IE|DLOCSR_MNT|DLOCSR_XBR)
extern int32 int_req[IPL_HLVL];
extern int32 tmxr_poll; extern int32 tmxr_poll;
uint16 dli_csr[DLX_LINES] = { 0 }; /* control/status */ uint16 dli_csr[DLX_LINES] = { 0 }; /* control/status */

3
PDP11/pdp11_dz.c
View file

@ -62,17 +62,14 @@
#include "pdp10_defs.h" #include "pdp10_defs.h"
#define RANK_DZ 0 /* no autoconfig */ #define RANK_DZ 0 /* no autoconfig */
#define DZ_8B_DFLT 0 #define DZ_8B_DFLT 0
extern int32 int_req;
#elif defined (VM_VAX) /* VAX version */ #elif defined (VM_VAX) /* VAX version */
#include "vax_defs.h" #include "vax_defs.h"
#define DZ_8B_DFLT TT_MODE_8B #define DZ_8B_DFLT TT_MODE_8B
extern int32 int_req[IPL_HLVL];
#else /* PDP-11 version */ #else /* PDP-11 version */
#include "pdp11_defs.h" #include "pdp11_defs.h"
#define DZ_8B_DFLT TT_MODE_8B #define DZ_8B_DFLT TT_MODE_8B
extern int32 int_req[IPL_HLVL];
#endif #endif
#include "sim_sock.h" #include "sim_sock.h"

4
PDP11/pdp11_hk.c
View file

@ -525,8 +525,6 @@ BITFIELD *hk_reg_bits[] = {
#define HKDEB_TRC 010 /* trace */ #define HKDEB_TRC 010 /* trace */
#define HKDEB_INT 020 /* interrupts */ #define HKDEB_INT 020 /* interrupts */
extern int32 int_req[IPL_HLVL];
uint16 *hkxb = NULL; /* xfer buffer */ uint16 *hkxb = NULL; /* xfer buffer */
int32 hkcs1 = 0; /* control/status 1 */ int32 hkcs1 = 0; /* control/status 1 */
int32 hkwc = 0; /* word count */ int32 hkwc = 0; /* word count */
@ -1566,8 +1564,6 @@ return pdp11_bad_block (uptr, HK_NUMSC, HK_NUMWD);
#if defined (VM_PDP11) #if defined (VM_PDP11)
extern uint16 *M;
/* Device bootstrap - does not clear CSR when done */ /* Device bootstrap - does not clear CSR when done */
#define BOOT_START 02000 /* start */ #define BOOT_START 02000 /* start */

2
PDP11/pdp11_io.c
View file

@ -51,8 +51,6 @@
#include "pdp11_defs.h" #include "pdp11_defs.h"
extern uint16 *M;
extern int32 int_req[IPL_HLVL];
extern int32 ub_map[UBM_LNT_LW]; extern int32 ub_map[UBM_LNT_LW];
extern int32 trap_req, ipl; extern int32 trap_req, ipl;
extern int32 uba_last; extern int32 uba_last;

1
PDP11/pdp11_io_lib.c
View file

@ -37,7 +37,6 @@
#include "sim_tmxr.h" #include "sim_tmxr.h"
#include "sim_ether.h" #include "sim_ether.h"
extern int32 autcon_enb;
extern int32 int_vec[IPL_HLVL][32]; extern int32 int_vec[IPL_HLVL][32];
#if !defined(VEC_SET) #if !defined(VEC_SET)
#define VEC_SET 0 #define VEC_SET 0

2
PDP11/pdp11_lp.c
View file

@ -51,8 +51,6 @@
#define LPTCSR_IMP (CSR_ERR + CSR_DONE + CSR_IE) /* implemented */ #define LPTCSR_IMP (CSR_ERR + CSR_DONE + CSR_IE) /* implemented */
#define LPTCSR_RW (CSR_IE) /* read/write */ #define LPTCSR_RW (CSR_IE) /* read/write */
extern int32 int_req[IPL_HLVL];
int32 lpt_csr = 0; /* control/status */ int32 lpt_csr = 0; /* control/status */
int32 lpt_stopioe = 0; /* stop on error */ int32 lpt_stopioe = 0; /* stop on error */

2
PDP11/pdp11_pclk.c
View file

@ -167,8 +167,6 @@ BITFIELD pclk_notused_bits[] = {
static BITFIELD* bitdefs[] = {pclk_csr_bits, pclk_buf_bits, pclk_ctr_bits, pclk_notused_bits}; static BITFIELD* bitdefs[] = {pclk_csr_bits, pclk_buf_bits, pclk_ctr_bits, pclk_notused_bits};
extern int32 int_req[IPL_HLVL];
uint32 pclk_csr = 0; /* control/status */ uint32 pclk_csr = 0; /* control/status */
uint32 pclk_csb = 0; /* count set buffer */ uint32 pclk_csb = 0; /* count set buffer */
uint32 pclk_ctr = 0; /* counter */ uint32 pclk_ctr = 0; /* counter */

3
PDP11/pdp11_pt.c
View file

@ -35,17 +35,14 @@
#if defined (VM_PDP10) /* PDP10 version */ #if defined (VM_PDP10) /* PDP10 version */
#include "pdp10_defs.h" #include "pdp10_defs.h"
#define PT_DIS DEV_DIS #define PT_DIS DEV_DIS
extern int32 int_req;
#elif defined (VM_VAX) /* VAX version */ #elif defined (VM_VAX) /* VAX version */
#include "vax_defs.h" #include "vax_defs.h"
#define PT_DIS DEV_DIS #define PT_DIS DEV_DIS
extern int32 int_req[IPL_HLVL];
#else /* PDP-11 version */ #else /* PDP-11 version */
#include "pdp11_defs.h" #include "pdp11_defs.h"
#define PT_DIS 0 #define PT_DIS 0
extern int32 int_req[IPL_HLVL];
#endif #endif
#define PTRCSR_IMP (CSR_ERR+CSR_BUSY+CSR_DONE+CSR_IE) /* paper tape reader */ #define PTRCSR_IMP (CSR_ERR+CSR_BUSY+CSR_DONE+CSR_IE) /* paper tape reader */

1
PDP11/pdp11_rc.c
View file

@ -147,7 +147,6 @@
#define GET_POS(x) ((int) fmod (sim_gtime() / ((double) (x)), \ #define GET_POS(x) ((int) fmod (sim_gtime() / ((double) (x)), \
((double) RC_NUMWD))) ((double) RC_NUMWD)))
extern int32 int_req[IPL_HLVL];
extern int32 R[]; extern int32 R[];
static uint32 rc_la = 0; /* look-ahead */ static uint32 rc_la = 0; /* look-ahead */

3
PDP11/pdp11_rf.c
View file

@ -110,9 +110,6 @@
#define GET_POS(x) ((int) fmod (sim_gtime() / ((double) (x)), \ #define GET_POS(x) ((int) fmod (sim_gtime() / ((double) (x)), \
((double) RF_NUMWD))) ((double) RF_NUMWD)))
extern uint16 *M;
extern int32 int_req[IPL_HLVL];
uint32 rf_cs = 0; /* status register */ uint32 rf_cs = 0; /* status register */
uint32 rf_cma = 0; uint32 rf_cma = 0;
uint32 rf_wc = 0; uint32 rf_wc = 0;

3
PDP11/pdp11_rh.c
View file

@ -160,9 +160,6 @@ typedef struct {
MBACTX massbus[MBA_NUM]; MBACTX massbus[MBA_NUM];
extern uint16 *M;
extern int32 int_req[IPL_HLVL];
t_stat mba_reset (DEVICE *dptr); t_stat mba_reset (DEVICE *dptr);
t_stat mba_rd (int32 *val, int32 pa, int32 access); t_stat mba_rd (int32 *val, int32 pa, int32 access);
t_stat mba_wr (int32 val, int32 pa, int32 access); t_stat mba_wr (int32 val, int32 pa, int32 access);

3
PDP11/pdp11_rk.c
View file

@ -69,13 +69,11 @@
#if defined (VM_VAX) /* VAX version */ #if defined (VM_VAX) /* VAX version */
#include "vax_defs.h" #include "vax_defs.h"
extern int32 int_req[IPL_HLVL];
#define DMASK 0xFFFF #define DMASK 0xFFFF
#define RK_DIS DEV_DIS #define RK_DIS DEV_DIS
#else /* PDP-11 version */ #else /* PDP-11 version */
#include "pdp11_defs.h" #include "pdp11_defs.h"
extern int32 int_req[IPL_HLVL];
#define RK_DIS 0 #define RK_DIS 0
#endif #endif
@ -931,7 +929,6 @@ static const uint16 boot_rom[] = {
t_stat rk_boot (int32 unitno, DEVICE *dptr) t_stat rk_boot (int32 unitno, DEVICE *dptr)
{ {
size_t i; size_t i;
extern uint16 *M; /* memory */
for (i = 0; i < BOOT_LEN; i++) for (i = 0; i < BOOT_LEN; i++)
M[(BOOT_START >> 1) + i] = boot_rom[i]; M[(BOOT_START >> 1) + i] = boot_rom[i];

3
PDP11/pdp11_rl.c
View file

@ -225,8 +225,6 @@
#define RLBAE_IMP (0000077) /* implemented */ #define RLBAE_IMP (0000077) /* implemented */
extern int32 int_req[IPL_HLVL];
uint16 *rlxb = NULL; /* xfer buffer */ uint16 *rlxb = NULL; /* xfer buffer */
int32 rlcs = 0; /* control/status */ int32 rlcs = 0; /* control/status */
int32 rlba = 0; /* memory address */ int32 rlba = 0; /* memory address */
@ -1209,7 +1207,6 @@ static const uint16 boot_rom[] = {
t_stat rl_boot (int32 unitno, DEVICE *dptr) t_stat rl_boot (int32 unitno, DEVICE *dptr)
{ {
size_t i; size_t i;
extern uint16 *M;
for (i = 0; i < BOOT_LEN; i++) for (i = 0; i < BOOT_LEN; i++)
M[(BOOT_START >> 1) + i] = boot_rom[i]; M[(BOOT_START >> 1) + i] = boot_rom[i];

1
PDP11/pdp11_rp.c
View file

@ -1472,7 +1472,6 @@ static const uint16 boot_rom[] = {
t_stat rp_boot (int32 unitno, DEVICE *dptr) t_stat rp_boot (int32 unitno, DEVICE *dptr)
{ {
size_t i; size_t i;
extern uint16 *M;
UNIT *uptr = dptr->units + unitno; UNIT *uptr = dptr->units + unitno;
for (i = 0; i < BOOT_LEN; i++) for (i = 0; i < BOOT_LEN; i++)

4
PDP11/pdp11_rq.c
View file

@ -114,7 +114,6 @@ extern int32 fault_PC;
#define RQ_XTIME 500 #define RQ_XTIME 500
#define OLDPC MMR2 #define OLDPC MMR2
extern int32 MMR2; extern int32 MMR2;
extern uint32 cpu_opt;
#endif #endif
#if !defined (RQ_NUMCT) #if !defined (RQ_NUMCT)
@ -752,8 +751,6 @@ static struct ctlrtyp ctlr_tab[] = {
{ 0 } { 0 }
}; };
extern int32 int_req[IPL_HLVL];
int32 rq_itime = 450; /* init time, except */ int32 rq_itime = 450; /* init time, except */
int32 rq_itime4 = 10; /* stage 4 */ int32 rq_itime4 = 10; /* stage 4 */
int32 rq_qtime = RQ_QTIME; /* queue time */ int32 rq_qtime = RQ_QTIME; /* queue time */
@ -2994,7 +2991,6 @@ static const uint16 boot_rom[] = {
t_stat rq_boot (int32 unitno, DEVICE *dptr) t_stat rq_boot (int32 unitno, DEVICE *dptr)
{ {
size_t i; size_t i;
extern uint16 *M;
DIB *dibp = (DIB *) dptr->ctxt; DIB *dibp = (DIB *) dptr->ctxt;
for (i = 0; i < BOOT_LEN; i++) for (i = 0; i < BOOT_LEN; i++)

1
PDP11/pdp11_rs.c
View file

@ -685,7 +685,6 @@ static const uint16 boot_rom[] = {
t_stat rs_boot (int32 unitno, DEVICE *dptr) t_stat rs_boot (int32 unitno, DEVICE *dptr)
{ {
size_t i; size_t i;
extern uint16 *M;
for (i = 0; i < BOOT_LEN; i++) for (i = 0; i < BOOT_LEN; i++)
M[(BOOT_START >> 1) + i] = boot_rom[i]; M[(BOOT_START >> 1) + i] = boot_rom[i];

3
PDP11/pdp11_rx.c
View file

@ -109,8 +109,6 @@
#define TRACK u3 /* current track */ #define TRACK u3 /* current track */
#define CALC_DA(t,s) (((t) * RX_NUMSC) + ((s) - 1)) * RX_NUMBY #define CALC_DA(t,s) (((t) * RX_NUMSC) + ((s) - 1)) * RX_NUMBY
extern int32 int_req[IPL_HLVL];
int32 rx_csr = 0; /* control/status */ int32 rx_csr = 0; /* control/status */
int32 rx_dbr = 0; /* data buffer */ int32 rx_dbr = 0; /* data buffer */
int32 rx_esr = 0; /* error status */ int32 rx_esr = 0; /* error status */
@ -526,7 +524,6 @@ static const uint16 boot_rom[] = {
t_stat rx_boot (int32 unitno, DEVICE *dptr) t_stat rx_boot (int32 unitno, DEVICE *dptr)
{ {
size_t i; size_t i;
extern uint16 *M;
for (i = 0; i < BOOT_LEN; i++) for (i = 0; i < BOOT_LEN; i++)
M[(BOOT_START >> 1) + i] = boot_rom[i]; M[(BOOT_START >> 1) + i] = boot_rom[i];

4
PDP11/pdp11_ry.c
View file

@ -45,17 +45,14 @@
#if defined (VM_PDP10) /* PDP10 version */ #if defined (VM_PDP10) /* PDP10 version */
#include "pdp10_defs.h" #include "pdp10_defs.h"
extern int32 int_req;
#define DEV_DISI DEV_DIS #define DEV_DISI DEV_DIS
#elif defined (VM_VAX) /* VAX version */ #elif defined (VM_VAX) /* VAX version */
#include "vax_defs.h" #include "vax_defs.h"
extern int32 int_req[IPL_HLVL];
#define DEV_DISI 0 #define DEV_DISI 0
#else /* PDP-11 version */ #else /* PDP-11 version */
#include "pdp11_defs.h" #include "pdp11_defs.h"
extern int32 int_req[IPL_HLVL];
#define DEV_DISI DEV_DIS #define DEV_DISI DEV_DIS
#endif #endif
@ -692,7 +689,6 @@ static const uint16 boot_rom[] = {
t_stat ry_boot (int32 unitno, DEVICE *dptr) t_stat ry_boot (int32 unitno, DEVICE *dptr)
{ {
size_t i; size_t i;
extern uint16 *M;
if ((ry_unit[unitno & RX_M_NUMDR].flags & UNIT_DEN) == 0) if ((ry_unit[unitno & RX_M_NUMDR].flags & UNIT_DEN) == 0)
return SCPE_NOFNC; return SCPE_NOFNC;

3
PDP11/pdp11_stddev.c
View file

@ -72,9 +72,6 @@
#define CLKCSR_RW (CSR_IE) #define CLKCSR_RW (CSR_IE)
#define CLK_DELAY 16667 #define CLK_DELAY 16667
extern int32 int_req[IPL_HLVL];
extern uint32 cpu_type;
int32 tti_csr = 0; /* control/status */ int32 tti_csr = 0; /* control/status */
uint32 tti_buftime; /* time input character arrived */ uint32 tti_buftime; /* time input character arrived */
int32 tto_csr = 0; /* control/status */ int32 tto_csr = 0; /* control/status */

1
PDP11/pdp11_sys.c
View file

@ -116,7 +116,6 @@ extern DEVICE dpv_dev;
extern DEVICE kmc_dev; extern DEVICE kmc_dev;
extern DEVICE uca_dev, ucb_dev; extern DEVICE uca_dev, ucb_dev;
extern REG cpu_reg[]; extern REG cpu_reg[];
extern uint16 *M;
extern int32 saved_PC; extern int32 saved_PC;
/* SCP data structures and interface routines /* SCP data structures and interface routines

3
PDP11/pdp11_ta.c
View file

@ -108,8 +108,6 @@
#define UST_REV (OP_REV) /* last op was rev */ #define UST_REV (OP_REV) /* last op was rev */
#define UST_GAP 01 /* last op hit gap */ #define UST_GAP 01 /* last op hit gap */
extern int32 int_req[IPL_HLVL];
uint32 ta_cs = 0; /* control/status */ uint32 ta_cs = 0; /* control/status */
uint32 ta_idb = 0; /* input data buf */ uint32 ta_idb = 0; /* input data buf */
uint32 ta_odb = 0; /* output data buf */ uint32 ta_odb = 0; /* output data buf */
@ -661,7 +659,6 @@ static const uint16 boot_rom[] = {
t_stat ta_boot (int32 unitno, DEVICE *dptr) t_stat ta_boot (int32 unitno, DEVICE *dptr)
{ {
size_t i; size_t i;
extern uint16 *M;
for (i = 0; i < BOOT_LEN; i++) for (i = 0; i < BOOT_LEN; i++)
M[(BOOT_START >> 1) + i] = boot_rom[i]; M[(BOOT_START >> 1) + i] = boot_rom[i];

3
PDP11/pdp11_tc.c
View file

@ -108,12 +108,10 @@
#if defined (VM_VAX) /* VAX version */ #if defined (VM_VAX) /* VAX version */
#include "vax_defs.h" #include "vax_defs.h"
extern int32 int_req[IPL_HLVL];
#define DMASK 0xFFFF #define DMASK 0xFFFF
#else /* PDP-11 version */ #else /* PDP-11 version */
#include "pdp11_defs.h" #include "pdp11_defs.h"
extern int32 int_req[IPL_HLVL];
#endif #endif
#define DT_NUMDR 8 /* #drives */ #define DT_NUMDR 8 /* #drives */
@ -1229,7 +1227,6 @@ static const uint16 boot_rom[] = {
t_stat dt_boot (int32 unitno, DEVICE *dptr) t_stat dt_boot (int32 unitno, DEVICE *dptr)
{ {
size_t i; size_t i;
extern uint16 *M; /* memory */
dt_unit[unitno].pos = DT_EZLIN; dt_unit[unitno].pos = DT_EZLIN;
for (i = 0; i < BOOT_LEN; i++) for (i = 0; i < BOOT_LEN; i++)

5
PDP11/pdp11_td.c
View file

@ -447,13 +447,11 @@ OP CODE 11 (Resened)
*/ */
#if defined (VM_VAX) /* VAX version */ #if defined (VM_VAX) /* VAX version */
#include "vax_defs.h" #include "vax_defs.h"
extern int32 int_req[IPL_HLVL];
#else /* PDP-11 version */ #else /* PDP-11 version */
#include "pdp11_defs.h" #include "pdp11_defs.h"
extern int32 int_req[IPL_HLVL];
#endif #endif
#include "pdp11_td.h" #include "pdp11_td.h"
@ -1588,7 +1586,6 @@ return td_reset_ctlr (ctlr);
static t_stat td_boot (int32 unitno, DEVICE *dptr) static t_stat td_boot (int32 unitno, DEVICE *dptr)
{ {
size_t i; size_t i;
extern uint16 *M; /* memory */
for (i = 0; i < BOOT_LEN; i++) for (i = 0; i < BOOT_LEN; i++)
M[(BOOT_START >> 1) + i] = boot_rom[i]; M[(BOOT_START >> 1) + i] = boot_rom[i];

3
PDP11/pdp11_tm.c
View file

@ -153,9 +153,6 @@
#define RDL_CLK 0100000 /* 10 Khz clock */ #define RDL_CLK 0100000 /* 10 Khz clock */
extern uint16 *M; /* memory */
extern int32 int_req[IPL_HLVL];
uint8 *tmxb = NULL; /* xfer buffer */ uint8 *tmxb = NULL; /* xfer buffer */
int32 tm_sta = 0; /* status register */ int32 tm_sta = 0; /* status register */
int32 tm_cmd = 0; /* command register */ int32 tm_cmd = 0; /* command register */

4
PDP11/pdp11_tq.c
View file

@ -84,7 +84,6 @@
#include "pdp11_defs.h" #include "pdp11_defs.h"
#define INIT_TYPE TQ5_TYPE #define INIT_TYPE TQ5_TYPE
#define INIT_CAP TQ5_CAP #define INIT_CAP TQ5_CAP
extern uint32 cpu_opt;
#endif #endif
#include "pdp11_uqssp.h" #include "pdp11_uqssp.h"
@ -245,8 +244,6 @@ static struct drvtyp drv_tab[] = {
/* Data */ /* Data */
extern int32 int_req[IPL_HLVL];
uint32 tq_sa = 0; /* status, addr */ uint32 tq_sa = 0; /* status, addr */
uint32 tq_saw = 0; /* written data */ uint32 tq_saw = 0; /* written data */
uint32 tq_s1dat = 0; /* S1 data */ uint32 tq_s1dat = 0; /* S1 data */
@ -2210,7 +2207,6 @@ static const uint16 boot_rom[] = {
t_stat tq_boot (int32 unitno, DEVICE *dptr) t_stat tq_boot (int32 unitno, DEVICE *dptr)
{ {
size_t i; size_t i;
extern uint16 *M;
for (i = 0; i < BOOT_LEN; i++) for (i = 0; i < BOOT_LEN; i++)
M[(BOOT_START >> 1) + i] = boot_rom[i]; M[(BOOT_START >> 1) + i] = boot_rom[i];

4
PDP11/pdp11_ts.c
View file

@ -99,7 +99,6 @@
#else /* PDP-11 version */ #else /* PDP-11 version */
#include "pdp11_defs.h" #include "pdp11_defs.h"
#define TS_DIS DEV_DIS /* off by default */ #define TS_DIS DEV_DIS /* off by default */
extern uint32 cpu_opt;
#endif #endif
#include "sim_tape.h" #include "sim_tape.h"
@ -268,8 +267,6 @@ extern uint32 cpu_opt;
#define MAX(a,b) (((a) >= (b))? (a): (b)) #define MAX(a,b) (((a) >= (b))? (a): (b))
#define MAX_PLNT 8 /* max pkt length */ #define MAX_PLNT 8 /* max pkt length */
extern int32 int_req[IPL_HLVL];
uint8 *tsxb = NULL; /* xfer buffer */ uint8 *tsxb = NULL; /* xfer buffer */
int32 tssr = 0; /* status register */ int32 tssr = 0; /* status register */
int32 tsba = 0; /* mem addr */ int32 tsba = 0; /* mem addr */
@ -1170,7 +1167,6 @@ static const uint16 boot_rom[] = {
t_stat ts_boot (int32 unitno, DEVICE *dptr) t_stat ts_boot (int32 unitno, DEVICE *dptr)
{ {
size_t i; size_t i;
extern uint16 *M;
sim_tape_rewind (&ts_unit); sim_tape_rewind (&ts_unit);
for (i = 0; i < BOOT_LEN; i++) for (i = 0; i < BOOT_LEN; i++)

1
PDP11/pdp11_tu.c
View file

@ -1046,7 +1046,6 @@ static const uint16 boot_rom[] = {
t_stat tu_boot (int32 unitno, DEVICE *dptr) t_stat tu_boot (int32 unitno, DEVICE *dptr)
{ {
size_t i; size_t i;
extern uint16 *M;
for (i = 0; i < BOOT_LEN; i++) for (i = 0; i < BOOT_LEN; i++)
M[(BOOT_START >> 1) + i] = boot_rom[i]; M[(BOOT_START >> 1) + i] = boot_rom[i];

3
PDP11/pdp11_vh.c
View file

@ -74,13 +74,10 @@ Rank: 32
#if defined (VM_VAX) #if defined (VM_VAX)
#include "vax_defs.h" #include "vax_defs.h"
extern int32 int_req[IPL_HLVL];
#endif #endif
#if defined (VM_PDP11) #if defined (VM_PDP11)
#include "pdp11_defs.h" #include "pdp11_defs.h"
extern int32 int_req[IPL_HLVL];
extern uint32 cpu_opt;
#endif #endif
#include "sim_tmxr.h" #include "sim_tmxr.h"

2
PDP11/pdp11_vt.c
View file

@ -81,7 +81,6 @@
*/ */
#define CYCLE_US (MEMORY_CYCLE*(VT11_DELAY*2+1)) #define CYCLE_US (MEMORY_CYCLE*(VT11_DELAY*2+1))
extern int32 int_req[IPL_HLVL];
extern int32 int_vec[IPL_HLVL][32]; extern int32 int_vec[IPL_HLVL][32];
t_stat vt_rd(int32 *data, int32 PA, int32 access); t_stat vt_rd(int32 *data, int32 PA, int32 access);
@ -348,7 +347,6 @@ vt_boot(int32 unit, DEVICE *dptr)
t_stat r; t_stat r;
char stability[32]; char stability[32];
extern int32 saved_PC; extern int32 saved_PC;
extern uint16 *M;
/* XXX should do something like vt11_set_dpc(&appropriate_ROM_image) */ /* XXX should do something like vt11_set_dpc(&appropriate_ROM_image) */

1
PDP11/pdp11_xq.c
View file

@ -3115,7 +3115,6 @@ t_stat xq_boot (int32 unitno, DEVICE *dptr)
size_t i; size_t i;
DIB *dib = (DIB *)dptr->ctxt; DIB *dib = (DIB *)dptr->ctxt;
extern int32 REGFILE[6][2]; /* R0-R5, two sets */ extern int32 REGFILE[6][2]; /* R0-R5, two sets */
extern uint16 *M; /* Memory */
for (i = 0; i < BOOT_LEN; i++) for (i = 0; i < BOOT_LEN; i++)
M[(BOOT_START >> 1) + i] = boot_rom[i]; M[(BOOT_START >> 1) + i] = boot_rom[i];

4
PDP11/pdp11_xq.h
View file

@ -72,15 +72,11 @@
#include "vax_defs.h" #include "vax_defs.h"
#define XQ_RDX 16 #define XQ_RDX 16
#define XQ_WID 32 #define XQ_WID 32
extern int32 PSL; /* PSL */
extern int32 fault_PC; /* fault PC */
extern int32 int_req[IPL_HLVL];
#define ULTRIX1X ((cpu_idle_mask&VAX_IDLE_ULT1X) && ((cpu_idle_mask & ~VAX_IDLE_ULT1X) == 0)) #define ULTRIX1X ((cpu_idle_mask&VAX_IDLE_ULT1X) && ((cpu_idle_mask & ~VAX_IDLE_ULT1X) == 0))
#else /* PDP-11 version */ #else /* PDP-11 version */
#include "pdp11_defs.h" #include "pdp11_defs.h"
#define XQ_RDX 8 #define XQ_RDX 8
#define XQ_WID 16 #define XQ_WID 16
extern int32 int_req[IPL_HLVL];
#define ULTRIX1X 0 #define ULTRIX1X 0
#endif #endif

3
PDP11/pdp11_xu.h
View file

@ -50,19 +50,16 @@
#include "pdp10_defs.h" #include "pdp10_defs.h"
#define XU_RDX 8 #define XU_RDX 8
#define XU_WID 16 #define XU_WID 16
extern int32 int_req;
#elif defined (VM_VAX) /* VAX version */ #elif defined (VM_VAX) /* VAX version */
#include "vax_defs.h" #include "vax_defs.h"
#define XU_RDX 16 #define XU_RDX 16
#define XU_WID 32 #define XU_WID 32
extern int32 int_req[IPL_HLVL];
#else /* PDP-11 version */ #else /* PDP-11 version */
#include "pdp11_defs.h" #include "pdp11_defs.h"
#define XU_RDX 8 #define XU_RDX 8
#define XU_WID 16 #define XU_WID 16
extern int32 int_req[IPL_HLVL];
#endif /* VM_PDP10 */ #endif /* VM_PDP10 */
#include "sim_ether.h" #include "sim_ether.h"

1
VAX/vax630_defs.h
View file

@ -381,7 +381,6 @@ typedef struct {
#define SET_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] | (INT_##dv) #define SET_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] | (INT_##dv)
#define CLR_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] & ~(INT_##dv) #define CLR_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] & ~(INT_##dv)
#define IORETURN(f,v) ((f)? (v): SCPE_OK) /* cond error return */ #define IORETURN(f,v) ((f)? (v): SCPE_OK) /* cond error return */
extern int32 int_req[IPL_HLVL]; /* intr, IPL 14-17 */
/* Logging */ /* Logging */

1
VAX/vax730_defs.h
View file

@ -349,7 +349,6 @@ typedef struct {
#define SET_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] | (INT_##dv) #define SET_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] | (INT_##dv)
#define CLR_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] & ~(INT_##dv) #define CLR_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] & ~(INT_##dv)
#define IORETURN(f,v) ((f)? (v): SCPE_OK) /* cond error return */ #define IORETURN(f,v) ((f)? (v): SCPE_OK) /* cond error return */
extern int32 int_req[IPL_HLVL]; /* intr, IPL 14-17 */
/* Logging */ /* Logging */

2
VAX/vax730_uba.c
View file

@ -93,8 +93,6 @@ uint32 uba_fmer = 0; /* failing map reg */
uint32 uba_map[UBA_NMAPR] = { 0 }; /* map registers */ uint32 uba_map[UBA_NMAPR] = { 0 }; /* map registers */
int32 autcon_enb = 1; /* autoconfig enable */ int32 autcon_enb = 1; /* autoconfig enable */
extern int32 autcon_enb;
t_stat uba_reset (DEVICE *dptr); t_stat uba_reset (DEVICE *dptr);
const char *uba_description (DEVICE *dptr); const char *uba_description (DEVICE *dptr);
t_stat uba_ex (t_value *vptr, t_addr exta, UNIT *uptr, int32 sw); t_stat uba_ex (t_value *vptr, t_addr exta, UNIT *uptr, int32 sw);

1
VAX/vax750_defs.h
View file

@ -389,7 +389,6 @@ typedef struct {
#define SET_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] | (INT_##dv) #define SET_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] | (INT_##dv)
#define CLR_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] & ~(INT_##dv) #define CLR_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] & ~(INT_##dv)
#define IORETURN(f,v) ((f)? (v): SCPE_OK) /* cond error return */ #define IORETURN(f,v) ((f)? (v): SCPE_OK) /* cond error return */
extern int32 int_req[IPL_HLVL]; /* intr, IPL 14-17 */
/* Logging */ /* Logging */

1
VAX/vax750_uba.c
View file

@ -98,7 +98,6 @@ uint32 uba_dpr[UBA_NDPATH] = { 0 }; /* number data paths */
uint32 uba_map[UBA_NMAPR] = { 0 }; /* map registers */ uint32 uba_map[UBA_NMAPR] = { 0 }; /* map registers */
int32 autcon_enb = 1; /* autoconfig enable */ int32 autcon_enb = 1; /* autoconfig enable */
extern int32 autcon_enb;
extern uint32 nexus_req[NEXUS_HLVL]; extern uint32 nexus_req[NEXUS_HLVL];
t_stat uba_reset (DEVICE *dptr); t_stat uba_reset (DEVICE *dptr);

1
VAX/vax780_defs.h
View file

@ -403,7 +403,6 @@ typedef struct {
#define SET_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] | (INT_##dv) #define SET_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] | (INT_##dv)
#define CLR_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] & ~(INT_##dv) #define CLR_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] & ~(INT_##dv)
#define IORETURN(f,v) ((f)? (v): SCPE_OK) /* cond error return */ #define IORETURN(f,v) ((f)? (v): SCPE_OK) /* cond error return */
extern int32 int_req[IPL_HLVL]; /* intr, IPL 14-17 */
/* Logging */ /* Logging */

1
VAX/vax780_uba.c
View file

@ -177,7 +177,6 @@ uint32 uba_aitime = 250; /* adapter init time */
uint32 uba_uitime = 12250; /* Unibus init time */ uint32 uba_uitime = 12250; /* Unibus init time */
int32 autcon_enb = 1; /* autoconfig enable */ int32 autcon_enb = 1; /* autoconfig enable */
extern int32 autcon_enb;
extern uint32 nexus_req[NEXUS_HLVL]; extern uint32 nexus_req[NEXUS_HLVL];
t_stat uba_svc (UNIT *uptr); t_stat uba_svc (UNIT *uptr);

1
VAX/vax860_defs.h
View file

@ -432,7 +432,6 @@ typedef struct {
#define SET_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] | (INT_##dv) #define SET_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] | (INT_##dv)
#define CLR_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] & ~(INT_##dv) #define CLR_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] & ~(INT_##dv)
#define IORETURN(f,v) ((f)? (v): SCPE_OK) /* cond error return */ #define IORETURN(f,v) ((f)? (v): SCPE_OK) /* cond error return */
extern int32 int_req[IPL_HLVL]; /* intr, IPL 14-17 */
/* Logging */ /* Logging */

5
VAX/vax_defs.h
View file

@ -923,5 +923,10 @@ extern t_stat cpu_set_model (UNIT *uptr, int32 val, CONST char *cptr, void *desc
extern t_stat cpu_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr); extern t_stat cpu_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr);
extern t_stat cpu_model_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr); extern t_stat cpu_model_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr);
extern const uint32 byte_mask[33]; extern const uint32 byte_mask[33];
extern int32 autcon_enb; /* autoconfig enable */
extern int32 int_req[IPL_HLVL]; /* intr, IPL 14-17 */
extern uint32 *M; /* Memory */
extern DEVICE cpu_dev; /* CPU */
extern UNIT cpu_unit; /* CPU */
#endif /* _VAX_DEFS_H */ #endif /* _VAX_DEFS_H */

2
VAX/vax_mmu.h
View file

@ -57,9 +57,9 @@ typedef struct {
} TLBENT; } TLBENT;
extern uint32 *M; extern uint32 *M;
extern int32 mapen; /* map enable */
extern UNIT cpu_unit; extern UNIT cpu_unit;
extern DEVICE cpu_dev; extern DEVICE cpu_dev;
extern int32 mapen; /* map enable */
extern int32 mchk_va, mchk_ref; /* for mcheck */ extern int32 mchk_va, mchk_ref; /* for mcheck */
extern TLBENT stlb[VA_TBSIZE], ptlb[VA_TBSIZE]; extern TLBENT stlb[VA_TBSIZE], ptlb[VA_TBSIZE];

1
VAX/vaxmod_defs.h
View file

@ -431,7 +431,6 @@ typedef struct {
#define SET_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] | (INT_##dv) #define SET_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] | (INT_##dv)
#define CLR_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] & ~(INT_##dv) #define CLR_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] & ~(INT_##dv)
#define IORETURN(f,v) ((f)? (v): SCPE_OK) /* cond error return */ #define IORETURN(f,v) ((f)? (v): SCPE_OK) /* cond error return */
extern int32 int_req[IPL_HLVL]; /* intr, IPL 14-17 */
/* Logging */ /* Logging */