alpha, HP2100, ID16, ID32, I7094, PDP11 and VAX: Fix array REG definitions

Array REGister definitions have been made consistent by passing the
name of the array object.  This allows proper sizing assessment
to occur in the register validation logic.

Some previously described array REGister initializers were not really
arrays.  Some were structures and others were merely pointers to
someplace in memory that it was desirable to view as a scalar array.

Structures or other blob data should now use SAVEDATA.  Virtual
arrays intended to be interpret some part of memory as scalar data
now use VBRDATA initializers.
This commit is contained in:
Mark Pizzolato 2020-03-06 16:29:17 -08:00
parent 5a293ac4ff
commit 80d9393b83
13 changed files with 30 additions and 30 deletions

View file

@ -195,7 +195,7 @@ typedef struct {
{ FLDATA (EDT, di [dev].edt, 0) }, \
{ FLDATA (EOR, di [dev].eor, 0) }, \
\
{ BRDATA (TMR, &di [dev].ifc_timer, 10, CHAR_BIT, sizeof (double)), REG_HRO }, \
{ VBRDATA (TMR, di [dev].ifc_timer, 10, CHAR_BIT, sizeof (double)), REG_HRO }, \
\
{ ORDATA (SC, dev##_dib.select_code, 6), REG_HRO }

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@ -562,7 +562,7 @@ static REG da_reg [] = {
{ BRDATA (ISTATE, if_state, 10, sizeof (IF_STATE) * CHAR_BIT, DA_UNITS), PV_LEFT },
{ BRDATA (ICMD, if_command, 10, sizeof (IF_COMMAND) * CHAR_BIT, DA_UNITS), PV_LEFT },
{ BRDATA (CNVARS, &icd_cntlr, 10, CHAR_BIT, sizeof (CNTLR_VARS) * DA_UNITS), REG_HRO },
{ VBRDATA (CNVARS, icd_cntlr, 10, CHAR_BIT, sizeof (CNTLR_VARS) * DA_UNITS), REG_HRO },
{ NULL }
};

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@ -1032,8 +1032,8 @@ static REG mpx_reg [] = {
{ BRDATA (ACKWAIT, mpx_ack_wait, 10, 10, MPX_PORTS) },
{ BRDATA (PFLAGS, mpx_flags, 2, 12, MPX_PORTS) },
{ BRDATA (RBUF, &mpx_rbuf, 8, 8, MPX_PORTS * RD_BUF_SIZE), REG_A },
{ BRDATA (WBUF, &mpx_wbuf, 8, 8, MPX_PORTS * WR_BUF_SIZE), REG_A },
{ BRDATA (RBUF, mpx_rbuf, 8, 8, MPX_PORTS * RD_BUF_SIZE), REG_A },
{ BRDATA (WBUF, mpx_wbuf, 8, 8, MPX_PORTS * WR_BUF_SIZE), REG_A },
{ BRDATA (GET, mpx_get, 10, 10, MPX_PORTS * 2) },
{ BRDATA (SEP, mpx_sep, 10, 10, MPX_PORTS * 2) },

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@ -316,7 +316,7 @@ REG com_reg[] = {
{ URDATA (NEEDID, coml_unit[0].NEEDID, 8, 1, 0, COM_TLINES, 0) },
{ URDATA (NOECHO, coml_unit[0].NOECHO, 8, 1, 0, COM_TLINES, 0) },
{ URDATA (INPP, coml_unit[0].INPP, 8, 1, 0, COM_TLINES, 0) },
{ BRDATA (FREEQ, &com_free, 10, 16, 2) },
{ VBRDATA (FREEQ, com_free, 10, 16, 2) },
{ BRDATA (INPQ, com_inpq, 10, 16, 2 * COM_TLINES) },
{ BRDATA (OUTQ, com_outq, 10, 16, 2 * COM_TLINES) },
{ BRDATA (PKTB, com_pkt, 10, 16, 2 * COM_PKTSIZ) },

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@ -168,7 +168,7 @@ REG fd_reg[] = {
{ HRDATA (STA, fd_sta, 8) },
{ HRDATA (BUF, fd_db, 8) },
{ HRDATA (LRN, fd_lrn, 16) },
{ BRDATA (ESTA, &fd_es, 16, 8, ES_SIZE * FD_NUMDR) },
{ BRDATA (ESTA, fd_es, 16, 8, ES_SIZE * FD_NUMDR) },
{ BRDATA (DBUF, fdxb, 16, 8, FD_NUMBY) },
{ HRDATA (DBPTR, fd_bptr, 8) },
{ FLDATA (WDV, fd_wdv, 0) },

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@ -136,8 +136,8 @@ REG pas_reg[] = {
{ BRDATA (CMD, pas_cmd, 16, 16, PAS_LINES) },
{ BRDATA (RBUF, pas_rbuf, 16, 8, PAS_LINES) },
{ BRDATA (XBUF, pas_xbuf, 16, 8, PAS_LINES) },
{ BRDATA (IREQ, &int_req[l_PAS], 16, 32, PAS_LINES / 16) },
{ BRDATA (IENB, &int_enb[l_PAS], 16, 32, PAS_LINES / 16) },
{ VBRDATA (IREQ, int_req[l_PAS], 16, 32, PAS_LINES / 16) },
{ VBRDATA (IENB, int_enb[l_PAS], 16, 32, PAS_LINES / 16) },
{ BRDATA (RARM, pas_rarm, 16, 1, PAS_LINES) },
{ BRDATA (XARM, pas_xarm, 16, 1, PAS_LINES) },
{ BRDATA (RCHP, pas_rchp, 16, 1, PAS_LINES) },

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@ -1197,8 +1197,8 @@ REG dmc_reg[] = {
{ BRDATAD (SPEED, dmc_speed, DEV_RDX, 32, DMC_NUMDEVICE, "line speed") },
{ BRDATAD (CORRUPT, dmc_corruption, DEV_RDX, 32, DMC_NUMDEVICE, "data corruption factor (0.1%)") },
{ BRDATAD (DIAG, dmc_microdiag, DEV_RDX, 1, DMC_NUMDEVICE, "Microdiagnostic Enabled") },
{ BRDATAD (PEER, &dmc_peer, DEV_RDX, 8, DMC_NUMDEVICE*PEERSIZE, "peer address:port") },
{ BRDATAD (PORT, &dmc_port, DEV_RDX, 8, DMC_NUMDEVICE*PEERSIZE, "listen port") },
{ BRDATAD (PEER, dmc_peer, DEV_RDX, 8, DMC_NUMDEVICE*PEERSIZE, "peer address:port") },
{ BRDATAD (PORT, dmc_port, DEV_RDX, 8, DMC_NUMDEVICE*PEERSIZE, "listen port") },
{ BRDATAD (BASEADDR, dmc_baseaddr, DEV_RDX, 32, DMC_NUMDEVICE, "program set base address") },
{ BRDATAD (BASESIZE, dmc_basesize, DEV_RDX, 16, DMC_NUMDEVICE, "program set base size") },
{ BRDATAD (MODEM, dmc_modem, DEV_RDX, 8, DMC_NUMDEVICE, "modem control bits") },

View file

@ -988,7 +988,7 @@ REG rq_reg[] = {
{ DRDATAD (I4TIME, rq_itime4, 24, "init stage 4 delay"), PV_LEFT + REG_NZ },
{ DRDATAD (QTIME, rq_qtime, 24, "response time for 'immediate' packets"), PV_LEFT + REG_NZ },
{ DRDATAD (XTIME, rq_xtime, 24, "response time for data transfers"), PV_LEFT + REG_NZ },
{ BRDATAD (PKTS, &rq_ctx.pak, DEV_RDX, 16, sizeof(rq_ctx.pak)/2, "packet buffers, 33W each, 32 entries") },
{ BRDATAD (PKTS, rq_ctx.pak, DEV_RDX, 16, sizeof(rq_ctx.pak)/2, "packet buffers, 33W each, 32 entries") },
{ URDATAD (CPKT, rq_unit[0].cpkt, 10, 5, 0, RQ_NUMDR, 0, "current packet, units 0 to 3") },
{ URDATAD (UCNUM, rq_unit[0].cnum, 10, 5, 0, RQ_NUMDR, 0, "ctrl number, units 0 to 3") },
{ URDATAD (PKTQ, rq_unit[0].pktq, 10, 5, 0, RQ_NUMDR, 0, "packet queue, units 0 to 3") },
@ -1167,7 +1167,7 @@ REG rqb_reg[] = {
{ FLDATA (PRGI, rqb_ctx.prgi, 0), REG_HIDDEN },
{ FLDATA (PIP, rqb_ctx.pip, 0), REG_HIDDEN },
{ BINRDATA(CTYPE, rqb_ctx.ctype, 32), REG_HIDDEN },
{ BRDATAD (PKTS, &rqb_ctx.pak, DEV_RDX, 16, sizeof(rq_ctx.pak)/2, "packet buffers, 33W each, 32 entries") },
{ BRDATAD (PKTS, rqb_ctx.pak, DEV_RDX, 16, sizeof(rq_ctx.pak)/2, "packet buffers, 33W each, 32 entries") },
{ URDATAD (CPKT, rqb_unit[0].cpkt, 10, 5, 0, RQ_NUMDR, 0, "current packet, units 0 to 3") },
{ URDATAD (UCNUM, rqb_unit[0].cnum, 10, 5, 0, RQ_NUMDR, 0, "ctrl number, units 0 to 3") },
{ URDATAD (PKTQ, rqb_unit[0].pktq, 10, 5, 0, RQ_NUMDR, 0, "packet queue, units 0 to 3") },
@ -1240,7 +1240,7 @@ REG rqc_reg[] = {
{ FLDATA (PRGI, rqc_ctx.prgi, 0), REG_HIDDEN },
{ FLDATA (PIP, rqc_ctx.pip, 0), REG_HIDDEN },
{ BINRDATA(CTYPE, rqc_ctx.ctype, 32), REG_HIDDEN },
{ BRDATAD (PKTS, &rqc_ctx.pak, DEV_RDX, 16, sizeof(rq_ctx.pak)/2, "packet buffers, 33W each, 32 entries") },
{ BRDATAD (PKTS, rqc_ctx.pak, DEV_RDX, 16, sizeof(rq_ctx.pak)/2, "packet buffers, 33W each, 32 entries") },
{ URDATAD (CPKT, rqc_unit[0].cpkt, 10, 5, 0, RQ_NUMDR, 0, "current packet, units 0 to 3") },
{ URDATAD (UCNUM, rqc_unit[0].cnum, 10, 5, 0, RQ_NUMDR, 0, "ctrl number, units 0 to 3") },
{ URDATAD (PKTQ, rqc_unit[0].pktq, 10, 5, 0, RQ_NUMDR, 0, "packet queue, units 0 to 3") },
@ -1313,7 +1313,7 @@ REG rqd_reg[] = {
{ FLDATA (PRGI, rqd_ctx.prgi, 0), REG_HIDDEN },
{ FLDATA (PIP, rqd_ctx.pip, 0), REG_HIDDEN },
{ BINRDATA(CTYPE, rqd_ctx.ctype, 32), REG_HIDDEN },
{ BRDATAD (PKTS, &rqd_ctx.pak, DEV_RDX, 16, sizeof(rq_ctx.pak)/2, "packet buffers, 33W each, 32 entries") },
{ BRDATAD (PKTS, rqd_ctx.pak, DEV_RDX, 16, sizeof(rq_ctx.pak)/2, "packet buffers, 33W each, 32 entries") },
{ URDATAD (CPKT, rqd_unit[0].cpkt, 10, 5, 0, RQ_NUMDR, 0, "current packet, units 0 to 3") },
{ URDATAD (UCNUM, rqd_unit[0].cnum, 10, 5, 0, RQ_NUMDR, 0, "ctrl number, units 0 to 3") },
{ URDATAD (PKTQ, rqd_unit[0].pktq, 10, 5, 0, RQ_NUMDR, 0, "packet queue, units 0 to 3") },

View file

@ -464,7 +464,7 @@ REG tq_reg[] = {
{ DRDATAD (QTIME, tq_qtime, 24, "response time for 'immediate' packets"), PV_LEFT + REG_NZ },
{ DRDATAD (XTIME, tq_xtime, 24, "response time for data transfers"), PV_LEFT + REG_NZ },
{ DRDATAD (RWTIME, tq_rwtime, 32, "rewind time 2 sec (adjusted later)"), PV_LEFT + REG_NZ },
{ BRDATAD (PKTS, &tq_pkt, DEV_RDX, 16, TQ_NPKTS * (TQ_PKT_SIZE_W + 1), "packet buffers, 33W each, 32 entries") },
{ BRDATAD (PKTS, tq_pkt, DEV_RDX, 16, TQ_NPKTS * (TQ_PKT_SIZE_W + 1), "packet buffers, 33W each, 32 entries") },
{ URDATAD (PLUG, tq_unit[0].unit_plug, 10, 32, 0, TQ_NUMDR, PV_LEFT | REG_RO, "unit plug value, units 0 to 3") },
{ DRDATA (DEVTYPE, tq_typ, 2), REG_HRO },
{ DRDATA (DEVCAP, drv_tab[TQU_TYPE].cap, T_ADDR_W), PV_LEFT | REG_HRO },

View file

@ -400,9 +400,9 @@ REG xqa_reg[] = {
{ GRDATA ( SETUP_L2, xqa.setup.l2, XQ_RDX, 32, 0), REG_HRO},
{ GRDATA ( SETUP_L3, xqa.setup.l3, XQ_RDX, 32, 0), REG_HRO},
{ GRDATA ( SETUP_SAN, xqa.setup.sanity_timer, XQ_RDX, 32, 0), REG_HRO},
{ BRDATA ( SETUP_MACS, &xqa.setup.macs, XQ_RDX, 8, sizeof(xqa.setup.macs)), REG_HRO},
{ BRDATA ( STATS, &xqa.stats, XQ_RDX, 8, sizeof(xqa.stats)), REG_HRO},
{ BRDATA ( TURBO_INIT, &xqa.init, XQ_RDX, 8, sizeof(xqa.init)), REG_HRO},
{ SAVEDATA ( SETUP_MACS, xqa.setup.macs) },
{ SAVEDATA ( STATS, xqa.stats) },
{ SAVEDATA ( TURBO_INIT, xqa.init) },
{ GRDATADF ( SRR, xqa.srr, XQ_RDX, 16, 0, "Status and Response Register", xq_srr_bits), REG_FIT },
{ GRDATAD ( SRQR, xqa.srqr, XQ_RDX, 16, 0, "Synchronous Request Register"), REG_FIT },
{ GRDATAD ( IBA, xqa.iba, XQ_RDX, 32, 0, "Init Block Address Register"), REG_FIT },
@ -464,9 +464,9 @@ REG xqb_reg[] = {
{ GRDATA ( SETUP_L2, xqb.setup.l2, XQ_RDX, 32, 0), REG_HRO},
{ GRDATA ( SETUP_L3, xqb.setup.l3, XQ_RDX, 32, 0), REG_HRO},
{ GRDATA ( SETUP_SAN, xqb.setup.sanity_timer, XQ_RDX, 32, 0), REG_HRO},
{ BRDATA ( SETUP_MACS, &xqb.setup.macs, XQ_RDX, 8, sizeof(xqb.setup.macs)), REG_HRO},
{ BRDATA ( STATS, &xqb.stats, XQ_RDX, 8, sizeof(xqb.stats)), REG_HRO},
{ BRDATA ( TURBO_INIT, &xqb.init, XQ_RDX, 8, sizeof(xqb.init)), REG_HRO},
{ SAVEDATA ( SETUP_MACS, xqb.setup.macs) },
{ SAVEDATA ( STATS, xqb.stats) },
{ SAVEDATA ( TURBO_INIT, xqb.init) },
{ GRDATADF ( SRR, xqb.srr, XQ_RDX, 16, 0, "Status and Response Register", xq_srr_bits), REG_FIT },
{ GRDATAD ( SRQR, xqb.srqr, XQ_RDX, 16, 0, "Synchronous Request Register"), REG_FIT },
{ GRDATAD ( IBA, xqb.iba, XQ_RDX, 32, 0, "Init Block Address Register"), REG_FIT },

View file

@ -192,8 +192,8 @@ REG xua_reg[] = {
{ GRDATA ( TYPE, xua.type, XU_RDX, 32, 0), REG_FIT },
{ FLDATA ( INT, xua.irq, 0) },
{ GRDATA ( IDTMR, xua.idtmr, XU_RDX, 32, 0), REG_HRO},
{ BRDATA ( SETUP, &xua.setup, XU_RDX, 8, sizeof(xua.setup)), REG_HRO},
{ BRDATA ( STATS, &xua.stats, XU_RDX, 8, sizeof(xua.stats)), REG_HRO},
{ SAVEDATA ( SETUP, xua.setup) },
{ SAVEDATA ( STATS, xua.stats) },
{ GRDATA ( CSR0, xua.pcsr0, XU_RDX, 16, 0), REG_FIT },
{ GRDATA ( CSR1, xua.pcsr1, XU_RDX, 16, 0), REG_FIT },
{ GRDATA ( CSR2, xua.pcsr2, XU_RDX, 16, 0), REG_FIT },
@ -269,8 +269,8 @@ REG xub_reg[] = {
{ GRDATA ( TYPE, xub.type, XU_RDX, 32, 0), REG_FIT },
{ FLDATA ( INT, xub.irq, 0) },
{ GRDATA ( IDTMR, xub.idtmr, XU_RDX, 32, 0), REG_HRO},
{ BRDATA ( SETUP, &xub.setup, XU_RDX, 8, sizeof(xub.setup)), REG_HRO},
{ BRDATA ( STATS, &xub.stats, XU_RDX, 8, sizeof(xub.stats)), REG_HRO},
{ SAVEDATA ( SETUP, xub.setup) },
{ SAVEDATA ( STATS, xub.stats) },
{ GRDATA ( CSR0, xub.pcsr0, XU_RDX, 16, 0), REG_FIT },
{ GRDATA ( CSR1, xub.pcsr1, XU_RDX, 16, 0), REG_FIT },
{ GRDATA ( CSR2, xub.pcsr2, XU_RDX, 16, 0), REG_FIT },

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@ -88,7 +88,7 @@ REG xs_reg[] = {
{ GRDATA ( SA4, xs_var.mac[4], 16, 8, 0), REG_RO|REG_FIT },
{ GRDATA ( SA5, xs_var.mac[5], 16, 8, 0), REG_RO|REG_FIT },
{ FLDATA ( INT, xs_var.irq, 0) },
{ BRDATA ( SETUP, &xs_var.setup, DEV_RDX, 8, sizeof(xs_var.setup)), REG_HRO },
{ SAVEDATA ( SETUP, xs_var.setup) },
{ GRDATA ( CSR0, xs_var.csr0, DEV_RDX, 16, 0), REG_FIT },
{ GRDATA ( CSR1, xs_var.csr1, DEV_RDX, 16, 0), REG_FIT },
{ GRDATA ( CSR2, xs_var.csr2, DEV_RDX, 16, 0), REG_FIT },

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@ -98,14 +98,14 @@ REG tlb_reg[] = {
{ HRDATA (ISPAGE, itlb_spage, 2), REG_HRO },
{ HRDATA (IASN, itlb_asn, ITB_ASN_WIDTH) },
{ HRDATA (INLU, itlb_nlu, ITLB_WIDTH) },
{ BRDATA (IMINI, &i_mini_tlb, 16, 32, TLB_ESIZE) },
{ BRDATA (ITLB, &itlb, 16, 32, ITLB_SIZE*TLB_ESIZE) },
{ VBRDATA (IMINI, i_mini_tlb, 16, 32, TLB_ESIZE) },
{ VBRDATA (ITLB, itlb, 16, 32, ITLB_SIZE*TLB_ESIZE) },
{ HRDATA (DCM, dtlb_cm, 2) },
{ HRDATA (DSPAGE, dtlb_spage, 2), REG_HRO },
{ HRDATA (DASN, dtlb_asn, DTB_ASN_WIDTH) },
{ HRDATA (DNLU, dtlb_nlu, DTLB_WIDTH) },
{ BRDATA (DMINI, &d_mini_tlb, 16, 32, TLB_ESIZE) },
{ BRDATA (DTLB, &dtlb, 16, 32, DTLB_SIZE*TLB_ESIZE) },
{ VBRDATA (DMINI, d_mini_tlb, 16, 32, TLB_ESIZE) },
{ VBRDATA (DTLB, dtlb, 16, 32, DTLB_SIZE*TLB_ESIZE) },
{ NULL }
};