alpha, HP2100, ID16, ID32, I7094, PDP11 and VAX: Fix array REG definitions
Array REGister definitions have been made consistent by passing the name of the array object. This allows proper sizing assessment to occur in the register validation logic. Some previously described array REGister initializers were not really arrays. Some were structures and others were merely pointers to someplace in memory that it was desirable to view as a scalar array. Structures or other blob data should now use SAVEDATA. Virtual arrays intended to be interpret some part of memory as scalar data now use VBRDATA initializers.
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13 changed files with 30 additions and 30 deletions
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@ -195,7 +195,7 @@ typedef struct {
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{ FLDATA (EDT, di [dev].edt, 0) }, \
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{ FLDATA (EOR, di [dev].eor, 0) }, \
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\
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{ BRDATA (TMR, &di [dev].ifc_timer, 10, CHAR_BIT, sizeof (double)), REG_HRO }, \
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{ VBRDATA (TMR, di [dev].ifc_timer, 10, CHAR_BIT, sizeof (double)), REG_HRO }, \
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\
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{ ORDATA (SC, dev##_dib.select_code, 6), REG_HRO }
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@ -562,7 +562,7 @@ static REG da_reg [] = {
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{ BRDATA (ISTATE, if_state, 10, sizeof (IF_STATE) * CHAR_BIT, DA_UNITS), PV_LEFT },
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{ BRDATA (ICMD, if_command, 10, sizeof (IF_COMMAND) * CHAR_BIT, DA_UNITS), PV_LEFT },
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{ BRDATA (CNVARS, &icd_cntlr, 10, CHAR_BIT, sizeof (CNTLR_VARS) * DA_UNITS), REG_HRO },
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{ VBRDATA (CNVARS, icd_cntlr, 10, CHAR_BIT, sizeof (CNTLR_VARS) * DA_UNITS), REG_HRO },
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{ NULL }
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};
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@ -1032,8 +1032,8 @@ static REG mpx_reg [] = {
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{ BRDATA (ACKWAIT, mpx_ack_wait, 10, 10, MPX_PORTS) },
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{ BRDATA (PFLAGS, mpx_flags, 2, 12, MPX_PORTS) },
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{ BRDATA (RBUF, &mpx_rbuf, 8, 8, MPX_PORTS * RD_BUF_SIZE), REG_A },
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{ BRDATA (WBUF, &mpx_wbuf, 8, 8, MPX_PORTS * WR_BUF_SIZE), REG_A },
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{ BRDATA (RBUF, mpx_rbuf, 8, 8, MPX_PORTS * RD_BUF_SIZE), REG_A },
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{ BRDATA (WBUF, mpx_wbuf, 8, 8, MPX_PORTS * WR_BUF_SIZE), REG_A },
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{ BRDATA (GET, mpx_get, 10, 10, MPX_PORTS * 2) },
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{ BRDATA (SEP, mpx_sep, 10, 10, MPX_PORTS * 2) },
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@ -316,7 +316,7 @@ REG com_reg[] = {
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{ URDATA (NEEDID, coml_unit[0].NEEDID, 8, 1, 0, COM_TLINES, 0) },
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{ URDATA (NOECHO, coml_unit[0].NOECHO, 8, 1, 0, COM_TLINES, 0) },
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{ URDATA (INPP, coml_unit[0].INPP, 8, 1, 0, COM_TLINES, 0) },
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{ BRDATA (FREEQ, &com_free, 10, 16, 2) },
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{ VBRDATA (FREEQ, com_free, 10, 16, 2) },
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{ BRDATA (INPQ, com_inpq, 10, 16, 2 * COM_TLINES) },
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{ BRDATA (OUTQ, com_outq, 10, 16, 2 * COM_TLINES) },
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{ BRDATA (PKTB, com_pkt, 10, 16, 2 * COM_PKTSIZ) },
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@ -168,7 +168,7 @@ REG fd_reg[] = {
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{ HRDATA (STA, fd_sta, 8) },
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{ HRDATA (BUF, fd_db, 8) },
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{ HRDATA (LRN, fd_lrn, 16) },
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{ BRDATA (ESTA, &fd_es, 16, 8, ES_SIZE * FD_NUMDR) },
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{ BRDATA (ESTA, fd_es, 16, 8, ES_SIZE * FD_NUMDR) },
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{ BRDATA (DBUF, fdxb, 16, 8, FD_NUMBY) },
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{ HRDATA (DBPTR, fd_bptr, 8) },
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{ FLDATA (WDV, fd_wdv, 0) },
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@ -136,8 +136,8 @@ REG pas_reg[] = {
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{ BRDATA (CMD, pas_cmd, 16, 16, PAS_LINES) },
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{ BRDATA (RBUF, pas_rbuf, 16, 8, PAS_LINES) },
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{ BRDATA (XBUF, pas_xbuf, 16, 8, PAS_LINES) },
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{ BRDATA (IREQ, &int_req[l_PAS], 16, 32, PAS_LINES / 16) },
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{ BRDATA (IENB, &int_enb[l_PAS], 16, 32, PAS_LINES / 16) },
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{ VBRDATA (IREQ, int_req[l_PAS], 16, 32, PAS_LINES / 16) },
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{ VBRDATA (IENB, int_enb[l_PAS], 16, 32, PAS_LINES / 16) },
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{ BRDATA (RARM, pas_rarm, 16, 1, PAS_LINES) },
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{ BRDATA (XARM, pas_xarm, 16, 1, PAS_LINES) },
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{ BRDATA (RCHP, pas_rchp, 16, 1, PAS_LINES) },
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@ -1197,8 +1197,8 @@ REG dmc_reg[] = {
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{ BRDATAD (SPEED, dmc_speed, DEV_RDX, 32, DMC_NUMDEVICE, "line speed") },
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{ BRDATAD (CORRUPT, dmc_corruption, DEV_RDX, 32, DMC_NUMDEVICE, "data corruption factor (0.1%)") },
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{ BRDATAD (DIAG, dmc_microdiag, DEV_RDX, 1, DMC_NUMDEVICE, "Microdiagnostic Enabled") },
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{ BRDATAD (PEER, &dmc_peer, DEV_RDX, 8, DMC_NUMDEVICE*PEERSIZE, "peer address:port") },
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{ BRDATAD (PORT, &dmc_port, DEV_RDX, 8, DMC_NUMDEVICE*PEERSIZE, "listen port") },
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{ BRDATAD (PEER, dmc_peer, DEV_RDX, 8, DMC_NUMDEVICE*PEERSIZE, "peer address:port") },
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{ BRDATAD (PORT, dmc_port, DEV_RDX, 8, DMC_NUMDEVICE*PEERSIZE, "listen port") },
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{ BRDATAD (BASEADDR, dmc_baseaddr, DEV_RDX, 32, DMC_NUMDEVICE, "program set base address") },
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{ BRDATAD (BASESIZE, dmc_basesize, DEV_RDX, 16, DMC_NUMDEVICE, "program set base size") },
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{ BRDATAD (MODEM, dmc_modem, DEV_RDX, 8, DMC_NUMDEVICE, "modem control bits") },
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@ -988,7 +988,7 @@ REG rq_reg[] = {
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{ DRDATAD (I4TIME, rq_itime4, 24, "init stage 4 delay"), PV_LEFT + REG_NZ },
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{ DRDATAD (QTIME, rq_qtime, 24, "response time for 'immediate' packets"), PV_LEFT + REG_NZ },
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{ DRDATAD (XTIME, rq_xtime, 24, "response time for data transfers"), PV_LEFT + REG_NZ },
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{ BRDATAD (PKTS, &rq_ctx.pak, DEV_RDX, 16, sizeof(rq_ctx.pak)/2, "packet buffers, 33W each, 32 entries") },
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{ BRDATAD (PKTS, rq_ctx.pak, DEV_RDX, 16, sizeof(rq_ctx.pak)/2, "packet buffers, 33W each, 32 entries") },
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{ URDATAD (CPKT, rq_unit[0].cpkt, 10, 5, 0, RQ_NUMDR, 0, "current packet, units 0 to 3") },
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{ URDATAD (UCNUM, rq_unit[0].cnum, 10, 5, 0, RQ_NUMDR, 0, "ctrl number, units 0 to 3") },
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{ URDATAD (PKTQ, rq_unit[0].pktq, 10, 5, 0, RQ_NUMDR, 0, "packet queue, units 0 to 3") },
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@ -1167,7 +1167,7 @@ REG rqb_reg[] = {
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{ FLDATA (PRGI, rqb_ctx.prgi, 0), REG_HIDDEN },
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{ FLDATA (PIP, rqb_ctx.pip, 0), REG_HIDDEN },
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{ BINRDATA(CTYPE, rqb_ctx.ctype, 32), REG_HIDDEN },
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{ BRDATAD (PKTS, &rqb_ctx.pak, DEV_RDX, 16, sizeof(rq_ctx.pak)/2, "packet buffers, 33W each, 32 entries") },
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{ BRDATAD (PKTS, rqb_ctx.pak, DEV_RDX, 16, sizeof(rq_ctx.pak)/2, "packet buffers, 33W each, 32 entries") },
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{ URDATAD (CPKT, rqb_unit[0].cpkt, 10, 5, 0, RQ_NUMDR, 0, "current packet, units 0 to 3") },
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{ URDATAD (UCNUM, rqb_unit[0].cnum, 10, 5, 0, RQ_NUMDR, 0, "ctrl number, units 0 to 3") },
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{ URDATAD (PKTQ, rqb_unit[0].pktq, 10, 5, 0, RQ_NUMDR, 0, "packet queue, units 0 to 3") },
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@ -1240,7 +1240,7 @@ REG rqc_reg[] = {
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{ FLDATA (PRGI, rqc_ctx.prgi, 0), REG_HIDDEN },
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{ FLDATA (PIP, rqc_ctx.pip, 0), REG_HIDDEN },
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{ BINRDATA(CTYPE, rqc_ctx.ctype, 32), REG_HIDDEN },
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{ BRDATAD (PKTS, &rqc_ctx.pak, DEV_RDX, 16, sizeof(rq_ctx.pak)/2, "packet buffers, 33W each, 32 entries") },
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{ BRDATAD (PKTS, rqc_ctx.pak, DEV_RDX, 16, sizeof(rq_ctx.pak)/2, "packet buffers, 33W each, 32 entries") },
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{ URDATAD (CPKT, rqc_unit[0].cpkt, 10, 5, 0, RQ_NUMDR, 0, "current packet, units 0 to 3") },
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{ URDATAD (UCNUM, rqc_unit[0].cnum, 10, 5, 0, RQ_NUMDR, 0, "ctrl number, units 0 to 3") },
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{ URDATAD (PKTQ, rqc_unit[0].pktq, 10, 5, 0, RQ_NUMDR, 0, "packet queue, units 0 to 3") },
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@ -1313,7 +1313,7 @@ REG rqd_reg[] = {
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{ FLDATA (PRGI, rqd_ctx.prgi, 0), REG_HIDDEN },
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{ FLDATA (PIP, rqd_ctx.pip, 0), REG_HIDDEN },
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{ BINRDATA(CTYPE, rqd_ctx.ctype, 32), REG_HIDDEN },
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{ BRDATAD (PKTS, &rqd_ctx.pak, DEV_RDX, 16, sizeof(rq_ctx.pak)/2, "packet buffers, 33W each, 32 entries") },
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{ BRDATAD (PKTS, rqd_ctx.pak, DEV_RDX, 16, sizeof(rq_ctx.pak)/2, "packet buffers, 33W each, 32 entries") },
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{ URDATAD (CPKT, rqd_unit[0].cpkt, 10, 5, 0, RQ_NUMDR, 0, "current packet, units 0 to 3") },
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{ URDATAD (UCNUM, rqd_unit[0].cnum, 10, 5, 0, RQ_NUMDR, 0, "ctrl number, units 0 to 3") },
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{ URDATAD (PKTQ, rqd_unit[0].pktq, 10, 5, 0, RQ_NUMDR, 0, "packet queue, units 0 to 3") },
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@ -464,7 +464,7 @@ REG tq_reg[] = {
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{ DRDATAD (QTIME, tq_qtime, 24, "response time for 'immediate' packets"), PV_LEFT + REG_NZ },
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{ DRDATAD (XTIME, tq_xtime, 24, "response time for data transfers"), PV_LEFT + REG_NZ },
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{ DRDATAD (RWTIME, tq_rwtime, 32, "rewind time 2 sec (adjusted later)"), PV_LEFT + REG_NZ },
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{ BRDATAD (PKTS, &tq_pkt, DEV_RDX, 16, TQ_NPKTS * (TQ_PKT_SIZE_W + 1), "packet buffers, 33W each, 32 entries") },
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{ BRDATAD (PKTS, tq_pkt, DEV_RDX, 16, TQ_NPKTS * (TQ_PKT_SIZE_W + 1), "packet buffers, 33W each, 32 entries") },
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{ URDATAD (PLUG, tq_unit[0].unit_plug, 10, 32, 0, TQ_NUMDR, PV_LEFT | REG_RO, "unit plug value, units 0 to 3") },
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{ DRDATA (DEVTYPE, tq_typ, 2), REG_HRO },
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{ DRDATA (DEVCAP, drv_tab[TQU_TYPE].cap, T_ADDR_W), PV_LEFT | REG_HRO },
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@ -400,9 +400,9 @@ REG xqa_reg[] = {
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{ GRDATA ( SETUP_L2, xqa.setup.l2, XQ_RDX, 32, 0), REG_HRO},
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{ GRDATA ( SETUP_L3, xqa.setup.l3, XQ_RDX, 32, 0), REG_HRO},
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{ GRDATA ( SETUP_SAN, xqa.setup.sanity_timer, XQ_RDX, 32, 0), REG_HRO},
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{ BRDATA ( SETUP_MACS, &xqa.setup.macs, XQ_RDX, 8, sizeof(xqa.setup.macs)), REG_HRO},
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{ BRDATA ( STATS, &xqa.stats, XQ_RDX, 8, sizeof(xqa.stats)), REG_HRO},
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{ BRDATA ( TURBO_INIT, &xqa.init, XQ_RDX, 8, sizeof(xqa.init)), REG_HRO},
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{ SAVEDATA ( SETUP_MACS, xqa.setup.macs) },
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{ SAVEDATA ( STATS, xqa.stats) },
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{ SAVEDATA ( TURBO_INIT, xqa.init) },
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{ GRDATADF ( SRR, xqa.srr, XQ_RDX, 16, 0, "Status and Response Register", xq_srr_bits), REG_FIT },
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{ GRDATAD ( SRQR, xqa.srqr, XQ_RDX, 16, 0, "Synchronous Request Register"), REG_FIT },
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{ GRDATAD ( IBA, xqa.iba, XQ_RDX, 32, 0, "Init Block Address Register"), REG_FIT },
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@ -464,9 +464,9 @@ REG xqb_reg[] = {
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{ GRDATA ( SETUP_L2, xqb.setup.l2, XQ_RDX, 32, 0), REG_HRO},
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{ GRDATA ( SETUP_L3, xqb.setup.l3, XQ_RDX, 32, 0), REG_HRO},
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{ GRDATA ( SETUP_SAN, xqb.setup.sanity_timer, XQ_RDX, 32, 0), REG_HRO},
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{ BRDATA ( SETUP_MACS, &xqb.setup.macs, XQ_RDX, 8, sizeof(xqb.setup.macs)), REG_HRO},
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{ BRDATA ( STATS, &xqb.stats, XQ_RDX, 8, sizeof(xqb.stats)), REG_HRO},
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{ BRDATA ( TURBO_INIT, &xqb.init, XQ_RDX, 8, sizeof(xqb.init)), REG_HRO},
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{ SAVEDATA ( SETUP_MACS, xqb.setup.macs) },
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{ SAVEDATA ( STATS, xqb.stats) },
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{ SAVEDATA ( TURBO_INIT, xqb.init) },
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{ GRDATADF ( SRR, xqb.srr, XQ_RDX, 16, 0, "Status and Response Register", xq_srr_bits), REG_FIT },
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{ GRDATAD ( SRQR, xqb.srqr, XQ_RDX, 16, 0, "Synchronous Request Register"), REG_FIT },
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{ GRDATAD ( IBA, xqb.iba, XQ_RDX, 32, 0, "Init Block Address Register"), REG_FIT },
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@ -192,8 +192,8 @@ REG xua_reg[] = {
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{ GRDATA ( TYPE, xua.type, XU_RDX, 32, 0), REG_FIT },
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{ FLDATA ( INT, xua.irq, 0) },
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{ GRDATA ( IDTMR, xua.idtmr, XU_RDX, 32, 0), REG_HRO},
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{ BRDATA ( SETUP, &xua.setup, XU_RDX, 8, sizeof(xua.setup)), REG_HRO},
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{ BRDATA ( STATS, &xua.stats, XU_RDX, 8, sizeof(xua.stats)), REG_HRO},
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{ SAVEDATA ( SETUP, xua.setup) },
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{ SAVEDATA ( STATS, xua.stats) },
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{ GRDATA ( CSR0, xua.pcsr0, XU_RDX, 16, 0), REG_FIT },
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{ GRDATA ( CSR1, xua.pcsr1, XU_RDX, 16, 0), REG_FIT },
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{ GRDATA ( CSR2, xua.pcsr2, XU_RDX, 16, 0), REG_FIT },
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@ -269,8 +269,8 @@ REG xub_reg[] = {
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{ GRDATA ( TYPE, xub.type, XU_RDX, 32, 0), REG_FIT },
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{ FLDATA ( INT, xub.irq, 0) },
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{ GRDATA ( IDTMR, xub.idtmr, XU_RDX, 32, 0), REG_HRO},
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{ BRDATA ( SETUP, &xub.setup, XU_RDX, 8, sizeof(xub.setup)), REG_HRO},
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{ BRDATA ( STATS, &xub.stats, XU_RDX, 8, sizeof(xub.stats)), REG_HRO},
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{ SAVEDATA ( SETUP, xub.setup) },
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{ SAVEDATA ( STATS, xub.stats) },
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{ GRDATA ( CSR0, xub.pcsr0, XU_RDX, 16, 0), REG_FIT },
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{ GRDATA ( CSR1, xub.pcsr1, XU_RDX, 16, 0), REG_FIT },
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{ GRDATA ( CSR2, xub.pcsr2, XU_RDX, 16, 0), REG_FIT },
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@ -88,7 +88,7 @@ REG xs_reg[] = {
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{ GRDATA ( SA4, xs_var.mac[4], 16, 8, 0), REG_RO|REG_FIT },
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{ GRDATA ( SA5, xs_var.mac[5], 16, 8, 0), REG_RO|REG_FIT },
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{ FLDATA ( INT, xs_var.irq, 0) },
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{ BRDATA ( SETUP, &xs_var.setup, DEV_RDX, 8, sizeof(xs_var.setup)), REG_HRO },
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{ SAVEDATA ( SETUP, xs_var.setup) },
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{ GRDATA ( CSR0, xs_var.csr0, DEV_RDX, 16, 0), REG_FIT },
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{ GRDATA ( CSR1, xs_var.csr1, DEV_RDX, 16, 0), REG_FIT },
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{ GRDATA ( CSR2, xs_var.csr2, DEV_RDX, 16, 0), REG_FIT },
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@ -98,14 +98,14 @@ REG tlb_reg[] = {
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{ HRDATA (ISPAGE, itlb_spage, 2), REG_HRO },
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{ HRDATA (IASN, itlb_asn, ITB_ASN_WIDTH) },
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{ HRDATA (INLU, itlb_nlu, ITLB_WIDTH) },
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{ BRDATA (IMINI, &i_mini_tlb, 16, 32, TLB_ESIZE) },
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{ BRDATA (ITLB, &itlb, 16, 32, ITLB_SIZE*TLB_ESIZE) },
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{ VBRDATA (IMINI, i_mini_tlb, 16, 32, TLB_ESIZE) },
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{ VBRDATA (ITLB, itlb, 16, 32, ITLB_SIZE*TLB_ESIZE) },
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{ HRDATA (DCM, dtlb_cm, 2) },
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{ HRDATA (DSPAGE, dtlb_spage, 2), REG_HRO },
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{ HRDATA (DASN, dtlb_asn, DTB_ASN_WIDTH) },
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{ HRDATA (DNLU, dtlb_nlu, DTLB_WIDTH) },
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{ BRDATA (DMINI, &d_mini_tlb, 16, 32, TLB_ESIZE) },
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{ BRDATA (DTLB, &dtlb, 16, 32, DTLB_SIZE*TLB_ESIZE) },
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{ VBRDATA (DMINI, d_mini_tlb, 16, 32, TLB_ESIZE) },
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{ VBRDATA (DTLB, dtlb, 16, 32, DTLB_SIZE*TLB_ESIZE) },
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{ NULL }
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};
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