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PDP-8: added register description and fixed typo in doc

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This commit is contained in:
Ray Jewhurst 2016-04-10 12:54:18 -07:00 • committed by Mark Pizzolato
parent 57d49f832c
commit 81f68216ec
18 changed files with 207 additions and 207 deletions
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8
PDP8/pdp8_clk.c
View file

@ -62,10 +62,10 @@ DIB clk_dib = { DEV_CLK, 1, { &clk } };
UNIT clk_unit = { UDATA (&clk_svc, UNIT_IDLE, 0), 16000 };
REG clk_reg[] = {
{ FLDATA (DONE, dev_done, INT_V_CLK) },
{ FLDATA (ENABLE, int_enable, INT_V_CLK) },
{ FLDATA (INT, int_req, INT_V_CLK) },
{ DRDATA (TIME, clk_unit.wait, 24), REG_NZ + PV_LEFT },
{ FLDATAD (DONE, dev_done, INT_V_CLK, "device done flag") },
{ FLDATAD (ENABLE, int_enable, INT_V_CLK, "interrupt enable flag") },
{ FLDATAD (INT, int_req, INT_V_CLK, "interrupt pending flag") },
{ DRDATAD (TIME, clk_unit.wait, 24, "clock interval"), REG_NZ + PV_LEFT },
{ DRDATA (TPS, clk_tps, 8), PV_LEFT + REG_HRO },
{ NULL }
};

50
PDP8/pdp8_cpu.c
View file

@ -260,32 +260,32 @@ t_bool build_dev_tab (void);
UNIT cpu_unit = { UDATA (NULL, UNIT_FIX + UNIT_BINK, MAXMEMSIZE) };
REG cpu_reg[] = {
{ ORDATA (PC, saved_PC, 15) },
{ ORDATA (AC, saved_LAC, 12) },
{ FLDATA (L, saved_LAC, 12) },
{ ORDATA (MQ, saved_MQ, 12) },
{ ORDATA (SR, OSR, 12) },
{ GRDATA (IF, saved_PC, 8, 3, 12) },
{ GRDATA (DF, saved_DF, 8, 3, 12) },
{ GRDATA (IB, IB, 8, 3, 12) },
{ ORDATA (SF, SF, 7) },
{ FLDATA (UB, UB, 0) },
{ FLDATA (UF, UF, 0) },
{ ORDATA (SC, SC, 5) },
{ FLDATA (GTF, gtf, 0) },
{ FLDATA (EMODE, emode, 0) },
{ FLDATA (ION, int_req, INT_V_ION) },
{ FLDATA (ION_DELAY, int_req, INT_V_NO_ION_PENDING) },
{ FLDATA (CIF_DELAY, int_req, INT_V_NO_CIF_PENDING) },
{ FLDATA (PWR_INT, int_req, INT_V_PWR) },
{ FLDATA (UF_INT, int_req, INT_V_UF) },
{ ORDATA (INT, int_req, INT_V_ION+1), REG_RO },
{ ORDATA (DONE, dev_done, INT_V_DIRECT), REG_RO },
{ ORDATA (ENABLE, int_enable, INT_V_DIRECT), REG_RO },
{ BRDATA (PCQ, pcq, 8, 15, PCQ_SIZE), REG_RO+REG_CIRC },
{ ORDATAD (PC, saved_PC, 15, "program counter") },
{ ORDATAD (AC, saved_LAC, 12, "accumulator") },
{ FLDATAD (L, saved_LAC, 12, "link") },
{ ORDATAD (MQ, saved_MQ, 12, "multiplier-quotient") },
{ ORDATAD (SR, OSR, 12, "front panel switches") },
{ GRDATAD (IF, saved_PC, 8, 3, 12, "instruction field") },
{ GRDATAD (DF, saved_DF, 8, 3, 12, "data field") },
{ GRDATAD (IB, IB, 8, 3, 12, "instruction field buffter") },
{ ORDATAD (SF, SF, 7, "save field") },
{ FLDATAD (UB, UB, 0, "user mode buffer") },
{ FLDATAD (UF, UF, 0, "user mode flag") },
{ ORDATAD (SC, SC, 5, "EAE shift counter") },
{ FLDATAD (GTF, gtf, 0, "EAE greater than flag") },
{ FLDATAD (EMODE, emode, 0, "EAE mode (0 = A, 1 = B)") },
{ FLDATAD (ION, int_req, INT_V_ION, "interrupt enable") },
{ FLDATAD (ION_DELAY, int_req, INT_V_NO_ION_PENDING, "interrupt enable delay for ION") },
{ FLDATAD (CIF_DELAY, int_req, INT_V_NO_CIF_PENDING, "interrupt enable delay for CIF") },
{ FLDATAD (PWR_INT, int_req, INT_V_PWR, "power fail interrupt") },
{ FLDATAD (UF_INT, int_req, INT_V_UF, "user mode violation interrupt") },
{ ORDATAD (INT, int_req, INT_V_ION+1, "interrupt pending flags"), REG_RO },
{ ORDATAD (DONE, dev_done, INT_V_DIRECT, "device done flags"), REG_RO },
{ ORDATAD (ENABLE, int_enable, INT_V_DIRECT, "device interrupt enable flags"), REG_RO },
{ BRDATAD (PCQ, pcq, 8, 15, PCQ_SIZE, "PC prior to last JMP, JMS, or interrupt; most recent PC change first"), REG_RO+REG_CIRC },
{ ORDATA (PCQP, pcq_p, 6), REG_HRO },
{ FLDATA (STOP_INST, stop_inst, 0) },
{ ORDATA (WRU, sim_int_char, 8) },
{ FLDATAD (STOP_INST, stop_inst, 0, "stop on undefined instruction") },
{ ORDATAD (WRU, sim_int_char, 8, "interrupt character") },
{ NULL }
};

30
PDP8/pdp8_ct.c
View file

@ -188,23 +188,23 @@ UNIT ct_unit[] = {
};
REG ct_reg[] = {
{ ORDATA (CTSRA, ct_sra, 8) },
{ ORDATA (CTSRB, ct_srb, 8) },
{ ORDATA (CTDB, ct_db, 8) },
{ FLDATA (CTDF, ct_df, 0) },
{ FLDATA (RDY, ct_srb, 0) },
{ FLDATA (WLE, ct_srb, 8) },
{ FLDATA (WRITE, ct_write, 0) },
{ FLDATA (INT, int_req, INT_V_CT) },
{ DRDATA (BPTR, ct_bptr, 17) },
{ DRDATA (BLNT, ct_blnt, 17) },
{ DRDATA (STIME, ct_stime, 24), PV_LEFT + REG_NZ },
{ DRDATA (CTIME, ct_ctime, 24), PV_LEFT + REG_NZ },
{ FLDATA (STOP_IOE, ct_stopioe, 0) },
{ ORDATAD (CTSRA, ct_sra, 8, "status register A") },
{ ORDATAD (CTSRB, ct_srb, 8, "status register B") },
{ ORDATAD (CTDB, ct_db, 8, "data buffer") },
{ FLDATAD (CTDF, ct_df, 0, "data flag") },
{ FLDATAD (RDY, ct_srb, 0, "ready flag") },
{ FLDATAD (WLE, ct_srb, 8, "write lock error") },
{ FLDATAD (WRITE, ct_write, 0, "TA60 write operation flag") },
{ FLDATAD (INT, int_req, INT_V_CT, "interrupt request") },
{ DRDATAD (BPTR, ct_bptr, 17, "buffer pointer") },
{ DRDATAD (BLNT, ct_blnt, 17, "buffer length") },
{ DRDATAD (STIME, ct_stime, 24, "operation start time"), PV_LEFT + REG_NZ },
{ DRDATAD (CTIME, ct_ctime, 24, "character latency"), PV_LEFT + REG_NZ },
{ FLDATAD (STOP_IOE, ct_stopioe, 0, "stop on I/O errors flag") },
{ URDATA (UFNC, ct_unit[0].FNC, 8, 4, 0, CT_NUMDR, REG_HRO) },
{ URDATA (UST, ct_unit[0].UST, 8, 2, 0, CT_NUMDR, REG_HRO) },
{ URDATA (POS, ct_unit[0].pos, 10, T_ADDR_W, 0,
CT_NUMDR, PV_LEFT | REG_RO) },
{ URDATAD (POS, ct_unit[0].pos, 10, T_ADDR_W, 0,
CT_NUMDR, PV_LEFT | REG_RO, "position, units 0-1") },
{ FLDATA (DEVNUM, ct_dib.dev, 6), REG_HRO },
{ NULL }
};

20
PDP8/pdp8_df.c
View file

@ -135,16 +135,16 @@ UNIT df_unit = {
};
REG df_reg[] = {
{ ORDATA (STA, df_sta, 12) },
{ ORDATA (DA, df_da, 12) },
{ ORDATA (WC, M[DF_WC], 12), REG_FIT },
{ ORDATA (MA, M[DF_MA], 12), REG_FIT },
{ FLDATA (DONE, df_done, 0) },
{ FLDATA (INT, int_req, INT_V_DF) },
{ ORDATA (WLS, df_wlk, 8) },
{ DRDATA (TIME, df_time, 24), REG_NZ + PV_LEFT },
{ FLDATA (BURST, df_burst, 0) },
{ FLDATA (STOP_IOE, df_stopioe, 0) },
{ ORDATAD (STA, df_sta, 12, "status, disk and memory address extension") },
{ ORDATAD (DA, df_da, 12, "low order disk address") },
{ ORDATAD (WC, M[DF_WC], 12, "word count (in memory)"), REG_FIT },
{ ORDATAD (MA, M[DF_MA], 12, "memory address (in memory)"), REG_FIT },
{ FLDATAD (DONE, df_done, 0, "device done flag") },
{ FLDATAD (INT, int_req, INT_V_DF, "interrupt pending flag") },
{ ORDATAD (WLS, df_wlk, 8, "write lock switches") },
{ DRDATAD (TIME, df_time, 24, "rotational delay, per word"), REG_NZ + PV_LEFT },
{ FLDATAD (BURST, df_burst, 0, "burst flag") },
{ FLDATAD (STOP_IOE, df_stopioe, 0, "stop on I/O error") },
{ DRDATA (CAPAC, df_unit.capac, 18), REG_HRO },
{ ORDATA (DEVNUM, df_dib.dev, 6), REG_HRO },
{ NULL }

32
PDP8/pdp8_dt.c
View file

@ -325,25 +325,25 @@ UNIT dt_unit[] = {
};
REG dt_reg[] = {
{ ORDATA (DTSA, dtsa, 12) },
{ ORDATA (DTSB, dtsb, 12) },
{ FLDATA (INT, int_req, INT_V_DTA) },
{ FLDATA (ENB, dtsa, DTA_V_ENB) },
{ FLDATA (DTF, dtsb, DTB_V_DTF) },
{ FLDATA (ERF, dtsb, DTB_V_ERF) },
{ ORDATA (WC, M[DT_WC], 12), REG_FIT },
{ ORDATA (CA, M[DT_CA], 12), REG_FIT },
{ DRDATA (LTIME, dt_ltime, 24), REG_NZ | PV_LEFT },
{ DRDATA (DCTIME, dt_dctime, 24), REG_NZ | PV_LEFT },
{ ORDATA (SUBSTATE, dt_substate, 2) },
{ ORDATAD (DTSA, dtsa, 12, "status register A") },
{ ORDATAD (DTSB, dtsb, 12, "status register B") },
{ FLDATAD (INT, int_req, INT_V_DTA, "interrupt pending flag") },
{ FLDATAD (ENB, dtsa, DTA_V_ENB, "interrupt enable flag") },
{ FLDATAD (DTF, dtsb, DTB_V_DTF, "DECtape flag") },
{ FLDATAD (ERF, dtsb, DTB_V_ERF, "error flag") },
{ ORDATAD (WC, M[DT_WC], 12, "word count (memory location 7755)"), REG_FIT },
{ ORDATAD (CA, M[DT_CA], 12, "current address (memory location 7754)"), REG_FIT },
{ DRDATAD (LTIME, dt_ltime, 24, "time between lines"), REG_NZ | PV_LEFT },
{ DRDATAD (DCTIME, dt_dctime, 24, "time to decelerate to a full stop"), REG_NZ | PV_LEFT },
{ ORDATAD (SUBSTATE, dt_substate, 2, "read/write command substate") },
{ DRDATA (LBLK, dt_logblk, 12), REG_HIDDEN },
{ URDATA (POS, dt_unit[0].pos, 10, T_ADDR_W, 0,
DT_NUMDR, PV_LEFT | REG_RO) },
{ URDATA (STATT, dt_unit[0].STATE, 8, 18, 0,
DT_NUMDR, REG_RO) },
{ URDATAD (POS, dt_unit[0].pos, 10, T_ADDR_W, 0,
DT_NUMDR, PV_LEFT | REG_RO, "position, in lines, units 0 to 7") },
{ URDATAD (STATT, dt_unit[0].STATE, 8, 18, 0,
DT_NUMDR, REG_RO, "unit state, units 0 to 7") },
{ URDATA (LASTT, dt_unit[0].LASTT, 10, 32, 0,
DT_NUMDR, REG_HRO) },
{ FLDATA (STOP_OFFR, dt_stopoffr, 0) },
{ FLDATAD (STOP_OFFR, dt_stopoffr, 0, "stop on off-reel error") },
{ ORDATA (DEVNUM, dt_dib.dev, 6), REG_HRO },
{ NULL }
};

12
PDP8/pdp8_fpp.c
View file

@ -222,20 +222,20 @@ DIB fpp_dib = { DEV_FPP, 2, { &fpp55, &fpp56 } };
UNIT fpp_unit = { UDATA (&fpp_svc, 0, 0) };
REG fpp_reg[] = {
{ ORDATA (FPACE, fpp_ac.exp, 12) },
{ ORDATAD (FPACE, fpp_ac.exp, 12, "floating accumulator") },
{ ORDATA (FPAC0, fpp_ac.fr[0], 12) },
{ ORDATA (FPAC1, fpp_ac.fr[1], 12) },
{ ORDATA (FPAC2, fpp_ac.fr[2], 12) },
{ ORDATA (FPAC3, fpp_ac.fr[3], 12) },
{ ORDATA (FPAC4, fpp_ac.fr[4], 12) },
{ ORDATA (CMD, fpp_cmd, 12) },
{ ORDATA (STA, fpp_sta, 12) },
{ ORDATA (APTA, fpp_apta, 15) },
{ ORDATAD (STA, fpp_sta, 12, "status register") },
{ ORDATAD (APTA, fpp_apta, 15, "active parameter table pointer") },
{ GRDATA (APTSVF, fpp_aptsvf, 8, 3, 12) },
{ ORDATA (FPC, fpp_fpc, 15) },
{ ORDATA (BRA, fpp_bra, 15) },
{ ORDATAD (FPC, fpp_fpc, 15, "floating program counter") },
{ ORDATAD (BRA, fpp_bra, 15, "base register") },
{ ORDATA (XRA, fpp_xra, 15) },
{ ORDATA (OPA, fpp_opa, 15) },
{ ORDATAD (OPA, fpp_opa, 15, "operand address register") },
{ ORDATA (SSF, fpp_ssf, 12) },
{ ORDATA (LASTLOCK, fpp_last_lockbit, 12) },
{ FLDATA (FLAG, fpp_flag, 0) },

16
PDP8/pdp8_lp.c
View file

@ -59,14 +59,14 @@ UNIT lpt_unit = {
};
REG lpt_reg[] = {
{ ORDATA (BUF, lpt_unit.buf, 8) },
{ FLDATA (ERR, lpt_err, 0) },
{ FLDATA (DONE, dev_done, INT_V_LPT) },
{ FLDATA (ENABLE, int_enable, INT_V_LPT) },
{ FLDATA (INT, int_req, INT_V_LPT) },
{ DRDATA (POS, lpt_unit.pos, T_ADDR_W), PV_LEFT },
{ DRDATA (TIME, lpt_unit.wait, 24), PV_LEFT },
{ FLDATA (STOP_IOE, lpt_stopioe, 0) },
{ ORDATAD (BUF, lpt_unit.buf, 8,"last data item processed") },
{ FLDATAD (ERR, lpt_err, 0, "error status flag") },
{ FLDATAD (DONE, dev_done, INT_V_LPT, "device done flag") },
{ FLDATAD (ENABLE, int_enable, INT_V_LPT, "interrupt enable flag") },
{ FLDATAD (INT, int_req, INT_V_LPT, "interrupt pending flag") },
{ DRDATAD (POS, lpt_unit.pos, T_ADDR_W, "position in the output file"), PV_LEFT },
{ DRDATAD (TIME, lpt_unit.wait, 24, "time from I/O initiation to interrupt"), PV_LEFT },
{ FLDATAD (STOP_IOE, lpt_stopioe, 0, "stop on I/O error") },
{ ORDATA (DEVNUM, lpt_dib.dev, 6), REG_HRO },
{ NULL }
};

28
PDP8/pdp8_mt.c
View file

@ -182,20 +182,20 @@ UNIT mt_unit[] = {
};
REG mt_reg[] = {
{ ORDATA (CMD, mt_cu, 12) },
{ ORDATA (FNC, mt_fn, 12) },
{ ORDATA (CA, mt_ca, 12) },
{ ORDATA (WC, mt_wc, 12) },
{ ORDATA (DB, mt_db, 12) },
{ GRDATA (STA, mt_sta, 8, 12, 12) },
{ ORDATA (STA2, mt_sta, 6) },
{ FLDATA (DONE, mt_done, 0) },
{ FLDATA (INT, int_req, INT_V_MT) },
{ FLDATA (STOP_IOE, mt_stopioe, 0) },
{ DRDATA (TIME, mt_time, 24), PV_LEFT },
{ URDATA (UST, mt_unit[0].USTAT, 8, 16, 0, MT_NUMDR, 0) },
{ URDATA (POS, mt_unit[0].pos, 10, T_ADDR_W, 0,
MT_NUMDR, PV_LEFT | REG_RO) },
{ ORDATAD (CMD, mt_cu, 12, "command") },
{ ORDATAD (FNC, mt_fn, 12, "function") },
{ ORDATAD (CA, mt_ca, 12, "memory address") },
{ ORDATAD (WC, mt_wc, 12, "word count") },
{ ORDATAD (DB, mt_db, 12, "data buffer") },
{ GRDATAD (STA, mt_sta, 8, 12, 12, "status buffer") },
{ ORDATAD (STA2, mt_sta, 6, "secondary status") },
{ FLDATAD (DONE, mt_done, 0, "device done flag") },
{ FLDATAD (INT, int_req, INT_V_MT, "interrupt pending flag") },
{ FLDATAD (STOP_IOE, mt_stopioe, 0, "stop on I/O error") },
{ DRDATAD (TIME, mt_time, 24, "record delay"), PV_LEFT },
{ URDATAD (UST, mt_unit[0].USTAT, 8, 16, 0, MT_NUMDR, 0, "unit status, units 0 to 7") },
{ URDATAD (POS, mt_unit[0].pos, 10, T_ADDR_W, 0,
MT_NUMDR, PV_LEFT | REG_RO, "position, units 0 to 7") },
{ FLDATA (DEVNUM, mt_dib.dev, 6), REG_HRO },
{ NULL }
};

28
PDP8/pdp8_pt.c
View file

@ -62,13 +62,13 @@ UNIT ptr_unit = {
};
REG ptr_reg[] = {
{ ORDATA (BUF, ptr_unit.buf, 8) },
{ FLDATA (DONE, dev_done, INT_V_PTR) },
{ FLDATA (ENABLE, int_enable, INT_V_PTR) },
{ FLDATA (INT, int_req, INT_V_PTR) },
{ DRDATA (POS, ptr_unit.pos, T_ADDR_W), PV_LEFT },
{ DRDATA (TIME, ptr_unit.wait, 24), PV_LEFT },
{ FLDATA (STOP_IOE, ptr_stopioe, 0) },
{ ORDATAD (BUF, ptr_unit.buf, 8, "last data item processed") },
{ FLDATAD (DONE, dev_done, INT_V_PTR, "device done flag") },
{ FLDATAD (ENABLE, int_enable, INT_V_PTR, "interrupt enable flag") },
{ FLDATAD (INT, int_req, INT_V_PTR, "interrupt pending flag") },
{ DRDATAD (POS, ptr_unit.pos, T_ADDR_W, "position in the input file"), PV_LEFT },
{ DRDATAD (TIME, ptr_unit.wait, 24, "time from I/O initiation to interrupt"), PV_LEFT },
{ FLDATAD (STOP_IOE, ptr_stopioe, 0, "stop on I/O error") },
{ NULL }
};
@ -98,13 +98,13 @@ UNIT ptp_unit = {
};
REG ptp_reg[] = {
{ ORDATA (BUF, ptp_unit.buf, 8) },
{ FLDATA (DONE, dev_done, INT_V_PTP) },
{ FLDATA (ENABLE, int_enable, INT_V_PTP) },
{ FLDATA (INT, int_req, INT_V_PTP) },
{ DRDATA (POS, ptp_unit.pos, T_ADDR_W), PV_LEFT },
{ DRDATA (TIME, ptp_unit.wait, 24), PV_LEFT },
{ FLDATA (STOP_IOE, ptp_stopioe, 0) },
{ ORDATAD (BUF, ptp_unit.buf, 8, "last data item processed") },
{ FLDATAD (DONE, dev_done, INT_V_PTP, "device done flag") },
{ FLDATAD (ENABLE, int_enable, INT_V_PTP, "interrupt enable flag") },
{ FLDATAD (INT, int_req, INT_V_PTP, "interrupt pending flag") },
{ DRDATAD (POS, ptp_unit.pos, T_ADDR_W, "position in the output file"), PV_LEFT },
{ DRDATAD (TIME, ptp_unit.wait, 24, "time from I/O initiation to interrupt"), PV_LEFT },
{ FLDATAD (STOP_IOE, ptp_stopioe, 0, "stop on I/O error") },
{ NULL }
};

20
PDP8/pdp8_rf.c
View file

@ -147,16 +147,16 @@ UNIT rf_unit = {
UNIT pcell_unit = { UDATA (&pcell_svc, 0, 0) };
REG rf_reg[] = {
{ ORDATA (STA, rf_sta, 12) },
{ ORDATA (DA, rf_da, 20) },
{ ORDATA (WC, M[RF_WC], 12), REG_FIT },
{ ORDATA (MA, M[RF_MA], 12), REG_FIT },
{ FLDATA (DONE, rf_done, 0) },
{ FLDATA (INT, int_req, INT_V_RF) },
{ ORDATA (WLK, rf_wlk, 32) },
{ DRDATA (TIME, rf_time, 24), REG_NZ + PV_LEFT },
{ FLDATA (BURST, rf_burst, 0) },
{ FLDATA (STOP_IOE, rf_stopioe, 0) },
{ ORDATAD (STA, rf_sta, 12, "status") },
{ ORDATAD (DA, rf_da, 20, "low order disk address") },
{ ORDATAD (WC, M[RF_WC], 12, "word count (in memory)"), REG_FIT },
{ ORDATAD (MA, M[RF_MA], 12, "memory address (in memory)"), REG_FIT },
{ FLDATAD (DONE, rf_done, 0, "device done flag") },
{ FLDATAD (INT, int_req, INT_V_RF, "interrupt pending flag") },
{ ORDATAD (WLK, rf_wlk, 32, "write lock switches") },
{ DRDATAD (TIME, rf_time, 24, "rotational delay, per word"), REG_NZ + PV_LEFT },
{ FLDATAD (BURST, rf_burst, 0, "burst flag") },
{ FLDATAD (STOP_IOE, rf_stopioe, 0, "stop on I/O error") },
{ DRDATA (CAPAC, rf_unit.capac, 21), REG_HRO },
{ ORDATA (DEVNUM, rf_dib.dev, 6), REG_HRO },
{ NULL }

18
PDP8/pdp8_rk.c
View file

@ -167,15 +167,15 @@ UNIT rk_unit[] = {
};
REG rk_reg[] = {
{ ORDATA (RKSTA, rk_sta, 12) },
{ ORDATA (RKCMD, rk_cmd, 12) },
{ ORDATA (RKDA, rk_da, 12) },
{ ORDATA (RKMA, rk_ma, 12) },
{ FLDATA (BUSY, rk_busy, 0) },
{ FLDATA (INT, int_req, INT_V_RK) },
{ DRDATA (STIME, rk_swait, 24), PV_LEFT },
{ DRDATA (RTIME, rk_rwait, 24), PV_LEFT },
{ FLDATA (STOP_IOE, rk_stopioe, 0) },
{ ORDATAD (RKSTA, rk_sta, 12, "status") },
{ ORDATAD (RKCMD, rk_cmd, 12, "disk command") },
{ ORDATAD (RKDA, rk_da, 12, "disk address") },
{ ORDATAD (RKMA, rk_ma, 12, "current memory address") },
{ FLDATAD (BUSY, rk_busy, 0, "control busy flag") },
{ FLDATAD (INT, int_req, INT_V_RK, "interrupt pending flag") },
{ DRDATAD (STIME, rk_swait, 24, "seek time, per cylinder"), PV_LEFT },
{ DRDATAD (RTIME, rk_rwait, 24, "rotational delay"), PV_LEFT },
{ FLDATAD (STOP_IOE, rk_stopioe, 0, "stop on I/O error") },
{ ORDATA (DEVNUM, rk_dib.dev, 6), REG_HRO },
{ NULL }
};

32
PDP8/pdp8_rl.c
View file

@ -207,25 +207,25 @@ UNIT rl_unit[] = {
};
REG rl_reg[] = {
{ ORDATA (RLCSA, rlcsa, 12) },
{ ORDATA (RLCSB, rlcsb, 12) },
{ ORDATA (RLMA, rlma, 12) },
{ ORDATA (RLWC, rlwc, 12) },
{ ORDATA (RLSA, rlsa, 6) },
{ ORDATA (RLER, rler, 12) },
{ ORDATA (RLSI, rlsi, 16) },
{ ORDATA (RLSI1, rlsi1, 16) },
{ ORDATA (RLSI2, rlsi2, 16) },
{ FLDATA (RLSIL, rl_lft, 0) },
{ FLDATA (INT, int_req, INT_V_RL) },
{ FLDATA (DONE, rl_done, INT_V_RL) },
{ ORDATAD (RLCSA, rlcsa, 12, "control/status A") },
{ ORDATAD (RLCSB, rlcsb, 12, "control/status B") },
{ ORDATAD (RLMA, rlma, 12, "memory address") },
{ ORDATAD (RLWC, rlwc, 12, "word count") },
{ ORDATAD (RLSA, rlsa, 6, "sector address") },
{ ORDATAD (RLER, rler, 12, "error flags") },
{ ORDATAD (RLSI, rlsi, 16, "silo top word") },
{ ORDATAD (RLSI1, rlsi1, 16, "silo second word") },
{ ORDATAD (RLSI2, rlsi2, 16, "silo third word") },
{ FLDATAD (RLSIL, rl_lft, 0, "silo read left/right flag") },
{ FLDATAD (INT, int_req, INT_V_RL, "interrupt request") },
{ FLDATAD (DONE, rl_done, INT_V_RL, "done flag") },
{ FLDATA (IE, rlcsb, RLCSB_V_IE) },
{ FLDATA (ERR, rl_erf, 0) },
{ DRDATA (STIME, rl_swait, 24), PV_LEFT },
{ DRDATA (RTIME, rl_rwait, 24), PV_LEFT },
{ FLDATAD (ERR, rl_erf, 0, "composite error flag") },
{ DRDATAD (STIME, rl_swait, 24, "seek time, per cylinder"), PV_LEFT },
{ DRDATAD (RTIME, rl_rwait, 24, "rotational delay"), PV_LEFT },
{ URDATA (CAPAC, rl_unit[0].capac, 10, T_ADDR_W, 0,
RL_NUMDR, PV_LEFT + REG_HRO) },
{ FLDATA (STOP_IOE, rl_stopioe, 0) },
{ FLDATAD (STOP_IOE, rl_stopioe, 0, "stop on I/O error") },
{ ORDATA (DEVNUM, rl_dib.dev, 6), REG_HRO },
{ NULL }
};

34
PDP8/pdp8_rx.c
View file

@ -167,24 +167,24 @@ UNIT rx_unit[] = {
};
REG rx_reg[] = {
{ ORDATA (RXCS, rx_csr, 12) },
{ ORDATA (RXDB, rx_dbr, 12) },
{ ORDATA (RXES, rx_esr, 12) },
{ ORDATAD (RXCS, rx_csr, 12, "status") },
{ ORDATAD (RXDB, rx_dbr, 12, "data buffer") },
{ ORDATAD (RXES, rx_esr, 12, "error status") },
{ ORDATA (RXERR, rx_ecode, 8) },
{ ORDATA (RXTA, rx_track, 8) },
{ ORDATA (RXSA, rx_sector, 8) },
{ DRDATA (STAPTR, rx_state, 4), REG_RO },
{ DRDATA (BUFPTR, rx_bptr, 8) },
{ FLDATA (TR, rx_tr, 0) },
{ FLDATA (ERR, rx_err, 0) },
{ FLDATA (DONE, dev_done, INT_V_RX) },
{ FLDATA (ENABLE, int_enable, INT_V_RX) },
{ FLDATA (INT, int_req, INT_V_RX) },
{ DRDATA (CTIME, rx_cwait, 24), PV_LEFT },
{ DRDATA (STIME, rx_swait, 24), PV_LEFT },
{ DRDATA (XTIME, rx_xwait, 24), PV_LEFT },
{ FLDATA (STOP_IOE, rx_stopioe, 0) },
{ BRDATA (SBUF, rx_buf, 8, 8, RX2_NUMBY) },
{ ORDATAD (RXTA, rx_track, 8, "current track") },
{ ORDATAD (RXSA, rx_sector, 8, "current sector") },
{ DRDATAD (STAPTR, rx_state, 4, "controller state"), REG_RO },
{ DRDATAD (BUFPTR, rx_bptr, 8, "buffer pointer") },
{ FLDATAD (TR, rx_tr, 0, "transfer ready flag") },
{ FLDATAD (ERR, rx_err, 0, "error flag") },
{ FLDATAD (DONE, dev_done, INT_V_RX, "done flag") },
{ FLDATAD (ENABLE, int_enable, INT_V_RX, "interrupt enable flag") },
{ FLDATAD (INT, int_req, INT_V_RX, "interrupt pending flag") },
{ DRDATAD (CTIME, rx_cwait, 24, "command completion time"), PV_LEFT },
{ DRDATAD (STIME, rx_swait, 24, "seek time per track"), PV_LEFT },
{ DRDATAD (XTIME, rx_xwait, 24, "transfer ready delay"), PV_LEFT },
{ FLDATAD (STOP_IOE, rx_stopioe, 0, "stop on I/O error") },
{ BRDATAD (SBUF, rx_buf, 8, 8, RX2_NUMBY, "sector buffer array") },
{ FLDATA (RX28, rx_28, 0), REG_HRO },
{ URDATA (CAPAC, rx_unit[0].capac, 10, T_ADDR_W, 0,
RX_NUMDR, REG_HRO | PV_LEFT) },

28
PDP8/pdp8_td.c
View file

@ -230,23 +230,23 @@ UNIT td_unit[] = {
};
REG td_reg[] = {
{ GRDATA (TDCMD, td_cmd, 8, 4, 8) },
{ ORDATA (TDDAT, td_dat, 12) },
{ ORDATA (TDMTK, td_mtk, 6) },
{ FLDATA (TDSLF, td_slf, 0) },
{ FLDATA (TDQLF, td_qlf, 0) },
{ FLDATA (TDTME, td_tme, 0) },
{ ORDATA (TDQL, td_qlctr, 2) },
{ GRDATAD (TDCMD, td_cmd, 8, 4, 8, "command register") },
{ ORDATAD (TDDAT, td_dat, 12, "data register") },
{ ORDATAD (TDMTK, td_mtk, 6, "mark track register") },
{ FLDATAD (TDSLF, td_slf, 0, "single line flag") },
{ FLDATAD (TDQLF, td_qlf, 0, "quad line flag") },
{ FLDATAD (TDTME, td_tme, 0, "timing error flag") },
{ ORDATAD (TDQL, td_qlctr, 2, "quad line counter") },
{ ORDATA (TDCSUM, td_csum, 6), REG_RO },
{ DRDATA (LTIME, td_ltime, 31), REG_NZ | PV_LEFT },
{ DRDATA (DCTIME, td_dctime, 31), REG_NZ | PV_LEFT },
{ URDATA (POS, td_unit[0].pos, 10, T_ADDR_W, 0,
DT_NUMDR, PV_LEFT | REG_RO) },
{ URDATA (STATT, td_unit[0].STATE, 8, 18, 0,
DT_NUMDR, REG_RO) },
{ DRDATAD (LTIME, td_ltime, 31, "time between lines"), REG_NZ | PV_LEFT },
{ DRDATAD (DCTIME, td_dctime, 31, "time to decelerate to a full stop"), REG_NZ | PV_LEFT },
{ URDATAD (POS, td_unit[0].pos, 10, T_ADDR_W, 0,
DT_NUMDR, PV_LEFT | REG_RO, "positions, in lines, units 0 and 1") },
{ URDATAD (STATT, td_unit[0].STATE, 8, 18, 0,
DT_NUMDR, REG_RO, "unit state, units 0 and 1") },
{ URDATA (LASTT, td_unit[0].LASTT, 10, 32, 0,
DT_NUMDR, REG_HRO) },
{ FLDATA (STOP_OFFR, td_stopoffr, 0) },
{ FLDATAD (STOP_OFFR, td_stopoffr, 0, "stop on off-reel error") },
{ ORDATA (DEVNUM, td_dib.dev, 6), REG_HRO },
{ NULL }
};

10
PDP8/pdp8_tsc.c
View file

@ -76,11 +76,11 @@ DIB tsc_dib = { DEV_TSC, 1, { &tsc } };
UNIT tsc_unit = { UDATA (NULL, UNIT_SN699, 0) };
REG tsc_reg[] = {
{ ORDATA (IR, tsc_ir, 12) },
{ ORDATA (PC, tsc_pc, 12) },
{ FLDATA (CDF, tsc_cdf, 0) },
{ FLDATA (ENB, tsc_enb, 0) },
{ FLDATA (INT, int_req, INT_V_TSC) },
{ ORDATAD (IR, tsc_ir, 12, "most recently trapped instruction") },
{ ORDATAD (PC, tsc_pc, 12, "PC of most recently trapped instruction") },
{ FLDATAD (CDF, tsc_cdf, 0, "1 if trapped instruction is CDF, 0 otherwise") },
{ FLDATAD (ENB, tsc_enb, 0, "interrupt enable flag") },
{ FLDATAD (INT, int_req, INT_V_TSC, "interrupt pending flag") },
{ NULL }
};

24
PDP8/pdp8_tt.c
View file

@ -69,12 +69,12 @@ DIB tti_dib = { DEV_TTI, 1, { &tti } };
UNIT tti_unit = { UDATA (&tti_svc, UNIT_IDLE|TT_MODE_KSR, 0), SERIAL_IN_WAIT };
REG tti_reg[] = {
{ ORDATA (BUF, tti_unit.buf, 8) },
{ FLDATA (DONE, dev_done, INT_V_TTI) },
{ FLDATA (ENABLE, int_enable, INT_V_TTI) },
{ FLDATA (INT, int_req, INT_V_TTI) },
{ DRDATA (POS, tti_unit.pos, T_ADDR_W), PV_LEFT },
{ DRDATA (TIME, tti_unit.wait, 24), PV_LEFT },
{ ORDATAD (BUF, tti_unit.buf, 8, "last data item processed") },
{ FLDATAD (DONE, dev_done, INT_V_TTI, "device done flag") },
{ FLDATAD (ENABLE, int_enable, INT_V_TTI, "interrupt enable flag") },
{ FLDATAD (INT, int_req, INT_V_TTI, "interrupt pending flag") },
{ DRDATAD (POS, tti_unit.pos, T_ADDR_W, "number of characters input"), PV_LEFT },
{ DRDATAD (TIME, tti_unit.wait, 24, "input polling interval (if 0, the keyboard is polled synchronously with the clock)"), PV_LEFT },
{ NULL }
};
@ -107,12 +107,12 @@ DIB tto_dib = { DEV_TTO, 1, { &tto } };
UNIT tto_unit = { UDATA (&tto_svc, TT_MODE_KSR, 0), SERIAL_OUT_WAIT };
REG tto_reg[] = {
{ ORDATA (BUF, tto_unit.buf, 8) },
{ FLDATA (DONE, dev_done, INT_V_TTO) },
{ FLDATA (ENABLE, int_enable, INT_V_TTO) },
{ FLDATA (INT, int_req, INT_V_TTO) },
{ DRDATA (POS, tto_unit.pos, T_ADDR_W), PV_LEFT },
{ DRDATA (TIME, tto_unit.wait, 24), PV_LEFT },
{ ORDATAD (BUF, tto_unit.buf, 8, "last date item processed") },
{ FLDATAD (DONE, dev_done, INT_V_TTO, "device done flag") },
{ FLDATAD (ENABLE, int_enable, INT_V_TTO, "interrupt enable flag") },
{ FLDATAD (INT, int_req, INT_V_TTO, "interrupt pending flag") },
{ DRDATAD (POS, tto_unit.pos, T_ADDR_W, "number of characters output"), PV_LEFT },
{ DRDATAD (TIME, tto_unit.wait, 24, "time form I/O initiation to interrupt"), PV_LEFT },
{ NULL }
};

24
PDP8/pdp8_ttx.c
View file

@ -95,12 +95,12 @@ DIB ttix_dib = { DEV_KJ8, 8,
UNIT ttix_unit = { UDATA (&ttix_svc, UNIT_IDLE|UNIT_ATTABLE, 0), SERIAL_IN_WAIT };
REG ttix_reg[] = {
{ BRDATA (BUF, ttix_buf, 8, 8, TTX_LINES) },
{ GRDATA (DONE, dev_done, 8, TTX_LINES, INT_V_TTI1) },
{ GRDATA (ENABLE, int_enable, 8, TTX_LINES, INT_V_TTI1) },
{ GRDATA (INT, int_req, 8, TTX_LINES, INT_V_TTI1) },
{ DRDATA (TIME, ttix_unit.wait, 24), REG_NZ + PV_LEFT },
{ DRDATA (TPS, ttx_tps, 10), REG_NZ + PV_LEFT },
{ BRDATAD (BUF, ttix_buf, 8, 8, TTX_LINES, "input buffer, lines 0 to 3") },
{ GRDATAD (DONE, dev_done, 8, TTX_LINES, INT_V_TTI1, "device done flag (line 0 rightmost)") },
{ GRDATAD (ENABLE, int_enable, 8, TTX_LINES, INT_V_TTI1, "interrupt enable flag") },
{ GRDATAD (INT, int_req, 8, TTX_LINES, INT_V_TTI1, "interrupt pending flag") },
{ DRDATAD (TIME, ttix_unit.wait, 24, "initial polling interval"), REG_NZ + PV_LEFT },
{ DRDATAD (TPS, ttx_tps, 10, "polls per second after calibration"), REG_NZ + PV_LEFT },
{ ORDATA (DEVNUM, ttix_dib.dev, 6), REG_HRO },
{ NULL }
};
@ -159,12 +159,12 @@ UNIT ttox_unit[] = {
};
REG ttox_reg[] = {
{ BRDATA (BUF, ttox_buf, 8, 8, TTX_LINES) },
{ GRDATA (DONE, dev_done, 8, TTX_LINES, INT_V_TTO1) },
{ GRDATA (ENABLE, int_enable, 8, TTX_LINES, INT_V_TTO1) },
{ GRDATA (INT, int_req, 8, TTX_LINES, INT_V_TTO1) },
{ URDATA (TIME, ttox_unit[0].wait, 10, 24, 0,
TTX_LINES, PV_LEFT) },
{ BRDATAD (BUF, ttox_buf, 8, 8, TTX_LINES, "last data item processed, lines 0 to 3") },
{ GRDATAD (DONE, dev_done, 8, TTX_LINES, INT_V_TTO1, "device done flag (line 0 rightmost)") },
{ GRDATAD (ENABLE, int_enable, 8, TTX_LINES, INT_V_TTO1, "interrupt enable flag") },
{ GRDATAD (INT, int_req, 8, TTX_LINES, INT_V_TTO1, "interrupt pending flag") },
{ URDATAD (TIME, ttox_unit[0].wait, 10, 24, 0,
TTX_LINES, PV_LEFT, "line from I/O initiation to interrupt, lines 0 to 3") },
{ NULL }
};

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