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AltairZ80: M68K: Add support for additional 68000 variants

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68000, 68010, 68020, 68030, 68040 and LC/EC variants.
This commit is contained in:
Howard M. Harte 2022-11-23 20:43:22 -08:00 • committed by Paul Koning
parent 6cd89205a3
commit 87581b865f
2 changed files with 66 additions and 6 deletions
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59
AltairZ80/altairz80_cpu.c
View file

@ -162,6 +162,7 @@ static t_stat cpu_set_nonbanked (UNIT *uptr, int32 value, CONST char *cptr,
static t_stat cpu_set_ramtype (UNIT *uptr, int32 value, CONST char *cptr, void *desc);
static t_stat cpu_set_chiptype (UNIT *uptr, int32 value, CONST char *cptr, void *desc);
static t_stat cpu_set_size (UNIT *uptr, int32 value, CONST char *cptr, void *desc);
static t_stat m68k_set_chiptype (UNIT * uptr, int32 value, CONST char* cptr, void* desc);
static t_stat cpu_set_memory (UNIT *uptr, int32 value, CONST char *cptr, void *desc);
static t_stat cpu_set_hist (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
static t_stat cpu_show_hist (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
@ -288,7 +289,7 @@ static insthist_t *hst = NULL; /* instruction history
uint32 m68k_registers[M68K_REG_CPU_TYPE + 1]; /* M68K CPU registers */
uint32 mmiobase = 0xff0000; /* M68K MMIO base address */
uint32 mmiosize = 0x10000; /* M68K MMIO window size */
uint32 m68kvariant = M68K_CPU_TYPE_68000;
/* data structure for IN/OUT instructions */
struct idev {
@ -490,6 +491,8 @@ REG cpu_reg[] = {
}, /* 86 */
{ HRDATAD(MMIOSIZE, mmiosize, 17, "Size of 68K Memory-mapped I/O window"),
}, /* 87 */
{ DRDATAD(M68KVAR, m68kvariant, 17, "M68K Type (68000, 68010, etc.)"),
}, /* 88 */
{ NULL }
};
@ -580,6 +583,26 @@ static MTAB cpu_mod[] = {
NULL, NULL, "Sets the RAM size to 60KB for 8080 / Z80 / 8086" },
{ MTAB_VDV, 64, NULL, "64KB", &cpu_set_size,
NULL, NULL, "Sets the RAM size to 64KB for 8080 / Z80 / 8086" },
{ MTAB_VDV, M68K_CPU_TYPE_68000,NULL, "68000", &m68k_set_chiptype,
NULL, NULL, "Sets the M68K variant to 68000" },
{ MTAB_VDV, M68K_CPU_TYPE_68010,NULL, "68010", &m68k_set_chiptype,
NULL, NULL, "Sets the M68K variant to 68010" },
{ MTAB_VDV, M68K_CPU_TYPE_68020,NULL, "68020", &m68k_set_chiptype,
NULL, NULL, "Sets the M68K variant to 68020" },
{ MTAB_XTD | MTAB_VDV, M68K_CPU_TYPE_68EC020,NULL, "68EC020", &m68k_set_chiptype,
NULL, NULL, "Sets the M68K variant to 68EC020" },
{ MTAB_XTD | MTAB_VDV, M68K_CPU_TYPE_68030,NULL, "68030", &m68k_set_chiptype,
NULL, NULL, "Sets the M68K variant to 68030" },
{ MTAB_XTD | MTAB_VDV, M68K_CPU_TYPE_68EC030,NULL, "68EC030", &m68k_set_chiptype,
NULL, NULL, "Sets the M68K variant to 68EC030" },
{ MTAB_XTD | MTAB_VDV, M68K_CPU_TYPE_68040,NULL, "68040", &m68k_set_chiptype,
NULL, NULL, "Sets the M68K variant to 68040" },
{ MTAB_XTD | MTAB_VDV, M68K_CPU_TYPE_68EC040,NULL, "68EC040", &m68k_set_chiptype,
NULL, NULL, "Sets the M68K variant to 68EC040" },
{ MTAB_XTD | MTAB_VDV, M68K_CPU_TYPE_68LC040,NULL, "68LC040", &m68k_set_chiptype,
NULL, NULL, "Sets the M68K variant to 68LC040" },
{ MTAB_XTD | MTAB_VDV, M68K_CPU_TYPE_SCC68070,NULL, "SCC68070", &m68k_set_chiptype,
NULL, NULL, "Sets the M68K variant to SCC68070" },
{ MTAB_XTD|MTAB_VDV|MTAB_NMO|MTAB_VALO|MTAB_SHP, 0, "HISTORY", "HISTORY", &cpu_set_hist, &cpu_show_hist,
NULL, "CPU instruction history buffer"},
{ 0 }
@ -6552,13 +6575,27 @@ const static CPUFLAG *cpuflags[NUM_CHIP_TYPE] = { cpuflags8080, cpuflagsZ80,
/* needs to be set for each ramtype <= MAX_RAM_TYPE */
static const char *ramTypeToString[] = { "AZ80", "HRAM", "VRAM", "CRAM", "B810" };
static const char* m68kVariantToString[] = {
"INVALID",
"68000", "68010",
"68EC020", "68020",
"68EC030", "68030",
"68EC040", "680LC40", "68040",
"SCC68070"
};
static t_stat chip_show(FILE *st, UNIT *uptr, int32 val, CONST void *desc) {
fprintf(st, cpu_unit.flags & UNIT_CPU_OPSTOP ? "ITRAP, " : "NOITRAP, ");
if (chiptype < NUM_CHIP_TYPE)
if (chiptype < NUM_CHIP_TYPE) {
fprintf(st, "%s", cpu_mod[chiptype].mstring);
if (chiptype == CHIP_TYPE_M68K) {
fprintf(st, " (%s)", m68kVariantToString[m68kvariant]);
}
}
fprintf(st, ", ");
if (ramtype <= MAX_RAM_TYPE)
fprintf(st, "%s", ramTypeToString[ramtype]);
return SCPE_OK;
}
@ -6605,11 +6642,15 @@ static t_stat cpu_show(FILE *st, UNIT *uptr, int32 val, CONST void *desc) {
if (*flagregister[chiptype] & cpuflags[chiptype][i].mask) {
if (first) {
first = FALSE;
fprintf(st, "\nFlags");
fprintf(st, "\n\tFlags");
}
fprintf(st, " %s", cpuflags[chiptype][i].flagName);
}
}
if (chiptype == CHIP_TYPE_M68K) {
fprintf(st, "\n\tMemory-Mapped I/O: 0x%06x-0x%06x", mmiobase, mmiobase + (mmiosize - 1));
}
return SCPE_OK;
}
@ -6991,6 +7032,18 @@ static t_stat cpu_set_memory(UNIT *uptr, int32 value, CONST char *cptr, void *de
return SCPE_ARG;
}
static t_stat m68k_set_chiptype(UNIT* uptr, int32 value, CONST char* cptr, void* desc) {
if (value == m68kvariant) {
if (cpu_unit.flags & UNIT_CPU_VERBOSE)
sim_printf("M68K Variant unchanged\n");
return SCPE_OK;
}
m68kvariant = value;
return SCPE_OK;
}
static t_stat cpu_set_hist(UNIT *uptr, int32 val, CONST char *cptr, void *desc) {
uint32 i, lnt;
t_stat r;

13
AltairZ80/m68ksim.c
View file

@ -162,8 +162,9 @@ static uint32 m68k_fc; /* Current function code fro
extern uint32 m68k_registers[M68K_REG_CPU_TYPE + 1];
extern UNIT cpu_unit;
extern uint32 mmiobase; /* M68K MMIO base address */
extern uint32 mmiosize; /* M68K MMIO window size */
extern uint32 mmiobase; /* M68K MMIO base address */
extern uint32 mmiosize; /* M68K MMIO window size */
extern uint32 m68kvariant; /* M68K variant (68000, 68010, etc.) */
#define M68K_BOOT_LENGTH (32 * 1024) /* size of bootstrap */
#define M68K_BOOT_PC 0x000400 /* initial PC for boot */
@ -249,10 +250,16 @@ void m68k_clear_memory(void ) {
}
void m68k_cpu_reset(void) {
WRITE_LONG(m68k_ram, 0, 0x00006000); // SP
WRITE_LONG(m68k_ram, 4, 0x00000200); // PC
m68k_init();
m68k_set_cpu_type(M68K_CPU_TYPE_68000);
if ((m68kvariant == M68K_CPU_TYPE_INVALID) || (m68kvariant > M68K_CPU_TYPE_SCC68070)) {
sim_printf("M68K variant %u not supported, using 68000\n", m68kvariant);
m68kvariant = M68K_CPU_TYPE_68000;
}
m68k_set_cpu_type(m68kvariant);
m68k_pulse_reset(); // also calls MC6850_reset()
m68k_CPUToView();
}