Merge remote-tracking branch 'origin/pr/5'
This commit is contained in:
commit
88ce8f7072
5 changed files with 261 additions and 0 deletions
11
makefile
11
makefile
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@ -1587,6 +1587,11 @@ IMLAC = ${IMLACD}/imlac_sys.c ${IMLACD}/imlac_cpu.c \
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IMLAC_OPT = -I ${IMLACD} ${DISPLAY_OPT}
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IMLAC_OPT = -I ${IMLACD} ${DISPLAY_OPT}
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STUBD = ${SIMHD}/stub
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STUB = ${STUBD}/stub_sys.c ${STUBD}/stub_cpu.c
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STUB_OPT = -I ${STUBD}
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TT2500D = ${SIMHD}/tt2500
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TT2500D = ${SIMHD}/tt2500
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TT2500 = ${TT2500D}/tt2500_sys.c ${TT2500D}/tt2500_cpu.c \
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TT2500 = ${TT2500D}/tt2500_sys.c ${TT2500D}/tt2500_cpu.c \
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${TT2500D}/tt2500_dpy.c ${TT2500D}/tt2500_crt.c ${TT2500D}/tt2500_tv.c \
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${TT2500D}/tt2500_dpy.c ${TT2500D}/tt2500_crt.c ${TT2500D}/tt2500_tv.c \
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@ -2250,6 +2255,12 @@ ifneq (,$(call find_test,${IMLAC},imlac))
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$@ $(call find_test,${IMLACD},imlac) ${TEST_ARG}
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$@ $(call find_test,${IMLACD},imlac) ${TEST_ARG}
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endif
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endif
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stub : ${BIN}stub${EXE}
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${BIN}stub${EXE} : ${STUB} ${SIM}
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${MKDIRBIN}
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${CC} ${STUB} ${SIM} ${STUB_OPT} ${CC_OUTSPEC} ${LDFLAGS}
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tt2500 : ${BIN}tt2500${EXE}
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tt2500 : ${BIN}tt2500${EXE}
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${BIN}tt2500${EXE} : ${TT2500} ${SIM}
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${BIN}tt2500${EXE} : ${TT2500} ${SIM}
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16
stub/readme.txt
Normal file
16
stub/readme.txt
Normal file
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@ -0,0 +1,16 @@
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You fill in sim_instr do the instruction decoding and execution.
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sim_load will typically take some input file and put it in memory.
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cpu_reg should contain all machine state.
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parse_sym/fprint_sym is to assemble (with DEPOSIT) and disassemble (EXAMINE-M) instructions.
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sim_devices is an array of DEVICE * for peripherals. Something like
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build_dev_tab will go through the array and initialize data structures
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at run time.
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Refer to this: https://github.com/open-simh/simh/blob/master/doc/simh.doc
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Make use of asynchronous events. sim_activate posts a future event.
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The "svc" routine will be called.
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121
stub/stub_cpu.c
Normal file
121
stub/stub_cpu.c
Normal file
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@ -0,0 +1,121 @@
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/* stub_cpu.c: Stub CPU simulator
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Copyright (c) 2020, Lars Brinkhoff
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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LARS BRINKHOFF BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Lars Brinkhoff shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Lars Brinkhoff.
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*/
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#include "stub_defs.h"
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/* Debug */
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#define DBG_CPU 0001
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/* CPU state. */
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static uint16 PC;
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/* Function declaration. */
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static t_stat cpu_ex (t_value *vptr, t_addr ea, UNIT *uptr, int32 sw);
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static t_stat cpu_dep (t_value val, t_addr ea, UNIT *uptr, int32 sw);
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static t_stat cpu_reset (DEVICE *dptr);
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static UNIT cpu_unit = { UDATA (NULL, UNIT_FIX + UNIT_BINK, 020000) };
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REG cpu_reg[] = {
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{ ORDATAD (PC, PC, 13, "Program Counter") },
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{ NULL }
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};
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static MTAB cpu_mod[] = {
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{ 0 }
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};
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static DEBTAB cpu_deb[] = {
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{ "CPU", DBG_CPU },
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{ NULL, 0 }
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};
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DEVICE cpu_dev = {
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"CPU", &cpu_unit, cpu_reg, cpu_mod,
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0, 8, 16, 1, 8, 16,
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&cpu_ex, &cpu_dep, &cpu_reset,
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NULL, NULL, NULL, NULL, DEV_DEBUG, 0, cpu_deb,
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NULL, NULL, NULL, NULL, NULL, NULL
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};
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t_stat sim_instr (void)
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{
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t_stat reason;
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if ((reason = build_dev_tab ()) != SCPE_OK)
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return reason;
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for (;;) {
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AIO_CHECK_EVENT;
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if (sim_interval <= 0) {
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if ((reason = sim_process_event()) != SCPE_OK)
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return reason;
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}
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if (sim_brk_summ && sim_brk_test(PC, SWMASK('E')))
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return STOP_IBKPT;
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if (sim_step != 0) {
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if (--sim_step == 0)
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return SCPE_STEP;
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}
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}
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return SCPE_OK;
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}
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static t_stat cpu_ex (t_value *vptr, t_addr ea, UNIT *uptr, int32 sw)
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{
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if (vptr == NULL)
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return SCPE_ARG;
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if (ea >= 040000)
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return SCPE_NXM;
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*vptr = M[ea];
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return SCPE_OK;
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}
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static t_stat cpu_dep (t_value val, t_addr ea, UNIT *uptr, int32 sw)
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{
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if (ea >= 040000)
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return SCPE_NXM;
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M[ea] = val & 0177777;
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return SCPE_OK;
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}
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static t_bool pc_is_a_subroutine_call (t_addr **ret_addrs)
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{
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return FALSE;
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}
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static t_stat
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cpu_reset (DEVICE *dptr)
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{
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sim_brk_types = SWMASK('D') | SWMASK('E');
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sim_brk_dflt = SWMASK ('E');
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sim_vm_is_subroutine_call = &pc_is_a_subroutine_call;
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return SCPE_OK;
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}
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44
stub/stub_defs.h
Normal file
44
stub/stub_defs.h
Normal file
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@ -0,0 +1,44 @@
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/* stub_defs.h: Stub simulator definitions
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Copyright (c) 2020, Lars Brinkhoff
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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LARS BRINKHOFF BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Lars Brinkhoff shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Lars Brinkhoff.
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21-Apr-20 LB New simulator.
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*/
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#ifndef STUB_DEFS_H_
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#define STUB_DEFS_H_ 0
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#include "sim_defs.h"
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#define STOP_HALT 1
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#define STOP_IBKPT 2
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#define STOP_ACCESS 3
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extern t_bool build_dev_tab (void);
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extern REG cpu_reg[];
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extern uint16 M[];
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extern DEVICE cpu_dev;
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#endif /* STUB_DEFS_H_ */
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69
stub/stub_sys.c
Normal file
69
stub/stub_sys.c
Normal file
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@ -0,0 +1,69 @@
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/* stub_sys.c: Stub simulator interface
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Copyright (c) 2020, Lars Brinkhoff
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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|
the rights to use, copy, modify, merge, publish, distribute, sublicense,
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|
and/or sell copies of the Software, and to permit persons to whom the
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|
Software is furnished to do so, subject to the following conditions:
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|
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|
The above copyright notice and this permission notice shall be included in
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|
all copies or substantial portions of the Software.
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||||||
|
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||||||
|
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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|
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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|
LARS BRINKHOFF BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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||||||
|
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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|
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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||||||
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|
Except as contained in this notice, the name of Lars Brinkhoff shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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|
in this Software without prior written authorization from Lars Brinkhoff.
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|
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|
21-Apr-20 LB New simulator.
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*/
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#include "stub_defs.h"
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int32 sim_emax = 1;
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char sim_name[] = "Stub";
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uint16 M[040000];
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REG *sim_PC = &cpu_reg[0];
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DEVICE *sim_devices[] = {
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&cpu_dev,
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NULL
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};
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const char *sim_stop_messages[SCPE_BASE] = {
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"Unknown error",
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"HALT instruction",
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"Breakpoint",
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"Invalid access",
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};
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t_stat
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sim_load (FILE *fileref, CONST char *cptr, CONST char *fnam, int flag)
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{
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return SCPE_OK;
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}
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t_bool build_dev_tab (void)
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{
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return SCPE_OK;
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}
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t_stat fprint_sym (FILE *of, t_addr addr, t_value *val,
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UNIT *uptr, int32 sw)
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{
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}
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t_stat parse_sym (CONST char *cptr, t_addr addr, UNIT *uptr,
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t_value *val, int32 sw)
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{
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return SCPE_OK;
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}
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