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KA10: General update.

Browse source 
Added BASE option to auxcpu to move memory region.
   Fix errors in Card Reader/Card Punch translation and operation.
   Fixed problems with ITS quantum timer.
   Added support for System Concepts DC10 disk controller (Lars).
   Fixed errors in Line Printer control codes.
   Added support for Lines per page to LP10.
   Fixed issues with 7 track tapes on TM10.
   Updated user guides
This commit is contained in:
Richard Cornwell 2019-08-12 07:51:52 -07:00 • committed by Mark Pizzolato
parent 866ce293e5
commit 8c00d94be4
17 changed files with 1282 additions and 57 deletions
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1035
PDP10/ka10_ai.c Normal file
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File diff suppressed because it is too large Load diff

27
PDP10/ka10_auxcpu.c
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@ -54,12 +54,15 @@
static int pia = 0; static int pia = 0;
static int status = 0; static int status = 0;
t_value auxcpu_base = 03000000;
static t_stat auxcpu_devio(uint32 dev, t_uint64 *data); static t_stat auxcpu_devio(uint32 dev, t_uint64 *data);
static t_stat auxcpu_svc (UNIT *uptr); static t_stat auxcpu_svc (UNIT *uptr);
static t_stat auxcpu_reset (DEVICE *dptr); static t_stat auxcpu_reset (DEVICE *dptr);
static t_stat auxcpu_attach (UNIT *uptr, CONST char *ptr); static t_stat auxcpu_attach (UNIT *uptr, CONST char *ptr);
static t_stat auxcpu_detach (UNIT *uptr); static t_stat auxcpu_detach (UNIT *uptr);
static t_stat auxcpu_set_base (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
static t_stat auxcpu_show_base (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
static t_stat auxcpu_attach_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr); static t_stat auxcpu_attach_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr);
static const char *auxcpu_description (DEVICE *dptr); static const char *auxcpu_description (DEVICE *dptr);
@ -73,6 +76,8 @@ static REG auxcpu_reg[] = {
}; };
static MTAB auxcpu_mod[] = { static MTAB auxcpu_mod[] = {
{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "base address", "BASE",
&auxcpu_set_base, &auxcpu_show_base },
{ 0 } { 0 }
}; };
@ -389,4 +394,26 @@ t_stat auxcpu_devio(uint32 dev, t_uint64 *data)
return SCPE_OK; return SCPE_OK;
} }
static t_stat auxcpu_set_base (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
t_stat r;
t_value x;
if (cptr == NULL || *cptr == 0)
return SCPE_ARG;
x = get_uint (cptr, 8, 03777777, &r);
if (r != SCPE_OK)
return SCPE_ARG;
auxcpu_base = x;
return SCPE_OK;
}
static t_stat auxcpu_show_base (FILE *st, UNIT *uptr, int32 val, CONST void *desc)
{
fprintf (st, "Base: %llo", auxcpu_base);
return SCPE_OK;
}
#endif #endif

6
PDP10/ka10_stk.c
View file

@ -24,12 +24,14 @@
*/ */
#include <time.h> #include <time.h>
#include "sim_video.h"
#include "display/display.h"
#include "kx10_defs.h" #include "kx10_defs.h"
#ifdef USE_DISPLAY #ifdef USE_DISPLAY
#if NUM_DEVS_STK > 0 #if NUM_DEVS_STK > 0
#include "sim_video.h"
#include "display/display.h"
#define STK_DEVNUM 070 #define STK_DEVNUM 070
/* CONI/O bits. */ /* CONI/O bits. */

6
PDP10/ka10_ten11.c
View file

@ -262,7 +262,11 @@ static int read_word (int addr, int *data)
build (request, (addr >> 8) & 0377); build (request, (addr >> 8) & 0377);
build (request, (addr) & 0377); build (request, (addr) & 0377);
transaction (request, response); if (transaction (request, response) == -1) {
/* Network error. */
*data = 0;
return 0;
}
switch (response[0]) switch (response[0])
{ {

24
PDP10/kx10_cp.c
View file

@ -34,7 +34,7 @@
#include "sim_defs.h" #include "sim_defs.h"
#if (NUM_DEVS_CP > 0) #if (NUM_DEVS_CP > 0)
#define UNIT_CDP UNIT_ATTABLE | UNIT_DISABLE | MODE_029 #define UNIT_CDP UNIT_ATTABLE | UNIT_DISABLE | MODE_026
#define CP_DEVNUM 0110 #define CP_DEVNUM 0110
@ -92,7 +92,7 @@ uint16 cp_buffer[80];
DIB cp_dib = { CP_DEVNUM, 1, cp_devio, NULL}; DIB cp_dib = { CP_DEVNUM, 1, cp_devio, NULL};
UNIT cp_unit = {UDATA(cp_srv, UNIT_CDP, 0), 600 }; UNIT cp_unit = {UDATA(cp_srv, UNIT_CDP, 0), 2000 };
MTAB cp_mod[] = { MTAB cp_mod[] = {
{MTAB_XTD | MTAB_VUN, 0, "FORMAT", "FORMAT", {MTAB_XTD | MTAB_VUN, 0, "FORMAT", "FORMAT",
@ -121,6 +121,7 @@ DEVICE cp_dev = {
t_stat cp_devio(uint32 dev, uint64 *data) { t_stat cp_devio(uint32 dev, uint64 *data) {
UNIT *uptr = &cp_unit; UNIT *uptr = &cp_unit;
uint16 col;
switch(dev & 3) { switch(dev & 3) {
case CONI: case CONI:
@ -170,7 +171,24 @@ t_stat cp_devio(uint32 dev, uint64 *data) {
*data = 0; *data = 0;
break; break;
case DATAO: case DATAO:
cp_buffer[uptr->COL++] = *data & 0xfff; col = *data & 0xfff;
switch(col) {
case 04006: col = 03000; break; /* ! - */
case 01022: col = 00006; break; /* " - */
case 01012: col = 01202; break; /* # - */
case 01006: col = 01042; break; /* % - */
case 02006: col = 05000; break; /* & - */
case 00012: col = 00042; break; /* ' - */
case 03000: col = 00022; break; /* : - */
case 01202: col = 02012; break; /* ; - */
case 02012: col = 00012; break; /* > - */
case 05000: col = 04202; break; /* ? - */
case 02022: col = 04022; break; /* [ - */
case 00006: col = 01012; break; /* \ - */
case 04022: col = 02022; break; /* ] - */
case 00022: col = 00202; break; /* ^ - */
}
cp_buffer[uptr->COL++] = col;
uptr->STATUS &= ~DATA_REQ; uptr->STATUS &= ~DATA_REQ;
clr_interrupt(dev); clr_interrupt(dev);
sim_debug(DEBUG_DATAIO, &cp_dev, "CP: DATAO %012llo %d\n", *data, sim_debug(DEBUG_DATAIO, &cp_dev, "CP: DATAO %012llo %d\n", *data,

28
PDP10/kx10_cpu.c
View file

@ -221,7 +221,8 @@ int32 tmxr_poll = 10000;
/* Physical address range for Rubin 10-11 interface. */ /* Physical address range for Rubin 10-11 interface. */
#define T11RANGE(addr) ((addr) >= 03040000) #define T11RANGE(addr) ((addr) >= 03040000)
/* Physical address range for auxiliary PDP-6. */ /* Physical address range for auxiliary PDP-6. */
#define AUXCPURANGE(addr) ((addr) >= 03000000 && (addr) < 03040000) extern int auxcpu_base;
#define AUXCPURANGE(addr) ((addr) >= auxcpu_base && (addr) < (auxcpu_base + 040000))
DEVICE *rh_devs[] = { DEVICE *rh_devs[] = {
#if (NUM_DEVS_RS > 0) #if (NUM_DEVS_RS > 0)
@ -813,12 +814,12 @@ int opflags[] = {
void void
set_quantum() set_quantum()
{ {
double us;
sim_cancel(&cpu_unit[1]); sim_cancel(&cpu_unit[1]);
if ((qua_time & RSIGN) == 0) { if (qua_time & BIT17)
double us; return;
us = (double)(RSIGN - qua_time); us = (double)(BIT17 - qua_time);
(void)sim_activate_after_d(&cpu_unit[1], us); (void)sim_activate_after_d(&cpu_unit[1], us);
}
} }
/* /*
@ -830,7 +831,10 @@ load_quantum()
if (sim_is_active(&cpu_unit[1])) { if (sim_is_active(&cpu_unit[1])) {
double us; double us;
us = sim_activate_time_usecs (&cpu_unit[1]); us = sim_activate_time_usecs (&cpu_unit[1]);
qua_time = RSIGN - (uint32)us; if ((uint32)us > BIT17)
qua_time = BIT17;
else
qua_time = (BIT17 - (uint32)us) & RMASK;
sim_cancel(&cpu_unit[1]); sim_cancel(&cpu_unit[1]);
} }
} }
@ -841,11 +845,11 @@ load_quantum()
uint32 uint32
get_quantum() get_quantum()
{ {
uint32 t = 0; uint32 t = qua_time;
if (sim_is_active(&cpu_unit[1])) { if (sim_is_active(&cpu_unit[1])) {
double us; double us;
us = sim_activate_time_usecs (&cpu_unit[1]); us = sim_activate_time_usecs (&cpu_unit[1]);
t = RSIGN - (uint32)us; t = (BIT17 - (uint32)us) & RMASK;
} }
return t; return t;
} }
@ -3491,9 +3495,10 @@ dpnorm:
AB = (AB + 1) & RMASK; AB = (AB + 1) & RMASK;
MB = M[AB]; /* WD 3 */ MB = M[AB]; /* WD 3 */
/* Store Quantum */ /* Store Quantum */
qua_time = MB & RMASK; qua_time = MB & (RMASK|BIT17);
set_quantum(); set_quantum();
fault_data = (MB >> 18) & RMASK; fault_data = (MB >> 18) & RMASK;
fault_data &= ~1; /* Clear high quantum bit */
mem_prot = 0; mem_prot = 0;
if ((fault_data & 0777772) != 0) if ((fault_data & 0777772) != 0)
mem_prot = 1; mem_prot = 1;
@ -5997,9 +6002,8 @@ qua_srv(UNIT * uptr)
{ {
if ((fault_data & 1) == 0 && pi_enable && !pi_pending && (FLAGS & USER) != 0) { if ((fault_data & 1) == 0 && pi_enable && !pi_pending && (FLAGS & USER) != 0) {
mem_prot = 1; mem_prot = 1;
fault_data |= 1;
} }
qua_time = RSIGN; qua_time = BIT17;
return SCPE_OK; return SCPE_OK;
} }
#endif #endif

43
PDP10/kx10_cr.c
View file

@ -34,7 +34,7 @@
#include "sim_defs.h" #include "sim_defs.h"
#if (NUM_DEVS_CR > 0) #if (NUM_DEVS_CR > 0)
#define UNIT_CDR UNIT_ATTABLE | UNIT_RO | UNIT_DISABLE | MODE_029 #define UNIT_CDR UNIT_ATTABLE | UNIT_RO | UNIT_DISABLE | MODE_029 | MODE_LOWER
#define CR_DEVNUM 0150 #define CR_DEVNUM 0150
@ -94,7 +94,7 @@ uint16 cr_buffer[80];
DIB cr_dib = { CR_DEVNUM, 1, cr_devio, NULL}; DIB cr_dib = { CR_DEVNUM, 1, cr_devio, NULL};
UNIT cr_unit = { UNIT cr_unit = {
UDATA(cr_srv, UNIT_CDR, 0), 300, UDATA(cr_srv, UNIT_CDR, 0), 2000,
}; };
MTAB cr_mod[] = { MTAB cr_mod[] = {
@ -136,7 +136,7 @@ t_stat cr_devio(uint32 dev, uint64 *data) {
case CONO: case CONO:
clr_interrupt(dev); clr_interrupt(dev);
sim_debug(DEBUG_CONO, &cr_dev, "CR: CONO %012llo\n", *data); sim_debug(DEBUG_CONO, &cr_dev, "CR: CONO %012llo PC=%06o\n", *data, PC);
if (*data & CLR_READER) { if (*data & CLR_READER) {
uptr->STATUS = 0; uptr->STATUS = 0;
if (!CARD_RDY(uptr)) if (!CARD_RDY(uptr))
@ -171,7 +171,9 @@ t_stat cr_devio(uint32 dev, uint64 *data) {
case DATAI: case DATAI:
clr_interrupt(dev); clr_interrupt(dev);
if (uptr->STATUS & DATA_RDY) { if (uptr->STATUS & DATA_RDY) {
*data = uptr->DATA; *data = uptr->DATA & ~RSIGN;
if (uptr->DATA & RSIGN)
*data |= SMASK;
sim_debug(DEBUG_DATAIO, &cr_dev, "CR: DATAI %012llo\n", *data); sim_debug(DEBUG_DATAIO, &cr_dev, "CR: DATAI %012llo\n", *data);
uptr->STATUS &= ~DATA_RDY; uptr->STATUS &= ~DATA_RDY;
} else } else
@ -215,7 +217,7 @@ cr_srv(UNIT *uptr) {
case CDSE_EMPTY: case CDSE_EMPTY:
sim_debug(DEBUG_EXP, &cr_dev, "CR: card empty\n"); sim_debug(DEBUG_EXP, &cr_dev, "CR: card empty\n");
uptr->STATUS &= ~(CARD_IN_READ|READING); uptr->STATUS &= ~(CARD_IN_READ|READING);
uptr->STATUS |= HOPPER_EMPTY|TROUBLE|STOP; uptr->STATUS |= HOPPER_EMPTY|TROUBLE;
if (uptr->STATUS & TROUBLE_EN) if (uptr->STATUS & TROUBLE_EN)
set_interrupt(CR_DEVNUM, uptr->STATUS); set_interrupt(CR_DEVNUM, uptr->STATUS);
return SCPE_OK; return SCPE_OK;
@ -238,14 +240,43 @@ cr_srv(UNIT *uptr) {
/* Copy next column over */ /* Copy next column over */
if (uptr->STATUS & CARD_IN_READ) { if (uptr->STATUS & CARD_IN_READ) {
uint32 data;
int i;
if (uptr->COL >= 80) { if (uptr->COL >= 80) {
uptr->STATUS &= ~(CARD_IN_READ|READING); uptr->STATUS &= ~(CARD_IN_READ|READING);
if (sim_card_input_hopper_count(uptr) == 0)
uptr->STATUS |= HOPPER_EMPTY;
uptr->STATUS |= END_CARD; uptr->STATUS |= END_CARD;
set_interrupt(CR_DEVNUM, uptr->STATUS); set_interrupt(CR_DEVNUM, uptr->STATUS);
sim_activate(uptr, uptr->wait); sim_activate(uptr, uptr->wait);
return SCPE_OK; return SCPE_OK;
} }
uptr->DATA = cr_buffer[uptr->COL++]; data = cr_buffer[uptr->COL++];
switch(data) {
case 0x482: data = 0x806; break; /* ! - 12 8 7 */
case 0xA00: data = 0x882; break; /* [ - 12 8 2 */
case 0x882: data = 0x482; break; /* ] - 11 8 2 */
case 0x405: data = 0xa00; break; /* { - 12 0 */
case 0x600: data = 0xc00; break; /* | - 12 11 */
case 0x805: data = 0x600; break; /* } - 11 0 */
case 0x806: data = 0x700; break; /* ~ - 11 0 1 */
}
uptr->DATA = data;
/* Generate upper 18 bits of data */
uptr->DATA |= ((data & 0x001) << 25) |
((data & 0xe00) << 13) |
((data & 0x002) << 20);
for (i = 1; i <= 7; i++) {
if (data & 0x100) {
/* Set flag it more then one punch */
if ((uptr->DATA & 07000000) != 0){
uptr->DATA |= (int32)RSIGN;
break;
}
uptr->DATA |= i << 18;
}
data <<= 1;
}
if (uptr->STATUS & DATA_RDY) { if (uptr->STATUS & DATA_RDY) {
uptr->STATUS |= DATA_MISS; uptr->STATUS |= DATA_MISS;
} }

2
PDP10/kx10_dc.c
View file

@ -107,7 +107,7 @@ const char *dc_description (DEVICE *dptr);
DIB dc_dib = { DC_DEVNUM, 1, &dc_devio, NULL }; DIB dc_dib = { DC_DEVNUM, 1, &dc_devio, NULL };
UNIT dc_unit = { UNIT dc_unit = {
UDATA (&dc_svc, TT_MODE_7B+UNIT_IDLE+UNIT_ATTABLE, 0), KBD_POLL_WAIT UDATA (&dc_svc, TT_MODE_7B+UNIT_IDLE+UNIT_DISABLE+UNIT_ATTABLE, 0), KBD_POLL_WAIT
}; };
REG dc_reg[] = { REG dc_reg[] = {

3
PDP10/kx10_defs.h
View file

@ -167,6 +167,7 @@ extern DEBTAB crd_debug[];
#define BIT9 00000400000000LL #define BIT9 00000400000000LL
#define BIT10 00000200000000LL #define BIT10 00000200000000LL
#define BIT10_35 00000377777777LL #define BIT10_35 00000377777777LL
#define BIT17 00000001000000LL
#define MANT 00000777777777LL #define MANT 00000777777777LL
#define EXPO 00377000000000LL #define EXPO 00377000000000LL
#define FPHBIT 01000000000000000000000LL #define FPHBIT 01000000000000000000000LL
@ -375,6 +376,7 @@ extern DEVICE dkb_dev;
extern DEVICE auxcpu_dev; extern DEVICE auxcpu_dev;
extern DEVICE dpk_dev; extern DEVICE dpk_dev;
extern DEVICE wcnsls_dev; /* MIT Spacewar Consoles */ extern DEVICE wcnsls_dev; /* MIT Spacewar Consoles */
extern DEVICE ai_dev;
extern DEVICE dct_dev; /* PDP6 devices. */ extern DEVICE dct_dev; /* PDP6 devices. */
extern DEVICE dtc_dev; extern DEVICE dtc_dev;
extern DEVICE mtc_dev; extern DEVICE mtc_dev;
@ -478,6 +480,7 @@ int auxcpu_write (int addr, t_uint64);
#define NUM_DEVS_IMP 1 #define NUM_DEVS_IMP 1
#define NUM_DEVS_CH10 ITS #define NUM_DEVS_CH10 ITS
#define NUM_DEVS_DPK ITS #define NUM_DEVS_DPK ITS
#define NUM_DEVS_AI ITS
#endif #endif
/* Global data */ /* Global data */

119
PDP10/kx10_lp.c
View file

@ -40,6 +40,8 @@
#define POS u5 #define POS u5
#define LINE u6 #define LINE u6
#define MARGIN 6
#define UNIT_V_CT (UNIT_V_UF + 0) #define UNIT_V_CT (UNIT_V_UF + 0)
#define UNIT_UC (1 << UNIT_V_CT) #define UNIT_UC (1 << UNIT_V_CT)
#define UNIT_UTF8 (2 << UNIT_V_CT) #define UNIT_UTF8 (2 << UNIT_V_CT)
@ -62,6 +64,10 @@ t_stat lpt_svc (UNIT *uptr);
t_stat lpt_reset (DEVICE *dptr); t_stat lpt_reset (DEVICE *dptr);
t_stat lpt_attach (UNIT *uptr, CONST char *cptr); t_stat lpt_attach (UNIT *uptr, CONST char *cptr);
t_stat lpt_detach (UNIT *uptr); t_stat lpt_detach (UNIT *uptr);
t_stat lpt_setlpp(UNIT *, int32, CONST char *, void *);
t_stat lpt_getlpp(FILE *, UNIT *, int32, CONST void *);
t_stat lpt_setdev(UNIT *, int32, CONST char *, void *);
t_stat lpt_getdev(FILE *, UNIT *, int32, CONST void *);
t_stat lpt_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, t_stat lpt_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag,
const char *cptr); const char *cptr);
const char *lpt_description (DEVICE *dptr); const char *lpt_description (DEVICE *dptr);
@ -79,7 +85,7 @@ uint8 lpt_chbuf[5]; /* Read in Character buffers */
DIB lpt_dib = { LP_DEVNUM, 1, &lpt_devio, NULL }; DIB lpt_dib = { LP_DEVNUM, 1, &lpt_devio, NULL };
UNIT lpt_unit = { UNIT lpt_unit = {
UDATA (&lpt_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_TEXT, 0), 100 UDATA (&lpt_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_TEXT, 66), 100
}; };
REG lpt_reg[] = { REG lpt_reg[] = {
@ -94,6 +100,10 @@ MTAB lpt_mod[] = {
{UNIT_CT, 0, "Lower case", "LC", NULL}, {UNIT_CT, 0, "Lower case", "LC", NULL},
{UNIT_CT, UNIT_UC, "Upper case", "UC", NULL}, {UNIT_CT, UNIT_UC, "Upper case", "UC", NULL},
{UNIT_CT, UNIT_UTF8, "UTF8 ouput", "UTF8", NULL}, {UNIT_CT, UNIT_UTF8, "UTF8 ouput", "UTF8", NULL},
{MTAB_XTD|MTAB_VUN|MTAB_VALR, 0, "LINESPERPAGE", "LINESPERPAGE",
&lpt_setlpp, &lpt_getlpp, NULL, "Number of lines per page"},
{MTAB_XTD|MTAB_VUN|MTAB_VALR, 0, "DEV", "DEV",
&lpt_setdev, &lpt_getdev, NULL, "Device address of printer defualt 124"},
{ 0 } { 0 }
}; };
@ -174,11 +184,19 @@ lpt_printline(UNIT *uptr, int nl) {
/* Stick a carraige return and linefeed as needed */ /* Stick a carraige return and linefeed as needed */
if (uptr->COL != 0 || trim) if (uptr->COL != 0 || trim)
lpt_buffer[uptr->POS++] = '\r'; lpt_buffer[uptr->POS++] = '\r';
if (nl) { if (nl != 0) {
lpt_buffer[uptr->POS++] = '\n'; lpt_buffer[uptr->POS++] = '\n';
uptr->LINE++; uptr->LINE++;
} }
if (nl > 0 && uptr->LINE >= ((int32)uptr->capac - MARGIN)) {
lpt_buffer[uptr->POS++] = '\f';
uptr->LINE = 0;
} else if (nl < 0 && uptr->LINE >= (int32)uptr->capac) {
uptr->LINE = 0;
}
sim_fwrite(&lpt_buffer, 1, uptr->POS, uptr->fileref); sim_fwrite(&lpt_buffer, 1, uptr->POS, uptr->fileref);
uptr->pos += uptr->POS;
uptr->COL = 0; uptr->COL = 0;
uptr->POS = 0; uptr->POS = 0;
if (ferror (uptr->fileref)) { /* error? */ if (ferror (uptr->fileref)) { /* error? */
@ -231,6 +249,8 @@ lpt_output(UNIT *uptr, char c) {
if (c == 0) if (c == 0)
return; return;
if (uptr->COL == 132)
lpt_printline(uptr, 1);
if ((uptr->flags & UNIT_UC) && (c & 0140) == 0140) if ((uptr->flags & UNIT_UC) && (c & 0140) == 0140)
c &= 0137; c &= 0137;
if ((uptr->flags & UNIT_UTF8) && c < 040) { if ((uptr->flags & UNIT_UTF8) && c < 040) {
@ -250,8 +270,6 @@ lpt_output(UNIT *uptr, char c) {
lpt_buffer[uptr->POS++] = c; lpt_buffer[uptr->POS++] = c;
uptr->COL++; uptr->COL++;
} }
if (uptr->COL == 132)
lpt_printline(uptr, 1);
return; return;
} }
@ -265,6 +283,7 @@ t_stat lpt_svc (UNIT *uptr)
set_interrupt(LP_DEVNUM, uptr->STATUS); set_interrupt(LP_DEVNUM, uptr->STATUS);
return SCPE_OK; return SCPE_OK;
} }
if ((uptr->flags & UNIT_ATT) == 0) { if ((uptr->flags & UNIT_ATT) == 0) {
uptr->STATUS |= ERR_FLG; uptr->STATUS |= ERR_FLG;
set_interrupt(LP_DEVNUM, (uptr->STATUS >> 3)); set_interrupt(LP_DEVNUM, (uptr->STATUS >> 3));
@ -300,45 +319,47 @@ t_stat lpt_svc (UNIT *uptr)
break; break;
case 012: /* Line feed, print line, space one line */ case 012: /* Line feed, print line, space one line */
lpt_printline(uptr, 1); lpt_printline(uptr, 1);
uptr->LINE++;
break; break;
case 014: /* Form feed, skip to top of page */ case 014: /* Form feed, skip to top of page */
lpt_printline(uptr, 0); lpt_printline(uptr, 0);
sim_fwrite("\014", 1, 1, uptr->fileref); sim_fwrite("\014", 1, 1, uptr->fileref);
uptr->pos++;
uptr->LINE = 0; uptr->LINE = 0;
break; break;
case 013: /* Vertical tab, Skip mod 20 */ case 013: /* Vertical tab, Skip mod 20 */
lpt_printline(uptr, 1); lpt_printline(uptr, 1);
while((uptr->LINE % 20) != 0) { while((uptr->LINE % 20) != 0) {
sim_fwrite("\r\n", 1, 2, uptr->fileref); sim_fwrite("\r\n", 1, 2, uptr->fileref);
uptr->pos+=2;
uptr->LINE++; uptr->LINE++;
} }
break; break;
case 020: /* Skip even lines */ case 020: /* Skip half page */
lpt_printline(uptr, 1);
while((uptr->LINE % 30) != 0) {
sim_fwrite("\r\n", 1, 2, uptr->fileref);
uptr->pos+=2;
uptr->LINE++;
}
break;
case 021: /* Skip even lines */
lpt_printline(uptr, 1); lpt_printline(uptr, 1);
while((uptr->LINE % 2) != 0) { while((uptr->LINE % 2) != 0) {
sim_fwrite("\r\n", 1, 2, uptr->fileref); sim_fwrite("\r\n", 1, 2, uptr->fileref);
uptr->pos+=2;
uptr->LINE++; uptr->LINE++;
} }
break; break;
case 021: /* Skip third lines */ case 022: /* Skip triple lines */
lpt_printline(uptr, 1); lpt_printline(uptr, 1);
while((uptr->LINE % 3) != 0) { while((uptr->LINE % 3) != 0) {
sim_fwrite("\r\n", 1, 2, uptr->fileref); sim_fwrite("\r\n", 1, 2, uptr->fileref);
uptr->pos+=2;
uptr->LINE++; uptr->LINE++;
} }
break; break;
case 022: /* Skip one line */ case 023: /* Skip one line */
lpt_printline(uptr, 1); lpt_printline(uptr, -1);
sim_fwrite("\r\n", 1, 2, uptr->fileref);
uptr->LINE+=2;
break;
case 023: /* Skip every 10 lines */
lpt_printline(uptr, 1);
while((uptr->LINE % 10) != 0) {
sim_fwrite("\r\n", 1, 2, uptr->fileref);
uptr->LINE++;
}
break; break;
default: /* Ignore */ default: /* Ignore */
break; break;
@ -388,12 +409,74 @@ t_stat lpt_detach (UNIT *uptr)
return detach_unit (uptr); return detach_unit (uptr);
} }
/*
* Line printer routines
*/
t_stat
lpt_setlpp(UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
t_value i;
t_stat r;
if (cptr == NULL)
return SCPE_ARG;
if (uptr == NULL)
return SCPE_IERR;
i = get_uint (cptr, 10, 100, &r);
if (r != SCPE_OK)
return SCPE_ARG;
uptr->capac = (t_addr)i;
uptr->LINE = 0;
return SCPE_OK;
}
t_stat
lpt_getlpp(FILE *st, UNIT *uptr, int32 v, CONST void *desc)
{
if (uptr == NULL)
return SCPE_IERR;
fprintf(st, "linesperpage=%d", uptr->capac);
return SCPE_OK;
}
t_stat
lpt_setdev(UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
t_value i;
t_stat r;
if (cptr == NULL)
return SCPE_ARG;
if (uptr == NULL)
return SCPE_IERR;
i = get_uint (cptr, 8, 01000, &r);
if (r != SCPE_OK)
return SCPE_ARG;
if ((i & 03) != 0)
return SCPE_ARG;
lpt_dib.dev_num = (int)i;
return SCPE_OK;
}
t_stat
lpt_getdev(FILE *st, UNIT *uptr, int32 v, CONST void *desc)
{
if (uptr == NULL)
return SCPE_IERR;
fprintf(st, "dev=%03o", lpt_dib.dev_num);
return SCPE_OK;
}
t_stat lpt_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr) t_stat lpt_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr)
{ {
fprintf (st, "Line Printer (LPT)\n\n"); fprintf (st, "Line Printer (LPT)\n\n");
fprintf (st, "The line printer (LPT) writes data to a disk file. The POS register specifies\n"); fprintf (st, "The line printer (LPT) writes data to a disk file. The POS register specifies\n");
fprintf (st, "the number of the next data item to be written. Thus, by changing POS, the\n"); fprintf (st, "the number of the next data item to be written. Thus, by changing POS, the\n");
fprintf (st, "user can backspace or advance the printer.\n"); fprintf (st, "user can backspace or advance the printer.\n");
fprintf (st, "The Line printer can be configured to any number of lines per page with the:\n");
fprintf (st, " sim> SET %s0 LINESPERPAGE=n\n\n", dptr->name);
fprintf (st, "The default is 66 lines per page.\n\n");
fprintf (st, "The device address of the Line printer can be changed\n");
fprintf (st, " sim> SET %s0 DEV=n\n\n", dptr->name);
fprint_set_help (st, dptr); fprint_set_help (st, dptr);
fprint_show_help (st, dptr); fprint_show_help (st, dptr);
fprint_reg_help (st, dptr); fprint_reg_help (st, dptr);

28
PDP10/kx10_mt.c
View file

@ -240,6 +240,8 @@ t_stat mt_devio(uint32 dev, uint64 *data) {
res |= ((uint64)wr_eor) << 21; res |= ((uint64)wr_eor) << 21;
if (dptr->flags & MTDF_TYPEB) if (dptr->flags & MTDF_TYPEB)
res |= 7LL; /* Force DATA PIA to 7 on type B */ res |= 7LL; /* Force DATA PIA to 7 on type B */
if (cpu_unit[0].flags & UNIT_ITSPAGE)
res |= SMASK;
*data = res; *data = res;
sim_debug(DEBUG_CONI, dptr, "MT CONI %03o status %06o %o %o PC=%06o\n", sim_debug(DEBUG_CONI, dptr, "MT CONI %03o status %06o %o %o PC=%06o\n",
dev, (uint32)res, mt_sel_unit, mt_pia, PC); dev, (uint32)res, mt_sel_unit, mt_pia, PC);
@ -613,7 +615,7 @@ t_stat mt_srv(UNIT * uptr)
if (uptr->flags & MTUF_7TRK) { if (uptr->flags & MTUF_7TRK) {
cc = 6 * (5 - uptr->CPOS); cc = 6 * (5 - uptr->CPOS);
ch = mt_buffer[uptr->BPOS]; ch = mt_buffer[uptr->BPOS];
if ((((uptr->CNTRL & ODD_PARITY) ? 0x40 : 0) ^ if ((((uptr->CNTRL & ODD_PARITY) ? 0x40 : 0) ^ (ch & 0x40) ^
parity_table[ch & 0x3f]) != 0) { parity_table[ch & 0x3f]) != 0) {
mt_status |= PARITY_ERR; mt_status |= PARITY_ERR;
} }
@ -692,8 +694,8 @@ t_stat mt_srv(UNIT * uptr)
if ((uptr->CNTRL & MT_BRFUL) != 0) { if ((uptr->CNTRL & MT_BRFUL) != 0) {
if (uptr->flags & MTUF_7TRK) { if (uptr->flags & MTUF_7TRK) {
ch = mt_buffer[uptr->BPOS]; ch = mt_buffer[uptr->BPOS];
if ((((uptr->CNTRL & ODD_PARITY) ? 0x40 : 0) ^ if ((((uptr->CNTRL & ODD_PARITY) ? 0x40 : 0) ^ (ch & 0x40) ^
parity_table[ch & 0x3f]) != (ch & 0x40)) { parity_table[ch & 0x3f]) != 0) {
mt_status |= PARITY_ERR; mt_status |= PARITY_ERR;
} }
mt_buffer[uptr->BPOS] &= 0x3f; mt_buffer[uptr->BPOS] &= 0x3f;
@ -869,16 +871,22 @@ t_stat mt_srv(UNIT * uptr)
} }
void mt_read_word(UNIT *uptr) { void mt_read_word(UNIT *uptr) {
int i, cc, ch; int i, cc, ch, cc_max;
mt_df10.buf = 0; mt_df10.buf = 0;
for(i = 0; i <= 4; i++) { cc_max = (uptr->flags & MTUF_7TRK) ? 5: 4;
cc = (8 * (3 - i)) + 4; for(i = 0; i <= cc_max; i++) {
ch = mt_buffer[uptr->BPOS]; ch = mt_buffer[uptr->BPOS];
if (cc < 0) if (uptr->flags & MTUF_7TRK) {
mt_df10.buf |= (uint64)(ch & 0x3f); cc = 6 * (5 - i);
else mt_df10.buf |= (uint64)(ch & 0x3f) << cc;
mt_df10.buf |= (uint64)(ch & 0xff) << cc; } else {
cc = (8 * (3 - i)) + 4;
if (cc < 0)
mt_df10.buf |= (uint64)(ch & 0x3f);
else
mt_df10.buf |= (uint64)(ch & 0xff) << cc;
}
uptr->BPOS++; uptr->BPOS++;
} }
} }

9
PDP10/kx10_sys.c
View file

@ -187,6 +187,9 @@ DEVICE *sim_devices[] = {
#endif #endif
#if NUM_DEVS_DPK > 0 #if NUM_DEVS_DPK > 0
&dpk_dev, &dpk_dev,
#endif
#if NUM_DEVS_AI > 0
&ai_dev,
#endif #endif
NULL NULL
}; };
@ -385,14 +388,16 @@ t_stat load_sblk (FILE *fileref)
and then comes the data. Last is a checksum word. */ and then comes the data. Last is a checksum word. */
while (get_evac (fileref, &word) == 0 && (word & SMASK)) { while (get_evac (fileref, &word) == 0 && (word & SMASK)) {
check = word; check = word;
count = (int)((((word >> 18) ^ RMASK) + 1) & RMASK); count = (word >> 18) & RMASK;
addr = word & RMASK; addr = word & RMASK;
while (count-- > 0) { while (count != 0) {
if (get_evac (fileref, &word)) if (get_evac (fileref, &word))
return SCPE_FMT; return SCPE_FMT;
M[addr++] = word; M[addr++] = word;
check = (check << 1) + (check >> 35) + word; check = (check << 1) + (check >> 35) + word;
check &= FMASK; check &= FMASK;
count++;
count &= RMASK;
} }
if (get_evac (fileref, &word)) if (get_evac (fileref, &word))
return SCPE_FMT; return SCPE_FMT;

4
Visual Studio Projects/PDP10-KA.vcproj
View file

@ -193,6 +193,10 @@
Name="Source Files" Name="Source Files"
Filter="cpp;c;cxx;def;odl;idl;hpj;bat;asm" Filter="cpp;c;cxx;def;odl;idl;hpj;bat;asm"
> >
<File
RelativePath="..\PDP10\ka10_ai.c"
>
</File>
<File <File
RelativePath="..\PDP10\ka10_auxcpu.c" RelativePath="..\PDP10\ka10_auxcpu.c"
> >

2
descrip.mms
View file

@ -655,7 +655,7 @@ KA10_SOURCE = $(KA10_DIR)KX10_CPU.C,\
$(KA10_DIR)PDP6_DTC.C,$(KA10_DIR)PDP6_MTC.C,\ $(KA10_DIR)PDP6_DTC.C,$(KA10_DIR)PDP6_MTC.C,\
$(KA10_DIR)PDP6_DSK.C,$(KA10_DIR)PDP6_DCS.C,\ $(KA10_DIR)PDP6_DSK.C,$(KA10_DIR)PDP6_DCS.C,\
$(KA10_DIR)KA10_DPK.C,$(KA10_DIR)KX10_DPY.C,\ $(KA10_DIR)KA10_DPK.C,$(KA10_DIR)KX10_DPY.C,\
$(SIMH_DIR)SIM_CARD.C $(KA10_DIR)KA10_AI.C,$(SIMH_DIR)SIM_CARD.C
KA10_OPTIONS = /INCL=($(SIMH_DIR),$(KA10_DIR))\ KA10_OPTIONS = /INCL=($(SIMH_DIR),$(KA10_DIR))\
/DEF=($(CC_DEFS),"KA=1","USE_INT64=1","USE_SIM_CARD=1"$(PCAP_DEFS)) /DEF=($(CC_DEFS),"KA=1","USE_INT64=1","USE_SIM_CARD=1"$(PCAP_DEFS))

BIN
doc/ka10_doc.doc
View file

Binary file not shown.

BIN
doc/ki10_doc.doc
View file

Binary file not shown.

3
makefile
View file

@ -1915,7 +1915,8 @@ KA10 = ${KA10D}/kx10_cpu.c ${KA10D}/kx10_sys.c ${KA10D}/kx10_df.c \
${KA10D}/ka10_ten11.c ${KA10D}/ka10_auxcpu.c $(KA10D)/ka10_pmp.c \ ${KA10D}/ka10_ten11.c ${KA10D}/ka10_auxcpu.c $(KA10D)/ka10_pmp.c \
${KA10D}/ka10_dkb.c ${KA10D}/pdp6_dct.c ${KA10D}/pdp6_dtc.c \ ${KA10D}/ka10_dkb.c ${KA10D}/pdp6_dct.c ${KA10D}/pdp6_dtc.c \
${KA10D}/pdp6_mtc.c ${KA10D}/pdp6_dsk.c ${KA10D}/pdp6_dcs.c \ ${KA10D}/pdp6_mtc.c ${KA10D}/pdp6_dsk.c ${KA10D}/pdp6_dcs.c \
${KA10D}/ka10_dpk.c ${KA10D}/kx10_dpy.c ${DISPLAYL} $(DISPLAY340) ${KA10D}/ka10_dpk.c ${KA10D}/kx10_dpy.c ${PDP10D}/ka10_ai.c \
${DISPLAYL} $(DISPLAY340)
KA10_OPT = -DKA=1 -DUSE_INT64 -I $(KA10D) -DUSE_SIM_CARD ${NETWORK_OPT} $(DISPLAY_OPT) $(KA10_DISPLAY_OPT) KA10_OPT = -DKA=1 -DUSE_INT64 -I $(KA10D) -DUSE_SIM_CARD ${NETWORK_OPT} $(DISPLAY_OPT) $(KA10_DISPLAY_OPT)
ifneq ($(PANDA_LIGHTS),) ifneq ($(PANDA_LIGHTS),)
# ONLY for Panda display. # ONLY for Panda display.