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SDS: Install better fix for 2x real-time clock speed problem

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Received better fix from Mark Pizzolato for the problem of having 120 clock interrupts per second instead of 60. Tested for several hours and verified that wall-clock time matches TSS monitor time.
This commit is contained in:
Mark Emmer 2014-03-04 17:39:34 -06:00
parent 0c56397289
commit 91c78b79ef
1 changed files with 3 additions and 5 deletions
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8
SDS/sds_cpu.c
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@ -1582,17 +1582,14 @@ return SCPE_OK;
a unit service routine and a reset routine. The service routine
sets an interrupt that invokes the clock counter. The clock counter
is a "one instruction interrupt", and only MIN/SKR are valid.
Temporarily divide rtc_tps by 2 because clock is running twice as
fast as it should. Eventually have to find problem in the clock
calibration or setup code.
*/
t_stat rtc_svc (UNIT *uptr)
{
if (rtc_pie) /* set pulse intr */
int_req = int_req | INT_RTCP;
sim_activate (&rtc_unit, sim_rtcn_calb (rtc_tps/2, TMR_RTC)); /* reactivate */
rtc_unit.wait = sim_rtcn_calb (rtc_tps, TMR_RTC); /* calibrate */
sim_activate (&rtc_unit, rtc_unit.wait); /* reactivate */
return SCPE_OK;
}
@ -1626,6 +1623,7 @@ return SCPE_OK;
t_stat rtc_reset (DEVICE *dptr)
{
rtc_pie = 0; /* disable pulse */
rtc_unit.wait = sim_rtcn_init (rtc_unit.wait, TMR_RTC); /* initialize clock calibration */
sim_activate (&rtc_unit, rtc_unit.wait); /* activate unit */
return SCPE_OK;
}