SHOW IOSPACE, again
Show IOSPACE doesn't always get the number of devices right due to device creativity. o The distinction between UNIT and DEVICE has blurred o MUX devices merge several physical devices into one device/unit o Dynamic device sizing has made things more volatile. This edit solves the problem for SHOW IOSPACE by adding an (optional) word to the DIBs. The word contains the amount of IO space consumed by each instance of the physical device that's being emulated. E.G., if it's a DZ11, the device is the DZ11 module, or 8 lines, even though the MUX device may support 32. This enables SHOW IOSPACE to determine the number of physical devices being emulated, which is what folks need when configuring software. The word may have other uses - in a generic dynamic device sizing routine - which is why the amount of IOSPACE per device was chosen rather than the 'number of physical devices.' The edit should not make any existing device regress. If the new word (ulnt) is zero (not initialized), SHOW IOSPACE will default to the number of units in the device, or if there's no device (CPUs), 1 as before. If it is present, the number of devices is the calculated as total allocation/allocation-per-device. The edit updates all the devices that seem to require this treatment, and all the processors that define the UNIBUS/QBUS DIBs.
This commit is contained in:
parent
95e54dc60e
commit
91c7d26095
34 changed files with 57 additions and 32 deletions
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@ -613,6 +613,7 @@ struct pdp_dib {
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int32 vloc; /* locator */
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int32 vloc; /* locator */
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int32 vec; /* value */
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int32 vec; /* value */
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int32 (*ack[VEC_DEVMAX])(void); /* ack routines */
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int32 (*ack[VEC_DEVMAX])(void); /* ack routines */
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uint32 ulnt; /* IO length per unit */
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};
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};
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typedef struct pdp_dib DIB;
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typedef struct pdp_dib DIB;
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@ -1129,8 +1129,8 @@ while (done == 0) { /* sort ascending */
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}
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}
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}
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}
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} /* end while */
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} /* end while */
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fprintf (st, " Address Vector BR Device\n"
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fprintf (st, " Address Vector BR # Device\n"
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"----------------- -------- -- ------\n");
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"----------------- -------- -- -- ------\n");
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for (i = 0; dib_tab[i] != NULL; i++) { /* print table */
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for (i = 0; dib_tab[i] != NULL; i++) { /* print table */
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for (j = 0, dptr = NULL; sim_devices[j] != NULL; j++) {
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for (j = 0, dptr = NULL; sim_devices[j] != NULL; j++) {
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if (((DIB*) sim_devices[j]->ctxt) == dib_tab[i]) {
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if (((DIB*) sim_devices[j]->ctxt) == dib_tab[i]) {
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@ -1156,7 +1156,8 @@ for (i = 0; dib_tab[i] != NULL; i++) { /* print table */
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(dib_tab[i]->vloc<=19)? 5: 4);
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(dib_tab[i]->vloc<=19)? 5: 4);
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else
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else
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fprintf (st, " ");
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fprintf (st, " ");
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fprintf (st, " %s\n", dptr? sim_dname (dptr): "CPU");
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fprintf (st, " %2u %s\n", (dib_tab[i]->ulnt? dib_tab[i]->lnt/dib_tab[i]->ulnt:
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(dptr? dptr->numunits: 1)), dptr? sim_dname (dptr): "CPU");
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}
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}
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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@ -387,7 +387,7 @@ t_stat rp_set_size (UNIT *uptr, int32 val, char *cptr, void *desc);
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DIB rp_dib = {
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DIB rp_dib = {
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IOBA_RP, IOLN_RP, &rp_rd, &rp_wr,
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IOBA_RP, IOLN_RP, &rp_rd, &rp_wr,
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1, IVCL (RP), VEC_RP, { &rp_inta }
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1, IVCL (RP), VEC_RP, { &rp_inta }, IOLN_RP
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};
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};
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UNIT rp_unit[] = {
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UNIT rp_unit[] = {
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@ -359,7 +359,7 @@ t_stat tu_map_err (UNIT *uptr, t_stat st, t_bool qdt);
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DIB tu_dib = {
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DIB tu_dib = {
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IOBA_TU, IOLN_TU, &tu_rd, &tu_wr,
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IOBA_TU, IOLN_TU, &tu_rd, &tu_wr,
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1, IVCL (TU), VEC_TU, { &tu_inta }
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1, IVCL (TU), VEC_TU, { &tu_inta }, IOLN_TU,
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};
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};
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UNIT tu_unit[] = {
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UNIT tu_unit[] = {
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@ -154,7 +154,7 @@ char *dcx_description (DEVICE *dptr);
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DIB dci_dib = {
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DIB dci_dib = {
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IOBA_AUTO, IOLN_DC * DCX_LINES, &dcx_rd, &dcx_wr,
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IOBA_AUTO, IOLN_DC * DCX_LINES, &dcx_rd, &dcx_wr,
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2, IVCL (DCI), VEC_AUTO, { &dci_iack, &dco_iack }
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2, IVCL (DCI), VEC_AUTO, { &dci_iack, &dco_iack }, IOLN_DC,
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};
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};
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UNIT dci_unit = { UDATA (&dci_svc, 0, 0), KBD_POLL_WAIT };
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UNIT dci_unit = { UDATA (&dci_svc, 0, 0), KBD_POLL_WAIT };
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@ -511,6 +511,7 @@ struct pdp_dib {
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int32 vloc; /* locator */
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int32 vloc; /* locator */
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int32 vec; /* value */
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int32 vec; /* value */
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int32 (*ack[VEC_DEVMAX])(void); /* ack routines */
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int32 (*ack[VEC_DEVMAX])(void); /* ack routines */
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uint32 ulnt; /* IO length per-unit */
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};
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};
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typedef struct pdp_dib DIB;
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typedef struct pdp_dib DIB;
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@ -118,7 +118,7 @@ void dlx_reset_ln (int32 ln);
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DIB dli_dib = {
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DIB dli_dib = {
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IOBA_AUTO, IOLN_DL * DLX_LINES, &dlx_rd, &dlx_wr,
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IOBA_AUTO, IOLN_DL * DLX_LINES, &dlx_rd, &dlx_wr,
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2, IVCL (DLI), VEC_AUTO, { &dli_iack, &dlo_iack }
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2, IVCL (DLI), VEC_AUTO, { &dli_iack, &dlo_iack }, IOLN_DL,
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};
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};
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UNIT dli_unit = { UDATA (&dli_svc, 0, 0), KBD_POLL_WAIT };
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UNIT dli_unit = { UDATA (&dli_svc, 0, 0), KBD_POLL_WAIT };
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@ -160,7 +160,7 @@ DEVICE dli_dev = {
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1, 10, 31, 1, 8, 8,
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1, 10, 31, 1, 8, 8,
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NULL, NULL, &dlx_reset,
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NULL, NULL, &dlx_reset,
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NULL, &dlx_attach, &dlx_detach,
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NULL, &dlx_attach, &dlx_detach,
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&dli_dib, DEV_UBUS | DEV_QBUS | DEV_DISABLE | DEV_DIS | DEV_MUX
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&dli_dib, DEV_UBUS | DEV_QBUS | DEV_DISABLE | DEV_DIS
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};
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};
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/* DLO data structures
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/* DLO data structures
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@ -219,7 +219,7 @@ DEVICE dlo_dev = {
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DLX_LINES, 10, 31, 1, 8, 8,
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DLX_LINES, 10, 31, 1, 8, 8,
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NULL, NULL, &dlx_reset,
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NULL, NULL, &dlx_reset,
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NULL, NULL, NULL,
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NULL, NULL, NULL,
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NULL, DEV_UBUS | DEV_QBUS | DEV_DISABLE | DEV_DIS
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NULL, DEV_UBUS | DEV_QBUS | DEV_DISABLE | DEV_DIS | DEV_MUX
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};
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};
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/* Terminal input routines */
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/* Terminal input routines */
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@ -293,7 +293,8 @@ char *dz_description (DEVICE *dptr);
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DIB dz_dib = {
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DIB dz_dib = {
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IOBA_AUTO, IOLN_DZ * DZ_MUXES, &dz_rd, &dz_wr,
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IOBA_AUTO, IOLN_DZ * DZ_MUXES, &dz_rd, &dz_wr,
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2, IVCL (DZRX), VEC_AUTO, { &dz_rxinta, &dz_txinta }
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2, IVCL (DZRX), VEC_AUTO, { &dz_rxinta, &dz_txinta },
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IOLN_DZ,
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};
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};
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UNIT dz_unit = { UDATA (&dz_svc, UNIT_IDLE|UNIT_ATTABLE|DZ_8B_DFLT, 0) };
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UNIT dz_unit = { UDATA (&dz_svc, UNIT_IDLE|UNIT_ATTABLE|DZ_8B_DFLT, 0) };
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@ -581,7 +581,7 @@ char *hk_description (DEVICE *dptr);
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DIB hk_dib = {
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DIB hk_dib = {
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IOBA_AUTO, IOLN_HK, &hk_rd, &hk_wr,
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IOBA_AUTO, IOLN_HK, &hk_rd, &hk_wr,
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1, IVCL (HK), VEC_AUTO, { NULL }
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1, IVCL (HK), VEC_AUTO, { NULL }, IOLN_HK,
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};
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};
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UNIT hk_unit[] = {
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UNIT hk_unit[] = {
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@ -298,7 +298,7 @@ t_stat show_iospace (FILE *st, UNIT *uptr, int32 val, void *desc)
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uint32 i, j;
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uint32 i, j;
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DEVICE *dptr;
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DEVICE *dptr;
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DIB *dibp;
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DIB *dibp;
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uint32 maxaddr, maxname;
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uint32 maxaddr, maxname, maxdev;
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int32 maxvec, vecwid;
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int32 maxvec, vecwid;
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char valbuf[40];
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char valbuf[40];
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@ -308,6 +308,7 @@ if (build_dib_tab ()) /* build IO page */
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maxaddr = 0;
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maxaddr = 0;
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maxvec = 0;
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maxvec = 0;
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maxname = 0;
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maxname = 0;
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maxdev = 1;
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for (i = 0, dibp = NULL; i < (IOPAGESIZE >> 1); i++) { /* loop thru entries */
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for (i = 0, dibp = NULL; i < (IOPAGESIZE >> 1); i++) { /* loop thru entries */
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size_t l;
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size_t l;
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@ -326,6 +327,10 @@ for (i = 0, dibp = NULL; i < (IOPAGESIZE >> 1); i++) { /* loop thru entries */
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l = strlen (dptr? sim_dname (dptr): "CPU");
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l = strlen (dptr? sim_dname (dptr): "CPU");
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if (l>maxname)
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if (l>maxname)
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maxname = (int32)l;
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maxname = (int32)l;
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j = (dibp->ulnt? dibp->lnt/dibp->ulnt:
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(dptr? dptr->numunits: 1));
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if (j > maxdev)
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maxdev = j;
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} /* end if */
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} /* end if */
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} /* end for i */
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} /* end for i */
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maxaddr = fprint_val (NULL, (t_value) dibp->ba, DEV_RDX, 32, PV_LEFT);
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maxaddr = fprint_val (NULL, (t_value) dibp->ba, DEV_RDX, 32, PV_LEFT);
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@ -333,6 +338,8 @@ sprintf (valbuf, "%03o", maxvec);
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vecwid = maxvec = (int32) strlen (valbuf);
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vecwid = maxvec = (int32) strlen (valbuf);
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if (vecwid < 3)
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if (vecwid < 3)
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vecwid = 3;
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vecwid = 3;
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sprintf (valbuf, "%u", maxdev);
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maxdev = (uint32)strlen (valbuf);
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j = strlen ("Address");
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j = strlen ("Address");
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i = (maxaddr*2)+3+1;
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i = (maxaddr*2)+3+1;
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maxvec = i+j;
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maxvec = i+j;
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fprintf (st, " %*.*sVector%*.*s", i/2, i/2, " ", (i/2)+i%2, (i/2)+i%2, " ");
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fprintf (st, " %*.*sVector%*.*s", i/2, i/2, " ", (i/2)+i%2, (i/2)+i%2, " ");
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fprintf (st, " BR Device\n");
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fprintf (st, " BR %*.*s# Device\n", (maxdev -1), (maxdev-1));
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for (i = 0; i < maxaddr; i++)
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for (i = 0; i < maxaddr; i++)
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fputc ('-', st);
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fputc ('-', st);
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fprintf (st, " ");
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fprintf (st, " ");
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@ -360,6 +367,10 @@ for (i = 0; i < (uint32)maxvec; i++)
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fputc ('-', st);
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fputc ('-', st);
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fprintf (st, " -- ");
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fprintf (st, " -- ");
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for (i=0; i < maxdev; i++) {
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fputc ('-', st);
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}
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fputc (' ', st);
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i = strlen ("Device");
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i = strlen ("Device");
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if (maxname < i)
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if (maxname < i)
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@ -397,7 +408,9 @@ for (i = 0, dibp = NULL; i < (IOPAGESIZE >> 1); i++) { /* loop thru entries */
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fprintf (st, " %2u", dibp->vloc/32);
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fprintf (st, " %2u", dibp->vloc/32);
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else
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else
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fprintf (st, " ");
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fprintf (st, " ");
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fprintf (st, " %s\n", dptr? sim_dname (dptr): "CPU");
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fprintf (st, " %*u %s\n", maxdev, (dibp->ulnt? dibp->lnt/dibp->ulnt:
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(dptr? dptr->numunits: 1)),
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dptr? sim_dname (dptr): "CPU");
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} /* end if */
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} /* end if */
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} /* end for i */
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} /* end for i */
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return SCPE_OK;
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return SCPE_OK;
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@ -201,7 +201,7 @@ static DIB kg_dib = {
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(IOLN_KG + 2) * KG_UNITS,
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(IOLN_KG + 2) * KG_UNITS,
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&kg_rd,
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&kg_rd,
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&kg_wr,
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&kg_wr,
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0, 0, 0, { NULL }
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0, 0, 0, { NULL }, IOLN_KG+2
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};
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};
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static UNIT kg_unit[] = {
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static UNIT kg_unit[] = {
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@ -187,7 +187,7 @@ static DIB rc_dib = {
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IOLN_RC,
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IOLN_RC,
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&rc_rd,
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&rc_rd,
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&rc_wr,
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&rc_wr,
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1, IVCL (RC), VEC_AUTO, { NULL }
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1, IVCL (RC), VEC_AUTO, { NULL }, IOLN_RC,
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};
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};
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static UNIT rc_unit = {
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static UNIT rc_unit = {
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DIB rf_dib = {
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DIB rf_dib = {
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IOBA_AUTO, IOLN_RF, &rf_rd, &rf_wr,
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IOBA_AUTO, IOLN_RF, &rf_rd, &rf_wr,
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1, IVCL (RF), VEC_AUTO, {NULL}
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1, IVCL (RF), VEC_AUTO, {NULL}, IOLN_RF,
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};
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};
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@ -207,7 +207,7 @@ static int32 mba_mapofs[(MBA_OFSMASK + 1) >> 1] = {
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DIB mba0_dib = {
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DIB mba0_dib = {
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IOBA_AUTO, IOLN_RP, &mba_rd, &mba_wr,
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IOBA_AUTO, IOLN_RP, &mba_rd, &mba_wr,
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1, IVCL (RP), VEC_AUTO, { &mba0_inta }
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1, IVCL (RP), VEC_AUTO, { &mba0_inta }, IOLN_RP,
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};
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};
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UNIT mba0_unit = { UDATA (NULL, 0, 0) };
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UNIT mba0_unit = { UDATA (NULL, 0, 0) };
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@ -216,7 +216,7 @@ t_stat rk_boot (int32 unitno, DEVICE *dptr);
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DIB rk_dib = {
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DIB rk_dib = {
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IOBA_AUTO, IOLN_RK, &rk_rd, &rk_wr,
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IOBA_AUTO, IOLN_RK, &rk_rd, &rk_wr,
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1, IVCL (RK), VEC_AUTO, { &rk_inta }
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1, IVCL (RK), VEC_AUTO, { &rk_inta }, IOLN_RK,
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};
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};
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UNIT rk_unit[] = {
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UNIT rk_unit[] = {
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@ -275,7 +275,7 @@ char *rl_description (DEVICE *dptr);
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static DIB rl_dib = {
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static DIB rl_dib = {
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IOBA_AUTO, IOLN_RL, &rl_rd, &rl_wr,
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IOBA_AUTO, IOLN_RL, &rl_rd, &rl_wr,
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1, IVCL (RL), VEC_AUTO, { NULL } };
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1, IVCL (RL), VEC_AUTO, { NULL }, IOLN_RL };
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static UNIT rl_unit[] = {
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static UNIT rl_unit[] = {
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{ UDATA (&rl_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
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{ UDATA (&rl_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
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@ -857,7 +857,7 @@ MSC rq_ctx = { 0 };
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DIB rq_dib = {
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DIB rq_dib = {
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IOBA_AUTO, IOLN_RQ, &rq_rd, &rq_wr,
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IOBA_AUTO, IOLN_RQ, &rq_rd, &rq_wr,
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1, IVCL (RQ), 0, { &rq_inta }
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1, IVCL (RQ), 0, { &rq_inta }, IOLN_RQ
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};
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};
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UNIT rq_unit[] = {
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UNIT rq_unit[] = {
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@ -144,7 +144,7 @@ void rx_done (int32 esr_flags, int32 new_ecode);
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DIB rx_dib = {
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DIB rx_dib = {
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IOBA_AUTO, IOLN_RX, &rx_rd, &rx_wr,
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IOBA_AUTO, IOLN_RX, &rx_rd, &rx_wr,
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1, IVCL (RX), VEC_AUTO, { NULL }
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1, IVCL (RX), VEC_AUTO, { NULL }, IOLN_RX,
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};
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};
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UNIT rx_unit[] = {
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UNIT rx_unit[] = {
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@ -180,7 +180,7 @@ char *ry_description (DEVICE *dptr);
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DIB ry_dib = {
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DIB ry_dib = {
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IOBA_AUTO, IOLN_RY, &ry_rd, &ry_wr,
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IOBA_AUTO, IOLN_RY, &ry_rd, &ry_wr,
|
||||||
1, IVCL (RY), VEC_AUTO, { NULL }
|
1, IVCL (RY), VEC_AUTO, { NULL }, IOLN_RY,
|
||||||
};
|
};
|
||||||
|
|
||||||
UNIT ry_unit[] = {
|
UNIT ry_unit[] = {
|
||||||
|
|
|
@ -150,7 +150,7 @@ uint32 ta_crc (uint8 *buf, uint32 cnt);
|
||||||
|
|
||||||
DIB ta_dib = {
|
DIB ta_dib = {
|
||||||
IOBA_AUTO, IOLN_TA, &ta_rd, &ta_wr,
|
IOBA_AUTO, IOLN_TA, &ta_rd, &ta_wr,
|
||||||
1, IVCL (TA), VEC_AUTO, { NULL }
|
1, IVCL (TA), VEC_AUTO, { NULL }, IOLN_TA
|
||||||
};
|
};
|
||||||
|
|
||||||
UNIT ta_unit[] = {
|
UNIT ta_unit[] = {
|
||||||
|
|
|
@ -319,7 +319,7 @@ int32 dt_gethdr (UNIT *uptr, int32 blk, int32 relpos);
|
||||||
|
|
||||||
DIB dt_dib = {
|
DIB dt_dib = {
|
||||||
IOBA_AUTO, IOLN_TC, &dt_rd, &dt_wr,
|
IOBA_AUTO, IOLN_TC, &dt_rd, &dt_wr,
|
||||||
1, IVCL (DTA), VEC_AUTO, { NULL }
|
1, IVCL (DTA), VEC_AUTO, { NULL }, IOLN_TC,
|
||||||
};
|
};
|
||||||
|
|
||||||
UNIT dt_unit[] = {
|
UNIT dt_unit[] = {
|
||||||
|
|
|
@ -191,7 +191,7 @@ t_stat tm_vlock (UNIT *uptr, int32 val, char *cptr, void *desc);
|
||||||
|
|
||||||
DIB tm_dib = {
|
DIB tm_dib = {
|
||||||
IOBA_AUTO, IOLN_TM, &tm_rd, &tm_wr,
|
IOBA_AUTO, IOLN_TM, &tm_rd, &tm_wr,
|
||||||
1, IVCL (TM), VEC_AUTO, { NULL }
|
1, IVCL (TM), VEC_AUTO, { NULL }, IOLN_TM,
|
||||||
};
|
};
|
||||||
|
|
||||||
UNIT tm_unit[] = {
|
UNIT tm_unit[] = {
|
||||||
|
|
|
@ -417,7 +417,7 @@ UNIT *tq_getucb (uint32 lu);
|
||||||
|
|
||||||
DIB tq_dib = {
|
DIB tq_dib = {
|
||||||
IOBA_AUTO, IOLN_TQ, &tq_rd, &tq_wr,
|
IOBA_AUTO, IOLN_TQ, &tq_rd, &tq_wr,
|
||||||
1, IVCL (TQ), 0, { &tq_inta }
|
1, IVCL (TQ), 0, { &tq_inta }, IOLN_TQ,
|
||||||
};
|
};
|
||||||
|
|
||||||
UNIT tq_unit[] = {
|
UNIT tq_unit[] = {
|
||||||
|
|
|
@ -311,7 +311,7 @@ char *ts_description (DEVICE *dptr);
|
||||||
|
|
||||||
DIB ts_dib = {
|
DIB ts_dib = {
|
||||||
IOBA_AUTO, IOLN_TS, &ts_rd, &ts_wr,
|
IOBA_AUTO, IOLN_TS, &ts_rd, &ts_wr,
|
||||||
1, IVCL (TS), VEC_AUTO, { NULL }
|
1, IVCL (TS), VEC_AUTO, { NULL }, IOLN_TS
|
||||||
};
|
};
|
||||||
|
|
||||||
UNIT ts_unit = { UDATA (&ts_svc, UNIT_ATTABLE + UNIT_ROABLE + UNIT_DISABLE, 0) };
|
UNIT ts_unit = { UDATA (&ts_svc, UNIT_ATTABLE + UNIT_ROABLE + UNIT_DISABLE, 0) };
|
||||||
|
|
|
@ -361,7 +361,8 @@ static DIB vh_dib = {
|
||||||
2, /* # of vectors */
|
2, /* # of vectors */
|
||||||
IVCL (VHRX),
|
IVCL (VHRX),
|
||||||
VEC_FLOAT,
|
VEC_FLOAT,
|
||||||
{ &vh_rxinta, &vh_txinta } /* int. ack. routines */
|
{ &vh_rxinta, &vh_txinta }, /* int. ack. routines */
|
||||||
|
IOLN_VH, /* IO space per device */
|
||||||
};
|
};
|
||||||
|
|
||||||
static UNIT vh_unit[VH_MUXES] = {
|
static UNIT vh_unit[VH_MUXES] = {
|
||||||
|
|
|
@ -326,7 +326,7 @@ struct xq_device xqb = {
|
||||||
#define IOLN_XQ 020
|
#define IOLN_XQ 020
|
||||||
|
|
||||||
DIB xqa_dib = { IOBA_AUTO, IOLN_XQ, &xq_rd, &xq_wr,
|
DIB xqa_dib = { IOBA_AUTO, IOLN_XQ, &xq_rd, &xq_wr,
|
||||||
1, IVCL (XQ), 0, { &xq_int } };
|
1, IVCL (XQ), 0, { &xq_int }, IOLN_XQ };
|
||||||
|
|
||||||
UNIT xqa_unit[] = {
|
UNIT xqa_unit[] = {
|
||||||
{ UDATA (&xq_svc, UNIT_IDLE|UNIT_ATTABLE|UNIT_DISABLE, 2047) }, /* receive timer */
|
{ UDATA (&xq_svc, UNIT_IDLE|UNIT_ATTABLE|UNIT_DISABLE, 2047) }, /* receive timer */
|
||||||
|
|
|
@ -134,7 +134,7 @@ char *xu_description (DEVICE *dptr);
|
||||||
#define IOLN_XU 010
|
#define IOLN_XU 010
|
||||||
|
|
||||||
DIB xua_dib = { IOBA_AUTO, IOLN_XU, &xu_rd, &xu_wr,
|
DIB xua_dib = { IOBA_AUTO, IOLN_XU, &xu_rd, &xu_wr,
|
||||||
1, IVCL (XU), VEC_AUTO, {&xu_int} };
|
1, IVCL (XU), VEC_AUTO, {&xu_int}, IOLN_XU };
|
||||||
|
|
||||||
UNIT xua_unit[] = {
|
UNIT xua_unit[] = {
|
||||||
{ UDATA (&xu_svc, UNIT_IDLE|UNIT_ATTABLE|UNIT_DISABLE, 0) }, /* receive timer */
|
{ UDATA (&xu_svc, UNIT_IDLE|UNIT_ATTABLE|UNIT_DISABLE, 0) }, /* receive timer */
|
||||||
|
@ -234,7 +234,7 @@ DEVICE xu_dev = {
|
||||||
#define IOLN_XU 010
|
#define IOLN_XU 010
|
||||||
|
|
||||||
DIB xub_dib = { IOBA_AUTO, IOLN_XU, &xu_rd, &xu_wr,
|
DIB xub_dib = { IOBA_AUTO, IOLN_XU, &xu_rd, &xu_wr,
|
||||||
1, IVCL (XU), 0, { &xu_int } };
|
1, IVCL (XU), 0, { &xu_int }, IOLN_XU };
|
||||||
|
|
||||||
UNIT xub_unit[] = {
|
UNIT xub_unit[] = {
|
||||||
{ UDATA (&xu_svc, UNIT_IDLE|UNIT_ATTABLE|UNIT_DISABLE, 0) } /* receive timer */
|
{ UDATA (&xu_svc, UNIT_IDLE|UNIT_ATTABLE|UNIT_DISABLE, 0) } /* receive timer */
|
||||||
|
|
|
@ -196,6 +196,7 @@ typedef struct {
|
||||||
int32 vloc; /* locator */
|
int32 vloc; /* locator */
|
||||||
int32 vec; /* value */
|
int32 vec; /* value */
|
||||||
int32 (*ack[VEC_DEVMAX])(void); /* ack routine */
|
int32 (*ack[VEC_DEVMAX])(void); /* ack routine */
|
||||||
|
uint32 ulnt; /* IO length per unit */
|
||||||
} DIB;
|
} DIB;
|
||||||
|
|
||||||
/* Qbus I/O page layout - see pdp11_io_lib.c for address layout details */
|
/* Qbus I/O page layout - see pdp11_io_lib.c for address layout details */
|
||||||
|
|
|
@ -243,6 +243,7 @@ typedef struct {
|
||||||
int32 vloc; /* locator */
|
int32 vloc; /* locator */
|
||||||
int32 vec; /* value */
|
int32 vec; /* value */
|
||||||
int32 (*ack[VEC_DEVMAX])(void); /* ack routine */
|
int32 (*ack[VEC_DEVMAX])(void); /* ack routine */
|
||||||
|
uint32 ulnt; /* IO length per unit */
|
||||||
} DIB;
|
} DIB;
|
||||||
|
|
||||||
/* Qbus I/O page layout - see pdp11_io_lib.c for address layout details */
|
/* Qbus I/O page layout - see pdp11_io_lib.c for address layout details */
|
||||||
|
|
|
@ -237,6 +237,7 @@ typedef struct {
|
||||||
int32 vloc; /* locator */
|
int32 vloc; /* locator */
|
||||||
int32 vec; /* value */
|
int32 vec; /* value */
|
||||||
int32 (*ack[VEC_DEVMAX])(void); /* ack routine */
|
int32 (*ack[VEC_DEVMAX])(void); /* ack routine */
|
||||||
|
uint32 ulnt; /* IO length per unit */
|
||||||
} DIB;
|
} DIB;
|
||||||
|
|
||||||
/* Unibus I/O page layout - see pdp11_io_lib.c for address layout details */
|
/* Unibus I/O page layout - see pdp11_io_lib.c for address layout details */
|
||||||
|
|
|
@ -274,6 +274,7 @@ typedef struct {
|
||||||
int32 vloc; /* locator */
|
int32 vloc; /* locator */
|
||||||
int32 vec; /* value */
|
int32 vec; /* value */
|
||||||
int32 (*ack[VEC_DEVMAX])(void); /* ack routine */
|
int32 (*ack[VEC_DEVMAX])(void); /* ack routine */
|
||||||
|
uint32 ulnt; /* IO length per unit */
|
||||||
} DIB;
|
} DIB;
|
||||||
|
|
||||||
/* Unibus I/O page layout - see pdp11_io_lib.c for address layout details
|
/* Unibus I/O page layout - see pdp11_io_lib.c for address layout details
|
||||||
|
|
|
@ -286,6 +286,7 @@ typedef struct {
|
||||||
int32 vloc; /* locator */
|
int32 vloc; /* locator */
|
||||||
int32 vec; /* value */
|
int32 vec; /* value */
|
||||||
int32 (*ack[VEC_DEVMAX])(void); /* ack routine */
|
int32 (*ack[VEC_DEVMAX])(void); /* ack routine */
|
||||||
|
uint32 ulnt; /* IO length per unit */
|
||||||
} DIB;
|
} DIB;
|
||||||
|
|
||||||
/* Unibus I/O page layout - see pdp11_io_lib.c for address layout details
|
/* Unibus I/O page layout - see pdp11_io_lib.c for address layout details
|
||||||
|
|
|
@ -321,6 +321,7 @@ typedef struct {
|
||||||
int32 vloc; /* locator */
|
int32 vloc; /* locator */
|
||||||
int32 vec; /* value */
|
int32 vec; /* value */
|
||||||
int32 (*ack[VEC_DEVMAX])(void); /* ack routine */
|
int32 (*ack[VEC_DEVMAX])(void); /* ack routine */
|
||||||
|
uint32 ulnt; /* IO length per unit */
|
||||||
} DIB;
|
} DIB;
|
||||||
|
|
||||||
/* Unibus I/O page layout - XUB,RQB,RQC,RQD float based on number of DZ's
|
/* Unibus I/O page layout - XUB,RQB,RQC,RQD float based on number of DZ's
|
||||||
|
|
|
@ -284,6 +284,7 @@ typedef struct {
|
||||||
int32 vloc; /* locator */
|
int32 vloc; /* locator */
|
||||||
int32 vec; /* value */
|
int32 vec; /* value */
|
||||||
int32 (*ack[VEC_DEVMAX])(void); /* ack routine */
|
int32 (*ack[VEC_DEVMAX])(void); /* ack routine */
|
||||||
|
uint32 ulnt; /* IO length per unit */
|
||||||
} DIB;
|
} DIB;
|
||||||
|
|
||||||
/* Qbus I/O page layout - see pdp11_io_lib.c for address layout details */
|
/* Qbus I/O page layout - see pdp11_io_lib.c for address layout details */
|
||||||
|
|
Loading…
Add table
Reference in a new issue